2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: MAC routines
29 * MACbIsRegBitsOn - Test if All test Bits On
30 * MACbIsRegBitsOff - Test if All test Bits Off
31 * MACbIsIntDisable - Test if MAC interrupt disable
32 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
33 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
34 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
35 * MACvSetLoopbackMode - Set MAC Loopback Mode
36 * MACvSaveContext - Save Context of MAC Registers
37 * MACvRestoreContext - Restore Context of MAC Registers
38 * MACbSoftwareReset - Software Reset MAC
39 * MACbSafeRxOff - Turn Off MAC Rx
40 * MACbSafeTxOff - Turn Off MAC Tx
41 * MACbSafeStop - Stop MAC function
42 * MACbShutdown - Shut down MAC
43 * MACvInitialize - Initialize MAC
44 * MACvSetCurrRxDescAddr - Set Rx Descriptors Address
45 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
46 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
47 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
50 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
51 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
52 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
61 * Test if all test bits on
65 * dwIoBase - Base Address for MAC
66 * byRegOfs - Offset of MAC Register
67 * byTestBits - Test bits
71 * Return Value: true if all test bits On; otherwise false
74 bool MACbIsRegBitsOn(void __iomem
*dwIoBase
, unsigned char byRegOfs
, unsigned char byTestBits
)
78 VNSvInPortB(dwIoBase
+ byRegOfs
, &byData
);
79 return (byData
& byTestBits
) == byTestBits
;
84 * Test if all test bits off
88 * dwIoBase - Base Address for MAC
89 * byRegOfs - Offset of MAC Register
90 * byTestBits - Test bits
94 * Return Value: true if all test bits Off; otherwise false
97 bool MACbIsRegBitsOff(void __iomem
*dwIoBase
, unsigned char byRegOfs
, unsigned char byTestBits
)
101 VNSvInPortB(dwIoBase
+ byRegOfs
, &byData
);
102 return !(byData
& byTestBits
);
107 * Test if MAC interrupt disable
111 * dwIoBase - Base Address for MAC
115 * Return Value: true if interrupt is disable; otherwise false
118 bool MACbIsIntDisable(void __iomem
*dwIoBase
)
120 unsigned long dwData
;
122 VNSvInPortD(dwIoBase
+ MAC_REG_IMR
, &dwData
);
131 * Set 802.11 Short Retry Limit
135 * dwIoBase - Base Address for MAC
136 * byRetryLimit- Retry Limit
143 void MACvSetShortRetryLimit(void __iomem
*dwIoBase
, unsigned char byRetryLimit
)
146 VNSvOutPortB(dwIoBase
+ MAC_REG_SRT
, byRetryLimit
);
151 * Get 802.11 Short Retry Limit
155 * dwIoBase - Base Address for MAC
157 * pbyRetryLimit - Retry Limit Get
162 void MACvGetShortRetryLimit(void __iomem
*dwIoBase
, unsigned char *pbyRetryLimit
)
165 VNSvInPortB(dwIoBase
+ MAC_REG_SRT
, pbyRetryLimit
);
170 * Set 802.11 Long Retry Limit
174 * dwIoBase - Base Address for MAC
175 * byRetryLimit- Retry Limit
182 void MACvSetLongRetryLimit(void __iomem
*dwIoBase
, unsigned char byRetryLimit
)
185 VNSvOutPortB(dwIoBase
+ MAC_REG_LRT
, byRetryLimit
);
190 * Set MAC Loopback mode
194 * dwIoBase - Base Address for MAC
195 * byLoopbackMode - Loopback Mode
202 void MACvSetLoopbackMode(void __iomem
*dwIoBase
, unsigned char byLoopbackMode
)
204 unsigned char byOrgValue
;
206 ASSERT(byLoopbackMode
< 3);
207 byLoopbackMode
<<= 6;
209 VNSvInPortB(dwIoBase
+ MAC_REG_TEST
, &byOrgValue
);
210 byOrgValue
= byOrgValue
& 0x3F;
211 byOrgValue
= byOrgValue
| byLoopbackMode
;
212 VNSvOutPortB(dwIoBase
+ MAC_REG_TEST
, byOrgValue
);
217 * Save MAC registers to context buffer
221 * dwIoBase - Base Address for MAC
223 * pbyCxtBuf - Context buffer
228 void MACvSaveContext(void __iomem
*dwIoBase
, unsigned char *pbyCxtBuf
)
232 // read page0 register
233 for (ii
= 0; ii
< MAC_MAX_CONTEXT_SIZE_PAGE0
; ii
++)
234 VNSvInPortB((dwIoBase
+ ii
), (pbyCxtBuf
+ ii
));
236 MACvSelectPage1(dwIoBase
);
238 // read page1 register
239 for (ii
= 0; ii
< MAC_MAX_CONTEXT_SIZE_PAGE1
; ii
++)
240 VNSvInPortB((dwIoBase
+ ii
), (pbyCxtBuf
+ MAC_MAX_CONTEXT_SIZE_PAGE0
+ ii
));
242 MACvSelectPage0(dwIoBase
);
247 * Restore MAC registers from context buffer
251 * dwIoBase - Base Address for MAC
252 * pbyCxtBuf - Context buffer
259 void MACvRestoreContext(void __iomem
*dwIoBase
, unsigned char *pbyCxtBuf
)
263 MACvSelectPage1(dwIoBase
);
265 for (ii
= 0; ii
< MAC_MAX_CONTEXT_SIZE_PAGE1
; ii
++)
266 VNSvOutPortB((dwIoBase
+ ii
), *(pbyCxtBuf
+ MAC_MAX_CONTEXT_SIZE_PAGE0
+ ii
));
268 MACvSelectPage0(dwIoBase
);
270 // restore RCR,TCR,IMR...
271 for (ii
= MAC_REG_RCR
; ii
< MAC_REG_ISR
; ii
++)
272 VNSvOutPortB(dwIoBase
+ ii
, *(pbyCxtBuf
+ ii
));
274 // restore MAC Config.
275 for (ii
= MAC_REG_LRT
; ii
< MAC_REG_PAGE1SEL
; ii
++)
276 VNSvOutPortB(dwIoBase
+ ii
, *(pbyCxtBuf
+ ii
));
278 VNSvOutPortB(dwIoBase
+ MAC_REG_CFG
, *(pbyCxtBuf
+ MAC_REG_CFG
));
280 // restore PS Config.
281 for (ii
= MAC_REG_PSCFG
; ii
< MAC_REG_BBREGCTL
; ii
++)
282 VNSvOutPortB(dwIoBase
+ ii
, *(pbyCxtBuf
+ ii
));
284 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
285 VNSvOutPortD(dwIoBase
+ MAC_REG_TXDMAPTR0
, *(unsigned long *)(pbyCxtBuf
+ MAC_REG_TXDMAPTR0
));
286 VNSvOutPortD(dwIoBase
+ MAC_REG_AC0DMAPTR
, *(unsigned long *)(pbyCxtBuf
+ MAC_REG_AC0DMAPTR
));
287 VNSvOutPortD(dwIoBase
+ MAC_REG_BCNDMAPTR
, *(unsigned long *)(pbyCxtBuf
+ MAC_REG_BCNDMAPTR
));
289 VNSvOutPortD(dwIoBase
+ MAC_REG_RXDMAPTR0
, *(unsigned long *)(pbyCxtBuf
+ MAC_REG_RXDMAPTR0
));
291 VNSvOutPortD(dwIoBase
+ MAC_REG_RXDMAPTR1
, *(unsigned long *)(pbyCxtBuf
+ MAC_REG_RXDMAPTR1
));
300 * dwIoBase - Base Address for MAC
304 * Return Value: true if Reset Success; otherwise false
307 bool MACbSoftwareReset(void __iomem
*dwIoBase
)
309 unsigned char byData
;
312 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
313 VNSvOutPortB(dwIoBase
+ MAC_REG_HOSTCR
, 0x01);
315 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
316 VNSvInPortB(dwIoBase
+ MAC_REG_HOSTCR
, &byData
);
317 if (!(byData
& HOSTCR_SOFTRST
))
320 if (ww
== W_MAX_TIMEOUT
)
327 * save some important register's value, then do reset, then restore register's value
331 * dwIoBase - Base Address for MAC
335 * Return Value: true if success; otherwise false
338 bool MACbSafeSoftwareReset(void __iomem
*dwIoBase
)
340 unsigned char abyTmpRegData
[MAC_MAX_CONTEXT_SIZE_PAGE0
+MAC_MAX_CONTEXT_SIZE_PAGE1
];
344 // save some important register's value, then do
345 // reset, then restore register's value
348 MACvSaveContext(dwIoBase
, abyTmpRegData
);
350 bRetVal
= MACbSoftwareReset(dwIoBase
);
351 // restore MAC context, except CR0
352 MACvRestoreContext(dwIoBase
, abyTmpRegData
);
363 * dwIoBase - Base Address for MAC
367 * Return Value: true if success; otherwise false
370 bool MACbSafeRxOff(void __iomem
*dwIoBase
)
373 unsigned long dwData
;
374 unsigned char byData
;
376 // turn off wow temp for turn off Rx safely
379 VNSvOutPortD(dwIoBase
+ MAC_REG_RXDMACTL0
, DMACTL_CLRRUN
);
380 VNSvOutPortD(dwIoBase
+ MAC_REG_RXDMACTL1
, DMACTL_CLRRUN
);
381 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
382 VNSvInPortD(dwIoBase
+ MAC_REG_RXDMACTL0
, &dwData
);
383 if (!(dwData
& DMACTL_RUN
))
386 if (ww
== W_MAX_TIMEOUT
) {
388 pr_debug(" DBG_PORT80(0x10)\n");
391 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
392 VNSvInPortD(dwIoBase
+ MAC_REG_RXDMACTL1
, &dwData
);
393 if (!(dwData
& DMACTL_RUN
))
396 if (ww
== W_MAX_TIMEOUT
) {
398 pr_debug(" DBG_PORT80(0x11)\n");
402 // try to safe shutdown RX
403 MACvRegBitsOff(dwIoBase
, MAC_REG_HOSTCR
, HOSTCR_RXON
);
404 // W_MAX_TIMEOUT is the timeout period
405 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
406 VNSvInPortB(dwIoBase
+ MAC_REG_HOSTCR
, &byData
);
407 if (!(byData
& HOSTCR_RXONST
))
410 if (ww
== W_MAX_TIMEOUT
) {
412 pr_debug(" DBG_PORT80(0x12)\n");
424 * dwIoBase - Base Address for MAC
428 * Return Value: true if success; otherwise false
431 bool MACbSafeTxOff(void __iomem
*dwIoBase
)
434 unsigned long dwData
;
435 unsigned char byData
;
439 VNSvOutPortD(dwIoBase
+ MAC_REG_TXDMACTL0
, DMACTL_CLRRUN
);
441 VNSvOutPortD(dwIoBase
+ MAC_REG_AC0DMACTL
, DMACTL_CLRRUN
);
443 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
444 VNSvInPortD(dwIoBase
+ MAC_REG_TXDMACTL0
, &dwData
);
445 if (!(dwData
& DMACTL_RUN
))
448 if (ww
== W_MAX_TIMEOUT
) {
450 pr_debug(" DBG_PORT80(0x20)\n");
453 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
454 VNSvInPortD(dwIoBase
+ MAC_REG_AC0DMACTL
, &dwData
);
455 if (!(dwData
& DMACTL_RUN
))
458 if (ww
== W_MAX_TIMEOUT
) {
460 pr_debug(" DBG_PORT80(0x21)\n");
464 // try to safe shutdown TX
465 MACvRegBitsOff(dwIoBase
, MAC_REG_HOSTCR
, HOSTCR_TXON
);
467 // W_MAX_TIMEOUT is the timeout period
468 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
469 VNSvInPortB(dwIoBase
+ MAC_REG_HOSTCR
, &byData
);
470 if (!(byData
& HOSTCR_TXONST
))
473 if (ww
== W_MAX_TIMEOUT
) {
475 pr_debug(" DBG_PORT80(0x24)\n");
487 * dwIoBase - Base Address for MAC
491 * Return Value: true if success; otherwise false
494 bool MACbSafeStop(void __iomem
*dwIoBase
)
496 MACvRegBitsOff(dwIoBase
, MAC_REG_TCR
, TCR_AUTOBCNTX
);
498 if (!MACbSafeRxOff(dwIoBase
)) {
500 pr_debug(" MACbSafeRxOff == false)\n");
501 MACbSafeSoftwareReset(dwIoBase
);
504 if (!MACbSafeTxOff(dwIoBase
)) {
506 pr_debug(" MACbSafeTxOff == false)\n");
507 MACbSafeSoftwareReset(dwIoBase
);
511 MACvRegBitsOff(dwIoBase
, MAC_REG_HOSTCR
, HOSTCR_MACEN
);
522 * dwIoBase - Base Address for MAC
526 * Return Value: true if success; otherwise false
529 bool MACbShutdown(void __iomem
*dwIoBase
)
532 MACvIntDisable(dwIoBase
);
533 MACvSetLoopbackMode(dwIoBase
, MAC_LB_INTERNAL
);
535 if (!MACbSafeStop(dwIoBase
)) {
536 MACvSetLoopbackMode(dwIoBase
, MAC_LB_NONE
);
539 MACvSetLoopbackMode(dwIoBase
, MAC_LB_NONE
);
549 * dwIoBase - Base Address for MAC
556 void MACvInitialize(void __iomem
*dwIoBase
)
559 MACvClearStckDS(dwIoBase
);
560 // disable force PME-enable
561 VNSvOutPortB(dwIoBase
+ MAC_REG_PMC1
, PME_OVR
);
565 MACbSoftwareReset(dwIoBase
);
568 VNSvOutPortB(dwIoBase
+ MAC_REG_TFTCTL
, TFTCTL_TSFCNTRST
);
569 // enable TSF counter
570 VNSvOutPortB(dwIoBase
+ MAC_REG_TFTCTL
, TFTCTL_TSFCNTREN
);
575 * Set the chip with current rx descriptor address
579 * dwIoBase - Base Address for MAC
580 * dwCurrDescAddr - Descriptor Address
587 void MACvSetCurrRx0DescAddr(void __iomem
*dwIoBase
, unsigned long dwCurrDescAddr
)
590 unsigned char byData
;
591 unsigned char byOrgDMACtl
;
593 VNSvInPortB(dwIoBase
+ MAC_REG_RXDMACTL0
, &byOrgDMACtl
);
594 if (byOrgDMACtl
& DMACTL_RUN
)
595 VNSvOutPortB(dwIoBase
+ MAC_REG_RXDMACTL0
+2, DMACTL_RUN
);
597 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
598 VNSvInPortB(dwIoBase
+ MAC_REG_RXDMACTL0
, &byData
);
599 if (!(byData
& DMACTL_RUN
))
603 if (ww
== W_MAX_TIMEOUT
)
606 VNSvOutPortD(dwIoBase
+ MAC_REG_RXDMAPTR0
, dwCurrDescAddr
);
607 if (byOrgDMACtl
& DMACTL_RUN
)
608 VNSvOutPortB(dwIoBase
+ MAC_REG_RXDMACTL0
, DMACTL_RUN
);
613 * Set the chip with current rx descriptor address
617 * dwIoBase - Base Address for MAC
618 * dwCurrDescAddr - Descriptor Address
625 void MACvSetCurrRx1DescAddr(void __iomem
*dwIoBase
, unsigned long dwCurrDescAddr
)
628 unsigned char byData
;
629 unsigned char byOrgDMACtl
;
631 VNSvInPortB(dwIoBase
+ MAC_REG_RXDMACTL1
, &byOrgDMACtl
);
632 if (byOrgDMACtl
& DMACTL_RUN
)
633 VNSvOutPortB(dwIoBase
+ MAC_REG_RXDMACTL1
+2, DMACTL_RUN
);
635 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
636 VNSvInPortB(dwIoBase
+ MAC_REG_RXDMACTL1
, &byData
);
637 if (!(byData
& DMACTL_RUN
))
640 if (ww
== W_MAX_TIMEOUT
)
643 VNSvOutPortD(dwIoBase
+ MAC_REG_RXDMAPTR1
, dwCurrDescAddr
);
644 if (byOrgDMACtl
& DMACTL_RUN
)
645 VNSvOutPortB(dwIoBase
+ MAC_REG_RXDMACTL1
, DMACTL_RUN
);
651 * Set the chip with current tx0 descriptor address
655 * dwIoBase - Base Address for MAC
656 * dwCurrDescAddr - Descriptor Address
663 void MACvSetCurrTx0DescAddrEx(void __iomem
*dwIoBase
, unsigned long dwCurrDescAddr
)
666 unsigned char byData
;
667 unsigned char byOrgDMACtl
;
669 VNSvInPortB(dwIoBase
+ MAC_REG_TXDMACTL0
, &byOrgDMACtl
);
670 if (byOrgDMACtl
& DMACTL_RUN
)
671 VNSvOutPortB(dwIoBase
+ MAC_REG_TXDMACTL0
+2, DMACTL_RUN
);
673 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
674 VNSvInPortB(dwIoBase
+ MAC_REG_TXDMACTL0
, &byData
);
675 if (!(byData
& DMACTL_RUN
))
678 if (ww
== W_MAX_TIMEOUT
)
681 VNSvOutPortD(dwIoBase
+ MAC_REG_TXDMAPTR0
, dwCurrDescAddr
);
682 if (byOrgDMACtl
& DMACTL_RUN
)
683 VNSvOutPortB(dwIoBase
+ MAC_REG_TXDMACTL0
, DMACTL_RUN
);
688 * Set the chip with current AC0 descriptor address
692 * dwIoBase - Base Address for MAC
693 * dwCurrDescAddr - Descriptor Address
701 void MACvSetCurrAC0DescAddrEx(void __iomem
*dwIoBase
, unsigned long dwCurrDescAddr
)
704 unsigned char byData
;
705 unsigned char byOrgDMACtl
;
707 VNSvInPortB(dwIoBase
+ MAC_REG_AC0DMACTL
, &byOrgDMACtl
);
708 if (byOrgDMACtl
& DMACTL_RUN
)
709 VNSvOutPortB(dwIoBase
+ MAC_REG_AC0DMACTL
+2, DMACTL_RUN
);
711 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
712 VNSvInPortB(dwIoBase
+ MAC_REG_AC0DMACTL
, &byData
);
713 if (!(byData
& DMACTL_RUN
))
716 if (ww
== W_MAX_TIMEOUT
) {
718 pr_debug(" DBG_PORT80(0x26)\n");
720 VNSvOutPortD(dwIoBase
+ MAC_REG_AC0DMAPTR
, dwCurrDescAddr
);
721 if (byOrgDMACtl
& DMACTL_RUN
)
722 VNSvOutPortB(dwIoBase
+ MAC_REG_AC0DMACTL
, DMACTL_RUN
);
725 void MACvSetCurrTXDescAddr(int iTxType
, void __iomem
*dwIoBase
, unsigned long dwCurrDescAddr
)
727 if (iTxType
== TYPE_AC0DMA
)
728 MACvSetCurrAC0DescAddrEx(dwIoBase
, dwCurrDescAddr
);
729 else if (iTxType
== TYPE_TXDMA0
)
730 MACvSetCurrTx0DescAddrEx(dwIoBase
, dwCurrDescAddr
);
735 * Micro Second Delay via MAC
739 * dwIoBase - Base Address for MAC
740 * uDelay - Delay time (timer resolution is 4 us)
747 void MACvTimer0MicroSDelay(void __iomem
*dwIoBase
, unsigned int uDelay
)
749 unsigned char byValue
;
752 VNSvOutPortB(dwIoBase
+ MAC_REG_TMCTL0
, 0);
753 VNSvOutPortD(dwIoBase
+ MAC_REG_TMDATA0
, uDelay
);
754 VNSvOutPortB(dwIoBase
+ MAC_REG_TMCTL0
, (TMCTL_TMD
| TMCTL_TE
));
755 for (ii
= 0; ii
< 66; ii
++) { // assume max PCI clock is 66Mhz
756 for (uu
= 0; uu
< uDelay
; uu
++) {
757 VNSvInPortB(dwIoBase
+ MAC_REG_TMCTL0
, &byValue
);
758 if ((byValue
== 0) ||
759 (byValue
& TMCTL_TSUSP
)) {
760 VNSvOutPortB(dwIoBase
+ MAC_REG_TMCTL0
, 0);
765 VNSvOutPortB(dwIoBase
+ MAC_REG_TMCTL0
, 0);
770 * Micro Second One shot timer via MAC
774 * dwIoBase - Base Address for MAC
775 * uDelay - Delay time
782 void MACvOneShotTimer1MicroSec(void __iomem
*dwIoBase
, unsigned int uDelayTime
)
784 VNSvOutPortB(dwIoBase
+ MAC_REG_TMCTL1
, 0);
785 VNSvOutPortD(dwIoBase
+ MAC_REG_TMDATA1
, uDelayTime
);
786 VNSvOutPortB(dwIoBase
+ MAC_REG_TMCTL1
, (TMCTL_TMD
| TMCTL_TE
));
789 void MACvSetMISCFifo(void __iomem
*dwIoBase
, unsigned short wOffset
, unsigned long dwData
)
793 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFNDEX
, wOffset
);
794 VNSvOutPortD(dwIoBase
+ MAC_REG_MISCFFDATA
, dwData
);
795 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFCTL
, MISCFFCTL_WRITE
);
798 bool MACbPSWakeup(void __iomem
*dwIoBase
)
800 unsigned char byOrgValue
;
803 if (MACbIsRegBitsOff(dwIoBase
, MAC_REG_PSCTL
, PSCTL_PS
))
807 MACvRegBitsOff(dwIoBase
, MAC_REG_PSCTL
, PSCTL_PSEN
);
809 // Check if SyncFlushOK
810 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
811 VNSvInPortB(dwIoBase
+ MAC_REG_PSCTL
, &byOrgValue
);
812 if (byOrgValue
& PSCTL_WAKEDONE
)
815 if (ww
== W_MAX_TIMEOUT
) {
817 pr_debug(" DBG_PORT80(0x33)\n");
825 * Set the Key by MISCFIFO
829 * dwIoBase - Base Address for MAC
838 void MACvSetKeyEntry(void __iomem
*dwIoBase
, unsigned short wKeyCtl
, unsigned int uEntryIdx
,
839 unsigned int uKeyIdx
, unsigned char *pbyAddr
, u32
*pdwKey
, unsigned char byLocalID
)
841 unsigned short wOffset
;
848 pr_debug("MACvSetKeyEntry\n");
849 wOffset
= MISCFIFO_KEYETRY0
;
850 wOffset
+= (uEntryIdx
* MISCFIFO_KEYENTRYSIZE
);
855 dwData
|= MAKEWORD(*(pbyAddr
+4), *(pbyAddr
+5));
856 pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
857 wOffset
, dwData
, wKeyCtl
);
859 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFNDEX
, wOffset
);
860 VNSvOutPortD(dwIoBase
+ MAC_REG_MISCFFDATA
, dwData
);
861 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFCTL
, MISCFFCTL_WRITE
);
865 dwData
|= *(pbyAddr
+3);
867 dwData
|= *(pbyAddr
+2);
869 dwData
|= *(pbyAddr
+1);
871 dwData
|= *(pbyAddr
+0);
872 pr_debug("2. wOffset: %d, Data: %X\n", wOffset
, dwData
);
874 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFNDEX
, wOffset
);
875 VNSvOutPortD(dwIoBase
+ MAC_REG_MISCFFDATA
, dwData
);
876 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFCTL
, MISCFFCTL_WRITE
);
879 wOffset
+= (uKeyIdx
* 4);
880 for (ii
= 0; ii
< 4; ii
++) {
881 // always push 128 bits
882 pr_debug("3.(%d) wOffset: %d, Data: %X\n",
883 ii
, wOffset
+ii
, *pdwKey
);
884 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFNDEX
, wOffset
+ii
);
885 VNSvOutPortD(dwIoBase
+ MAC_REG_MISCFFDATA
, *pdwKey
++);
886 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFCTL
, MISCFFCTL_WRITE
);
892 * Disable the Key Entry by MISCFIFO
896 * dwIoBase - Base Address for MAC
904 void MACvDisableKeyEntry(void __iomem
*dwIoBase
, unsigned int uEntryIdx
)
906 unsigned short wOffset
;
908 wOffset
= MISCFIFO_KEYETRY0
;
909 wOffset
+= (uEntryIdx
* MISCFIFO_KEYENTRYSIZE
);
911 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFNDEX
, wOffset
);
912 VNSvOutPortD(dwIoBase
+ MAC_REG_MISCFFDATA
, 0);
913 VNSvOutPortW(dwIoBase
+ MAC_REG_MISCFFCTL
, MISCFFCTL_WRITE
);