]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/staging/wilc1000/wilc_wlan.c
projects / mirror_ubuntu-bionic-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
staging: wilc1000: remove mdelay wrapper
[mirror_ubuntu-bionic-kernel.git] / drivers / staging / wilc1000 / wilc_wlan.c
1 /* ////////////////////////////////////////////////////////////////////////// */
2 /* */
3 /* Copyright (c) Atmel Corporation. All rights reserved. */
4 /* */
5 /* Module Name: wilc_wlan.c */
6 /* */
7 /* */
8 /* //////////////////////////////////////////////////////////////////////////// */
9
10 #include "wilc_wlan_if.h"
11 #include "wilc_wlan.h"
12 #define INLINE static __inline
13
14 /********************************************
15 *
16 * Global
17 *
18 ********************************************/
19 extern wilc_hif_func_t hif_sdio;
20 extern wilc_hif_func_t hif_spi;
21 extern wilc_cfg_func_t mac_cfg;
22 #if defined(PLAT_RK3026_TCHIP)
23 extern u8 g_wilc_initialized; /* AMR : 0422 RK3026 Crash issue */
24 #endif
25 extern void WILC_WFI_mgmt_rx(uint8_t *buff, uint32_t size);
26 uint32_t wilc_get_chipid(uint8_t update);
27 u16 Set_machw_change_vir_if(bool bValue);
28
29
30
31 typedef struct {
32 int quit;
33
34 /**
35 * input interface functions
36 **/
37 wilc_wlan_os_func_t os_func;
38 wilc_wlan_io_func_t io_func;
39 wilc_wlan_net_func_t net_func;
40 wilc_wlan_indicate_func_t indicate_func;
41
42 /**
43 * host interface functions
44 **/
45 wilc_hif_func_t hif_func;
46 void *hif_lock;
47
48 /**
49 * configuration interface functions
50 **/
51 wilc_cfg_func_t cif_func;
52 int cfg_frame_in_use;
53 wilc_cfg_frame_t cfg_frame;
54 uint32_t cfg_frame_offset;
55 int cfg_seq_no;
56 void *cfg_wait;
57
58 /**
59 * RX buffer
60 **/
61 #ifdef MEMORY_STATIC
62 uint32_t rx_buffer_size;
63 uint8_t *rx_buffer;
64 uint32_t rx_buffer_offset;
65 #endif
66 /**
67 * TX buffer
68 **/
69 uint32_t tx_buffer_size;
70 uint8_t *tx_buffer;
71 uint32_t tx_buffer_offset;
72
73 /**
74 * TX queue
75 **/
76 void *txq_lock;
77
78 /*Added by Amr - BugID_4720*/
79 void *txq_add_to_head_lock;
80 void *txq_spinlock;
81 unsigned long txq_spinlock_flags;
82
83 struct txq_entry_t *txq_head;
84 struct txq_entry_t *txq_tail;
85 int txq_entries;
86 void *txq_wait;
87 int txq_exit;
88
89 /**
90 * RX queue
91 **/
92 void *rxq_lock;
93 struct rxq_entry_t *rxq_head;
94 struct rxq_entry_t *rxq_tail;
95 int rxq_entries;
96 void *rxq_wait;
97 int rxq_exit;
98
99
100 } wilc_wlan_dev_t;
101
102 static wilc_wlan_dev_t g_wlan;
103
104 INLINE void chip_allow_sleep(void);
105 INLINE void chip_wakeup(void);
106 /********************************************
107 *
108 * Debug
109 *
110 ********************************************/
111
112 static uint32_t dbgflag = N_INIT | N_ERR | N_INTR | N_TXQ | N_RXQ;
113
114 static void wilc_debug(uint32_t flag, char *fmt, ...)
115 {
116 char buf[256];
117 va_list args;
118
119 if (flag & dbgflag) {
120 va_start(args, fmt);
121 vsprintf(buf, fmt, args);
122 va_end(args);
123
124 if (g_wlan.os_func.os_debug)
125 g_wlan.os_func.os_debug(buf);
126 }
127 }
128
129 static CHIP_PS_STATE_T genuChipPSstate = CHIP_WAKEDUP;
130
131 /*BugID_5213*/
132 /*acquire_bus() and release_bus() are made INLINE functions*/
133 /*as a temporary workaround to fix a problem of receiving*/
134 /*unknown interrupt from FW*/
135 INLINE void acquire_bus(BUS_ACQUIRE_T acquire)
136 {
137
138 g_wlan.os_func.os_enter_cs(g_wlan.hif_lock);
139 #ifndef WILC_OPTIMIZE_SLEEP_INT
140 if (genuChipPSstate != CHIP_WAKEDUP)
141 #endif
142 {
143 if (acquire == ACQUIRE_AND_WAKEUP)
144 chip_wakeup();
145 }
146
147 }
148 INLINE void release_bus(BUS_RELEASE_T release)
149 {
150 #ifdef WILC_OPTIMIZE_SLEEP_INT
151 if (release == RELEASE_ALLOW_SLEEP)
152 chip_allow_sleep();
153 #endif
154 g_wlan.os_func.os_leave_cs(g_wlan.hif_lock);
155 }
156 /********************************************
157 *
158 * Queue
159 *
160 ********************************************/
161
162 static void wilc_wlan_txq_remove(struct txq_entry_t *tqe)
163 {
164
165 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
166 /* unsigned long flags; */
167 if (tqe == p->txq_head) {
168
169 p->txq_head = tqe->next;
170 if (p->txq_head)
171 p->txq_head->prev = NULL;
172
173
174 } else if (tqe == p->txq_tail) {
175 p->txq_tail = (tqe->prev);
176 if (p->txq_tail)
177 p->txq_tail->next = NULL;
178 } else {
179 tqe->prev->next = tqe->next;
180 tqe->next->prev = tqe->prev;
181 }
182 p->txq_entries -= 1;
183
184 }
185
186 static struct txq_entry_t *wilc_wlan_txq_remove_from_head(void)
187 {
188 struct txq_entry_t *tqe;
189 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
190 unsigned long flags;
191
192 p->os_func.os_spin_lock(p->txq_spinlock, &flags);
193 if (p->txq_head) {
194 tqe = p->txq_head;
195 p->txq_head = tqe->next;
196 if (p->txq_head) {
197 p->txq_head->prev = NULL;
198 }
199 p->txq_entries -= 1;
200
201 /*Added by Amr - BugID_4720*/
202
203
204
205 } else {
206 tqe = NULL;
207 }
208 p->os_func.os_spin_unlock(p->txq_spinlock, &flags);
209 return tqe;
210 }
211
212 static void wilc_wlan_txq_add_to_tail(struct txq_entry_t *tqe)
213 {
214 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
215 unsigned long flags;
216 /*Added by Amr - BugID_4720*/
217 p->os_func.os_spin_lock(p->txq_spinlock, &flags);
218
219 if (p->txq_head == NULL) {
220 tqe->next = NULL;
221 tqe->prev = NULL;
222 p->txq_head = tqe;
223 p->txq_tail = tqe;
224 } else {
225 tqe->next = NULL;
226 tqe->prev = p->txq_tail;
227 p->txq_tail->next = tqe;
228 p->txq_tail = tqe;
229 }
230 p->txq_entries += 1;
231 PRINT_D(TX_DBG, "Number of entries in TxQ = %d\n", p->txq_entries);
232
233 /*Added by Amr - BugID_4720*/
234 p->os_func.os_spin_unlock(p->txq_spinlock, &flags);
235
236 /**
237 * wake up TX queue
238 **/
239 PRINT_D(TX_DBG, "Wake the txq_handling\n");
240
241 p->os_func.os_signal(p->txq_wait);
242
243
244 }
245
246 static int wilc_wlan_txq_add_to_head(struct txq_entry_t *tqe)
247 {
248 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
249 unsigned long flags;
250 /*Added by Amr - BugID_4720*/
251 if (p->os_func.os_wait(p->txq_add_to_head_lock, CFG_PKTS_TIMEOUT))
252 return -1;
253
254 p->os_func.os_spin_lock(p->txq_spinlock, &flags);
255
256 if (p->txq_head == NULL) {
257 tqe->next = NULL;
258 tqe->prev = NULL;
259 p->txq_head = tqe;
260 p->txq_tail = tqe;
261 } else {
262 tqe->next = p->txq_head;
263 tqe->prev = NULL;
264 p->txq_head->prev = tqe;
265 p->txq_head = tqe;
266 }
267 p->txq_entries += 1;
268 PRINT_D(TX_DBG, "Number of entries in TxQ = %d\n", p->txq_entries);
269
270 /*Added by Amr - BugID_4720*/
271 p->os_func.os_spin_unlock(p->txq_spinlock, &flags);
272 p->os_func.os_signal(p->txq_add_to_head_lock);
273
274
275 /**
276 * wake up TX queue
277 **/
278 p->os_func.os_signal(p->txq_wait);
279 PRINT_D(TX_DBG, "Wake up the txq_handler\n");
280
281 /*Added by Amr - BugID_4720*/
282 return 0;
283
284 }
285
286 uint32_t Statisitcs_totalAcks = 0, Statisitcs_DroppedAcks = 0;
287
288 #ifdef TCP_ACK_FILTER
289 struct Ack_session_info;
290 struct Ack_session_info {
291 uint32_t Ack_seq_num;
292 uint32_t Bigger_Ack_num;
293 uint16_t src_port;
294 uint16_t dst_port;
295 uint16_t status;
296 };
297
298 typedef struct {
299 uint32_t ack_num;
300 uint32_t Session_index;
301 struct txq_entry_t *txqe;
302 } Pending_Acks_info_t /*Ack_info_t*/;
303
304
305
306
307 struct Ack_session_info *Free_head;
308 struct Ack_session_info *Alloc_head;
309
310 #define TCP_FIN_MASK (1 << 0)
311 #define TCP_SYN_MASK (1 << 1)
312 #define TCP_Ack_MASK (1 << 4)
313 #define NOT_TCP_ACK (-1)
314
315 #define MAX_TCP_SESSION 25
316 #define MAX_PENDING_ACKS 256
317 struct Ack_session_info Acks_keep_track_info[2 * MAX_TCP_SESSION];
318 Pending_Acks_info_t Pending_Acks_info[MAX_PENDING_ACKS];
319
320 uint32_t PendingAcks_arrBase;
321 uint32_t Opened_TCP_session;
322 uint32_t Pending_Acks;
323
324
325
326 static __inline int Init_TCP_tracking(void)
327 {
328
329 return 0;
330
331 }
332 static __inline int add_TCP_track_session(uint32_t src_prt, uint32_t dst_prt, uint32_t seq)
333 {
334 Acks_keep_track_info[Opened_TCP_session].Ack_seq_num = seq;
335 Acks_keep_track_info[Opened_TCP_session].Bigger_Ack_num = 0;
336 Acks_keep_track_info[Opened_TCP_session].src_port = src_prt;
337 Acks_keep_track_info[Opened_TCP_session].dst_port = dst_prt;
338 Opened_TCP_session++;
339
340 PRINT_D(TCP_ENH, "TCP Session %d to Ack %d\n", Opened_TCP_session, seq);
341 return 0;
342 }
343
344 static __inline int Update_TCP_track_session(uint32_t index, uint32_t Ack)
345 {
346
347 if (Ack > Acks_keep_track_info[index].Bigger_Ack_num) {
348 Acks_keep_track_info[index].Bigger_Ack_num = Ack;
349 }
350 return 0;
351
352 }
353 static __inline int add_TCP_Pending_Ack(uint32_t Ack, uint32_t Session_index, struct txq_entry_t *txqe)
354 {
355 Statisitcs_totalAcks++;
356 if (Pending_Acks < MAX_PENDING_ACKS) {
357 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].ack_num = Ack;
358 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].txqe = txqe;
359 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].Session_index = Session_index;
360 txqe->tcp_PendingAck_index = PendingAcks_arrBase + Pending_Acks;
361 Pending_Acks++;
362
363 } else {
364
365 }
366 return 0;
367 }
368 static __inline int remove_TCP_related(void)
369 {
370 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
371 unsigned long flags;
372
373 p->os_func.os_spin_lock(p->txq_spinlock, &flags);
374
375 p->os_func.os_spin_unlock(p->txq_spinlock, &flags);
376 return 0;
377 }
378
379 static __inline int tcp_process(struct txq_entry_t *tqe)
380 {
381 int ret;
382 uint8_t *eth_hdr_ptr;
383 uint8_t *buffer = tqe->buffer;
384 unsigned short h_proto;
385 int i;
386 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
387 unsigned long flags;
388
389 p->os_func.os_spin_lock(p->txq_spinlock, &flags);
390
391 eth_hdr_ptr = &buffer[0];
392 h_proto = ntohs(*((unsigned short *)&eth_hdr_ptr[12]));
393 if (h_proto == 0x0800) { /* IP */
394 uint8_t *ip_hdr_ptr;
395 uint8_t protocol;
396
397 ip_hdr_ptr = &buffer[ETHERNET_HDR_LEN];
398 protocol = ip_hdr_ptr[9];
399
400
401 if (protocol == 0x06) {
402 uint8_t *tcp_hdr_ptr;
403 uint32_t IHL, Total_Length, Data_offset;
404
405 tcp_hdr_ptr = &ip_hdr_ptr[IP_HDR_LEN];
406 IHL = (ip_hdr_ptr[0] & 0xf) << 2;
407 Total_Length = (((uint32_t)ip_hdr_ptr[2]) << 8) + ((uint32_t)ip_hdr_ptr[3]);
408 Data_offset = (((uint32_t)tcp_hdr_ptr[12] & 0xf0) >> 2);
409 if (Total_Length == (IHL + Data_offset)) { /*we want to recognize the clear Acks(packet only carry Ack infos not with data) so data size must be equal zero*/
410 uint32_t seq_no, Ack_no;
411
412 seq_no = (((uint32_t)tcp_hdr_ptr[4]) << 24) + (((uint32_t)tcp_hdr_ptr[5]) << 16) + (((uint32_t)tcp_hdr_ptr[6]) << 8) + ((uint32_t)tcp_hdr_ptr[7]);
413
414 Ack_no = (((uint32_t)tcp_hdr_ptr[8]) << 24) + (((uint32_t)tcp_hdr_ptr[9]) << 16) + (((uint32_t)tcp_hdr_ptr[10]) << 8) + ((uint32_t)tcp_hdr_ptr[11]);
415
416
417 for (i = 0; i < Opened_TCP_session; i++) {
418 if (Acks_keep_track_info[i].Ack_seq_num == seq_no) {
419 Update_TCP_track_session(i, Ack_no);
420 break;
421 }
422 }
423 if (i == Opened_TCP_session) {
424 add_TCP_track_session(0, 0, seq_no);
425 }
426 add_TCP_Pending_Ack(Ack_no, i, tqe);
427
428
429 }
430
431 } else {
432 ret = 0;
433 }
434 } else {
435 ret = 0;
436 }
437 p->os_func.os_spin_unlock(p->txq_spinlock, &flags);
438 return ret;
439 }
440
441
442 static int wilc_wlan_txq_filter_dup_tcp_ack(void)
443 {
444
445 uint32_t i = 0;
446 uint32_t Dropped = 0;
447 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
448
449 p->os_func.os_spin_lock(p->txq_spinlock, &p->txq_spinlock_flags);
450 for (i = PendingAcks_arrBase; i < (PendingAcks_arrBase + Pending_Acks); i++) {
451 if (Pending_Acks_info[i].ack_num < Acks_keep_track_info[Pending_Acks_info[i].Session_index].Bigger_Ack_num) {
452 struct txq_entry_t *tqe;
453
454 PRINT_D(TCP_ENH, "DROP ACK: %u\n", Pending_Acks_info[i].ack_num);
455 tqe = Pending_Acks_info[i].txqe;
456 if (tqe) {
457 wilc_wlan_txq_remove(tqe);
458 Statisitcs_DroppedAcks++;
459 tqe->status = 1; /* mark the packet send */
460 if (tqe->tx_complete_func)
461 tqe->tx_complete_func(tqe->priv, tqe->status);
462 kfree(tqe);
463 Dropped++;
464 }
465 }
466 }
467 Pending_Acks = 0;
468 Opened_TCP_session = 0;
469
470 if (PendingAcks_arrBase == 0)
471 PendingAcks_arrBase = MAX_TCP_SESSION;
472 else
473 PendingAcks_arrBase = 0;
474
475
476 p->os_func.os_spin_unlock(p->txq_spinlock, &p->txq_spinlock_flags);
477
478 while (Dropped > 0) {
479 /*consume the semaphore count of the removed packet*/
480 p->os_func.os_wait(p->txq_wait, 1);
481 Dropped--;
482 }
483
484 return 1;
485 }
486 #endif
487
488 #ifdef TCP_ENHANCEMENTS
489 bool EnableTCPAckFilter = false;
490
491 void Enable_TCP_ACK_Filter(bool value)
492 {
493 EnableTCPAckFilter = value;
494 }
495
496 bool is_TCP_ACK_Filter_Enabled(void)
497 {
498 return EnableTCPAckFilter;
499 }
500 #endif
501
502 static int wilc_wlan_txq_add_cfg_pkt(uint8_t *buffer, uint32_t buffer_size)
503 {
504 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
505 struct txq_entry_t *tqe;
506
507 PRINT_D(TX_DBG, "Adding config packet ...\n");
508 if (p->quit) {
509 PRINT_D(TX_DBG, "Return due to clear function\n");
510 p->os_func.os_signal(p->cfg_wait);
511 return 0;
512 }
513
514 tqe = kmalloc(sizeof(struct txq_entry_t), GFP_ATOMIC);
515 if (tqe == NULL) {
516 PRINT_ER("Failed to allocate memory\n");
517 return 0;
518 }
519
520 tqe->type = WILC_CFG_PKT;
521 tqe->buffer = buffer;
522 tqe->buffer_size = buffer_size;
523 tqe->tx_complete_func = NULL;
524 tqe->priv = NULL;
525 #ifdef TCP_ACK_FILTER
526 tqe->tcp_PendingAck_index = NOT_TCP_ACK;
527 #endif
528 /**
529 * Configuration packet always at the front
530 **/
531 PRINT_D(TX_DBG, "Adding the config packet at the Queue tail\n");
532
533 /*Edited by Amr - BugID_4720*/
534 if (wilc_wlan_txq_add_to_head(tqe))
535 return 0;
536 return 1;
537 }
538
539 static int wilc_wlan_txq_add_net_pkt(void *priv, uint8_t *buffer, uint32_t buffer_size, wilc_tx_complete_func_t func)
540 {
541 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
542 struct txq_entry_t *tqe;
543
544 if (p->quit)
545 return 0;
546
547 tqe = kmalloc(sizeof(struct txq_entry_t), GFP_ATOMIC);
548
549 if (tqe == NULL)
550 return 0;
551 tqe->type = WILC_NET_PKT;
552 tqe->buffer = buffer;
553 tqe->buffer_size = buffer_size;
554 tqe->tx_complete_func = func;
555 tqe->priv = priv;
556
557 PRINT_D(TX_DBG, "Adding mgmt packet at the Queue tail\n");
558 #ifdef TCP_ACK_FILTER
559 tqe->tcp_PendingAck_index = NOT_TCP_ACK;
560 #ifdef TCP_ENHANCEMENTS
561 if (is_TCP_ACK_Filter_Enabled())
562 #endif
563 tcp_process(tqe);
564 #endif
565 wilc_wlan_txq_add_to_tail(tqe);
566 /*return number of itemes in the queue*/
567 return p->txq_entries;
568 }
569 /*Bug3959: transmitting mgmt frames received from host*/
570 #if defined(WILC_AP_EXTERNAL_MLME) || defined(WILC_P2P)
571 int wilc_wlan_txq_add_mgmt_pkt(void *priv, uint8_t *buffer, uint32_t buffer_size, wilc_tx_complete_func_t func)
572 {
573
574 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
575 struct txq_entry_t *tqe;
576
577 if (p->quit)
578 return 0;
579
580 tqe = kmalloc(sizeof(struct txq_entry_t), GFP_KERNEL);
581
582 if (tqe == NULL)
583 return 0;
584 tqe->type = WILC_MGMT_PKT;
585 tqe->buffer = buffer;
586 tqe->buffer_size = buffer_size;
587 tqe->tx_complete_func = func;
588 tqe->priv = priv;
589 #ifdef TCP_ACK_FILTER
590 tqe->tcp_PendingAck_index = NOT_TCP_ACK;
591 #endif
592 PRINT_D(TX_DBG, "Adding Network packet at the Queue tail\n");
593 wilc_wlan_txq_add_to_tail(tqe);
594 return 1;
595 }
596
597 #ifdef WILC_FULLY_HOSTING_AP
598 int wilc_FH_wlan_txq_add_net_pkt(void *priv, uint8_t *buffer, uint32_t buffer_size, wilc_tx_complete_func_t func)
599 {
600 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
601 struct txq_entry_t *tqe;
602
603 if (p->quit)
604 return 0;
605
606 tqe = kmalloc(sizeof(struct txq_entry_t), GFP_ATOMIC);
607
608 if (tqe == NULL)
609 return 0;
610 tqe->type = WILC_FH_DATA_PKT;
611 tqe->buffer = buffer;
612 tqe->buffer_size = buffer_size;
613 tqe->tx_complete_func = func;
614 tqe->priv = priv;
615 PRINT_D(TX_DBG, "Adding mgmt packet at the Queue tail\n");
616 wilc_wlan_txq_add_to_tail(tqe);
617 /*return number of itemes in the queue*/
618 return p->txq_entries;
619 }
620 #endif /* WILC_FULLY_HOSTING_AP*/
621 #endif /*WILC_AP_EXTERNAL_MLME*/
622 static struct txq_entry_t *wilc_wlan_txq_get_first(void)
623 {
624 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
625 struct txq_entry_t *tqe;
626 unsigned long flags;
627
628 /*Added by Amr - BugID_4720*/
629 p->os_func.os_spin_lock(p->txq_spinlock, &flags);
630
631 tqe = p->txq_head;
632
633 /*Added by Amr - BugID_4720*/
634 p->os_func.os_spin_unlock(p->txq_spinlock, &flags);
635
636
637 return tqe;
638 }
639
640 static struct txq_entry_t *wilc_wlan_txq_get_next(struct txq_entry_t *tqe)
641 {
642 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
643 unsigned long flags;
644 /*Added by Amr - BugID_4720*/
645 p->os_func.os_spin_lock(p->txq_spinlock, &flags);
646
647 tqe = tqe->next;
648 /*Added by Amr - BugID_4720*/
649 p->os_func.os_spin_unlock(p->txq_spinlock, &flags);
650
651
652 return tqe;
653 }
654
655 static int wilc_wlan_rxq_add(struct rxq_entry_t *rqe)
656 {
657 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
658
659 if (p->quit)
660 return 0;
661
662 p->os_func.os_enter_cs(p->rxq_lock);
663 if (p->rxq_head == NULL) {
664 PRINT_D(RX_DBG, "Add to Queue head\n");
665 rqe->next = NULL;
666 p->rxq_head = rqe;
667 p->rxq_tail = rqe;
668 } else {
669 PRINT_D(RX_DBG, "Add to Queue tail\n");
670 p->rxq_tail->next = rqe;
671 rqe->next = NULL;
672 p->rxq_tail = rqe;
673 }
674 p->rxq_entries += 1;
675 PRINT_D(RX_DBG, "Number of queue entries: %d\n", p->rxq_entries);
676 p->os_func.os_leave_cs(p->rxq_lock);
677 return p->rxq_entries;
678 }
679
680 static struct rxq_entry_t *wilc_wlan_rxq_remove(void)
681 {
682 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
683
684 PRINT_D(RX_DBG, "Getting rxQ element\n");
685 if (p->rxq_head) {
686 struct rxq_entry_t *rqe;
687
688 p->os_func.os_enter_cs(p->rxq_lock);
689 rqe = p->rxq_head;
690 p->rxq_head = p->rxq_head->next;
691 p->rxq_entries -= 1;
692 PRINT_D(RX_DBG, "RXQ entries decreased\n");
693 p->os_func.os_leave_cs(p->rxq_lock);
694 return rqe;
695 }
696 PRINT_D(RX_DBG, "Nothing to get from Q\n");
697 return NULL;
698 }
699
700
701 /********************************************
702 *
703 * Power Save handle functions
704 *
705 ********************************************/
706
707
708
709 #ifdef WILC_OPTIMIZE_SLEEP_INT
710
711 INLINE void chip_allow_sleep(void)
712 {
713 uint32_t reg = 0;
714
715 /* Clear bit 1 */
716 g_wlan.hif_func.hif_read_reg(0xf0, &reg);
717
718 g_wlan.hif_func.hif_write_reg(0xf0, reg & ~(1 << 0));
719 }
720
721 INLINE void chip_wakeup(void)
722 {
723 uint32_t reg, clk_status_reg, trials = 0;
724 uint32_t sleep_time;
725
726 if ((g_wlan.io_func.io_type & 0x1) == HIF_SPI) {
727 do {
728 g_wlan.hif_func.hif_read_reg(1, &reg);
729 /* Set bit 1 */
730 g_wlan.hif_func.hif_write_reg(1, reg | (1 << 1));
731
732 /* Clear bit 1*/
733 g_wlan.hif_func.hif_write_reg(1, reg & ~(1 << 1));
734
735 do {
736 /* Wait for the chip to stabilize*/
737 usleep_range(2 * 1000, 2 * 1000);
738 /* Make sure chip is awake. This is an extra step that can be removed */
739 /* later to avoid the bus access overhead */
740 if ((wilc_get_chipid(true) == 0)) {
741 wilc_debug(N_ERR, "Couldn't read chip id. Wake up failed\n");
742 }
743 } while ((wilc_get_chipid(true) == 0) && ((++trials % 3) == 0));
744
745 } while (wilc_get_chipid(true) == 0);
746 } else if ((g_wlan.io_func.io_type & 0x1) == HIF_SDIO) {
747 g_wlan.hif_func.hif_read_reg(0xf0, &reg);
748 do {
749 /* Set bit 1 */
750 g_wlan.hif_func.hif_write_reg(0xf0, reg | (1 << 0));
751
752 /* Check the clock status */
753 g_wlan.hif_func.hif_read_reg(0xf1, &clk_status_reg);
754
755 /* in case of clocks off, wait 2ms, and check it again. */
756 /* if still off, wait for another 2ms, for a total wait of 6ms. */
757 /* If still off, redo the wake up sequence */
758 while (((clk_status_reg & 0x1) == 0) && (((++trials) % 3) == 0)) {
759 /* Wait for the chip to stabilize*/
760 usleep_range(2 * 1000, 2 * 1000);
761
762 /* Make sure chip is awake. This is an extra step that can be removed */
763 /* later to avoid the bus access overhead */
764 g_wlan.hif_func.hif_read_reg(0xf1, &clk_status_reg);
765
766 if ((clk_status_reg & 0x1) == 0) {
767 wilc_debug(N_ERR, "clocks still OFF. Wake up failed\n");
768 }
769 }
770 /* in case of failure, Reset the wakeup bit to introduce a new edge on the next loop */
771 if ((clk_status_reg & 0x1) == 0) {
772 /* Reset bit 0 */
773 g_wlan.hif_func.hif_write_reg(0xf0, reg & (~(1 << 0)));
774 }
775 } while ((clk_status_reg & 0x1) == 0);
776 }
777
778
779 if (genuChipPSstate == CHIP_SLEEPING_MANUAL) {
780 g_wlan.hif_func.hif_read_reg(0x1C0C, &reg);
781 reg &= ~(1 << 0);
782 g_wlan.hif_func.hif_write_reg(0x1C0C, reg);
783
784 if (wilc_get_chipid(false) >= 0x1002b0) {
785 /* Enable PALDO back right after wakeup */
786 uint32_t val32;
787
788 g_wlan.hif_func.hif_read_reg(0x1e1c, &val32);
789 val32 |= (1 << 6);
790 g_wlan.hif_func.hif_write_reg(0x1e1c, val32);
791
792 g_wlan.hif_func.hif_read_reg(0x1e9c, &val32);
793 val32 |= (1 << 6);
794 g_wlan.hif_func.hif_write_reg(0x1e9c, val32);
795 }
796 }
797 genuChipPSstate = CHIP_WAKEDUP;
798 }
799 #else
800 INLINE void chip_wakeup(void)
801 {
802 uint32_t reg, trials = 0;
803
804 do {
805 if ((g_wlan.io_func.io_type & 0x1) == HIF_SPI) {
806 g_wlan.hif_func.hif_read_reg(1, &reg);
807 /* Make sure bit 1 is 0 before we start. */
808 g_wlan.hif_func.hif_write_reg(1, reg & ~(1 << 1));
809 /* Set bit 1 */
810 g_wlan.hif_func.hif_write_reg(1, reg | (1 << 1));
811 /* Clear bit 1*/
812 g_wlan.hif_func.hif_write_reg(1, reg & ~(1 << 1));
813 } else if ((g_wlan.io_func.io_type & 0x1) == HIF_SDIO) {
814 /* Make sure bit 0 is 0 before we start. */
815 g_wlan.hif_func.hif_read_reg(0xf0, &reg);
816 g_wlan.hif_func.hif_write_reg(0xf0, reg & ~(1 << 0));
817 /* Set bit 1 */
818 g_wlan.hif_func.hif_write_reg(0xf0, reg | (1 << 0));
819 /* Clear bit 1 */
820 g_wlan.hif_func.hif_write_reg(0xf0, reg & ~(1 << 0));
821 }
822
823 do {
824 /* Wait for the chip to stabilize*/
825 mdelay(3);
826
827 /* Make sure chip is awake. This is an extra step that can be removed */
828 /* later to avoid the bus access overhead */
829 if ((wilc_get_chipid(true) == 0)) {
830 wilc_debug(N_ERR, "Couldn't read chip id. Wake up failed\n");
831 }
832 } while ((wilc_get_chipid(true) == 0) && ((++trials % 3) == 0));
833
834 } while (wilc_get_chipid(true) == 0);
835
836 if (genuChipPSstate == CHIP_SLEEPING_MANUAL) {
837 g_wlan.hif_func.hif_read_reg(0x1C0C, &reg);
838 reg &= ~(1 << 0);
839 g_wlan.hif_func.hif_write_reg(0x1C0C, reg);
840
841 if (wilc_get_chipid(false) >= 0x1002b0) {
842 /* Enable PALDO back right after wakeup */
843 uint32_t val32;
844
845 g_wlan.hif_func.hif_read_reg(0x1e1c, &val32);
846 val32 |= (1 << 6);
847 g_wlan.hif_func.hif_write_reg(0x1e1c, val32);
848
849 g_wlan.hif_func.hif_read_reg(0x1e9c, &val32);
850 val32 |= (1 << 6);
851 g_wlan.hif_func.hif_write_reg(0x1e9c, val32);
852 }
853 }
854 genuChipPSstate = CHIP_WAKEDUP;
855 }
856 #endif
857 void chip_sleep_manually(u32 u32SleepTime)
858 {
859 if (genuChipPSstate != CHIP_WAKEDUP) {
860 /* chip is already sleeping. Do nothing */
861 return;
862 }
863 acquire_bus(ACQUIRE_ONLY);
864
865 #ifdef WILC_OPTIMIZE_SLEEP_INT
866 chip_allow_sleep();
867 #endif
868
869 /* Trigger the manual sleep interrupt */
870 g_wlan.hif_func.hif_write_reg(0x10a8, 1);
871
872 genuChipPSstate = CHIP_SLEEPING_MANUAL;
873 release_bus(RELEASE_ONLY);
874
875 }
876
877
878 /********************************************
879 *
880 * Tx, Rx queue handle functions
881 *
882 ********************************************/
883 static int wilc_wlan_handle_txq(uint32_t *pu32TxqCount)
884 {
885 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
886 int i, entries = 0;
887 uint32_t sum;
888 uint32_t reg;
889 uint8_t *txb = p->tx_buffer;
890 uint32_t offset = 0;
891 int vmm_sz = 0;
892 struct txq_entry_t *tqe;
893 int ret = 0;
894 int counter;
895 int timeout;
896 uint32_t vmm_table[WILC_VMM_TBL_SIZE];
897
898 p->txq_exit = 0;
899 do {
900 if (p->quit)
901 break;
902
903 /*Added by Amr - BugID_4720*/
904 p->os_func.os_wait(p->txq_add_to_head_lock, CFG_PKTS_TIMEOUT);
905 #ifdef TCP_ACK_FILTER
906 wilc_wlan_txq_filter_dup_tcp_ack();
907 #endif
908 /**
909 * build the vmm list
910 **/
911 PRINT_D(TX_DBG, "Getting the head of the TxQ\n");
912 tqe = wilc_wlan_txq_get_first();
913 i = 0;
914 sum = 0;
915 do {
916 /* if ((tqe != NULL) && (i < (8)) && */
917 /* if ((tqe != NULL) && (i < (WILC_VMM_TBL_SIZE-1)) && */
918 if ((tqe != NULL) && (i < (WILC_VMM_TBL_SIZE - 1)) /* reserve last entry to 0 */) {
919
920 if (tqe->type == WILC_CFG_PKT) {
921 vmm_sz = ETH_CONFIG_PKT_HDR_OFFSET;
922 }
923 /*Bug3959: transmitting mgmt frames received from host*/
924 /*vmm_sz will only be equal to tqe->buffer_size + 4 bytes (HOST_HDR_OFFSET)*/
925 /* in other cases WILC_MGMT_PKT and WILC_DATA_PKT_MAC_HDR*/
926 else if (tqe->type == WILC_NET_PKT) {
927 vmm_sz = ETH_ETHERNET_HDR_OFFSET;
928 }
929 #ifdef WILC_FULLY_HOSTING_AP
930 else if (tqe->type == WILC_FH_DATA_PKT) {
931 vmm_sz = FH_TX_HOST_HDR_OFFSET;
932 }
933 #endif
934 #ifdef WILC_AP_EXTERNAL_MLME
935 else {
936 vmm_sz = HOST_HDR_OFFSET;
937 }
938 #endif
939 vmm_sz += tqe->buffer_size;
940 PRINT_D(TX_DBG, "VMM Size before alignment = %d\n", vmm_sz);
941 if (vmm_sz & 0x3) { /* has to be word aligned */
942 vmm_sz = (vmm_sz + 4) & ~0x3;
943 }
944 if ((sum + vmm_sz) > p->tx_buffer_size) {
945 break;
946 }
947 PRINT_D(TX_DBG, "VMM Size AFTER alignment = %d\n", vmm_sz);
948 vmm_table[i] = vmm_sz / 4; /* table take the word size */
949 PRINT_D(TX_DBG, "VMMTable entry size = %d\n", vmm_table[i]);
950
951 if (tqe->type == WILC_CFG_PKT) {
952 vmm_table[i] |= (1 << 10);
953 PRINT_D(TX_DBG, "VMMTable entry changed for CFG packet = %d\n", vmm_table[i]);
954 }
955 #ifdef BIG_ENDIAN
956 vmm_table[i] = BYTE_SWAP(vmm_table[i]);
957 #endif
958
959 i++;
960 sum += vmm_sz;
961 PRINT_D(TX_DBG, "sum = %d\n", sum);
962 tqe = wilc_wlan_txq_get_next(tqe);
963 } else {
964 break;
965 }
966 } while (1);
967
968 if (i == 0) { /* nothing in the queue */
969 PRINT_D(TX_DBG, "Nothing in TX-Q\n");
970 break;
971 } else {
972 PRINT_D(TX_DBG, "Mark the last entry in VMM table - number of previous entries = %d\n", i);
973 vmm_table[i] = 0x0; /* mark the last element to 0 */
974 }
975 acquire_bus(ACQUIRE_AND_WAKEUP);
976 counter = 0;
977 do {
978
979 ret = p->hif_func.hif_read_reg(WILC_HOST_TX_CTRL, &reg);
980 if (!ret) {
981 wilc_debug(N_ERR, "[wilc txq]: fail can't read reg vmm_tbl_entry..\n");
982 break;
983 }
984
985 if ((reg & 0x1) == 0) {
986 /**
987 * write to vmm table
988 **/
989 PRINT_D(TX_DBG, "Writing VMM table ... with Size = %d\n", ((i + 1) * 4));
990 break;
991 } else {
992 counter++;
993 if (counter > 200) {
994 counter = 0;
995 PRINT_D(TX_DBG, "Looping in tx ctrl , forcce quit\n");
996 ret = p->hif_func.hif_write_reg(WILC_HOST_TX_CTRL, 0);
997 break;
998 }
999 /**
1000 * wait for vmm table is ready
1001 **/
1002 PRINT_WRN(GENERIC_DBG, "[wilc txq]: warn, vmm table not clear yet, wait...\n");
1003 release_bus(RELEASE_ALLOW_SLEEP);
1004 p->os_func.os_sleep(3); /* wait 3 ms */
1005 acquire_bus(ACQUIRE_AND_WAKEUP);
1006 }
1007 } while (!p->quit);
1008
1009 if (!ret) {
1010 goto _end_;
1011 }
1012
1013 timeout = 200;
1014 do {
1015
1016 /**
1017 * write to vmm table
1018 **/
1019 ret = p->hif_func.hif_block_tx(WILC_VMM_TBL_RX_SHADOW_BASE, (uint8_t *)vmm_table, ((i + 1) * 4)); /* Bug 4477 fix */
1020 if (!ret) {
1021 wilc_debug(N_ERR, "ERR block TX of VMM table.\n");
1022 break;
1023 }
1024
1025
1026 /**
1027 * interrupt firmware
1028 **/
1029 ret = p->hif_func.hif_write_reg(WILC_HOST_VMM_CTL, 0x2);
1030 if (!ret) {
1031 wilc_debug(N_ERR, "[wilc txq]: fail can't write reg host_vmm_ctl..\n");
1032 break;
1033 }
1034
1035 /**
1036 * wait for confirm...
1037 **/
1038
1039 do {
1040 ret = p->hif_func.hif_read_reg(WILC_HOST_VMM_CTL, &reg);
1041 if (!ret) {
1042 wilc_debug(N_ERR, "[wilc txq]: fail can't read reg host_vmm_ctl..\n");
1043 break;
1044 }
1045 if ((reg >> 2) & 0x1) {
1046 /**
1047 * Get the entries
1048 **/
1049 entries = ((reg >> 3) & 0x3f);
1050 /* entries = ((reg>>3)&0x2f); */
1051 break;
1052 } else {
1053 release_bus(RELEASE_ALLOW_SLEEP);
1054 p->os_func.os_sleep(3); /* wait 3 ms */
1055 acquire_bus(ACQUIRE_AND_WAKEUP);
1056 PRINT_WRN(GENERIC_DBG, "Can't get VMM entery - reg = %2x\n", reg);
1057 }
1058 } while (--timeout);
1059 if (timeout <= 0) {
1060 ret = p->hif_func.hif_write_reg(WILC_HOST_VMM_CTL, 0x0);
1061 break;
1062 }
1063
1064 if (!ret) {
1065 break;
1066 }
1067
1068 if (entries == 0) {
1069 PRINT_WRN(GENERIC_DBG, "[wilc txq]: no more buffer in the chip (reg: %08x), retry later [[ %d, %x ]]\n", reg, i, vmm_table[i - 1]);
1070
1071 /* undo the transaction. */
1072 ret = p->hif_func.hif_read_reg(WILC_HOST_TX_CTRL, &reg);
1073 if (!ret) {
1074 wilc_debug(N_ERR, "[wilc txq]: fail can't read reg WILC_HOST_TX_CTRL..\n");
1075 break;
1076 }
1077 reg &= ~(1ul << 0);
1078 ret = p->hif_func.hif_write_reg(WILC_HOST_TX_CTRL, reg);
1079 if (!ret) {
1080 wilc_debug(N_ERR, "[wilc txq]: fail can't write reg WILC_HOST_TX_CTRL..\n");
1081 break;
1082 }
1083 break;
1084 } else {
1085 break;
1086 }
1087 } while (1);
1088
1089 if (!ret) {
1090 goto _end_;
1091 }
1092 if (entries == 0) {
1093 ret = WILC_TX_ERR_NO_BUF;
1094 goto _end_;
1095 }
1096
1097 /* since copying data into txb takes some time, then
1098 * allow the bus lock to be released let the RX task go. */
1099 release_bus(RELEASE_ALLOW_SLEEP);
1100
1101 /**
1102 * Copy data to the TX buffer
1103 **/
1104 offset = 0;
1105 i = 0;
1106 do {
1107 tqe = wilc_wlan_txq_remove_from_head();
1108 if (tqe != NULL && (vmm_table[i] != 0)) {
1109 uint32_t header, buffer_offset;
1110
1111 #ifdef BIG_ENDIAN
1112 vmm_table[i] = BYTE_SWAP(vmm_table[i]);
1113 #endif
1114 vmm_sz = (vmm_table[i] & 0x3ff); /* in word unit */
1115 vmm_sz *= 4;
1116 header = (tqe->type << 31) | (tqe->buffer_size << 15) | vmm_sz;
1117 /*Bug3959: transmitting mgmt frames received from host*/
1118 /*setting bit 30 in the host header to indicate mgmt frame*/
1119 #ifdef WILC_AP_EXTERNAL_MLME
1120 if (tqe->type == WILC_MGMT_PKT)
1121 header |= (1 << 30);
1122 else
1123 header &= ~(1 << 30);
1124 #endif
1125
1126 #ifdef BIG_ENDIAN
1127 header = BYTE_SWAP(header);
1128 #endif
1129 memcpy(&txb[offset], &header, 4);
1130 if (tqe->type == WILC_CFG_PKT) {
1131 buffer_offset = ETH_CONFIG_PKT_HDR_OFFSET;
1132 }
1133 /*Bug3959: transmitting mgmt frames received from host*/
1134 /*buffer offset = HOST_HDR_OFFSET in other cases: WILC_MGMT_PKT*/
1135 /* and WILC_DATA_PKT_MAC_HDR*/
1136 else if (tqe->type == WILC_NET_PKT) {
1137 char *pBSSID = ((struct tx_complete_data *)(tqe->priv))->pBssid;
1138
1139 buffer_offset = ETH_ETHERNET_HDR_OFFSET;
1140 /* copy the bssid at the sart of the buffer */
1141 memcpy(&txb[offset + 4], pBSSID, 6);
1142 }
1143 #ifdef WILC_FULLY_HOSTING_AP
1144 else if (tqe->type == WILC_FH_DATA_PKT) {
1145 buffer_offset = FH_TX_HOST_HDR_OFFSET;
1146 }
1147 #endif
1148 else {
1149 buffer_offset = HOST_HDR_OFFSET;
1150 }
1151
1152 memcpy(&txb[offset + buffer_offset], tqe->buffer, tqe->buffer_size);
1153 offset += vmm_sz;
1154 i++;
1155 tqe->status = 1; /* mark the packet send */
1156 if (tqe->tx_complete_func)
1157 tqe->tx_complete_func(tqe->priv, tqe->status);
1158 #ifdef TCP_ACK_FILTER
1159 if (tqe->tcp_PendingAck_index != NOT_TCP_ACK) {
1160 Pending_Acks_info[tqe->tcp_PendingAck_index].txqe = NULL;
1161 }
1162 #endif
1163 kfree(tqe);
1164 } else {
1165 break;
1166 }
1167 } while (--entries);
1168
1169 /**
1170 * lock the bus
1171 **/
1172 acquire_bus(ACQUIRE_AND_WAKEUP);
1173
1174 ret = p->hif_func.hif_clear_int_ext(ENABLE_TX_VMM);
1175 if (!ret) {
1176 wilc_debug(N_ERR, "[wilc txq]: fail can't start tx VMM ...\n");
1177 goto _end_;
1178 }
1179
1180 /**
1181 * transfer
1182 **/
1183 ret = p->hif_func.hif_block_tx_ext(0, txb, offset);
1184 if (!ret) {
1185 wilc_debug(N_ERR, "[wilc txq]: fail can't block tx ext...\n");
1186 goto _end_;
1187 }
1188
1189 _end_:
1190
1191 release_bus(RELEASE_ALLOW_SLEEP);
1192 if (ret != 1)
1193 break;
1194 } while (0);
1195 /*Added by Amr - BugID_4720*/
1196 p->os_func.os_signal(p->txq_add_to_head_lock);
1197
1198 p->txq_exit = 1;
1199 PRINT_D(TX_DBG, "THREAD: Exiting txq\n");
1200 /* return tx[]q count */
1201 *pu32TxqCount = p->txq_entries;
1202 return ret;
1203 }
1204
1205 static void wilc_wlan_handle_rxq(void)
1206 {
1207 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1208 int offset = 0, size, has_packet = 0;
1209 uint8_t *buffer;
1210 struct rxq_entry_t *rqe;
1211
1212 p->rxq_exit = 0;
1213
1214
1215
1216
1217 do {
1218 if (p->quit) {
1219 PRINT_D(RX_DBG, "exit 1st do-while due to Clean_UP function\n");
1220 p->os_func.os_signal(p->cfg_wait);
1221 break;
1222 }
1223 rqe = wilc_wlan_rxq_remove();
1224 if (rqe == NULL) {
1225 PRINT_D(RX_DBG, "nothing in the queue - exit 1st do-while\n");
1226 break;
1227 }
1228 buffer = rqe->buffer;
1229 size = rqe->buffer_size;
1230 PRINT_D(RX_DBG, "rxQ entery Size = %d - Address = %p\n", size, buffer);
1231 offset = 0;
1232
1233
1234
1235 do {
1236 uint32_t header;
1237 uint32_t pkt_len, pkt_offset, tp_len;
1238 int is_cfg_packet;
1239
1240 PRINT_D(RX_DBG, "In the 2nd do-while\n");
1241 memcpy(&header, &buffer[offset], 4);
1242 #ifdef BIG_ENDIAN
1243 header = BYTE_SWAP(header);
1244 #endif
1245 PRINT_D(RX_DBG, "Header = %04x - Offset = %d\n", header, offset);
1246
1247
1248
1249 is_cfg_packet = (header >> 31) & 0x1;
1250 pkt_offset = (header >> 22) & 0x1ff;
1251 tp_len = (header >> 11) & 0x7ff;
1252 pkt_len = header & 0x7ff;
1253
1254 if (pkt_len == 0 || tp_len == 0) {
1255 wilc_debug(N_RXQ, "[wilc rxq]: data corrupt, packet len or tp_len is 0 [%d][%d]\n", pkt_len, tp_len);
1256 break;
1257 }
1258
1259 /*bug 3887: [AP] Allow Management frames to be passed to the host*/
1260 #if defined(WILC_AP_EXTERNAL_MLME) || defined(WILC_P2P)
1261 #define IS_MANAGMEMENT 0x100
1262 #define IS_MANAGMEMENT_CALLBACK 0x080
1263 #define IS_MGMT_STATUS_SUCCES 0x040
1264
1265
1266 if (pkt_offset & IS_MANAGMEMENT) {
1267 /* reset mgmt indicator bit, to use pkt_offeset in furthur calculations */
1268 pkt_offset &= ~(IS_MANAGMEMENT | IS_MANAGMEMENT_CALLBACK | IS_MGMT_STATUS_SUCCES);
1269
1270 #ifdef USE_WIRELESS
1271 WILC_WFI_mgmt_rx(&buffer[offset + HOST_HDR_OFFSET], pkt_len);
1272
1273 #endif
1274
1275 }
1276 /* BUG4530 fix */
1277 else
1278 #endif
1279 {
1280
1281 if (!is_cfg_packet) {
1282
1283 if (p->net_func.rx_indicate) {
1284 if (pkt_len > 0) {
1285 p->net_func.rx_indicate(&buffer[offset], pkt_len, pkt_offset);
1286 has_packet = 1;
1287 }
1288 }
1289 } else {
1290 wilc_cfg_rsp_t rsp;
1291
1292
1293
1294 p->cif_func.rx_indicate(&buffer[pkt_offset + offset], pkt_len, &rsp);
1295 if (rsp.type == WILC_CFG_RSP) {
1296 /**
1297 * wake up the waiting task...
1298 **/
1299 PRINT_D(RX_DBG, "p->cfg_seq_no = %d - rsp.seq_no = %d\n", p->cfg_seq_no, rsp.seq_no);
1300 if (p->cfg_seq_no == rsp.seq_no) {
1301 p->os_func.os_signal(p->cfg_wait);
1302 }
1303 } else if (rsp.type == WILC_CFG_RSP_STATUS) {
1304 /**
1305 * Call back to indicate status...
1306 **/
1307 if (p->indicate_func.mac_indicate) {
1308 p->indicate_func.mac_indicate(WILC_MAC_INDICATE_STATUS);
1309 }
1310
1311 } else if (rsp.type == WILC_CFG_RSP_SCAN) {
1312 if (p->indicate_func.mac_indicate)
1313 p->indicate_func.mac_indicate(WILC_MAC_INDICATE_SCAN);
1314 }
1315 }
1316 }
1317 offset += tp_len;
1318 if (offset >= size)
1319 break;
1320 } while (1);
1321
1322
1323 #ifndef MEMORY_STATIC
1324 kfree(buffer);
1325 #endif
1326 kfree(rqe);
1327
1328 if (has_packet) {
1329 if (p->net_func.rx_complete)
1330 p->net_func.rx_complete();
1331 }
1332 } while (1);
1333
1334 p->rxq_exit = 1;
1335 PRINT_D(RX_DBG, "THREAD: Exiting RX thread\n");
1336 }
1337
1338 /********************************************
1339 *
1340 * Fast DMA Isr
1341 *
1342 ********************************************/
1343 static void wilc_unknown_isr_ext(void)
1344 {
1345 g_wlan.hif_func.hif_clear_int_ext(0);
1346 }
1347 static void wilc_pllupdate_isr_ext(uint32_t int_stats)
1348 {
1349
1350 int trials = 10;
1351
1352 g_wlan.hif_func.hif_clear_int_ext(PLL_INT_CLR);
1353
1354 /* Waiting for PLL */
1355 mdelay(WILC_PLL_TO);
1356
1357 /* poll till read a valid data */
1358 while (!(ISWILC1000(wilc_get_chipid(true)) && --trials)) {
1359 PRINT_D(TX_DBG, "PLL update retrying\n");
1360 mdelay(1);
1361 }
1362 }
1363
1364 static void wilc_sleeptimer_isr_ext(uint32_t int_stats1)
1365 {
1366 g_wlan.hif_func.hif_clear_int_ext(SLEEP_INT_CLR);
1367 #ifndef WILC_OPTIMIZE_SLEEP_INT
1368 genuChipPSstate = CHIP_SLEEPING_AUTO;
1369 #endif
1370 }
1371
1372 static void wilc_wlan_handle_isr_ext(uint32_t int_status)
1373 {
1374 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1375 #ifdef MEMORY_STATIC
1376 uint32_t offset = p->rx_buffer_offset;
1377 #endif
1378 uint8_t *buffer = NULL;
1379 uint32_t size;
1380 uint32_t retries = 0;
1381 int ret = 0;
1382 struct rxq_entry_t *rqe;
1383
1384
1385 /**
1386 * Get the rx size
1387 **/
1388
1389 size = ((int_status & 0x7fff) << 2);
1390
1391 while (!size && retries < 10) {
1392 uint32_t time = 0;
1393 /*looping more secure*/
1394 /*zero size make a crashe because the dma will not happen and that will block the firmware*/
1395 wilc_debug(N_ERR, "RX Size equal zero ... Trying to read it again for %d time\n", time++);
1396 p->hif_func.hif_read_size(&size);
1397 size = ((size & 0x7fff) << 2);
1398 retries++;
1399
1400 }
1401
1402 if (size > 0) {
1403 #ifdef MEMORY_STATIC
1404 if (p->rx_buffer_size - offset < size)
1405 offset = 0;
1406
1407 if (p->rx_buffer)
1408 buffer = &p->rx_buffer[offset];
1409 else {
1410 wilc_debug(N_ERR, "[wilc isr]: fail Rx Buffer is NULL...drop the packets (%d)\n", size);
1411 goto _end_;
1412 }
1413
1414 #else
1415 buffer = kmalloc(size, GFP_KERNEL);
1416 if (buffer == NULL) {
1417 wilc_debug(N_ERR, "[wilc isr]: fail alloc host memory...drop the packets (%d)\n", size);
1418 usleep_range(100 * 1000, 100 * 1000);
1419 goto _end_;
1420 }
1421 #endif
1422
1423 /**
1424 * clear the chip's interrupt after getting size some register getting corrupted after clear the interrupt
1425 **/
1426 p->hif_func.hif_clear_int_ext(DATA_INT_CLR | ENABLE_RX_VMM);
1427
1428
1429 /**
1430 * start transfer
1431 **/
1432 ret = p->hif_func.hif_block_rx_ext(0, buffer, size);
1433
1434 if (!ret) {
1435 wilc_debug(N_ERR, "[wilc isr]: fail block rx...\n");
1436 goto _end_;
1437 }
1438 _end_:
1439
1440
1441 if (ret) {
1442 #ifdef MEMORY_STATIC
1443 offset += size;
1444 p->rx_buffer_offset = offset;
1445 #endif
1446 /**
1447 * add to rx queue
1448 **/
1449 rqe = kmalloc(sizeof(struct rxq_entry_t), GFP_KERNEL);
1450 if (rqe != NULL) {
1451 rqe->buffer = buffer;
1452 rqe->buffer_size = size;
1453 PRINT_D(RX_DBG, "rxq entery Size= %d - Address = %p\n", rqe->buffer_size, rqe->buffer);
1454 wilc_wlan_rxq_add(rqe);
1455 p->os_func.os_signal(p->rxq_wait);
1456 }
1457 } else {
1458 #ifndef MEMORY_STATIC
1459 kfree(buffer);
1460 #endif
1461 }
1462 }
1463 #ifdef TCP_ENHANCEMENTS
1464 wilc_wlan_handle_rxq();
1465 #endif
1466 }
1467
1468 void wilc_handle_isr(void)
1469 {
1470 uint32_t int_status;
1471
1472 acquire_bus(ACQUIRE_AND_WAKEUP);
1473 g_wlan.hif_func.hif_read_int(&int_status);
1474
1475 if (int_status & PLL_INT_EXT) {
1476 wilc_pllupdate_isr_ext(int_status);
1477 }
1478 if (int_status & DATA_INT_EXT) {
1479 wilc_wlan_handle_isr_ext(int_status);
1480 #ifndef WILC_OPTIMIZE_SLEEP_INT
1481 /* Chip is up and talking*/
1482 genuChipPSstate = CHIP_WAKEDUP;
1483 #endif
1484 }
1485 if (int_status & SLEEP_INT_EXT) {
1486 wilc_sleeptimer_isr_ext(int_status);
1487 }
1488
1489 if (!(int_status & (ALL_INT_EXT))) {
1490 #ifdef WILC_SDIO
1491 PRINT_D(TX_DBG, ">> UNKNOWN_INTERRUPT - 0x%08x\n", int_status);
1492 #endif
1493 wilc_unknown_isr_ext();
1494 }
1495 #if ((!defined WILC_SDIO) || (defined WILC_SDIO_IRQ_GPIO))
1496 linux_wlan_enable_irq();
1497 #endif
1498 release_bus(RELEASE_ALLOW_SLEEP);
1499 }
1500
1501 /********************************************
1502 *
1503 * Firmware download
1504 *
1505 ********************************************/
1506 static int wilc_wlan_firmware_download(const uint8_t *buffer, uint32_t buffer_size)
1507 {
1508 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1509 uint32_t offset;
1510 uint32_t addr, size, size2, blksz;
1511 uint8_t *dma_buffer;
1512 int ret = 0;
1513
1514 blksz = (1ul << 12); /* Bug 4703: 4KB Good enough size for most platforms = PAGE_SIZE. */
1515 /* Allocate a DMA coherent buffer. */
1516
1517 dma_buffer = kmalloc(blksz, GFP_KERNEL);
1518 if (dma_buffer == NULL) {
1519 /*EIO 5*/
1520 ret = -5;
1521 PRINT_ER("Can't allocate buffer for firmware download IO error\n ");
1522 goto _fail_1;
1523 }
1524
1525 PRINT_D(INIT_DBG, "Downloading firmware size = %d ...\n", buffer_size);
1526 /**
1527 * load the firmware
1528 **/
1529 offset = 0;
1530 do {
1531 memcpy(&addr, &buffer[offset], 4);
1532 memcpy(&size, &buffer[offset + 4], 4);
1533 #ifdef BIG_ENDIAN
1534 addr = BYTE_SWAP(addr);
1535 size = BYTE_SWAP(size);
1536 #endif
1537 acquire_bus(ACQUIRE_ONLY);
1538 offset += 8;
1539 while (((int)size) && (offset < buffer_size)) {
1540 if (size <= blksz)
1541 size2 = size;
1542 else
1543 size2 = blksz;
1544 /* Copy firmware into a DMA coherent buffer */
1545 memcpy(dma_buffer, &buffer[offset], size2);
1546 ret = p->hif_func.hif_block_tx(addr, dma_buffer, size2);
1547 if (!ret)
1548 break;
1549
1550 addr += size2;
1551 offset += size2;
1552 size -= size2;
1553 }
1554 release_bus(RELEASE_ONLY);
1555
1556 if (!ret) {
1557 /*EIO 5*/
1558 ret = -5;
1559 PRINT_ER("Can't download firmware IO error\n ");
1560 goto _fail_;
1561 }
1562 PRINT_D(INIT_DBG, "Offset = %d\n", offset);
1563 } while (offset < buffer_size);
1564
1565 _fail_:
1566
1567 kfree(dma_buffer);
1568
1569 _fail_1:
1570
1571 return (ret < 0) ? ret : 0;
1572 }
1573
1574 /********************************************
1575 *
1576 * Common
1577 *
1578 ********************************************/
1579 static int wilc_wlan_start(void)
1580 {
1581 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1582 uint32_t reg = 0;
1583 int ret;
1584 uint32_t chipid;
1585
1586 /**
1587 * Set the host interface
1588 **/
1589 #ifdef OLD_FPGA_BITFILE
1590 acquire_bus(ACQUIRE_ONLY);
1591 ret = p->hif_func.hif_read_reg(WILC_VMM_CORE_CTL, &reg);
1592 if (!ret) {
1593 wilc_debug(N_ERR, "[wilc start]: fail read reg vmm_core_ctl...\n");
1594 release_bus(RELEASE_ALLOW_SLEEP);
1595 return ret;
1596 }
1597 reg |= (p->io_func.io_type << 2);
1598 ret = p->hif_func.hif_write_reg(WILC_VMM_CORE_CTL, reg);
1599 if (!ret) {
1600 wilc_debug(N_ERR, "[wilc start]: fail write reg vmm_core_ctl...\n");
1601 release_bus(RELEASE_ONLY);
1602 return ret;
1603 }
1604 #else
1605 if (p->io_func.io_type == HIF_SDIO) {
1606 reg = 0;
1607 reg |= (1 << 3); /* bug 4456 and 4557 */
1608 } else if (p->io_func.io_type == HIF_SPI) {
1609 reg = 1;
1610 }
1611 acquire_bus(ACQUIRE_ONLY);
1612 ret = p->hif_func.hif_write_reg(WILC_VMM_CORE_CFG, reg);
1613 if (!ret) {
1614 wilc_debug(N_ERR, "[wilc start]: fail write reg vmm_core_cfg...\n");
1615 release_bus(RELEASE_ONLY);
1616 /* EIO 5*/
1617 ret = -5;
1618 return ret;
1619 }
1620 reg = 0;
1621 #ifdef WILC_SDIO_IRQ_GPIO
1622 reg |= WILC_HAVE_SDIO_IRQ_GPIO;
1623 #endif
1624
1625 #ifdef WILC_DISABLE_PMU
1626 #else
1627 reg |= WILC_HAVE_USE_PMU;
1628 #endif
1629
1630 #ifdef WILC_SLEEP_CLK_SRC_XO
1631 reg |= WILC_HAVE_SLEEP_CLK_SRC_XO;
1632 #elif defined WILC_SLEEP_CLK_SRC_RTC
1633 reg |= WILC_HAVE_SLEEP_CLK_SRC_RTC;
1634 #endif
1635
1636 #ifdef WILC_EXT_PA_INV_TX_RX
1637 reg |= WILC_HAVE_EXT_PA_INV_TX_RX;
1638 #endif
1639
1640 reg |= WILC_HAVE_LEGACY_RF_SETTINGS;
1641
1642
1643 /*BugID_5257*/
1644 /*Set oscillator frequency*/
1645 #ifdef XTAL_24
1646 reg |= WILC_HAVE_XTAL_24;
1647 #endif
1648
1649 /*BugID_5271*/
1650 /*Enable/Disable GPIO configuration for FW logs*/
1651 #ifdef DISABLE_WILC_UART
1652 reg |= WILC_HAVE_DISABLE_WILC_UART;
1653 #endif
1654
1655 ret = p->hif_func.hif_write_reg(WILC_GP_REG_1, reg);
1656 if (!ret) {
1657 wilc_debug(N_ERR, "[wilc start]: fail write WILC_GP_REG_1 ...\n");
1658 release_bus(RELEASE_ONLY);
1659 /* EIO 5*/
1660 ret = -5;
1661 return ret;
1662 }
1663 #endif
1664
1665
1666 /**
1667 * Bus related
1668 **/
1669 p->hif_func.hif_sync_ext(NUM_INT_EXT);
1670
1671 ret = p->hif_func.hif_read_reg(0x1000, &chipid);
1672 if (!ret) {
1673 wilc_debug(N_ERR, "[wilc start]: fail read reg 0x1000 ...\n");
1674 release_bus(RELEASE_ONLY);
1675 /* EIO 5*/
1676 ret = -5;
1677 return ret;
1678 }
1679
1680 /**
1681 * Go...
1682 **/
1683
1684
1685 p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1686 if ((reg & (1ul << 10)) == (1ul << 10)) {
1687 reg &= ~(1ul << 10);
1688 p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1689 p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1690 }
1691
1692 reg |= (1ul << 10);
1693 ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1694 p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1695 release_bus(RELEASE_ONLY);
1696
1697 return (ret < 0) ? ret : 0;
1698 }
1699
1700 void wilc_wlan_global_reset(void)
1701 {
1702
1703 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1704
1705 acquire_bus(ACQUIRE_AND_WAKEUP);
1706 p->hif_func.hif_write_reg(WILC_GLB_RESET_0, 0x0);
1707 release_bus(RELEASE_ONLY);
1708 }
1709 static int wilc_wlan_stop(void)
1710 {
1711 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1712 uint32_t reg = 0;
1713 int ret;
1714 uint8_t timeout = 10;
1715 /**
1716 * TODO: stop the firmware, need a re-download
1717 **/
1718 acquire_bus(ACQUIRE_AND_WAKEUP);
1719
1720 ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1721 if (!ret) {
1722 PRINT_ER("Error while reading reg\n");
1723 release_bus(RELEASE_ALLOW_SLEEP);
1724 return ret;
1725 }
1726
1727 reg &= ~(1 << 10);
1728
1729
1730 ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1731 if (!ret) {
1732 PRINT_ER("Error while writing reg\n");
1733 release_bus(RELEASE_ALLOW_SLEEP);
1734 return ret;
1735 }
1736
1737
1738
1739 do {
1740 ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1741 if (!ret) {
1742 PRINT_ER("Error while reading reg\n");
1743 release_bus(RELEASE_ALLOW_SLEEP);
1744 return ret;
1745 }
1746 PRINT_D(GENERIC_DBG, "Read RESET Reg %x : Retry%d\n", reg, timeout);
1747 /*Workaround to ensure that the chip is actually reset*/
1748 if ((reg & (1 << 10))) {
1749 PRINT_D(GENERIC_DBG, "Bit 10 not reset : Retry %d\n", timeout);
1750 reg &= ~(1 << 10);
1751 ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1752 timeout--;
1753 } else {
1754 PRINT_D(GENERIC_DBG, "Bit 10 reset after : Retry %d\n", timeout);
1755 ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1756 if (!ret) {
1757 PRINT_ER("Error while reading reg\n");
1758 release_bus(RELEASE_ALLOW_SLEEP);
1759 return ret;
1760 }
1761 PRINT_D(GENERIC_DBG, "Read RESET Reg %x : Retry%d\n", reg, timeout);
1762 break;
1763 }
1764
1765 } while (timeout);
1766 #if 1
1767 /******************************************************************************/
1768 /* This was add at Bug 4595 to reset the chip while maintaining the bus state */
1769 /******************************************************************************/
1770 reg = ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 8) | (1 << 9) | (1 << 26) | (1 << 29) | (1 << 30) | (1 << 31)); /**/
1771 /**/
1772 p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg); /**/
1773 reg = ~(1 << 10); /**/
1774 /**/
1775 ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg); /**/
1776 /******************************************************************************/
1777 #endif
1778
1779 release_bus(RELEASE_ALLOW_SLEEP);
1780
1781 return ret;
1782 }
1783
1784 static void wilc_wlan_cleanup(void)
1785 {
1786 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1787 struct txq_entry_t *tqe;
1788 struct rxq_entry_t *rqe;
1789 uint32_t reg = 0;
1790 int ret;
1791
1792 p->quit = 1;
1793 do {
1794 tqe = wilc_wlan_txq_remove_from_head();
1795 if (tqe == NULL)
1796 break;
1797 if (tqe->tx_complete_func)
1798 tqe->tx_complete_func(tqe->priv, 0);
1799 kfree(tqe);
1800 } while (1);
1801
1802 do {
1803 rqe = wilc_wlan_rxq_remove();
1804 if (rqe == NULL)
1805 break;
1806 #ifdef MEMORY_DYNAMIC
1807 kfree(tqe->buffer);
1808 #endif
1809 kfree(rqe);
1810 } while (1);
1811
1812 /**
1813 * clean up buffer
1814 **/
1815
1816 #ifdef MEMORY_STATIC
1817 kfree(p->rx_buffer);
1818 p->rx_buffer = NULL;
1819 #endif
1820 kfree(p->tx_buffer);
1821
1822 acquire_bus(ACQUIRE_AND_WAKEUP);
1823
1824
1825 ret = p->hif_func.hif_read_reg(WILC_GP_REG_0, &reg);
1826 if (!ret) {
1827 PRINT_ER("Error while reading reg\n");
1828 release_bus(RELEASE_ALLOW_SLEEP);
1829 }
1830 PRINT_ER("Writing ABORT reg\n");
1831 ret = p->hif_func.hif_write_reg(WILC_GP_REG_0, (reg | ABORT_INT));
1832 if (!ret) {
1833 PRINT_ER("Error while writing reg\n");
1834 release_bus(RELEASE_ALLOW_SLEEP);
1835 }
1836 release_bus(RELEASE_ALLOW_SLEEP);
1837 /**
1838 * io clean up
1839 **/
1840 p->hif_func.hif_deinit(NULL);
1841
1842 }
1843
1844 static int wilc_wlan_cfg_commit(int type, uint32_t drvHandler)
1845 {
1846 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1847 wilc_cfg_frame_t *cfg = &p->cfg_frame;
1848 int total_len = p->cfg_frame_offset + 4 + DRIVER_HANDLER_SIZE;
1849 int seq_no = p->cfg_seq_no % 256;
1850 int driver_handler = (u32)drvHandler;
1851
1852
1853 /**
1854 * Set up header
1855 **/
1856 if (type == WILC_CFG_SET) { /* Set */
1857 cfg->wid_header[0] = 'W';
1858 } else { /* Query */
1859 cfg->wid_header[0] = 'Q';
1860 }
1861 cfg->wid_header[1] = seq_no; /* sequence number */
1862 cfg->wid_header[2] = (uint8_t)total_len;
1863 cfg->wid_header[3] = (uint8_t)(total_len >> 8);
1864 cfg->wid_header[4] = (uint8_t)driver_handler;
1865 cfg->wid_header[5] = (uint8_t)(driver_handler >> 8);
1866 cfg->wid_header[6] = (uint8_t)(driver_handler >> 16);
1867 cfg->wid_header[7] = (uint8_t)(driver_handler >> 24);
1868 p->cfg_seq_no = seq_no;
1869
1870 /**
1871 * Add to TX queue
1872 **/
1873
1874 /*Edited by Amr - BugID_4720*/
1875 if (!wilc_wlan_txq_add_cfg_pkt(&cfg->wid_header[0], total_len))
1876 return -1;
1877
1878 return 0;
1879 }
1880
1881 static int wilc_wlan_cfg_set(int start, uint32_t wid, uint8_t *buffer, uint32_t buffer_size, int commit, uint32_t drvHandler)
1882 {
1883 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1884 uint32_t offset;
1885 int ret_size;
1886
1887
1888 if (p->cfg_frame_in_use)
1889 return 0;
1890
1891 if (start)
1892 p->cfg_frame_offset = 0;
1893
1894 offset = p->cfg_frame_offset;
1895 ret_size = p->cif_func.cfg_wid_set(p->cfg_frame.frame, offset, (uint16_t)wid, buffer, buffer_size);
1896 offset += ret_size;
1897 p->cfg_frame_offset = offset;
1898
1899 if (commit) {
1900 PRINT_D(TX_DBG, "[WILC]PACKET Commit with sequence number %d\n", p->cfg_seq_no);
1901 PRINT_D(RX_DBG, "Processing cfg_set()\n");
1902 p->cfg_frame_in_use = 1;
1903
1904 /*Edited by Amr - BugID_4720*/
1905 if (wilc_wlan_cfg_commit(WILC_CFG_SET, drvHandler))
1906 ret_size = 0; /* BugID_5213 */
1907
1908 if (p->os_func.os_wait(p->cfg_wait, CFG_PKTS_TIMEOUT)) {
1909 PRINT_D(TX_DBG, "Set Timed Out\n");
1910 ret_size = 0;
1911 }
1912 p->cfg_frame_in_use = 0;
1913 p->cfg_frame_offset = 0;
1914 p->cfg_seq_no += 1;
1915
1916 }
1917
1918 return ret_size;
1919 }
1920 static int wilc_wlan_cfg_get(int start, uint32_t wid, int commit, uint32_t drvHandler)
1921 {
1922 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1923 uint32_t offset;
1924 int ret_size;
1925
1926
1927 if (p->cfg_frame_in_use)
1928 return 0;
1929
1930 if (start)
1931 p->cfg_frame_offset = 0;
1932
1933 offset = p->cfg_frame_offset;
1934 ret_size = p->cif_func.cfg_wid_get(p->cfg_frame.frame, offset, (uint16_t)wid);
1935 offset += ret_size;
1936 p->cfg_frame_offset = offset;
1937
1938 if (commit) {
1939 p->cfg_frame_in_use = 1;
1940
1941 /*Edited by Amr - BugID_4720*/
1942 if (wilc_wlan_cfg_commit(WILC_CFG_QUERY, drvHandler))
1943 ret_size = 0; /* BugID_5213 */
1944
1945
1946 if (p->os_func.os_wait(p->cfg_wait, CFG_PKTS_TIMEOUT)) {
1947 PRINT_D(TX_DBG, "Get Timed Out\n");
1948 ret_size = 0;
1949 }
1950 PRINT_D(GENERIC_DBG, "[WILC]Get Response received\n");
1951 p->cfg_frame_in_use = 0;
1952 p->cfg_frame_offset = 0;
1953 p->cfg_seq_no += 1;
1954 }
1955
1956 return ret_size;
1957 }
1958
1959 static int wilc_wlan_cfg_get_val(uint32_t wid, uint8_t *buffer, uint32_t buffer_size)
1960 {
1961 wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
1962 int ret;
1963
1964 ret = p->cif_func.cfg_wid_get_val((uint16_t)wid, buffer, buffer_size);
1965
1966 return ret;
1967 }
1968
1969 void wilc_bus_set_max_speed(void)
1970 {
1971
1972 /* Increase bus speed to max possible. */
1973 g_wlan.hif_func.hif_set_max_bus_speed();
1974 }
1975
1976 void wilc_bus_set_default_speed(void)
1977 {
1978
1979 /* Restore bus speed to default. */
1980 g_wlan.hif_func.hif_set_default_bus_speed();
1981 }
1982 uint32_t init_chip(void)
1983 {
1984 uint32_t chipid;
1985 uint32_t reg, ret = 0;
1986
1987 #if defined(PLAT_RK3026_TCHIP)
1988 acquire_bus(ACQUIRE_AND_WAKEUP); /* AMR : 0422 RK3026 Crash issue */
1989 #else
1990 acquire_bus(ACQUIRE_ONLY);
1991 #endif
1992
1993 chipid = wilc_get_chipid(true);
1994
1995
1996
1997 if ((chipid & 0xfff) != 0xa0) {
1998 /**
1999 * Avoid booting from boot ROM. Make sure that Drive IRQN [SDIO platform]
2000 * or SD_DAT3 [SPI platform] to ?1?
2001 **/
2002 /* Set cortus reset register to register control. */
2003 ret = g_wlan.hif_func.hif_read_reg(0x1118, &reg);
2004 if (!ret) {
2005 wilc_debug(N_ERR, "[wilc start]: fail read reg 0x1118 ...\n");
2006 return ret;
2007 }
2008 reg |= (1 << 0);
2009 ret = g_wlan.hif_func.hif_write_reg(0x1118, reg);
2010 if (!ret) {
2011 wilc_debug(N_ERR, "[wilc start]: fail write reg 0x1118 ...\n");
2012 return ret;
2013 }
2014 /**
2015 * Write branch intruction to IRAM (0x71 trap) at location 0xFFFF0000
2016 * (Cortus map) or C0000 (AHB map).
2017 **/
2018 ret = g_wlan.hif_func.hif_write_reg(0xc0000, 0x71);
2019 if (!ret) {
2020 wilc_debug(N_ERR, "[wilc start]: fail write reg 0xc0000 ...\n");
2021 return ret;
2022 }
2023 }
2024
2025 release_bus(RELEASE_ONLY);
2026
2027 return ret;
2028
2029 }
2030
2031 uint32_t wilc_get_chipid(uint8_t update)
2032 {
2033 static uint32_t chipid;
2034 /* SDIO can't read into global variables */
2035 /* Use this variable as a temp, then copy to the global */
2036 uint32_t tempchipid = 0;
2037 uint32_t rfrevid;
2038
2039 if (chipid == 0 || update != 0) {
2040 g_wlan.hif_func.hif_read_reg(0x1000, &tempchipid);
2041 g_wlan.hif_func.hif_read_reg(0x13f4, &rfrevid);
2042 if (!ISWILC1000(tempchipid)) {
2043 chipid = 0;
2044 goto _fail_;
2045 }
2046 if (tempchipid == 0x1002a0) {
2047 if (rfrevid == 0x1) { /* 1002A0 */
2048 } else { /* if (rfrevid == 0x2) */ /* 1002A1 */
2049 tempchipid = 0x1002a1;
2050 }
2051 } else if (tempchipid == 0x1002b0) {
2052 if (rfrevid == 3) { /* 1002B0 */
2053 } else if (rfrevid == 4) { /* 1002B1 */
2054 tempchipid = 0x1002b1;
2055 } else { /* if(rfrevid == 5) */ /* 1002B2 */
2056 tempchipid = 0x1002b2;
2057 }
2058 } else {
2059 }
2060
2061 chipid = tempchipid;
2062 }
2063 _fail_:
2064 return chipid;
2065 }
2066
2067 #ifdef COMPLEMENT_BOOT
2068 uint8_t core_11b_ready(void)
2069 {
2070 uint32_t reg_val;
2071
2072 acquire_bus(ACQUIRE_ONLY);
2073 g_wlan.hif_func.hif_write_reg(0x16082c, 1);
2074 g_wlan.hif_func.hif_write_reg(0x161600, 0x90);
2075 g_wlan.hif_func.hif_read_reg(0x161600, &reg_val);
2076 release_bus(RELEASE_ONLY);
2077
2078 if (reg_val == 0x90)
2079 return 0;
2080 else
2081 return 1;
2082 }
2083 #endif
2084
2085 int wilc_wlan_init(wilc_wlan_inp_t *inp, wilc_wlan_oup_t *oup)
2086 {
2087
2088 int ret = 0;
2089
2090 PRINT_D(INIT_DBG, "Initializing WILC_Wlan ...\n");
2091
2092 memset((void *)&g_wlan, 0, sizeof(wilc_wlan_dev_t));
2093
2094 /**
2095 * store the input
2096 **/
2097 memcpy((void *)&g_wlan.os_func, (void *)&inp->os_func, sizeof(wilc_wlan_os_func_t));
2098 memcpy((void *)&g_wlan.io_func, (void *)&inp->io_func, sizeof(wilc_wlan_io_func_t));
2099 memcpy((void *)&g_wlan.net_func, (void *)&inp->net_func, sizeof(wilc_wlan_net_func_t));
2100 memcpy((void *)&g_wlan.indicate_func, (void *)&inp->indicate_func, sizeof(wilc_wlan_net_func_t));
2101 g_wlan.hif_lock = inp->os_context.hif_critical_section;
2102 g_wlan.txq_lock = inp->os_context.txq_critical_section;
2103
2104 /*Added by Amr - BugID_4720*/
2105 g_wlan.txq_add_to_head_lock = inp->os_context.txq_add_to_head_critical_section;
2106
2107 /*Added by Amr - BugID_4720*/
2108 g_wlan.txq_spinlock = inp->os_context.txq_spin_lock;
2109
2110 g_wlan.rxq_lock = inp->os_context.rxq_critical_section;
2111 g_wlan.txq_wait = inp->os_context.txq_wait_event;
2112 g_wlan.rxq_wait = inp->os_context.rxq_wait_event;
2113 g_wlan.cfg_wait = inp->os_context.cfg_wait_event;
2114 g_wlan.tx_buffer_size = inp->os_context.tx_buffer_size;
2115 #if defined (MEMORY_STATIC)
2116 g_wlan.rx_buffer_size = inp->os_context.rx_buffer_size;
2117 #endif
2118 /***
2119 * host interface init
2120 **/
2121 #if defined(PLAT_RK3026_TCHIP) /* AMR : 0422 RK3026 Crash issue */
2122 if (!g_wilc_initialized) {
2123 custom_lock_bus(g_mac_open);
2124 custom_wakeup(g_mac_open);
2125 }
2126 #endif
2127
2128 if ((inp->io_func.io_type & 0x1) == HIF_SDIO) {
2129 if (!hif_sdio.hif_init(inp, wilc_debug)) {
2130 /* EIO 5 */
2131 ret = -5;
2132 goto _fail_;
2133 }
2134 memcpy((void *)&g_wlan.hif_func, &hif_sdio, sizeof(wilc_hif_func_t));
2135 } else {
2136 if ((inp->io_func.io_type & 0x1) == HIF_SPI) {
2137 /**
2138 * TODO:
2139 **/
2140 if (!hif_spi.hif_init(inp, wilc_debug)) {
2141 /* EIO 5 */
2142 ret = -5;
2143 goto _fail_;
2144 }
2145 memcpy((void *)&g_wlan.hif_func, &hif_spi, sizeof(wilc_hif_func_t));
2146 } else {
2147 /* EIO 5 */
2148 ret = -5;
2149 goto _fail_;
2150 }
2151 }
2152
2153 /***
2154 * mac interface init
2155 **/
2156 if (!mac_cfg.cfg_init(wilc_debug)) {
2157 /* ENOBUFS 105 */
2158 ret = -105;
2159 goto _fail_;
2160 }
2161 memcpy((void *)&g_wlan.cif_func, &mac_cfg, sizeof(wilc_cfg_func_t));
2162
2163
2164 /**
2165 * alloc tx, rx buffer
2166 **/
2167 if (g_wlan.tx_buffer == NULL)
2168 g_wlan.tx_buffer = kmalloc(g_wlan.tx_buffer_size, GFP_KERNEL);
2169 PRINT_D(TX_DBG, "g_wlan.tx_buffer = %p\n", g_wlan.tx_buffer);
2170
2171 if (g_wlan.tx_buffer == NULL) {
2172 /* ENOBUFS 105 */
2173 ret = -105;
2174 PRINT_ER("Can't allocate Tx Buffer");
2175 goto _fail_;
2176 }
2177
2178 /* rx_buffer is not used unless we activate USE_MEM STATIC which is not applicable, allocating such memory is useless*/
2179 #if defined (MEMORY_STATIC)
2180 if (g_wlan.rx_buffer == NULL)
2181 g_wlan.rx_buffer = kmalloc(g_wlan.rx_buffer_size, GFP_KERNEL);
2182 PRINT_D(TX_DBG, "g_wlan.rx_buffer =%p\n", g_wlan.rx_buffer);
2183 if (g_wlan.rx_buffer == NULL) {
2184 /* ENOBUFS 105 */
2185 ret = -105;
2186 PRINT_ER("Can't allocate Rx Buffer");
2187 goto _fail_;
2188 }
2189 #endif
2190
2191 /**
2192 * export functions
2193 **/
2194 oup->wlan_firmware_download = wilc_wlan_firmware_download;
2195 oup->wlan_start = wilc_wlan_start;
2196 oup->wlan_stop = wilc_wlan_stop;
2197 oup->wlan_add_to_tx_que = wilc_wlan_txq_add_net_pkt;
2198 oup->wlan_handle_tx_que = wilc_wlan_handle_txq;
2199 oup->wlan_handle_rx_que = wilc_wlan_handle_rxq;
2200 oup->wlan_handle_rx_isr = wilc_handle_isr;
2201 oup->wlan_cleanup = wilc_wlan_cleanup;
2202 oup->wlan_cfg_set = wilc_wlan_cfg_set;
2203 oup->wlan_cfg_get = wilc_wlan_cfg_get;
2204 oup->wlan_cfg_get_value = wilc_wlan_cfg_get_val;
2205
2206 /*Bug3959: transmitting mgmt frames received from host*/
2207 #if defined(WILC_AP_EXTERNAL_MLME) || defined(WILC_P2P)
2208 oup->wlan_add_mgmt_to_tx_que = wilc_wlan_txq_add_mgmt_pkt;
2209
2210 #ifdef WILC_FULLY_HOSTING_AP
2211 oup->wlan_add_data_to_tx_que = wilc_FH_wlan_txq_add_net_pkt;
2212 #endif
2213 #endif
2214
2215 if (!init_chip()) {
2216 /* EIO 5 */
2217 ret = -5;
2218 goto _fail_;
2219 }
2220 #ifdef TCP_ACK_FILTER
2221 Init_TCP_tracking();
2222 #endif
2223
2224 #if defined(PLAT_RK3026_TCHIP) /* AMR : 0422 RK3026 Crash issue */
2225 if (!g_wilc_initialized)
2226 custom_unlock_bus(g_mac_open);
2227 #endif
2228
2229 return 1;
2230
2231 _fail_:
2232
2233 #ifdef MEMORY_STATIC
2234 kfree(g_wlan.rx_buffer);
2235 g_wlan.rx_buffer = NULL;
2236 #endif
2237 kfree(g_wlan.tx_buffer);
2238 g_wlan.tx_buffer = NULL;
2239
2240 #if defined(PLAT_RK3026_TCHIP) /* AMR : 0422 RK3026 Crash issue */
2241 if (!g_wilc_initialized)
2242 custom_unlock_bus(g_mac_open);
2243 #endif
2244
2245 return ret;
2246
2247 }
2248
2249 #define BIT31 (1 << 31)
2250 u16 Set_machw_change_vir_if(bool bValue)
2251 {
2252 u16 ret;
2253 u32 reg;
2254
2255 /*Reset WILC_CHANGING_VIR_IF register to allow adding futrue keys to CE H/W*/
2256 (&g_wlan)->os_func.os_enter_cs((&g_wlan)->hif_lock);
2257 ret = (&g_wlan)->hif_func.hif_read_reg(WILC_CHANGING_VIR_IF, &reg);
2258 if (!ret) {
2259 PRINT_ER("Error while Reading reg WILC_CHANGING_VIR_IF\n");
2260 }
2261
2262 if (bValue)
2263 reg |= (BIT31);
2264 else
2265 reg &= ~(BIT31);
2266
2267 ret = (&g_wlan)->hif_func.hif_write_reg(WILC_CHANGING_VIR_IF, reg);
2268
2269 if (!ret) {
2270 PRINT_ER("Error while writing reg WILC_CHANGING_VIR_IF\n");
2271 }
2272 (&g_wlan)->os_func.os_leave_cs((&g_wlan)->hif_lock);
2273
2274 return ret;
2275 }
2276
2277 #ifdef WILC_FULLY_HOSTING_AP
2278 wilc_wlan_dev_t *Get_wlan_context(u16 *pu16size)
2279 {
2280 *pu16size = sizeof(wilc_wlan_dev_t);
2281 return &g_wlan;
2282 }
2283 #endif
2284
ubuntu-bionic-kernel mirror