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1 // vim:tw=110:ts=4:
2 /************************************************************************************************************
3 *
4 * FILE : HCF.C
5 *
6 * DATE : $Date: 2004/08/05 11:47:10 $ $Revision: 1.10 $
7 * Original: 2004/06/02 10:22:22 Revision: 1.85 Tag: hcf7_t20040602_01
8 * Original: 2004/04/15 09:24:41 Revision: 1.63 Tag: hcf7_t7_20040415_01
9 * Original: 2004/04/13 14:22:44 Revision: 1.62 Tag: t7_20040413_01
10 * Original: 2004/04/01 15:32:55 Revision: 1.59 Tag: t7_20040401_01
11 * Original: 2004/03/10 15:39:27 Revision: 1.55 Tag: t20040310_01
12 * Original: 2004/03/04 11:03:37 Revision: 1.53 Tag: t20040304_01
13 * Original: 2004/03/02 14:51:21 Revision: 1.50 Tag: t20040302_03
14 * Original: 2004/02/24 13:00:27 Revision: 1.43 Tag: t20040224_01
15 * Original: 2004/02/19 10:57:25 Revision: 1.39 Tag: t20040219_01
16 *
17 * AUTHOR : Nico Valster
18 *
19 * SPECIFICATION: ........
20 *
21 * DESCRIPTION : HCF Routines for Hermes-II (callable via the Wireless Connection I/F or WCI)
22 * Local Support Routines for above procedures
23 *
24 * Customizable via HCFCFG.H, which is included by HCF.H
25 *
26 *************************************************************************************************************
27 *
28 *
29 * SOFTWARE LICENSE
30 *
31 * This software is provided subject to the following terms and conditions,
32 * which you should read carefully before using the software. Using this
33 * software indicates your acceptance of these terms and conditions. If you do
34 * not agree with these terms and conditions, do not use the software.
35 *
36 * COPYRIGHT © 1994 - 1995 by AT&T. All Rights Reserved
37 * COPYRIGHT © 1996 - 2000 by Lucent Technologies. All Rights Reserved
38 * COPYRIGHT © 2001 - 2004 by Agere Systems Inc. All Rights Reserved
39 * All rights reserved.
40 *
41 * Redistribution and use in source or binary forms, with or without
42 * modifications, are permitted provided that the following conditions are met:
43 *
44 * . Redistributions of source code must retain the above copyright notice, this
45 * list of conditions and the following Disclaimer as comments in the code as
46 * well as in the documentation and/or other materials provided with the
47 * distribution.
48 *
49 * . Redistributions in binary form must reproduce the above copyright notice,
50 * this list of conditions and the following Disclaimer in the documentation
51 * and/or other materials provided with the distribution.
52 *
53 * . Neither the name of Agere Systems Inc. nor the names of the contributors
54 * may be used to endorse or promote products derived from this software
55 * without specific prior written permission.
56 *
57 * Disclaimer
58 *
59 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
60 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
62 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
63 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
64 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
65 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
66 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
67 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
68 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
69 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
70 * DAMAGE.
71 *
72 *
73 ************************************************************************************************************/
74
75
76 /************************************************************************************************************
77 **
78 ** Implementation Notes
79 **
80 * - a leading marker of //! is used. The purpose of such a sequence is to help to understand the flow
81 * An example is: //!rc = HCF_SUCCESS;
82 * if this is superfluous because rc is already guaranteed to be 0 but it shows to the (maintenance)
83 * programmer it is an intentional omission at the place where someone could consider it most appropriate at
84 * first glance
85 * - using near pointers in a model where ss!=ds is an invitation for disaster, so be aware of how you specify
86 * your model and how you define variables which are used at interrupt time
87 * - remember that sign extension on 32 bit platforms may cause problems unless code is carefully constructed,
88 * e.g. use "(hcf_16)~foo" rather than "~foo"
89 *
90 ************************************************************************************************************/
91
92 #include "hcf.h" // HCF and MSF common include file
93 #include "hcfdef.h" // HCF specific include file
94 #include "mmd.h" // MoreModularDriver common include file
95 #include <linux/kernel.h>
96
97 #if ! defined offsetof
98 #define offsetof(s,m) ((unsigned int)&(((s *)0)->m))
99 #endif // offsetof
100
101
102 /***********************************************************************************************************/
103 /*************************************** PROTOTYPES ******************************************************/
104 /***********************************************************************************************************/
105 HCF_STATIC int cmd_exe( IFBP ifbp, hcf_16 cmd_code, hcf_16 par_0 );
106 HCF_STATIC int init( IFBP ifbp );
107 HCF_STATIC int put_info( IFBP ifbp, LTVP ltvp );
108 #if (HCF_EXT) & HCF_EXT_MB
109 HCF_STATIC int put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp );
110 #endif // HCF_EXT_MB
111 #if (HCF_TYPE) & HCF_TYPE_WPA
112 HCF_STATIC void calc_mic( hcf_32* p, hcf_32 M );
113 void calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len );
114 void calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len );
115 HCF_STATIC int check_mic( IFBP ifbp );
116 #endif // HCF_TYPE_WPA
117
118 HCF_STATIC void calibrate( IFBP ifbp );
119 HCF_STATIC int cmd_cmpl( IFBP ifbp );
120 HCF_STATIC hcf_16 get_fid( IFBP ifbp );
121 HCF_STATIC void isr_info( IFBP ifbp );
122 #if HCF_DMA
123 HCF_STATIC DESC_STRCT* get_frame_lst(IFBP ifbp, int tx_rx_flag);
124 #endif // HCF_DMA
125 HCF_STATIC void get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) ); //char*, byte count (usually even)
126 #if HCF_DMA
127 HCF_STATIC void put_frame_lst( IFBP ifbp, DESC_STRCT *descp, int tx_rx_flag );
128 #endif // HCF_DMA
129 HCF_STATIC void put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) );
130 HCF_STATIC void put_frag_finalize( IFBP ifbp );
131 HCF_STATIC int setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type );
132 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
133 static int fw_printf(IFBP ifbp, CFG_FW_PRINTF_STRCT FAR *ltvp);
134 #endif // HCF_ASSERT_PRINTF
135
136 HCF_STATIC int download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp );
137 #if (HCF_ENCAP) & HCF_ENC
138 HCF_STATIC hcf_8 hcf_encap( wci_bufp type );
139 #endif // HCF_ENCAP
140 HCF_STATIC hcf_8 null_addr[4] = { 0, 0, 0, 0 };
141 #if ! defined IN_PORT_WORD //replace I/O Macros with logging facility
142 extern FILE *log_file;
143
144 #define IN_PORT_WORD(port) in_port_word( (hcf_io)(port) )
145
146 static hcf_16 in_port_word( hcf_io port ) {
147 hcf_16 i = (hcf_16)_inpw( port );
148 if ( log_file ) {
149 fprintf( log_file, "\nR %2.2x %4.4x", (port)&0xFF, i);
150 }
151 return i;
152 } // in_port_word
153
154 #define OUT_PORT_WORD(port, value) out_port_word( (hcf_io)(port), (hcf_16)(value) )
155
156 static void out_port_word( hcf_io port, hcf_16 value ) {
157 _outpw( port, value );
158 if ( log_file ) {
159 fprintf( log_file, "\nW %2.02x %4.04x", (port)&0xFF, value );
160 }
161 }
162
163 void IN_PORT_STRING_32( hcf_io prt, hcf_32 FAR * dst, int n) {
164 int i = 0;
165 hcf_16 FAR * p;
166 if ( log_file ) {
167 fprintf( log_file, "\nread string_32 length %04x (%04d) at port %02.2x to addr %lp",
168 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF, dst);
169 }
170 while ( n-- ) {
171 p = (hcf_16 FAR *)dst;
172 *p++ = (hcf_16)_inpw( prt );
173 *p = (hcf_16)_inpw( prt );
174 if ( log_file ) {
175 fprintf( log_file, "%s%08lx ", i++ % 0x08 ? " " : "\n", *dst);
176 }
177 dst++;
178 }
179 } // IN_PORT_STRING_32
180
181 void IN_PORT_STRING_8_16( hcf_io prt, hcf_8 FAR * dst, int n) { //also handles byte alignment problems
182 hcf_16 FAR * p = (hcf_16 FAR *)dst; //this needs more elaborate code in non-x86 platforms
183 int i = 0;
184 if ( log_file ) {
185 fprintf( log_file, "\nread string_16 length %04x (%04d) at port %02.2x to addr %lp",
186 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF, dst );
187 }
188 while ( n-- ) {
189 *p =(hcf_16)_inpw( prt);
190 if ( log_file ) {
191 if ( i++ % 0x10 ) {
192 fprintf( log_file, "%04x ", *p);
193 } else {
194 fprintf( log_file, "\n%04x ", *p);
195 }
196 }
197 p++;
198 }
199 } // IN_PORT_STRING_8_16
200
201 void OUT_PORT_STRING_32( hcf_io prt, hcf_32 FAR * src, int n) {
202 int i = 0;
203 hcf_16 FAR * p;
204 if ( log_file ) {
205 fprintf( log_file, "\nwrite string_32 length %04x (%04d) at port %02.2x",
206 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF);
207 }
208 while ( n-- ) {
209 p = (hcf_16 FAR *)src;
210 _outpw( prt, *p++ );
211 _outpw( prt, *p );
212 if ( log_file ) {
213 fprintf( log_file, "%s%08lx ", i++ % 0x08 ? " " : "\n", *src);
214 }
215 src++;
216 }
217 } // OUT_PORT_STRING_32
218
219 void OUT_PORT_STRING_8_16( hcf_io prt, hcf_8 FAR * src, int n) { //also handles byte alignment problems
220 hcf_16 FAR * p = (hcf_16 FAR *)src; //this needs more elaborate code in non-x86 platforms
221 int i = 0;
222 if ( log_file ) {
223 fprintf( log_file, "\nwrite string_16 length %04x (%04d) at port %04x", n, n, (hcf_16)prt);
224 }
225 while ( n-- ) {
226 (void)_outpw( prt, *p);
227 if ( log_file ) {
228 if ( i++ % 0x10 ) {
229 fprintf( log_file, "%04x ", *p);
230 } else {
231 fprintf( log_file, "\n%04x ", *p);
232 }
233 }
234 p++;
235 }
236 } // OUT_PORT_STRING_8_16
237
238 #endif // IN_PORT_WORD
239
240 /************************************************************************************************************
241 ******************************* D A T A D E F I N I T I O N S ********************************************
242 ************************************************************************************************************/
243
244 #if HCF_ASSERT
245 IFBP BASED assert_ifbp = NULL; //to make asserts easily work under MMD and DHF
246 #endif // HCF_ASSERT
247
248 #if HCF_ENCAP
249 /* SNAP header to be inserted in Ethernet-II frames */
250 HCF_STATIC hcf_8 BASED snap_header[] = { 0xAA, 0xAA, 0x03, 0x00, 0x00, //5 bytes signature +
251 0 }; //1 byte protocol identifier
252 #endif // HCF_ENCAP
253
254 #if (HCF_TYPE) & HCF_TYPE_WPA
255 HCF_STATIC hcf_8 BASED mic_pad[8] = { 0x5A, 0, 0, 0, 0, 0, 0, 0 }; //MIC padding of message
256 #endif // HCF_TYPE_WPA
257
258 #if defined MSF_COMPONENT_ID
259 CFG_IDENTITY_STRCT BASED cfg_drv_identity = {
260 sizeof(cfg_drv_identity)/sizeof(hcf_16) - 1, //length of RID
261 CFG_DRV_IDENTITY, // (0x0826)
262 MSF_COMPONENT_ID,
263 MSF_COMPONENT_VAR,
264 MSF_COMPONENT_MAJOR_VER,
265 MSF_COMPONENT_MINOR_VER
266 } ;
267
268 CFG_RANGES_STRCT BASED cfg_drv_sup_range = {
269 sizeof(cfg_drv_sup_range)/sizeof(hcf_16) - 1, //length of RID
270 CFG_DRV_SUP_RANGE, // (0x0827)
271
272 COMP_ROLE_SUPL,
273 COMP_ID_DUI,
274 {{ DUI_COMPAT_VAR,
275 DUI_COMPAT_BOT,
276 DUI_COMPAT_TOP
277 }}
278 } ;
279
280 struct CFG_RANGE3_STRCT BASED cfg_drv_act_ranges_pri = {
281 sizeof(cfg_drv_act_ranges_pri)/sizeof(hcf_16) - 1, //length of RID
282 CFG_DRV_ACT_RANGES_PRI, // (0x0828)
283
284 COMP_ROLE_ACT,
285 COMP_ID_PRI,
286 {
287 { 0, 0, 0 }, // HCF_PRI_VAR_1 not supported by HCF 7
288 { 0, 0, 0 }, // HCF_PRI_VAR_2 not supported by HCF 7
289 { 3, //var_rec[2] - Variant number
290 CFG_DRV_ACT_RANGES_PRI_3_BOTTOM, // - Bottom Compatibility
291 CFG_DRV_ACT_RANGES_PRI_3_TOP // - Top Compatibility
292 }
293 }
294 } ;
295
296
297 struct CFG_RANGE4_STRCT BASED cfg_drv_act_ranges_sta = {
298 sizeof(cfg_drv_act_ranges_sta)/sizeof(hcf_16) - 1, //length of RID
299 CFG_DRV_ACT_RANGES_STA, // (0x0829)
300
301 COMP_ROLE_ACT,
302 COMP_ID_STA,
303 {
304 #if defined HCF_STA_VAR_1
305 { 1, //var_rec[1] - Variant number
306 CFG_DRV_ACT_RANGES_STA_1_BOTTOM, // - Bottom Compatibility
307 CFG_DRV_ACT_RANGES_STA_1_TOP // - Top Compatibility
308 },
309 #else
310 { 0, 0, 0 },
311 #endif // HCF_STA_VAR_1
312 #if defined HCF_STA_VAR_2
313 { 2, //var_rec[1] - Variant number
314 CFG_DRV_ACT_RANGES_STA_2_BOTTOM, // - Bottom Compatibility
315 CFG_DRV_ACT_RANGES_STA_2_TOP // - Top Compatibility
316 },
317 #else
318 { 0, 0, 0 },
319 #endif // HCF_STA_VAR_2
320 // For Native_USB (Not used!)
321 #if defined HCF_STA_VAR_3
322 { 3, //var_rec[1] - Variant number
323 CFG_DRV_ACT_RANGES_STA_3_BOTTOM, // - Bottom Compatibility
324 CFG_DRV_ACT_RANGES_STA_3_TOP // - Top Compatibility
325 },
326 #else
327 { 0, 0, 0 },
328 #endif // HCF_STA_VAR_3
329 // Warp
330 #if defined HCF_STA_VAR_4
331 { 4, //var_rec[1] - Variant number
332 CFG_DRV_ACT_RANGES_STA_4_BOTTOM, // - Bottom Compatibility
333 CFG_DRV_ACT_RANGES_STA_4_TOP // - Top Compatibility
334 }
335 #else
336 { 0, 0, 0 }
337 #endif // HCF_STA_VAR_4
338 }
339 } ;
340
341
342 struct CFG_RANGE6_STRCT BASED cfg_drv_act_ranges_hsi = {
343 sizeof(cfg_drv_act_ranges_hsi)/sizeof(hcf_16) - 1, //length of RID
344 CFG_DRV_ACT_RANGES_HSI, // (0x082A)
345 COMP_ROLE_ACT,
346 COMP_ID_HSI,
347 {
348 #if defined HCF_HSI_VAR_0 // Controlled deployment
349 { 0, // var_rec[1] - Variant number
350 CFG_DRV_ACT_RANGES_HSI_0_BOTTOM, // - Bottom Compatibility
351 CFG_DRV_ACT_RANGES_HSI_0_TOP // - Top Compatibility
352 },
353 #else
354 { 0, 0, 0 },
355 #endif // HCF_HSI_VAR_0
356 { 0, 0, 0 }, // HCF_HSI_VAR_1 not supported by HCF 7
357 { 0, 0, 0 }, // HCF_HSI_VAR_2 not supported by HCF 7
358 { 0, 0, 0 }, // HCF_HSI_VAR_3 not supported by HCF 7
359 #if defined HCF_HSI_VAR_4 // Hermes-II all types
360 { 4, // var_rec[1] - Variant number
361 CFG_DRV_ACT_RANGES_HSI_4_BOTTOM, // - Bottom Compatibility
362 CFG_DRV_ACT_RANGES_HSI_4_TOP // - Top Compatibility
363 },
364 #else
365 { 0, 0, 0 },
366 #endif // HCF_HSI_VAR_4
367 #if defined HCF_HSI_VAR_5 // WARP Hermes-2.5
368 { 5, // var_rec[1] - Variant number
369 CFG_DRV_ACT_RANGES_HSI_5_BOTTOM, // - Bottom Compatibility
370 CFG_DRV_ACT_RANGES_HSI_5_TOP // - Top Compatibility
371 }
372 #else
373 { 0, 0, 0 }
374 #endif // HCF_HSI_VAR_5
375 }
376 } ;
377
378
379 CFG_RANGE4_STRCT BASED cfg_drv_act_ranges_apf = {
380 sizeof(cfg_drv_act_ranges_apf)/sizeof(hcf_16) - 1, //length of RID
381 CFG_DRV_ACT_RANGES_APF, // (0x082B)
382
383 COMP_ROLE_ACT,
384 COMP_ID_APF,
385 {
386 #if defined HCF_APF_VAR_1 //(Fake) Hermes-I
387 { 1, //var_rec[1] - Variant number
388 CFG_DRV_ACT_RANGES_APF_1_BOTTOM, // - Bottom Compatibility
389 CFG_DRV_ACT_RANGES_APF_1_TOP // - Top Compatibility
390 },
391 #else
392 { 0, 0, 0 },
393 #endif // HCF_APF_VAR_1
394 #if defined HCF_APF_VAR_2 //Hermes-II
395 { 2, // var_rec[1] - Variant number
396 CFG_DRV_ACT_RANGES_APF_2_BOTTOM, // - Bottom Compatibility
397 CFG_DRV_ACT_RANGES_APF_2_TOP // - Top Compatibility
398 },
399 #else
400 { 0, 0, 0 },
401 #endif // HCF_APF_VAR_2
402 #if defined HCF_APF_VAR_3 // Native_USB
403 { 3, // var_rec[1] - Variant number
404 CFG_DRV_ACT_RANGES_APF_3_BOTTOM, // - Bottom Compatibility !!!!!see note below!!!!!!!
405 CFG_DRV_ACT_RANGES_APF_3_TOP // - Top Compatibility
406 },
407 #else
408 { 0, 0, 0 },
409 #endif // HCF_APF_VAR_3
410 #if defined HCF_APF_VAR_4 // WARP Hermes 2.5
411 { 4, // var_rec[1] - Variant number
412 CFG_DRV_ACT_RANGES_APF_4_BOTTOM, // - Bottom Compatibility !!!!!see note below!!!!!!!
413 CFG_DRV_ACT_RANGES_APF_4_TOP // - Top Compatibility
414 }
415 #else
416 { 0, 0, 0 }
417 #endif // HCF_APF_VAR_4
418 }
419 } ;
420 #define HCF_VERSION TEXT( "HCF$Revision: 1.10 $" )
421
422 static struct /*CFG_HCF_OPT_STRCT*/ {
423 hcf_16 len; //length of cfg_hcf_opt struct
424 hcf_16 typ; //type 0x082C
425 hcf_16 v0; //offset HCF_VERSION
426 hcf_16 v1; // MSF_COMPONENT_ID
427 hcf_16 v2; // HCF_ALIGN
428 hcf_16 v3; // HCF_ASSERT
429 hcf_16 v4; // HCF_BIG_ENDIAN
430 hcf_16 v5; // /* HCF_DLV | HCF_DLNV */
431 hcf_16 v6; // HCF_DMA
432 hcf_16 v7; // HCF_ENCAP
433 hcf_16 v8; // HCF_EXT
434 hcf_16 v9; // HCF_INT_ON
435 hcf_16 v10; // HCF_IO
436 hcf_16 v11; // HCF_LEGACY
437 hcf_16 v12; // HCF_MAX_LTV
438 hcf_16 v13; // HCF_PROT_TIME
439 hcf_16 v14; // HCF_SLEEP
440 hcf_16 v15; // HCF_TALLIES
441 hcf_16 v16; // HCF_TYPE
442 hcf_16 v17; // HCF_NIC_TAL_CNT
443 hcf_16 v18; // HCF_HCF_TAL_CNT
444 hcf_16 v19; // offset tallies
445 TCHAR val[sizeof(HCF_VERSION)];
446 } BASED cfg_hcf_opt = {
447 sizeof(cfg_hcf_opt)/sizeof(hcf_16) -1,
448 CFG_HCF_OPT, // (0x082C)
449 ( sizeof(cfg_hcf_opt) - sizeof(HCF_VERSION) - 4 )/sizeof(hcf_16),
450 #if defined MSF_COMPONENT_ID
451 MSF_COMPONENT_ID,
452 #else
453 0,
454 #endif // MSF_COMPONENT_ID
455 HCF_ALIGN,
456 HCF_ASSERT,
457 HCF_BIG_ENDIAN,
458 0, // /* HCF_DLV | HCF_DLNV*/,
459 HCF_DMA,
460 HCF_ENCAP,
461 HCF_EXT,
462 HCF_INT_ON,
463 HCF_IO,
464 HCF_LEGACY,
465 HCF_MAX_LTV,
466 HCF_PROT_TIME,
467 HCF_SLEEP,
468 HCF_TALLIES,
469 HCF_TYPE,
470 #if (HCF_TALLIES) & ( HCF_TALLIES_NIC | HCF_TALLIES_HCF )
471 HCF_NIC_TAL_CNT,
472 HCF_HCF_TAL_CNT,
473 offsetof(IFB_STRCT, IFB_TallyLen ),
474 #else
475 0, 0, 0,
476 #endif // HCF_TALLIES_NIC / HCF_TALLIES_HCF
477 HCF_VERSION
478 }; // cfg_hcf_opt
479 #endif // MSF_COMPONENT_ID
480
481 #if defined HCF_TALLIES_EXTRA
482 replaced by HCF_EXT_TALLIES_FW ;
483 #endif // HCF_TALLIES_EXTRA
484
485 #if defined MSF_COMPONENT_ID || (HCF_EXT) & HCF_EXT_MB
486 #if (HCF_EXT) & HCF_EXT_MB
487 HCF_STATIC LTV_STRCT BASED cfg_null = { 1, CFG_NULL, {0} };
488 #endif // HCF_EXT_MB
489 HCF_STATIC hcf_16* BASED xxxx[ ] = {
490 #if (HCF_EXT) & HCF_EXT_MB
491 &cfg_null.len, //CFG_NULL 0x0820
492 #endif // HCF_EXT_MB
493 #if defined MSF_COMPONENT_ID
494 &cfg_drv_identity.len, //CFG_DRV_IDENTITY 0x0826
495 &cfg_drv_sup_range.len, //CFG_DRV_SUP_RANGE 0x0827
496 &cfg_drv_act_ranges_pri.len, //CFG_DRV_ACT_RANGES_PRI 0x0828
497 &cfg_drv_act_ranges_sta.len, //CFG_DRV_ACT_RANGES_STA 0x0829
498 &cfg_drv_act_ranges_hsi.len, //CFG_DRV_ACT_RANGES_HSI 0x082A
499 &cfg_drv_act_ranges_apf.len, //CFG_DRV_ACT_RANGES_APF 0x082B
500 &cfg_hcf_opt.len, //CFG_HCF_OPT 0x082C
501 NULL, //IFB_PRIIdentity placeholder 0xFD02
502 NULL, //IFB_PRISup placeholder 0xFD03
503 #endif // MSF_COMPONENT_ID
504 NULL //endsentinel
505 };
506 #define xxxx_PRI_IDENTITY_OFFSET (ARRAY_SIZE(xxxx) - 3)
507
508 #endif // MSF_COMPONENT_ID / HCF_EXT_MB
509
510
511 /************************************************************************************************************
512 ************************** T O P L E V E L H C F R O U T I N E S **************************************
513 ************************************************************************************************************/
514
515 #if (HCF_DL_ONLY) == 0
516 /************************************************************************************************************
517 *
518 *.MODULE int hcf_action( IFBP ifbp, hcf_16 action )
519 *.PURPOSE Changes the run-time Card behavior.
520 * Performs Miscellanuous actions.
521 *
522 *.ARGUMENTS
523 * ifbp address of the Interface Block
524 * action number identifying the type of change
525 * - HCF_ACT_CCX_OFF disable CKIP
526 * - HCF_ACT_CCX_ON enable CKIP
527 * - HCF_ACT_INT_FORCE_ON enable interrupt generation by WaveLAN NIC
528 * - HCF_ACT_INT_OFF disable interrupt generation by WaveLAN NIC
529 * - HCF_ACT_INT_ON compensate 1 HCF_ACT_INT_OFF, enable interrupt generation if balance reached
530 * - HCF_ACT_PRS_SCAN Hermes Probe Respons Scan (F102) command
531 * - HCF_ACT_RX_ACK acknowledge non-DMA receiver to Hermes
532 * - HCF_ACT_SCAN Hermes Inquire Scan (F101) command (non-WARP only)
533 * - HCF_ACT_SLEEP DDS Sleep request
534 * - HCF_ACT_TALLIES Hermes Inquire Tallies (F100) command
535 *
536 *.RETURNS
537 * HCF_SUCCESS all (including invalid)
538 * HCF_INT_PENDING HCF_ACT_INT_OFF, interrupt pending
539 * HCF_ERR_NO_NIC HCF_ACT_INT_OFF, NIC presence check fails
540 *
541 *.CONDITIONS
542 * Except for hcf_action with HCF_ACT_INT_FORCE_ON or HCF_ACT_INT_OFF as parameter or hcf_connect with an I/O
543 * address (i.e. not HCF_DISCONNECT), all hcf-function calls MUST be preceded by a call of hcf_action with
544 * HCF_ACT_INT_OFF as parameter.
545 * Note that hcf_connect defaults to NIC interrupt disabled mode, i.e. as if hcf_action( HCF_ACT_INT_OFF )
546 * was called.
547 *
548 *.DESCRIPTION
549 * hcf_action supports the following mode changing action-code pairs that are antonyms
550 * - HCF_ACT_CCX_OFF / HCF_ACT_CCX_ON
551 * - HCF_ACT_INT_[FORCE_]ON / HCF_ACT_INT_OFF
552 *
553 * Additionally hcf_action can start the following actions in the NIC:
554 * - HCF_ACT_PRS_SCAN
555 * - HCF_ACT_RX_ACK
556 * - HCF_ACT_SCAN
557 * - HCF_ACT_SLEEP
558 * - HCF_ACT_TALLIES
559 *
560 * o HCF_ACT_INT_OFF: Sets NIC Interrupts mode Disabled.
561 * This command, and the associated [Force] Enable NIC interrupts command, are only available if the HCF_INT_ON
562 * compile time option is not set at 0x0000.
563 *
564 * o HCF_ACT_INT_ON: Sets NIC Interrupts mode Enabled.
565 * Enable NIC Interrupts, depending on the number of preceding Disable NIC Interrupt calls.
566 *
567 * o HCF_ACT_INT_FORCE_ON: Force NIC Interrupts mode Enabled.
568 * Sets NIC Interrupts mode Enabled, regardless off the number of preceding Disable NIC Interrupt calls.
569 *
570 * The disabling and enabling of interrupts are antonyms.
571 * These actions must be balanced.
572 * For each "disable interrupts" there must be a matching "enable interrupts".
573 * The disable interrupts may be executed multiple times in a row without intervening enable interrupts, in
574 * other words, the disable interrupts may be nested.
575 * The interrupt generation mechanism is disabled at the first call with HCF_ACT_INT_OFF.
576 * The interrupt generation mechanism is re-enabled when the number of calls with HCF_ACT_INT_ON matches the
577 * number of calls with INT_OFF.
578 *
579 * It is not allowed to have more Enable NIC Interrupts calls than Disable NIC Interrupts calls.
580 * The interrupt generation mechanism is initially (i.e. after hcf_connect) disabled.
581 * An MSF based on a interrupt strategy must call hcf_action with INT_ON in its initialization logic.
582 *
583 *! The INT_OFF/INT_ON housekeeping is initialized at 0x0000 by hcf_connect, causing the interrupt generation
584 * mechanism to be disabled at first. This suits MSF implementation based on a polling strategy.
585 *
586 * o HCF_ACT_CCX_OFF / HCF_ACT_CCX_ON
587 *!! This can use some more explanation;?
588 * Disables and Enables support in the HCF runtime code for the CCX feature. Each time one of these action
589 * codes is used, the effects of the preceding use cease.
590 *
591 * o HCF_ACT_SLEEP: Initiates the Disconnected DeepSleep process
592 * This command is only available if the HCF_DDS compile time option is set. It triggers the F/W to start the
593 * sleep handshaking. Regardless whether the Host initiates a Disconnected DeepSleep (DDS) or the F/W initiates
594 * a Connected DeepSleep (CDS), the Host-F/W sleep handshaking is completed when the NIC Interrupts mode is
595 * enabled (by means of the balancing HCF_ACT_INT_ON), i.e. at that moment the F/W really goes into sleep mode.
596 * The F/W is wokenup by the HCF when the NIC Interrupts mode are disabled, i.e. at the first HCF_ACT_INT_OFF
597 * after going into sleep.
598 *
599 * The following Miscellanuous actions are defined:
600 *
601 * o HCF_ACT_RX_ACK: Receiver Acknowledgement (non-DMA, non-USB mode only)
602 * Acking the receiver, frees the NIC memory used to hold the Rx frame and allows the F/W to
603 * report the existence of the next Rx frame.
604 * If the MSF does not need access (any longer) to the current frame, e.g. because it is rejected based on the
605 * look ahead or copied to another buffer, the receiver may be acked. Acking earlier is assumed to have the
606 * potential of improving the performance.
607 * If the MSF does not explitly ack te receiver, the acking is done implicitly if:
608 * - the received frame fits in the look ahead buffer, by the hcf_service_nic call that reported the Rx frame
609 * - if not in the above step, by hcf_rcv_msg (assuming hcf_rcv_msg is called)
610 * - if neither of the above implicit acks nor an explicit ack by the MSF, by the first hcf_service_nic after
611 * the hcf_service_nic that reported the Rx frame.
612 * Note: If an Rx frame is already acked, an explicit ACK by the MSF acts as a NoOperation.
613 *
614 * o HCF_ACT_TALLIES: Inquire Tallies command
615 * This command is only operational if the F/W is enabled.
616 * The Inquire Tallies command requests the F/W to provide its current set of tallies.
617 * See also hcf_get_info with CFG_TALLIES as parameter.
618 *
619 * o HCF_ACT_PRS_SCAN: Inquire Probe Respons Scan command
620 * This command is only operational if the F/W is enabled.
621 * The Probe Respons Scan command starts a scan sequence.
622 * The HCF puts the result of this action in an MSF defined buffer (see CFG_RID_LOG_STRCT).
623 *
624 * o HCF_ACT_SCAN: Inquire Scan command
625 * This command is only supported for HII F/W (i.e. pre-WARP) and it is operational if the F/W is enabled.
626 * The Inquire Scan command starts a scan sequence.
627 * The HCF puts the result of this action in an MSF defined buffer (see CFG_RID_LOG_STRCT).
628 *
629 * Assert fails if
630 * - ifbp has a recognizable out-of-range value.
631 * - NIC interrupts are not disabled while required by parameter action.
632 * - an invalid code is specified in parameter action.
633 * - HCF_ACT_INT_ON commands outnumber the HCF_ACT_INT_OFF commands.
634 * - reentrancy, may be caused by calling hcf_functions without adequate protection against NIC interrupts or
635 * multi-threading
636 *
637 * - Since the HCF does not maintain status information relative to the F/W enabled state, it is not asserted
638 * whether HCF_ACT_SCAN, HCF_ACT_PRS_SCAN or HCF_ACT_TALLIES are only used while F/W is enabled.
639 *
640 *.DIAGRAM
641 * 0: The assert embedded in HCFLOGENTRY checks against re-entrancy. Re-entrancy could be caused by a MSF logic
642 * at task-level calling hcf_functions without shielding with HCF_ACT_ON/_OFF. However the HCF_ACT_INT_OFF
643 * action itself can per definition not be protected this way. Based on code inspection, it can be concluded,
644 * that there is no re-entrancy PROBLEM in this particular flow. It does not seem worth the trouble to
645 * explicitly check for this condition (although there was a report of an MSF which ran into this assert.
646 * 2:IFB_IntOffCnt is used to balance the INT_OFF and INT_ON calls. Disabling of the interrupts is achieved by
647 * writing a zero to the Hermes IntEn register. In a shared interrupt environment (e.g. the mini-PCI NDIS
648 * driver) it is considered more correct to return the status HCF_INT_PENDING if and only if, the current
649 * invocation of hcf_service_nic is (apparently) called in the ISR when the ISR was activated as result of a
650 * change in HREG_EV_STAT matching a bit in HREG_INT_EN, i.e. not if invoked as result of another device
651 * generating an interrupt on the shared interrupt line.
652 * Note 1: it has been observed that under certain adverse conditions on certain platforms the writing of
653 * HREG_INT_EN can apparently fail, therefor it is paramount that HREG_INT_EN is written again with 0 for
654 * each and every call to HCF_ACT_INT_OFF.
655 * Note 2: it has been observed that under certain H/W & S/W architectures this logic is called when there is
656 * no NIC at all. To cater for this, the value of HREG_INT_EN is validated. If the unused bit 0x0100 is set,
657 * it is assumed there is no NIC.
658 * Note 3: During the download process, some versions of the F/W reset HREG_SW_0, hence checking this
659 * register for HCF_MAGIC (the classical NIC presence test) when HCF_ACT_INT_OFF is called due to another
660 * card interrupting via a shared IRQ during a download, fails.
661 *4: The construction "if ( ifbp->IFB_IntOffCnt-- == 0 )" is optimal (in the sense of shortest/quickest
662 * path in error free flows) but NOT fail safe in case of too many INT_ON invocations compared to INT_OFF).
663 * Enabling of the interrupts is achieved by writing the Hermes IntEn register.
664 * - If the HCF is in Defunct mode, the interrupts stay disabled.
665 * - Under "normal" conditions, the HCF is only interested in Info Events, Rx Events and Notify Events.
666 * - When the HCF is out of Tx/Notify resources, the HCF is also interested in Alloc Events.
667 * - via HCF_EXT, the MSF programmer can also request HREG_EV_TICK and/or HREG_EV_TX_EXC interrupts.
668 * For DMA operation, the DMA hardware handles the alloc events. The DMA engine will generate a 'TxDmaDone'
669 * event as soon as it has pumped a frame from host ram into NIC-RAM (note that the frame does not have to be
670 * transmitted then), and a 'RxDmaDone' event as soon as a received frame has been pumped from NIC-RAM into
671 * host ram. Note that the 'alloc' event has been removed from the event-mask, because the DMA engine will
672 * react to and acknowledge this event.
673 *6: ack the "old" Rx-event. See "Rx Buffer free strategy" in hcf_service_nic above for more explanation.
674 * IFB_RxFID and IFB_RxLen must be cleared to bring both the internal HCF house keeping and the information
675 * supplied to the MSF in the state "no frame received".
676 *8: The HCF_ACT_SCAN, HCF_ACT_PRS_SCAN and HCF_ACT_TALLIES activity are merged by "clever" algebraic
677 * manipulations of the RID-values and action codes, so foregoing robustness against migration problems for
678 * ease of implementation. The assumptions about numerical relationships between CFG_TALLIES etc and
679 * HCF_ACT_TALLIES etc are checked by the "#if" statements just prior to the body of this routine, resulting
680 * in: err "maintenance" during compilation if the assumptions are no longer met. The writing of HREG_PARAM_1
681 * with 0x3FFF in case of an PRS scan, is a kludge to get around lack of specification, hence different
682 * implementation in F/W and Host.
683 * When there is no NIC RAM available, some versions of the Hermes F/W do report 0x7F00 as error in the
684 * Result field of the Status register and some F/W versions don't. To mask this difference to the MSF all
685 * return codes of the Hermes are ignored ("best" and "most simple" solution to these types of analomies with
686 * an acceptable loss due to ignoring all error situations as well).
687 * The "No inquire space" is reported via the Hermes tallies.
688 *30: do not HCFASSERT( rc, rc ) since rc == HCF_INT_PENDING is no error
689 *
690 *.ENDDOC END DOCUMENTATION
691 *
692 ************************************************************************************************************/
693 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
694 #if CFG_SCAN != CFG_TALLIES - HCF_ACT_TALLIES + HCF_ACT_SCAN
695 err: "maintenance" apparently inviolated the underlying assumption about the numerical values of these macros
696 #endif
697 #endif // HCF_TYPE_HII5
698 #if CFG_PRS_SCAN != CFG_TALLIES - HCF_ACT_TALLIES + HCF_ACT_PRS_SCAN
699 err: "maintenance" apparently inviolated the underlying assumption about the numerical values of these macros
700 #endif
701 int
702 hcf_action( IFBP ifbp, hcf_16 action )
703 {
704 int rc = HCF_SUCCESS;
705
706 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
707 #if HCF_INT_ON
708 HCFLOGENTRY( action == HCF_ACT_INT_FORCE_ON ? HCF_TRACE_ACTION_KLUDGE : HCF_TRACE_ACTION, action ) /* 0 */
709 #if (HCF_SLEEP)
710 HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE || action == HCF_ACT_INT_OFF,
711 MERGE_2( action, ifbp->IFB_IntOffCnt ) )
712 #else
713 HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE, action )
714 #endif // HCF_SLEEP
715 HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFF ||
716 action == HCF_ACT_INT_OFF || action == HCF_ACT_INT_FORCE_ON, action )
717 HCFASSERT( ifbp->IFB_IntOffCnt <= 16 || ifbp->IFB_IntOffCnt >= 0xFFFE,
718 MERGE_2( action, ifbp->IFB_IntOffCnt ) ) //nesting more than 16 deep seems unreasonable
719 #endif // HCF_INT_ON
720
721 switch (action) {
722 #if HCF_INT_ON
723 hcf_16 i;
724 case HCF_ACT_INT_OFF: // Disable Interrupt generation
725 #if HCF_SLEEP
726 if ( ifbp->IFB_IntOffCnt == 0xFFFE ) { // WakeUp test ;?tie this to the "new" super-LinkStat
727 ifbp->IFB_IntOffCnt++; // restore conventional I/F
728 OPW(HREG_IO, HREG_IO_WAKEUP_ASYNC ); // set wakeup bit
729 OPW(HREG_IO, HREG_IO_WAKEUP_ASYNC ); // set wakeup bit to counteract the clearing by F/W
730 // 800 us latency before FW switches to high power
731 MSF_WAIT(800); // MSF-defined function to wait n microseconds.
732 //OOR if ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_DS_OOR ) { // OutOfRange
733 // printk( "<5>ACT_INT_OFF: Deepsleep phase terminated, enable and go to AwaitConnection\n" ); //;?remove me 1 day
734 // hcf_cntl( ifbp, HCF_CNTL_ENABLE );
735 // }
736 // ifbp->IFB_DSLinkStat &= ~( CFG_LINK_STAT_DS_IR | CFG_LINK_STAT_DS_OOR); //clear IR/OOR state
737 }
738 #endif // HCF_SLEEP
739 /*2*/ ifbp->IFB_IntOffCnt++;
740 //! rc = 0;
741 i = IPW( HREG_INT_EN );
742 OPW( HREG_INT_EN, 0 );
743 if ( i & 0x1000 ) {
744 rc = HCF_ERR_NO_NIC;
745 } else {
746 if ( i & IPW( HREG_EV_STAT ) ) {
747 rc = HCF_INT_PENDING;
748 }
749 }
750 break;
751
752 case HCF_ACT_INT_FORCE_ON: // Enforce Enable Interrupt generation
753 ifbp->IFB_IntOffCnt = 0;
754 //Fall through in HCF_ACT_INT_ON
755
756 case HCF_ACT_INT_ON: // Enable Interrupt generation
757 /*4*/ if ( ifbp->IFB_IntOffCnt-- == 0 && ifbp->IFB_CardStat == 0 ) {
758 //determine Interrupt Event mask
759 #if HCF_DMA
760 if ( ifbp->IFB_CntlOpt & USE_DMA ) {
761 i = HREG_EV_INFO | HREG_EV_RDMAD | HREG_EV_TDMAD | HREG_EV_TX_EXT; //mask when DMA active
762 } else
763 #endif // HCF_DMA
764 {
765 i = HREG_EV_INFO | HREG_EV_RX | HREG_EV_TX_EXT; //mask when DMA not active
766 if ( ifbp->IFB_RscInd == 0 ) {
767 i |= HREG_EV_ALLOC; //mask when no TxFID available
768 }
769 }
770 #if HCF_SLEEP
771 if ( ( IPW(HREG_EV_STAT) & ( i | HREG_EV_SLEEP_REQ ) ) == HREG_EV_SLEEP_REQ ) {
772 // firmware indicates it would like to go into sleep modus
773 // only acknowledge this request if no other events that can cause an interrupt are pending
774 ifbp->IFB_IntOffCnt--; //becomes 0xFFFE
775 OPW( HREG_INT_EN, i | HREG_EV_TICK );
776 OPW( HREG_EV_ACK, HREG_EV_SLEEP_REQ | HREG_EV_TICK | HREG_EV_ACK_REG_READY );
777 } else
778 #endif // HCF_SLEEP
779 {
780 OPW( HREG_INT_EN, i | HREG_EV_SLEEP_REQ );
781 }
782 }
783 break;
784 #endif // HCF_INT_ON
785
786 #if (HCF_SLEEP) & HCF_DDS
787 case HCF_ACT_SLEEP: // DDS Sleep request
788 hcf_cntl( ifbp, HCF_CNTL_DISABLE );
789 cmd_exe( ifbp, HCMD_SLEEP, 0 );
790 break;
791 // case HCF_ACT_WAKEUP: // DDS Wakeup request
792 // HCFASSERT( ifbp->IFB_IntOffCnt == 0xFFFE, ifbp->IFB_IntOffCnt )
793 // ifbp->IFB_IntOffCnt++; // restore conventional I/F
794 // OPW( HREG_IO, HREG_IO_WAKEUP_ASYNC );
795 // MSF_WAIT(800); // MSF-defined function to wait n microseconds.
796 // rc = hcf_action( ifbp, HCF_ACT_INT_OFF ); /*bogus, IFB_IntOffCnt == 0xFFFF, so if you carefully look
797 // *at the #if HCF_DDS statements, HCF_ACT_INT_OFF is empty
798 // *for DDS. "Much" better would be to merge the flows for
799 // *DDS and DEEP_SLEEP
800 // */
801 // break;
802 #endif // HCF_DDS
803
804 #if (HCF_TYPE) & HCF_TYPE_CCX
805 case HCF_ACT_CCX_ON: // enable CKIP
806 case HCF_ACT_CCX_OFF: // disable CKIP
807 ifbp->IFB_CKIPStat = action;
808 break;
809 #endif // HCF_TYPE_CCX
810
811 case HCF_ACT_RX_ACK: //Receiver ACK
812 /*6*/ if ( ifbp->IFB_RxFID ) {
813 DAWA_ACK( HREG_EV_RX );
814 }
815 ifbp->IFB_RxFID = ifbp->IFB_RxLen = 0;
816 break;
817
818 /*8*/ case HCF_ACT_PRS_SCAN: // Hermes PRS Scan (F102)
819 OPW( HREG_PARAM_1, 0x3FFF );
820 //Fall through in HCF_ACT_TALLIES
821 case HCF_ACT_TALLIES: // Hermes Inquire Tallies (F100)
822 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
823 case HCF_ACT_SCAN: // Hermes Inquire Scan (F101)
824 #endif // HCF_TYPE_HII5
825 /*!! the assumptions about numerical relationships between CFG_TALLIES etc and HCF_ACT_TALLIES etc
826 * are checked by #if statements just prior to this routine resulting in: err "maintenance" */
827 cmd_exe( ifbp, HCMD_INQUIRE, action - HCF_ACT_TALLIES + CFG_TALLIES );
828 break;
829
830 default:
831 HCFASSERT( DO_ASSERT, action )
832 break;
833 }
834 //! do not HCFASSERT( rc == HCF_SUCCESS, rc ) /* 30*/
835 HCFLOGEXIT( HCF_TRACE_ACTION )
836 return rc;
837 } // hcf_action
838 #endif // HCF_DL_ONLY
839
840
841 /************************************************************************************************************
842 *
843 *.MODULE int hcf_cntl( IFBP ifbp, hcf_16 cmd )
844 *.PURPOSE Connect or disconnect a specific port to a specific network.
845 *!! ;???????????????? continue needs more explanation
846 * recovers by means of "continue" when the connect process in CCX mode fails
847 * Enables or disables data transmission and reception for the NIC.
848 * Activates static NIC configuration for a specific port at connect.
849 * Activates static configuration for all ports at enable.
850 *
851 *.ARGUMENTS
852 * ifbp address of the Interface Block
853 * cmd 0x001F: Hermes command (disable, enable, connect, disconnect, continue)
854 * HCF_CNTL_ENABLE Enable
855 * HCF_CNTL_DISABLE Disable
856 * HCF_CNTL_CONTINUE Continue
857 * HCF_CNTL_CONNECT Connect
858 * HCF_CNTL_DISCONNECT Disconnect
859 * 0x0100: command qualifier (continue)
860 * HCMD_RETRY retry flag
861 * 0x0700: port number (connect/disconnect)
862 * HCF_PORT_0 MAC Port 0
863 * HCF_PORT_1 MAC Port 1
864 * HCF_PORT_2 MAC Port 2
865 * HCF_PORT_3 MAC Port 3
866 * HCF_PORT_4 MAC Port 4
867 * HCF_PORT_5 MAC Port 5
868 * HCF_PORT_6 MAC Port 6
869 *
870 *.RETURNS
871 * HCF_SUCCESS
872 *!! via cmd_exe
873 * HCF_ERR_NO_NIC
874 * HCF_ERR_DEFUNCT_...
875 * HCF_ERR_TIME_OUT
876 *
877 *.DESCRIPTION
878 * The parameter cmd contains a number of subfields.
879 * The actual value for cmd is created by logical or-ing the appropriate mnemonics for the subfields.
880 * The field 0x001F contains the command code
881 * - HCF_CNTL_ENABLE
882 * - HCF_CNTL_DISABLE
883 * - HCF_CNTL_CONNECT
884 * - HCF_CNTL_DISCONNECT
885 * - HCF_CNTL_CONTINUE
886 *
887 * For HCF_CNTL_CONTINUE, the field 0x0100 contains the retry flag HCMD_RETRY.
888 * For HCF_CNTL_CONNECT and HCF_CNTL_DISCONNECT, the field 0x0700 contains the port number as HCF_PORT_#.
889 * For Station as well as AccessPoint F/W, MAC Port 0 is the "normal" communication channel.
890 * For AccessPoint F/W, MAC Port 1 through 6 control the WDS links.
891 *
892 * Note that despite the names HCF_CNTL_DISABLE and HCF_CNTL_ENABLE, hcf_cntl does not influence the NIC
893 * Interrupts mode.
894 *
895 * The Connect is used by the MSF to bring a particular port in an inactive state as far as data transmission
896 * and reception are concerned.
897 * When a particular port is disconnected:
898 * - the F/W disables the receiver for that port.
899 * - the F/W ignores send commands for that port.
900 * - all frames (Receive as well as pending Transmit) for that port on the NIC are discarded.
901 *
902 * When the NIC is disabled, above list applies to all ports, i.e. the result is like all ports are
903 * disconnected.
904 *
905 * When a particular port is connected:
906 * - the F/W effectuates the static configuration for that port.
907 * - enables the receiver for that port.
908 * - accepts send commands for that port.
909 *
910 * Enabling has the following effects:
911 * - the F/W effectuates the static configuration for all ports.
912 * The F/W only updates its static configuration at a transition from disabled to enabled or from
913 * disconnected to connected.
914 * In order to enforce the static configuration, the MSF must assure that such a transition takes place.
915 * Due to such a disable/enable or disconnect/connect sequence, Rx/Tx frames may be lost, in other words,
916 * configuration may impact communication.
917 * - The DMA Engine (if applicable) is enabled.
918 * Note that the Enable Function by itself only enables data transmission and reception, it
919 * does not enable the Interrupt Generation mechanism. This is done by hcf_action.
920 *
921 * Disabling has the following effects:
922 *!! ;?????is the following statement really true
923 * - it acts as a disconnect on all ports.
924 * - The DMA Engine (if applicable) is disabled.
925 *
926 * For impact of the disable command on the behavior of hcf_dma_tx/rx_get see the appropriate sections.
927 *
928 * Although the Enable/Disable and Connect/Disconnect are antonyms, there is no restriction on their sequencing,
929 * in other words, they may be called multiple times in arbitrary sequence without being paired or balanced.
930 * Each time one of these functions is called, the effects of the preceding calls cease.
931 *
932 * Assert fails if
933 * - ifbp has a recognizable out-of-range value.
934 * - NIC interrupts are not disabled.
935 * - A command other than Continue, Enable, Disable, Connect or Disconnect is given.
936 * - An invalid combination of the subfields is given or a bit outside the subfields is given.
937 * - any return code besides HCF_SUCCESS.
938 * - reentrancy, may be caused by calling a hcf_function without adequate protection against NIC interrupts or
939 * multi-threading
940 *
941 *.DIAGRAM
942 * hcf_cntl takes successively the following actions:
943 *2: If the HCF is in Defunct mode or incompatible with the Primary or Station Supplier in the Hermes,
944 * hcf_cntl() returns immediately with HCF_ERR_NO_NIC;? as status.
945 *8: when the port is disabled, the DMA engine needs to be de-activated, so the host can safely reclaim tx
946 * packets from the tx descriptor chain.
947 *
948 *.ENDDOC END DOCUMENTATION
949 *
950 ************************************************************************************************************/
951 int
952 hcf_cntl( IFBP ifbp, hcf_16 cmd )
953 {
954 int rc = HCF_ERR_INCOMP_FW;
955 #if HCF_ASSERT
956 { int x = cmd & HCMD_CMD_CODE;
957 if ( x == HCF_CNTL_CONTINUE ) x &= ~HCMD_RETRY;
958 else if ( (x == HCMD_DISABLE || x == HCMD_ENABLE) && ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ) {
959 x &= ~HFS_TX_CNTL_PORT;
960 }
961 HCFASSERT( x==HCF_CNTL_ENABLE || x==HCF_CNTL_DISABLE || HCF_CNTL_CONTINUE ||
962 x==HCF_CNTL_CONNECT || x==HCF_CNTL_DISCONNECT, cmd )
963 }
964 #endif // HCF_ASSERT
965 // #if (HCF_SLEEP) & HCF_DDS
966 // HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE, cmd )
967 // #endif // HCF_DDS
968 HCFLOGENTRY( HCF_TRACE_CNTL, cmd )
969 if ( ifbp->IFB_CardStat == 0 ) { /*2*/
970 /*6*/ rc = cmd_exe( ifbp, cmd, 0 );
971 #if (HCF_SLEEP) & HCF_DDS
972 ifbp->IFB_TickCnt = 0; //start 2 second period (with 1 tick uncertanty)
973 #endif // HCF_DDS
974 }
975 #if HCF_DMA
976 //!rlav : note that this piece of code is always executed, regardless of the DEFUNCT bit in IFB_CardStat.
977 // The reason behind this is that the MSF should be able to get all its DMA resources back from the HCF,
978 // even if the hardware is disfunctional. Practical example under Windows : surprise removal.
979 if ( ifbp->IFB_CntlOpt & USE_DMA ) {
980 hcf_io io_port = ifbp->IFB_IOBase;
981 DESC_STRCT *p;
982 if ( cmd == HCF_CNTL_DISABLE || cmd == HCF_CNTL_ENABLE ) {
983 OUT_PORT_DWORD( (io_port + HREG_DMA_CTRL), DMA_CTRLSTAT_RESET); /*8*/
984 ifbp->IFB_CntlOpt &= ~DMA_ENABLED;
985 }
986 if ( cmd == HCF_CNTL_ENABLE ) {
987 OUT_PORT_DWORD( (io_port + HREG_DMA_CTRL), DMA_CTRLSTAT_GO);
988 /* ;? by rewriting hcf_dma_rx_put you can probably just call hcf_dma_rx_put( ifbp->IFB_FirstDesc[DMA_RX] )
989 * as additional beneficiary side effect, the SOP and EOP bits will also be cleared
990 */
991 ifbp->IFB_CntlOpt |= DMA_ENABLED;
992 HCFASSERT( NT_ASSERT, NEVER_TESTED )
993 // make the entire rx descriptor chain DMA-owned, so the DMA engine can (re-)use it.
994 p = ifbp->IFB_FirstDesc[DMA_RX];
995 if (p != NULL) { //;? Think this over again in the light of the new chaining strategy
996 if ( 1 ) { //begin alternative
997 HCFASSERT( NT_ASSERT, NEVER_TESTED )
998 put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX], DMA_RX );
999 if ( ifbp->IFB_FirstDesc[DMA_RX] ) {
1000 put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX]->next_desc_addr, DMA_RX );
1001 }
1002 } else {
1003 while ( p ) {
1004 //p->buf_cntl.cntl_stat |= DESC_DMA_OWNED;
1005 p->BUF_CNT |= DESC_DMA_OWNED;
1006 p = p->next_desc_addr;
1007 }
1008 // a rx chain is available so hand it over to the DMA engine
1009 p = ifbp->IFB_FirstDesc[DMA_RX];
1010 OUT_PORT_DWORD( (io_port + HREG_RXDMA_PTR32), p->desc_phys_addr);
1011 } //end alternative
1012 }
1013 }
1014 }
1015 #endif // HCF_DMA
1016 HCFASSERT( rc == HCF_SUCCESS, rc )
1017 HCFLOGEXIT( HCF_TRACE_CNTL )
1018 return rc;
1019 } // hcf_cntl
1020
1021
1022 /************************************************************************************************************
1023 *
1024 *.MODULE int hcf_connect( IFBP ifbp, hcf_io io_base )
1025 *.PURPOSE Grants access right for the HCF to the IFB.
1026 * Initializes Card and HCF housekeeping.
1027 *
1028 *.ARGUMENTS
1029 * ifbp (near) address of the Interface Block
1030 * io_base non-USB: I/O Base address of the NIC (connect)
1031 * non-USB: HCF_DISCONNECT
1032 * USB: HCF_CONNECT, HCF_DISCONNECT
1033 *
1034 *.RETURNS
1035 * HCF_SUCCESS
1036 * HCF_ERR_INCOMP_PRI
1037 * HCF_ERR_INCOMP_FW
1038 * HCF_ERR_DEFUNCT_CMD_SEQ
1039 *!! HCF_ERR_NO_NIC really returned ;?
1040 * HCF_ERR_NO_NIC
1041 * HCF_ERR_TIME_OUT
1042 *
1043 * MSF-accessible fields of Result Block:
1044 * IFB_IOBase entry parameter io_base
1045 * IFB_IORange HREG_IO_RANGE (0x40/0x80)
1046 * IFB_Version version of the IFB layout
1047 * IFB_FWIdentity CFG_FW_IDENTITY_STRCT, specifies the identity of the
1048 * "running" F/W, i.e. tertiary F/W under normal conditions
1049 * IFB_FWSup CFG_SUP_RANGE_STRCT, specifies the supplier range of
1050 * the "running" F/W, i.e. tertiary F/W under normal conditions
1051 * IFB_HSISup CFG_SUP_RANGE_STRCT, specifies the HW/SW I/F range of the NIC
1052 * IFB_PRIIdentity CFG_PRI_IDENTITY_STRCT, specifies the Identity of the Primary F/W
1053 * IFB_PRISup CFG_SUP_RANGE_STRCT, specifies the supplier range of the Primary F/W
1054 * all other all MSF accessible fields, which are not specified above, are zero-filled
1055 *
1056 *.CONDITIONS
1057 * It is the responsibility of the MSF to assure the correctness of the I/O Base address.
1058 *
1059 * Note: hcf_connect defaults to NIC interrupt disabled mode, i.e. as if hcf_action( HCF_ACT_INT_OFF )
1060 * was called.
1061 *
1062 *.DESCRIPTION
1063 * hcf_connect passes the MSF-defined location of the IFB to the HCF and grants or revokes access right for the
1064 * HCF to the IFB. Revoking is done by specifying HCF_DISCONNECT rather than an I/O address for the parameter
1065 * io_base. Every call of hcf_connect in "connect" mode, must eventually be followed by a call of hcf_connect
1066 * in "disconnect" mode. Clalling hcf_connect in "connect"/"disconnect" mode can not be nested.
1067 * The IFB address must be used as a handle with all subsequent HCF-function calls and the HCF uses the IFB
1068 * address as a handle when it performs a call(back) of an MSF-function (i.e. msf_assert).
1069 *
1070 * Note that not only the MSF accessible fields are cleared, but also all internal housekeeping
1071 * information is re-initialized.
1072 * This implies that all settings which are done via hcf_action and hcf_put_info (e.g. CFG_MB_ASSERT, CFG_REG_MB,
1073 * CFG_REG_INFO_LOG) must be done again. The only field which is not cleared, is IFB_MSFSup.
1074 *
1075 * If HCF_INT_ON is selected as compile option, NIC interrupts are disabled.
1076 *
1077 * Assert fails if
1078 * - ifbp is not properly aligned ( ref chapter HCF_ALIGN in 4.1.1)
1079 * - I/O Base Address is not a multiple of 0x40 (note: 0x0000 is explicitly allowed).
1080 *
1081 *.DIAGRAM
1082 *
1083 *0: Throughout hcf_connect you need to distinguish the connect from the disconnect case, which requires
1084 * some attention about what to use as "I/O" address when for which purpose.
1085 *2:
1086 *2a: Reset H-II by toggling reset bit in IO-register on and off.
1087 * The HCF_TYPE_PRELOADED caters for the DOS environment where H-II is loaded by a separate program to
1088 * overcome the 64k size limit posed on DOS drivers.
1089 * The macro OPW is not yet useable because the IFB_IOBase field is not set.
1090 * Note 1: hopefully the clearing and initializing of the IFB (see below) acts as a delay which meets the
1091 * specification for S/W reset
1092 * Note 2: it turns out that on some H/W constellations, the clock to access the EEProm is not lowered
1093 * to an appropriate frequency by HREG_IO_SRESET. By giving an HCMD_INI first, this problem is worked around.
1094 *2b: Experimentally it is determined over a wide range of F/W versions that waiting for the for Cmd bit in
1095 * Ev register gives a workable strategy. The available documentation does not give much clues.
1096 *4: clear and initialize the IFB
1097 * The HCF house keeping info is designed such that zero is the appropriate initial value for as much as
1098 * feasible IFB-items.
1099 * The readable fields mentioned in the description section and some HCF specific fields are given their
1100 * actual value.
1101 * IFB_TickIni is initialized at best guess before calibration
1102 * Hcf_connect defaults to "no interrupt generation" (implicitly achieved by the zero-filling).
1103 *6: Register compile-time linked MSF Routine and set default filter level
1104 * cast needed to get around the "near" problem in DOS COM model
1105 * er C2446: no conversion from void (__near __cdecl *)(unsigned char __far *,unsigned int,unsigned short,int)
1106 * to void (__far __cdecl *)(unsigned char __far *,unsigned int,unsigned short,int)
1107 *8: If a command is apparently still active (as indicated by the Busy bit in Cmd register) this may indicate a
1108 * blocked cmd pipe line. To unblock the following actions are done:
1109 * - Ack everything
1110 * - Wait for Busy bit drop in Cmd register
1111 * - Wait for Cmd bit raise in Ev register
1112 * The two waits are combined in a single HCF_WAIT_WHILE to optimize memory size. If either of these waits
1113 * fail (prot_cnt becomes 0), then something is serious wrong. Rather than PANICK, the assumption is that the
1114 * next cmd_exe will fail, causing the HCF to go into DEFUNCT mode
1115 *10: Ack everything to unblock a (possibly blocked) cmd pipe line
1116 * Note 1: it is very likely that an Alloc event is pending and very well possible that a (Send) Cmd event is
1117 * pending on non-initial calls
1118 * Note 2: it is assumed that this strategy takes away the need to ack every conceivable event after an
1119 * Hermes Initialize
1120 *12: Only H-II NEEDS the Hermes Initialize command. Due to the different semantics for H-I and H-II
1121 * Initialize command, init() does not (and can not, since it is called e.g. after a download) execute the
1122 * Hermes Initialize command. Executing the Hermes Initialize command for H-I would not harm but not do
1123 * anything useful either, so it is skipped.
1124 * The return status of cmd_exe is ignored. It is assumed that if cmd_exe fails, init fails too
1125 *14: use io_base as a flag to merge hcf_connect and hcf_disconnect into 1 routine
1126 * the call to init and its subsequent call of cmd_exe will return HCF_ERR_NO_NIC if appropriate. This status
1127 * is (badly) needed by some legacy combination of NT4 and card services which do not yield an I/O address in
1128 * time.
1129 *
1130 *.NOTICE
1131 * On platforms where the NULL-pointer is not a bit-pattern of all zeros, the zero-filling of the IFB results
1132 * in an incorrect initialization of pointers.
1133 * The implementation of the MailBox manipulation in put_mb_info protects against the absence of a MailBox
1134 * based on IFB_MBSize, IFB_MBWp and ifbp->IFB_MBRp. This has ramifications on the initialization of the
1135 * MailBox via hcf_put_info with the CFG_REG_MB type, but it prevents dependency on the "NULL-"ness of
1136 * IFB_MBp.
1137 *
1138 *.NOTICE
1139 * There are a number of problems when asserting and logging hcf_connect, e.g.
1140 * - Asserting on re-entrancy of hcf_connect by means of
1141 * "HCFASSERT( (ifbp->IFB_AssertTrace & HCF_ASSERT_CONNECT) == 0, 0 )" is not useful because IFB contents
1142 * are undefined
1143 * - Asserting before the IFB is cleared will cause mdd_assert() to interpret the garbage in IFB_AssertRtn
1144 * as a routine address
1145 * Therefore HCFTRACE nor HCFLOGENTRY is called by hcf_connect.
1146 *.ENDDOC END DOCUMENTATION
1147 *
1148 ************************************************************************************************************/
1149 int
1150 hcf_connect( IFBP ifbp, hcf_io io_base )
1151 {
1152 int rc = HCF_SUCCESS;
1153 hcf_io io_addr;
1154 hcf_32 prot_cnt;
1155 hcf_8 *q;
1156 LTV_STRCT x;
1157 #if HCF_ASSERT
1158 hcf_16 xa = ifbp->IFB_FWIdentity.typ;
1159 /* is assumed to cause an assert later on if hcf_connect is called without intervening hcf_disconnect.
1160 * xa == CFG_FW_IDENTITY in subsequent calls without preceding hcf_disconnect,
1161 * xa == 0 in subsequent calls with preceding hcf_disconnect,
1162 * xa == "garbage" (any value except CFG_FW_IDENTITY is acceptable) in the initial call
1163 */
1164 #endif // HCF_ASSERT
1165
1166 if ( io_base == HCF_DISCONNECT ) { //disconnect
1167 io_addr = ifbp->IFB_IOBase;
1168 OPW( HREG_INT_EN, 0 ); //;?workaround against dying F/W on subsequent hcf_connect calls
1169 } else { //connect /* 0 */
1170 io_addr = io_base;
1171 }
1172
1173 #if 0 //;? if a subsequent hcf_connect is preceded by an hcf_disconnect the wakeup is not needed !!
1174 #if HCF_SLEEP
1175 OUT_PORT_WORD( .....+HREG_IO, HREG_IO_WAKEUP_ASYNC ); //OPW not yet useable
1176 MSF_WAIT(800); // MSF-defined function to wait n microseconds.
1177 note that MSF_WAIT uses not yet defined!!!! IFB_IOBase and IFB_TickIni (via PROT_CNT_INI)
1178 so be careful if this code is restored
1179 #endif // HCF_SLEEP
1180 #endif // 0
1181
1182 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0 //switch clock back for SEEPROM access !!!
1183 OUT_PORT_WORD( io_addr + HREG_CMD, HCMD_INI ); //OPW not yet useable
1184 prot_cnt = INI_TICK_INI;
1185 HCF_WAIT_WHILE( (IN_PORT_WORD( io_addr + HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1186 OUT_PORT_WORD( (io_addr + HREG_IO), HREG_IO_SRESET ); //OPW not yet useable /* 2a*/
1187 #endif // HCF_TYPE_PRELOADED
1188 for ( q = (hcf_8*)(&ifbp->IFB_Magic); q > (hcf_8*)ifbp; *--q = 0 ) /*NOP*/; /* 4 */
1189 ifbp->IFB_Magic = HCF_MAGIC;
1190 ifbp->IFB_Version = IFB_VERSION;
1191 #if defined MSF_COMPONENT_ID //a new IFB demonstrates how dirty the solution is
1192 xxxx[xxxx_PRI_IDENTITY_OFFSET] = NULL; //IFB_PRIIdentity placeholder 0xFD02
1193 xxxx[xxxx_PRI_IDENTITY_OFFSET+1] = NULL; //IFB_PRISup placeholder 0xFD03
1194 #endif // MSF_COMPONENT_ID
1195 #if (HCF_TALLIES) & ( HCF_TALLIES_NIC | HCF_TALLIES_HCF )
1196 ifbp->IFB_TallyLen = 1 + 2 * (HCF_NIC_TAL_CNT + HCF_HCF_TAL_CNT); //convert # of Tallies to L value for LTV
1197 ifbp->IFB_TallyTyp = CFG_TALLIES; //IFB_TallyTyp: set T value
1198 #endif // HCF_TALLIES_NIC / HCF_TALLIES_HCF
1199 ifbp->IFB_IOBase = io_addr; //set IO_Base asap, so asserts via HREG_SW_2 don't harm
1200 ifbp->IFB_IORange = HREG_IO_RANGE;
1201 ifbp->IFB_CntlOpt = USE_16BIT;
1202 #if HCF_ASSERT
1203 assert_ifbp = ifbp;
1204 ifbp->IFB_AssertLvl = 1;
1205 #if (HCF_ASSERT) & HCF_ASSERT_LNK_MSF_RTN
1206 if ( io_base != HCF_DISCONNECT ) {
1207 ifbp->IFB_AssertRtn = (MSF_ASSERT_RTNP)msf_assert; /* 6 */
1208 }
1209 #endif // HCF_ASSERT_LNK_MSF_RTN
1210 #if (HCF_ASSERT) & HCF_ASSERT_MB //build the structure to pass the assert info to hcf_put_info
1211 ifbp->IFB_AssertStrct.len = sizeof(ifbp->IFB_AssertStrct)/sizeof(hcf_16) - 1;
1212 ifbp->IFB_AssertStrct.typ = CFG_MB_INFO;
1213 ifbp->IFB_AssertStrct.base_typ = CFG_MB_ASSERT;
1214 ifbp->IFB_AssertStrct.frag_cnt = 1;
1215 ifbp->IFB_AssertStrct.frag_buf[0].frag_len =
1216 ( offsetof(IFB_STRCT, IFB_AssertLvl) - offsetof(IFB_STRCT, IFB_AssertLine) ) / sizeof(hcf_16);
1217 ifbp->IFB_AssertStrct.frag_buf[0].frag_addr = &ifbp->IFB_AssertLine;
1218 #endif // HCF_ASSERT_MB
1219 #endif // HCF_ASSERT
1220 IF_PROT_TIME( prot_cnt = ifbp->IFB_TickIni = INI_TICK_INI; )
1221 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0
1222 //!! No asserts before Reset-bit in HREG_IO is cleared
1223 OPW( HREG_IO, 0x0000 ); //OPW useable /* 2b*/
1224 HCF_WAIT_WHILE( (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1225 IF_PROT_TIME( HCFASSERT( prot_cnt, IPW( HREG_EV_STAT) ) )
1226 IF_PROT_TIME( if ( prot_cnt ) prot_cnt = ifbp->IFB_TickIni; )
1227 #endif // HCF_TYPE_PRELOADED
1228 //!! No asserts before Reset-bit in HREG_IO is cleared
1229 HCFASSERT( DO_ASSERT, MERGE_2( HCF_ASSERT, 0xCAF0 ) ) //just to proof that the complete assert machinery is working
1230 HCFASSERT( xa != CFG_FW_IDENTITY, 0 ) // assert if hcf_connect is called without intervening hcf_disconnect.
1231 HCFASSERT( ((hcf_32)(void*)ifbp & (HCF_ALIGN-1) ) == 0, (hcf_32)(void*)ifbp )
1232 HCFASSERT( (io_addr & 0x003F) == 0, io_addr )
1233 //if Busy bit in Cmd register
1234 if (IPW( HREG_CMD ) & HCMD_BUSY ) { /* 8 */
1235 //. Ack all to unblock a (possibly) blocked cmd pipe line
1236 OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
1237 //. Wait for Busy bit drop in Cmd register
1238 //. Wait for Cmd bit raise in Ev register
1239 HCF_WAIT_WHILE( ( IPW( HREG_CMD ) & HCMD_BUSY ) && (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1240 IF_PROT_TIME( HCFASSERT( prot_cnt, IPW( HREG_EV_STAT) ) ) /* if prot_cnt == 0, cmd_exe will fail, causing DEFUNCT */
1241 }
1242 OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
1243 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0 /*12*/
1244 (void)cmd_exe( ifbp, HCMD_INI, 0 );
1245 #endif // HCF_TYPE_PRELOADED
1246 if ( io_base != HCF_DISCONNECT ) {
1247 rc = init( ifbp ); /*14*/
1248 if ( rc == HCF_SUCCESS ) {
1249 x.len = 2;
1250 x.typ = CFG_NIC_BUS_TYPE;
1251 (void)hcf_get_info( ifbp, &x );
1252 ifbp->IFB_BusType = x.val[0];
1253 //CFG_NIC_BUS_TYPE not supported -> default 32 bits/DMA, MSF has to overrule via CFG_CNTL_OPT
1254 if ( x.len == 0 || x.val[0] == 0x0002 || x.val[0] == 0x0003 ) {
1255 #if (HCF_IO) & HCF_IO_32BITS
1256 ifbp->IFB_CntlOpt &= ~USE_16BIT; //reset USE_16BIT
1257 #endif // HCF_IO_32BITS
1258 #if HCF_DMA
1259 ifbp->IFB_CntlOpt |= USE_DMA; //SET DMA
1260 #else
1261 ifbp->IFB_IORange = 0x40 /*i.s.o. HREG_IO_RANGE*/;
1262 #endif // HCF_DMA
1263 }
1264 }
1265 } else HCFASSERT( ( ifbp->IFB_Magic ^= HCF_MAGIC ) == 0, ifbp->IFB_Magic ) /*NOP*/;
1266 /* of above HCFASSERT only the side effect is needed, NOP in case HCFASSERT is dummy */
1267 ifbp->IFB_IOBase = io_base; /* 0*/
1268 return rc;
1269 } // hcf_connect
1270
1271 #if HCF_DMA
1272 /************************************************************************************************************
1273 * Function get_frame_lst
1274 * - resolve the "last host-owned descriptor" problems when a descriptor list is reclaimed by the MSF.
1275 *
1276 * The FrameList to be reclaimed as well as the DescriptorList always start in IFB_FirstDesc[tx_rx_flag]
1277 * and this is always the "current" DELWA Descriptor.
1278 *
1279 * If a FrameList is available, the last descriptor of the FrameList to turned into a new DELWA Descriptor:
1280 * - a copy is made from the information in the last descriptor of the FrameList into the current
1281 * DELWA Descriptor
1282 * - the remainder of the DescriptorList is detached from the copy by setting the next_desc_addr at NULL
1283 * - the DMA control bits of the copy are cleared to do not confuse the MSF
1284 * - the copy of the last descriptor (i.e. the "old" DELWA Descriptor) is chained to the prev Descriptor
1285 * of the FrameList, thus replacing the original last Descriptor of the FrameList.
1286 * - IFB_FirstDesc is changed to the address of that replaced (original) last descriptor of the FrameList,
1287 * i.e. the "new" DELWA Descriptor.
1288 *
1289 * This function makes a copy of that last host-owned descriptor, so the MSF will get a copy of the descriptor.
1290 * On top of that, it adjusts DMA related fields in the IFB structure.
1291 // perform a copying-scheme to circumvent the 'last host owned descriptor cannot be reclaimed' limitation imposed by H2.5's DMA hardware design
1292 // a 'reclaim descriptor' should be available in the HCF:
1293 *
1294 * Returns: address of the first descriptor of the FrameList
1295 *
1296 8: Be careful once you start re-ordering the steps in the copy process, that it still works for cases
1297 * of FrameLists of 1, 2 and more than 2 descriptors
1298 *
1299 * Input parameters:
1300 * tx_rx_flag : specifies 'transmit' or 'receive' descriptor.
1301 *
1302 ************************************************************************************************************/
1303 HCF_STATIC DESC_STRCT*
1304 get_frame_lst( IFBP ifbp, int tx_rx_flag )
1305 {
1306
1307 DESC_STRCT *head = ifbp->IFB_FirstDesc[tx_rx_flag];
1308 DESC_STRCT *copy, *p, *prev;
1309
1310 HCFASSERT( tx_rx_flag == DMA_RX || tx_rx_flag == DMA_TX, tx_rx_flag )
1311 //if FrameList
1312 if ( head ) {
1313 //. search for last descriptor of first FrameList
1314 p = prev = head;
1315 while ( ( p->BUF_SIZE & DESC_EOP ) == 0 && p->next_desc_addr ) {
1316 if ( ( ifbp->IFB_CntlOpt & DMA_ENABLED ) == 0 ) { //clear control bits when disabled
1317 p->BUF_CNT &= DESC_CNT_MASK;
1318 }
1319 prev = p;
1320 p = p->next_desc_addr;
1321 }
1322 //. if DMA enabled
1323 if ( ifbp->IFB_CntlOpt & DMA_ENABLED ) {
1324 //. . if last descriptor of FrameList is DMA owned
1325 //. . or if FrameList is single (DELWA) Descriptor
1326 if ( p->BUF_CNT & DESC_DMA_OWNED || head->next_desc_addr == NULL ) {
1327 //. . . refuse to return FrameList to caller
1328 head = NULL;
1329 }
1330 }
1331 }
1332 //if returnable FrameList found
1333 if ( head ) {
1334 //. if FrameList is single (DELWA) Descriptor (implies DMA disabled)
1335 if ( head->next_desc_addr == NULL ) {
1336 //. . clear DescriptorList
1337 /*;?ifbp->IFB_LastDesc[tx_rx_flag] =*/ ifbp->IFB_FirstDesc[tx_rx_flag] = NULL;
1338 //. else
1339 } else {
1340 //. . strip hardware-related bits from last descriptor
1341 //. . remove DELWA Descriptor from head of DescriptorList
1342 copy = head;
1343 head = head->next_desc_addr;
1344 //. . exchange first (Confined) and last (possibly imprisoned) Descriptor
1345 copy->buf_phys_addr = p->buf_phys_addr;
1346 copy->buf_addr = p->buf_addr;
1347 copy->BUF_SIZE = p->BUF_SIZE &= DESC_CNT_MASK; //get rid of DESC_EOP and possibly DESC_SOP
1348 copy->BUF_CNT = p->BUF_CNT &= DESC_CNT_MASK; //get rid of DESC_DMA_OWNED
1349 #if (HCF_EXT) & HCF_DESC_STRCT_EXT
1350 copy->DESC_MSFSup = p->DESC_MSFSup;
1351 #endif // HCF_DESC_STRCT_EXT
1352 //. . turn into a DELWA Descriptor
1353 p->buf_addr = NULL;
1354 //. . chain copy to prev /* 8*/
1355 prev->next_desc_addr = copy;
1356 //. . detach remainder of the DescriptorList from FrameList
1357 copy->next_desc_addr = NULL;
1358 copy->next_desc_phys_addr = 0xDEAD0000; //! just to be nice, not really needed
1359 //. . save the new start (i.e. DELWA Descriptor) in IFB_FirstDesc
1360 ifbp->IFB_FirstDesc[tx_rx_flag] = p;
1361 }
1362 //. strip DESC_SOP from first descriptor
1363 head->BUF_SIZE &= DESC_CNT_MASK;
1364 //head->BUF_CNT &= DESC_CNT_MASK; get rid of DESC_DMA_OWNED
1365 head->next_desc_phys_addr = 0xDEAD0000; //! just to be nice, not really needed
1366 }
1367 //return the just detached FrameList (if any)
1368 return head;
1369 } // get_frame_lst
1370
1371
1372 /************************************************************************************************************
1373 * Function put_frame_lst
1374 *
1375 * This function
1376 *
1377 * Returns: address of the first descriptor of the FrameList
1378 *
1379 * Input parameters:
1380 * tx_rx_flag : specifies 'transmit' or 'receive' descriptor.
1381 *
1382 * The following list should be kept in sync with hcf_dma_tx/rx_put, in order to get them in the WCI-spec !!!!
1383 * Assert fails if
1384 * - DMA is not enabled
1385 * - descriptor list is NULL
1386 * - a descriptor in the descriptor list is not double word aligned
1387 * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1388 * - the DELWA descriptor is not a "singleton" DescriptorList.
1389 * - the DELWA descriptor is not the first Descriptor supplied
1390 * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1391 * - Possibly more checks could be added !!!!!!!!!!!!!
1392
1393 *.NOTICE
1394 * The asserts marked with *sc* are really sanity checks for the HCF, they can (supposedly) not be influenced
1395 * by incorrect MSF behavior
1396
1397 // The MSF is required to supply the HCF with a single descriptor for MSF tx reclaim purposes.
1398 // This 'reclaim descriptor' can be recognized by the fact that its buf_addr field is zero.
1399 *********************************************************************************************
1400 * Although not required from a hardware perspective:
1401 * - make each descriptor in this rx-chain DMA-owned.
1402 * - Also set the count to zero. EOP and SOP bits are also cleared.
1403 *********************************************************************************************/
1404 HCF_STATIC void
1405 put_frame_lst( IFBP ifbp, DESC_STRCT *descp, int tx_rx_flag )
1406 {
1407 DESC_STRCT *p = descp;
1408 hcf_16 port;
1409
1410 HCFASSERT( ifbp->IFB_CntlOpt & USE_DMA, ifbp->IFB_CntlOpt) //only hcf_dma_tx_put must also be DMA_ENABLED
1411 HCFASSERT( tx_rx_flag == DMA_RX || tx_rx_flag == DMA_TX, tx_rx_flag )
1412 HCFASSERT( p , 0 )
1413
1414 while ( p ) {
1415 HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p )
1416 HCFASSERT( (p->BUF_CNT & ~DESC_CNT_MASK) == 0, p->BUF_CNT )
1417 HCFASSERT( (p->BUF_SIZE & ~DESC_CNT_MASK) == 0, p->BUF_SIZE )
1418 p->BUF_SIZE &= DESC_CNT_MASK; //!!this SHOULD be superfluous in case of correct MSF
1419 p->BUF_CNT &= tx_rx_flag == DMA_RX ? 0 : DESC_CNT_MASK; //!!this SHOULD be superfluous in case of correct MSF
1420 p->BUF_CNT |= DESC_DMA_OWNED;
1421 if ( p->next_desc_addr ) {
1422 // HCFASSERT( p->buf_addr && p->buf_phys_addr && p->BUF_SIZE && +/- p->BUF_SIZE, ... )
1423 HCFASSERT( p->next_desc_addr->desc_phys_addr, (hcf_32)p->next_desc_addr )
1424 p->next_desc_phys_addr = p->next_desc_addr->desc_phys_addr;
1425 } else { //
1426 p->next_desc_phys_addr = 0;
1427 if ( p->buf_addr == NULL ) { // DELWA Descriptor
1428 HCFASSERT( descp == p, (hcf_32)descp ) //singleton DescriptorList
1429 HCFASSERT( ifbp->IFB_FirstDesc[tx_rx_flag] == NULL, (hcf_32)ifbp->IFB_FirstDesc[tx_rx_flag])
1430 HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag] == NULL, (hcf_32)ifbp->IFB_LastDesc[tx_rx_flag])
1431 descp->BUF_CNT = 0; //&= ~DESC_DMA_OWNED;
1432 ifbp->IFB_FirstDesc[tx_rx_flag] = descp;
1433 // part of alternative ifbp->IFB_LastDesc[tx_rx_flag] = ifbp->IFB_FirstDesc[tx_rx_flag] = descp;
1434 // if "recycling" a FrameList
1435 // (e.g. called from hcf_cntl( HCF_CNTL_ENABLE )
1436 // . prepare for activation DMA controller
1437 // part of alternative descp = descp->next_desc_addr;
1438 } else { //a "real" FrameList, hand it over to the DMA engine
1439 HCFASSERT( ifbp->IFB_FirstDesc[tx_rx_flag], (hcf_32)descp )
1440 HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag], (hcf_32)descp )
1441 HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr == NULL,
1442 (hcf_32)ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr)
1443 // p->buf_cntl.cntl_stat |= DESC_DMA_OWNED;
1444 ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr = descp;
1445 ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_phys_addr = descp->desc_phys_addr;
1446 port = HREG_RXDMA_PTR32;
1447 if ( tx_rx_flag ) {
1448 p->BUF_SIZE |= DESC_EOP; // p points at the last descriptor in the caller-supplied descriptor chain
1449 descp->BUF_SIZE |= DESC_SOP;
1450 port = HREG_TXDMA_PTR32;
1451 }
1452 OUT_PORT_DWORD( (ifbp->IFB_IOBase + port), descp->desc_phys_addr );
1453 }
1454 ifbp->IFB_LastDesc[tx_rx_flag] = p;
1455 }
1456 p = p->next_desc_addr;
1457 }
1458 } // put_frame_lst
1459
1460
1461 /************************************************************************************************************
1462 *
1463 *.MODULE DESC_STRCT* hcf_dma_rx_get( IFBP ifbp )
1464 *.PURPOSE decapsulate a message and provides that message to the MSF.
1465 * reclaim all descriptors in the rx descriptor chain.
1466 *
1467 *.ARGUMENTS
1468 * ifbp address of the Interface Block
1469 *
1470 *.RETURNS
1471 * pointer to a FrameList
1472 *
1473 *.DESCRIPTION
1474 * hcf_dma_rx_get is intended to return a received frame when such a frame is deposited in Host memory by the
1475 * DMA engine. In addition hcf_dma_rx_get can be used to reclaim all descriptors in the rx descriptor chain
1476 * when the DMA Engine is disabled, e.g. as part of a driver unloading strategy.
1477 * hcf_dma_rx_get must be called repeatedly by the MSF when hcf_service_nic signals availability of a rx frame
1478 * through the HREG_EV_RDMAD flag of IFB_DmaPackets. The calling must stop when a NULL pointer is returned, at
1479 * which time the HREG_EV_RDMAD flag is also cleared by the HCF to arm the mechanism for the next frame
1480 * reception.
1481 * Regardless whether the DMA Engine is currently enabled (as controlled via hcf_cntl), if the DMA controller
1482 * deposited an Rx-frame in the Rx-DescriptorList, this frame is detached from the Rx-DescriptorList,
1483 * transformed into a FrameList (i.e. updating the housekeeping fields in the descriptors) and returned to the
1484 * caller.
1485 * If no such Rx-frame is available in the Rx-DescriptorList, the behavior of hcf_dma_rx_get depends on the
1486 * status of the DMA Engine.
1487 * If the DMA Engine is enabled, a NULL pointer is returned.
1488 * If the DMA Engine is disabled, the following strategy is used:
1489 * - the complete Rx-DescriptorList is returned. The DELWA Descriptor is not part of the Rx-DescriptorList.
1490 * - If there is no Rx-DescriptorList, the DELWA Descriptor is returned.
1491 * - If there is no DELWA Descriptor, a NULL pointer is returned.
1492 *
1493 * If the MSF performs an disable/enable sequence without exhausting the Rx-DescriptorList as described above,
1494 * the enable command will reset all house keeping information, i.e. already received but not yet by the MSF
1495 * retrieved frames are lost and the next frame will be received starting with the oldest descriptor.
1496 *
1497 * The HCF can be used in 2 fashions: with and without decapsulation for data transfer.
1498 * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1499 * If appropriate, decapsulation is done by moving some data inside the buffers and updating the descriptors
1500 * accordingly.
1501 *!! ;?????where did I describe why a simple manipulation with the count values does not suffice?
1502 *
1503 *.DIAGRAM
1504 *
1505 *.ENDDOC END DOCUMENTATION
1506 *
1507 ************************************************************************************************************/
1508
1509 DESC_STRCT*
1510 hcf_dma_rx_get (IFBP ifbp)
1511 {
1512 DESC_STRCT *descp; // pointer to start of FrameList
1513
1514 descp = get_frame_lst( ifbp, DMA_RX );
1515 if ( descp && descp->buf_addr ) //!be aware of the missing curly bracket
1516
1517 //skip decapsulation at confined descriptor
1518 #if (HCF_ENCAP) == HCF_ENC
1519 #if (HCF_TYPE) & HCF_TYPE_CCX
1520 if ( ifbp->IFB_CKIPStat == HCF_ACT_CCX_OFF )
1521 #endif // HCF_TYPE_CCX
1522 {
1523 int i;
1524 DESC_STRCT *p = descp->next_desc_addr; //pointer to 2nd descriptor of frame
1525 HCFASSERT(p, 0)
1526 // The 2nd descriptor contains (maybe) a SNAP header plus part or whole of the payload.
1527 //determine decapsulation sub-flag in RxFS
1528 i = *(wci_recordp)&descp->buf_addr[HFS_STAT] & ( HFS_STAT_MSG_TYPE | HFS_STAT_ERR );
1529 if ( i == HFS_STAT_TUNNEL ||
1530 ( i == HFS_STAT_1042 && hcf_encap( (wci_bufp)&p->buf_addr[HCF_DASA_SIZE] ) != ENC_TUNNEL )) {
1531 // The 2nd descriptor contains a SNAP header plus part or whole of the payload.
1532 HCFASSERT( p->BUF_CNT == (p->buf_addr[5] + (p->buf_addr[4]<<8) + 2*6 + 2 - 8), p->BUF_CNT )
1533 // perform decapsulation
1534 HCFASSERT(p->BUF_SIZE >=8, p->BUF_SIZE)
1535 // move SA[2:5] in the second buffer to replace part of the SNAP header
1536 for ( i=3; i >= 0; i--) p->buf_addr[i+8] = p->buf_addr[i];
1537 // copy DA[0:5], SA[0:1] from first buffer to second buffer
1538 for ( i=0; i<8; i++) p->buf_addr[i] = descp->buf_addr[HFS_ADDR_DEST + i];
1539 // make first buffer shorter in count
1540 descp->BUF_CNT = HFS_ADDR_DEST;
1541 }
1542 }
1543 #endif // HCF_ENC
1544 if ( descp == NULL ) ifbp->IFB_DmaPackets &= (hcf_16)~HREG_EV_RDMAD; //;?could be integrated into get_frame_lst
1545 HCFLOGEXIT( HCF_TRACE_DMA_RX_GET )
1546 return descp;
1547 } // hcf_dma_rx_get
1548
1549
1550 /************************************************************************************************************
1551 *
1552 *.MODULE void hcf_dma_rx_put( IFBP ifbp, DESC_STRCT *descp )
1553 *.PURPOSE supply buffers for receive purposes.
1554 * supply the Rx-DELWA descriptor.
1555 *
1556 *.ARGUMENTS
1557 * ifbp address of the Interface Block
1558 * descp address of a DescriptorList
1559 *
1560 *.RETURNS N.A.
1561 *
1562 *.DESCRIPTION
1563 * This function is called by the MSF to supply the HCF with new/more buffers for receive purposes.
1564 * The HCF can be used in 2 fashions: with and without encapsulation for data transfer.
1565 * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1566 * As a consequence, some additional constraints apply to the number of descriptor and the buffers associated
1567 * with the first 2 descriptors. Independent of the encapsulation feature, the COUNT fields are ignored.
1568 * A special case is the supplying of the DELWA descriptor, which must be supplied as the first descriptor.
1569 *
1570 * Assert fails if
1571 * - ifbp has a recognizable out-of-range value.
1572 * - NIC interrupts are not disabled while required by parameter action.
1573 * - in case decapsulation by the HCF is selected:
1574 * - The first databuffer does not have the exact size corresponding with the RxFS up to the 802.3 DestAddr
1575 * field (== 29 words).
1576 * - The FrameList does not consists of at least 2 Descriptors.
1577 * - The second databuffer does not have the minimum size of 8 bytes.
1578 *!! The 2nd part of the list of asserts should be kept in sync with put_frame_lst, in order to get
1579 *!! them in the WCI-spec !!!!
1580 * - DMA is not enabled
1581 * - descriptor list is NULL
1582 * - a descriptor in the descriptor list is not double word aligned
1583 * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1584 * - the DELWA descriptor is not a "singleton" DescriptorList.
1585 * - the DELWA descriptor is not the first Descriptor supplied
1586 * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1587 *!! - Possibly more checks could be added !!!!!!!!!!!!!
1588 *
1589 *.DIAGRAM
1590 *
1591 *
1592 *.ENDDOC END DOCUMENTATION
1593 *
1594 ************************************************************************************************************/
1595 void
1596 hcf_dma_rx_put( IFBP ifbp, DESC_STRCT *descp )
1597 {
1598
1599 HCFLOGENTRY( HCF_TRACE_DMA_RX_PUT, 0xDA01 )
1600 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
1601 HCFASSERT_INT
1602
1603 put_frame_lst( ifbp, descp, DMA_RX );
1604 #if HCF_ASSERT && (HCF_ENCAP) == HCF_ENC
1605 if ( descp->buf_addr ) {
1606 HCFASSERT( descp->BUF_SIZE == HCF_DMA_RX_BUF1_SIZE, descp->BUF_SIZE )
1607 HCFASSERT( descp->next_desc_addr, 0 ) // first descriptor should be followed by another descriptor
1608 // The second DB is for SNAP and payload purposes. It should be a minimum of 12 bytes in size.
1609 HCFASSERT( descp->next_desc_addr->BUF_SIZE >= 12, descp->next_desc_addr->BUF_SIZE )
1610 }
1611 #endif // HCFASSERT / HCF_ENC
1612 HCFLOGEXIT( HCF_TRACE_DMA_RX_PUT )
1613 } // hcf_dma_rx_put
1614
1615
1616 /************************************************************************************************************
1617 *
1618 *.MODULE DESC_STRCT* hcf_dma_tx_get( IFBP ifbp )
1619 *.PURPOSE DMA mode: reclaims and decapsulates packets in the tx descriptor chain if:
1620 * - A Tx packet has been copied from host-RAM into NIC-RAM by the DMA engine
1621 * - The Hermes/DMAengine have been disabled
1622 *
1623 *.ARGUMENTS
1624 * ifbp address of the Interface Block
1625 *
1626 *.RETURNS
1627 * pointer to a reclaimed Tx packet.
1628 *
1629 *.DESCRIPTION
1630 * impact of the disable command:
1631 * When a non-empty pool of Tx descriptors exists (created by means of hcf_dma_put_tx), the MSF
1632 * is supposed to empty that pool by means of hcf_dma_tx_get calls after the disable in an
1633 * disable/enable sequence.
1634 *
1635 *.DIAGRAM
1636 *
1637 *.NOTICE
1638 *
1639 *.ENDDOC END DOCUMENTATION
1640 *
1641 ************************************************************************************************************/
1642 DESC_STRCT*
1643 hcf_dma_tx_get( IFBP ifbp )
1644 {
1645 DESC_STRCT *descp; // pointer to start of FrameList
1646
1647 descp = get_frame_lst( ifbp, DMA_TX );
1648 if ( descp && descp->buf_addr ) //!be aware of the missing curly bracket
1649 //skip decapsulation at confined descriptor
1650 #if (HCF_ENCAP) == HCF_ENC
1651 if ( ( descp->BUF_CNT == HFS_TYPE )
1652 #if (HCF_TYPE) & HCF_TYPE_CCX
1653 || ( descp->BUF_CNT == HFS_DAT )
1654 #endif // HCF_TYPE_CCX
1655 ) { // perform decapsulation if needed
1656 descp->next_desc_addr->buf_phys_addr -= HCF_DASA_SIZE;
1657 descp->next_desc_addr->BUF_CNT += HCF_DASA_SIZE;
1658 }
1659 #endif // HCF_ENC
1660 if ( descp == NULL ) { //;?could be integrated into get_frame_lst
1661 ifbp->IFB_DmaPackets &= (hcf_16)~HREG_EV_TDMAD;
1662 }
1663 HCFLOGEXIT( HCF_TRACE_DMA_TX_GET )
1664 return descp;
1665 } // hcf_dma_tx_get
1666
1667
1668 /************************************************************************************************************
1669 *
1670 *.MODULE void hcf_dma_tx_put( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
1671 *.PURPOSE puts a packet in the Tx DMA queue in host ram and kicks off the TxDma engine.
1672 * supply the Tx-DELWA descriptor.
1673 *
1674 *.ARGUMENTS
1675 * ifbp address of the Interface Block
1676 * descp address of Tx Descriptor Chain (i.e. a single Tx frame)
1677 * tx_cntl indicates MAC-port and (Hermes) options
1678 *
1679 *.RETURNS N.A.
1680 *
1681 *.DESCRIPTION
1682 * The HCF can be used in 2 fashions: with and without encapsulation for data transfer.
1683 * This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1684 *
1685 * Regardless of the HCF_ENCAP system constant, the descriptor list created to describe the frame to be
1686 * transmitted, must supply space to contain the 802.11 header, preceding the actual frame to be transmitted.
1687 * Basically, this only supplies working storage to the HCF which passes this on to the DMA engine.
1688 * As a consequence the contents of this space do not matter.
1689 * Nevertheless BUF_CNT must take in account this storage.
1690 * This working space to contain the 802.11 header may not be fragmented, the first buffer must be
1691 * sufficiently large to contain at least the 802.11 header, i.e. HFS_ADDR_DEST (29 words or 0x3A bytes).
1692 * This way, the HCF can simply, regardless whether or not the HCF encapsulates the frame, write the parameter
1693 * tx_cntl at offset 0x36 (HFS_TX_CNTL) in the first buffer.
1694 * Note that it is allowed to have part or all of the actual frame represented by the first descriptor as long
1695 * as the requirement for storage for the 802.11 header is met, i.e. the 802.3 frame starts at offset
1696 * HFS_ADDR_DEST.
1697 * Except for the Assert on the 1st buffer in case of Encapsualtion, the SIZE fields are ignored.
1698 *
1699 * In case the encapsulation feature is compiled in, there are the following additional requirements.
1700 * o The BUF_CNT of the first buffer changes from a minimum of 0x3A bytes to exactly 0x3A, i.e. the workspace
1701 * to store the 802.11 header
1702 * o The BUF_SIZE of the first buffer is at least the space needed to store the
1703 * - 802.11 header (29 words)
1704 * - 802.3 header, i.e. 12 bytes addressing information and 2 bytes length field
1705 * - 6 bytes SNAP-header
1706 * This results in 39 words or 0x4E bytes or HFS_TYPE.
1707 * Note that if the BUF_SIZE is larger than 0x4E, this surplus is not used.
1708 * o The actual frame begins in the 2nd descriptor (which is already implied by the BUF_CNT == 0x3A requirement) and the associated buffer contains at least the 802.3 header, i.e. the 14 bytes representing addressing information and length/type field
1709 *
1710 * When the HCF does not encapsulates (i.e. length/type field <= 1500), no changes are made to descriptors
1711 * or buffers.
1712 *
1713 * When the HCF actually encapsulates (i.e. length/type field > 1500), it successively writes, starting at
1714 * offset HFS_ADDR_DEST (0x3A) in the first buffer:
1715 * - the 802.3 addressing information, copied from the begin of the second buffer
1716 * - the frame length, derived from the total length of the individual fragments, corrected for the SNAP
1717 * header length and Type field and ignoring the Destination Address, Source Address and Length field
1718 * - the appropriate snap header (Tunnel or 1042, depending on the value of the type field).
1719 *
1720 * The information in the first two descriptors is adjusted accordingly:
1721 * - the first descriptor count is changed from 0x3A to 0x4E (HFS_TYPE), which matches 0x3A + 12 + 2 + 6
1722 * - the second descriptor count is decreased by 12, being the moved addressing information
1723 * - the second descriptor (physical) buffer address is increased by 12.
1724 *
1725 * When the descriptors are returned by hcf_dma_tx_get, the transformation of the first two descriptors is
1726 * undone.
1727 *
1728 * Under any of the above scenarios, the assert BUF_CNT <= BUF_SIZE must be true for all descriptors
1729 * In case of encapsulation, BUF_SIZE of the 1st descriptor is asserted to be at least HFS_TYPE (0x4E), so it is NOT tested.
1730 *
1731 * Assert fails if
1732 * - ifbp has a recognizable out-of-range value.
1733 * - tx_cntl has a recognizable out-of-range value.
1734 * - NIC interrupts are not disabled while required by parameter action.
1735 * - in case encapsulation by the HCF is selected:
1736 * - The FrameList does not consists of at least 2 Descriptors.
1737 * - The first databuffer does not contain exactly the (space for) the 802.11 header (== 28 words)
1738 * - The first databuffer does not have a size to additionally accommodate the 802.3 header and the
1739 * SNAP header of the frame after encapsulation (== 39 words).
1740 * - The second databuffer does not contain at least DA, SA and 'type/length' (==14 bytes or 7 words)
1741 *!! The 2nd part of the list of asserts should be kept in sync with put_frame_lst, in order to get
1742 *!! them in the WCI-spec !!!!
1743 * - DMA is not enabled
1744 * - descriptor list is NULL
1745 * - a descriptor in the descriptor list is not double word aligned
1746 * - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1747 * - the DELWA descriptor is not a "singleton" DescriptorList.
1748 * - the DELWA descriptor is not the first Descriptor supplied
1749 * - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1750 *!! - Possibly more checks could be added !!!!!!!!!!!!!
1751 *.DIAGRAM
1752 *
1753 *.NOTICE
1754 *
1755 *.ENDDOC END DOCUMENTATION
1756 *
1757 *
1758 *1: Write tx_cntl parameter to HFS_TX_CNTL field into the Hermes-specific header in buffer 1
1759 *4: determine whether encapsulation is needed and write the type (tunnel or 1042) already at the appropriate
1760 * offset in the 1st buffer
1761 *6: Build the encapsualtion enveloppe in the free space at the end of the 1st buffer
1762 * - Copy DA/SA fields from the 2nd buffer
1763 * - Calculate total length of the message (snap-header + type-field + the length of all buffer fragments
1764 * associated with the 802.3 frame (i.e all descriptors except the first), but not the DestinationAddress,
1765 * SourceAddress and length-field)
1766 * Assert the message length
1767 * Write length. Note that the message is in BE format, hence on LE platforms the length must be converted
1768 * ;? THIS IS NOT WHAT CURRENTLY IS IMPLEMENTED
1769 * - Write snap header. Note that the last byte of the snap header is NOT copied, that byte is already in
1770 * place as result of the call to hcf_encap.
1771 * Note that there are many ways to skin a cat. To express the offsets in the 1st buffer while writing
1772 * the snap header, HFS_TYPE is chosen as a reference point to make it easier to grasp that the snap header
1773 * and encapsualtion type are at least relative in the right.
1774 *8: modify 1st descriptor to reflect moved part of the 802.3 header + Snap-header
1775 * modify 2nd descriptor to skip the moved part of the 802.3 header (DA/SA
1776 *10: set each descriptor to 'DMA owned', clear all other control bits.
1777 * Set SOP bit on first descriptor. Set EOP bit on last descriptor.
1778 *12: Either append the current frame to an existing descriptor list or
1779 *14: create a list beginning with the current frame
1780 *16: remember the new end of the list
1781 *20: hand the frame over to the DMA engine
1782 ************************************************************************************************************/
1783 void
1784 hcf_dma_tx_put( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
1785 {
1786 DESC_STRCT *p = descp->next_desc_addr;
1787 int i;
1788
1789 #if HCF_ASSERT
1790 int x = ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ? tx_cntl & ~HFS_TX_CNTL_PORT : tx_cntl;
1791 HCFASSERT( (x & ~HCF_TX_CNTL_MASK ) == 0, tx_cntl )
1792 #endif // HCF_ASSERT
1793 HCFLOGENTRY( HCF_TRACE_DMA_TX_PUT, 0xDA03 )
1794 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
1795 HCFASSERT_INT
1796 HCFASSERT( ( ifbp->IFB_CntlOpt & (USE_DMA|DMA_ENABLED) ) == (USE_DMA|DMA_ENABLED), ifbp->IFB_CntlOpt)
1797
1798 if ( descp->buf_addr ) {
1799 *(hcf_16*)(descp->buf_addr + HFS_TX_CNTL) = tx_cntl; /*1*/
1800 #if (HCF_ENCAP) == HCF_ENC
1801 HCFASSERT( descp->next_desc_addr, 0 ) //at least 2 descripors
1802 HCFASSERT( descp->BUF_CNT == HFS_ADDR_DEST, descp->BUF_CNT ) //exact length required for 1st buffer
1803 HCFASSERT( descp->BUF_SIZE >= HCF_DMA_TX_BUF1_SIZE, descp->BUF_SIZE ) //minimal storage for encapsulation
1804 HCFASSERT( p->BUF_CNT >= 14, p->BUF_CNT ); //at least DA, SA and 'type' in 2nd buffer
1805
1806 #if (HCF_TYPE) & HCF_TYPE_CCX
1807 /* if we are doing PPK +/- CMIC, or we are sending a DDP frame */
1808 if ( ( ifbp->IFB_CKIPStat == HCF_ACT_CCX_ON ) ||
1809 ( ( p->BUF_CNT >= 20 ) && ( ifbp->IFB_CKIPStat == HCF_ACT_CCX_OFF ) &&
1810 ( p->buf_addr[12] == 0xAA ) && ( p->buf_addr[13] == 0xAA ) &&
1811 ( p->buf_addr[14] == 0x03 ) && ( p->buf_addr[15] == 0x00 ) &&
1812 ( p->buf_addr[16] == 0x40 ) && ( p->buf_addr[17] == 0x96 ) &&
1813 ( p->buf_addr[18] == 0x00 ) && ( p->buf_addr[19] == 0x00 )))
1814 {
1815 /* copy the DA/SA to the first buffer */
1816 for ( i = 0; i < HCF_DASA_SIZE; i++ ) {
1817 descp->buf_addr[i + HFS_ADDR_DEST] = p->buf_addr[i];
1818 }
1819 /* calculate the length of the second fragment only */
1820 i = 0;
1821 do { i += p->BUF_CNT; } while( p = p->next_desc_addr );
1822 i -= HCF_DASA_SIZE ;
1823 /* convert the length field to big endian, using the endian friendly macros */
1824 i = CNV_SHORT_TO_BIG(i); //!! this converts ONLY on LE platforms, how does that relate to the non-CCX code
1825 *(hcf_16*)(&descp->buf_addr[HFS_LEN]) = (hcf_16)i;
1826 descp->BUF_CNT = HFS_DAT;
1827 // modify 2nd descriptor to skip the 'Da/Sa' fields
1828 descp->next_desc_addr->buf_phys_addr += HCF_DASA_SIZE;
1829 descp->next_desc_addr->BUF_CNT -= HCF_DASA_SIZE;
1830 }
1831 else
1832 #endif // HCF_TYPE_CCX
1833 {
1834 descp->buf_addr[HFS_TYPE-1] = hcf_encap(&descp->next_desc_addr->buf_addr[HCF_DASA_SIZE]); /*4*/
1835 if ( descp->buf_addr[HFS_TYPE-1] != ENC_NONE ) {
1836 for ( i=0; i < HCF_DASA_SIZE; i++ ) { /*6*/
1837 descp->buf_addr[i + HFS_ADDR_DEST] = descp->next_desc_addr->buf_addr[i];
1838 }
1839 i = sizeof(snap_header) + 2 - ( 2*6 + 2 );
1840 do { i += p->BUF_CNT; } while ( ( p = p->next_desc_addr ) != NULL );
1841 *(hcf_16*)(&descp->buf_addr[HFS_LEN]) = CNV_END_SHORT(i); //!! this converts on ALL platforms, how does that relate to the CCX code
1842 for ( i=0; i < sizeof(snap_header) - 1; i++) {
1843 descp->buf_addr[HFS_TYPE - sizeof(snap_header) + i] = snap_header[i];
1844 }
1845 descp->BUF_CNT = HFS_TYPE; /*8*/
1846 descp->next_desc_addr->buf_phys_addr += HCF_DASA_SIZE;
1847 descp->next_desc_addr->BUF_CNT -= HCF_DASA_SIZE;
1848 }
1849 }
1850 #endif // HCF_ENC
1851 }
1852 put_frame_lst( ifbp, descp, DMA_TX );
1853 HCFLOGEXIT( HCF_TRACE_DMA_TX_PUT )
1854 } // hcf_dma_tx_put
1855
1856 #endif // HCF_DMA
1857
1858 #if (HCF_DL_ONLY) == 0
1859 /************************************************************************************************************
1860 *
1861 *.MODULE hcf_8 hcf_encap( wci_bufp type )
1862 *.PURPOSE test whether RFC1042 or Bridge-Tunnel encapsulation is needed.
1863 *
1864 *.ARGUMENTS
1865 * type (Far) pointer to the (Big Endian) Type/Length field in the message
1866 *
1867 *.RETURNS
1868 * ENC_NONE len/type is "len" ( (BIG_ENDIAN)type <= 1500 )
1869 * ENC_TUNNEL len/type is "type" and 0x80F3 or 0x8137
1870 * ENC_1042 len/type is "type" but not 0x80F3 or 0x8137
1871 *
1872 *.CONDITIONS
1873 * NIC Interrupts d.c
1874 *
1875 *.DESCRIPTION
1876 * Type must point to the Len/Type field of the message, this is the 2-byte field immediately after the 6 byte
1877 * Destination Address and 6 byte Source Address. The 2 successive bytes addressed by type are interpreted as
1878 * a Big Endian value. If that value is less than or equal to 1500, the message is assumed to be in 802.3
1879 * format. Otherwise the message is assumed to be in Ethernet-II format. Depending on the value of Len/Typ,
1880 * Bridge Tunnel or RFC1042 encapsulation is needed.
1881 *
1882 *.DIAGRAM
1883 *
1884 * 1: presume 802.3, hence preset return value at ENC_NONE
1885 * 2: convert type from "network" Endian format to native Endian
1886 * 4: the litmus test to distinguish type and len.
1887 * The hard code "magic" value of 1500 is intentional and should NOT be replaced by a mnemonic because it is
1888 * not related at all to the maximum frame size supported by the Hermes.
1889 * 6: check type against:
1890 * 0x80F3 //AppleTalk Address Resolution Protocol (AARP)
1891 * 0x8137 //IPX
1892 * to determine the type of encapsulation
1893 *
1894 *.ENDDOC END DOCUMENTATION
1895 *
1896 ************************************************************************************************************/
1897 #if HCF_ENCAP //i.e HCF_ENC or HCF_ENC_SUP
1898 #if ! ( (HCF_ENCAP) & HCF_ENC_SUP )
1899 HCF_STATIC
1900 #endif // HCF_ENCAP
1901 hcf_8
1902 hcf_encap( wci_bufp type )
1903 {
1904
1905 hcf_8 rc = ENC_NONE; /* 1 */
1906 hcf_16 t = (hcf_16)(*type<<8) + *(type+1); /* 2 */
1907
1908 if ( t > 1500 ) { /* 4 */
1909 if ( t == 0x8137 || t == 0x80F3 ) {
1910 rc = ENC_TUNNEL; /* 6 */
1911 } else {
1912 rc = ENC_1042;
1913 }
1914 }
1915 return rc;
1916 } // hcf_encap
1917 #endif // HCF_ENCAP
1918 #endif // HCF_DL_ONLY
1919
1920
1921 /************************************************************************************************************
1922 *
1923 *.MODULE int hcf_get_info( IFBP ifbp, LTVP ltvp )
1924 *.PURPOSE Obtains transient and persistent configuration information from the Card and from the HCF.
1925 *
1926 *.ARGUMENTS
1927 * ifbp address of the Interface Block
1928 * ltvp address of LengthTypeValue structure specifying the "what" and the "how much" of the
1929 * information to be collected from the HCF or from the Hermes
1930 *
1931 *.RETURNS
1932 * HCF_ERR_LEN The provided buffer was too small
1933 * HCF_SUCCESS Success
1934 *!! via cmd_exe ( type >= CFG_RID_FW_MIN )
1935 * HCF_ERR_NO_NIC NIC removed during retrieval
1936 * HCF_ERR_TIME_OUT Expected Hermes event did not occur in expected time
1937 *!! via cmd_exe and setup_bap (type >= CFG_RID_FW_MIN )
1938 * HCF_ERR_DEFUNCT_... HCF is in defunct mode (bits 0x7F reflect cause)
1939 *
1940 *.DESCRIPTION
1941 * The T-field of the LTV-record (provided by the MSF in parameter ltvp) specifies the RID wanted. The RID
1942 * information identified by the T-field is copied into the V-field.
1943 * On entry, the L-field specifies the size of the buffer, also called the "Initial DataLength". The L-value
1944 * includes the size of the T-field, but not the size of the L-field itself.
1945 * On return, the L-field indicates the number of words actually contained by the Type and Value fields.
1946 * As the size of the Type field in the LTV-record is included in the "Initial DataLength" of the record, the
1947 * V-field can contain at most "Initial DataLength" - 1 words of data.
1948 * Copying stops if either the complete Information is copied or if the number of words indicated by the
1949 * "Initial DataLength" were copied. The "Initial DataLength" acts as a safe guard against Configuration
1950 * Information blocks that have different sizes for different F/W versions, e.g. when later versions support
1951 * more tallies than earlier versions.
1952 * If the size of Value field of the RID exceeds the size of the "Initial DataLength" -1, as much data
1953 * as fits is copied, and an error status of HCF_ERR_LEN is returned.
1954 *
1955 * It is the responsibility of the MSF to detect card removal and re-insertion and not call the HCF when the
1956 * NIC is absent. The MSF cannot, however, timely detect a Card removal if the Card is removed while
1957 * hcf_get_info is in progress. Therefore, the HCF performs its own check on Card presence after the read
1958 * operation of the NIC data. If the Card is not present or removed during the execution of hcf_get_info,
1959 * HCF_ERR_NO_NIC is returned and the content of the Data Buffer is unpredictable. This check is not performed
1960 * in case of the "HCF embedded" pseudo RIDs like CFG_TALLIES.
1961 *
1962 * Assert fails if
1963 * - ifbp has a recognizable out-of-range value.
1964 * - reentrancy, may be caused by calling hcf_functions without adequate protection
1965 * against NIC interrupts or multi-threading.
1966 * - ltvp is a NULL pointer.
1967 * - length field of the LTV-record at entry is 0 or 1 or has an excessive value (i.e. exceeds HCF_MAX_LTV).
1968 * - type field of the LTV-record is invalid.
1969 *
1970 *.DIAGRAM
1971 * Hcf_get_mb_info copies the contents of the oldest MailBox Info block in the MailBox to PC RAM. If len is
1972 * less than the size of the MailBox Info block, only as much as fits in the PC RAM buffer is copied. After
1973 * the copying the MailBox Read pointer is updated to point to the next MailBox Info block, hence the
1974 * remainder of an "oversized" MailBox Info block is lost. The truncation of the MailBox Info block is NOT
1975 * reflected in the return status. Note that hcf_get_info guarantees the length of the PC RAM buffer meets
1976 * the minimum requirements of at least 2, so no PC RAM buffer overrun.
1977 *
1978 * Calling hcf_get_mb_info when their is no MailBox Info block available or when there is no MailBox at all,
1979 * results in a "NULL" MailBox Info block.
1980 *
1981 *12: see NOTICE
1982 *17: The return status of cmd_wait and the first hcfio_in_string can be ignored, because when one fails, the
1983 * other fails via the IFB_DefunctStat mechanism
1984 *20: "HCFASSERT( rc == HCF_SUCCESS, rc )" is not suitable because this will always trigger as side effect of
1985 * the HCFASSERT in hcf_put_info which calls hcf_get_info to figure out whether the RID exists at all.
1986
1987 *.NOTICE
1988 *
1989 * "HCF embedded" pseudo RIDs:
1990 * CFG_MB_INFO, CFG_TALLIES, CFG_DRV_IDENTITY, CFG_DRV_SUP_RANGE, CFG_DRV_ACT_RANGES_PRI,
1991 * CFG_DRV_ACT_RANGES_STA, CFG_DRV_ACT_RANGES_HSI
1992 * Note the HCF_ERR_LEN is NOT adequately set, when L >= 2 but less than needed
1993 *
1994 * Remarks: Transfers operation information and transient and persistent configuration information from the
1995 * Card and from the HCF to the MSF.
1996 * The exact layout of the provided data structure depends on the action code. Copying stops if either the
1997 * complete Configuration Information is copied or if the number of bytes indicated by len is copied. Len
1998 * acts as a safe guard against Configuration Information blocks which have different sizes for different
1999 * Hermes versions, e.g. when later versions support more tallies than earlier versions. It is a conscious
2000 * decision that unused parts of the PC RAM buffer are not cleared.
2001 *
2002 * Remarks: The only error against which is protected is the "Read error" as result of Card removal. Only the
2003 * last hcf_io_string need to be protected because if the first fails the second will fail as well. Checking
2004 * for cmd_exe errors is supposed superfluous because problems in cmd_exe are already caught or will be
2005 * caught by hcf_enable.
2006 *
2007 * CFG_MB_INFO: copy the oldest MailBox Info Block or the "null" block if none available.
2008 *
2009 * The mechanism to HCF_ASSERT on invalid typ-codes in the LTV record is based on the following strategy:
2010 * - during the pseudo-asynchronous Hermes commands (diagnose, download) only CFG_MB_INFO is acceptable
2011 * - some codes (e.g. CFG_TALLIES) are explicitly handled by the HCF which implies that these codes
2012 * are valid
2013 * - all other codes in the range 0xFC00 through 0xFFFF are passed to the Hermes. The Hermes returns an
2014 * LTV record with a zero value in the L-field for all Typ-codes it does not recognize. This is
2015 * defined and intended behavior, so HCF_ASSERT does not catch on this phenomena.
2016 * - all remaining codes are invalid and cause an ASSERT.
2017 *
2018 *.CONDITIONS
2019 * In case of USB, HCF_MAX_MSG ;?USED;? to limit the amount of data that can be retrieved via hcf_get_info.
2020 *
2021 *
2022 *.ENDDOC END DOCUMENTATION
2023 *
2024 ************************************************************************************************************/
2025 int
2026 hcf_get_info( IFBP ifbp, LTVP ltvp )
2027 {
2028
2029 int rc = HCF_SUCCESS;
2030 hcf_16 len = ltvp->len;
2031 hcf_16 type = ltvp->typ;
2032 wci_recordp p = &ltvp->len; //destination word pointer (in LTV record)
2033 hcf_16 *q = NULL; /* source word pointer Note!! DOS COM can't cope with FAR
2034 * as a consequence MailBox must be near which is usually true anyway
2035 */
2036 int i;
2037
2038 HCFLOGENTRY( HCF_TRACE_GET_INFO, ltvp->typ )
2039 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
2040 HCFASSERT_INT
2041 HCFASSERT( ltvp, 0 )
2042 HCFASSERT( 1 < ltvp->len && ltvp->len <= HCF_MAX_LTV + 1, MERGE_2( ltvp->typ, ltvp->len ) )
2043
2044 ltvp->len = 0; //default to: No Info Available
2045 #if defined MSF_COMPONENT_ID || (HCF_EXT) & HCF_EXT_MB //filter out all specials
2046 for ( i = 0; ( q = xxxx[i] ) != NULL && q[1] != type; i++ ) /*NOP*/;
2047 #endif // MSF_COMPONENT_ID / HCF_EXT_MB
2048 #if HCF_TALLIES
2049 if ( type == CFG_TALLIES ) { /*3*/
2050 (void)hcf_action( ifbp, HCF_ACT_TALLIES );
2051 q = (hcf_16*)&ifbp->IFB_TallyLen;
2052 }
2053 #endif // HCF_TALLIES
2054 #if (HCF_EXT) & HCF_EXT_MB
2055 if ( type == CFG_MB_INFO ) {
2056 if ( ifbp->IFB_MBInfoLen ) {
2057 if ( ifbp->IFB_MBp[ifbp->IFB_MBRp] == 0xFFFF ) {
2058 ifbp->IFB_MBRp = 0; //;?Probably superfluous
2059 }
2060 q = &ifbp->IFB_MBp[ifbp->IFB_MBRp];
2061 ifbp->IFB_MBRp += *q + 1; //update read pointer
2062 if ( ifbp->IFB_MBp[ifbp->IFB_MBRp] == 0xFFFF ) {
2063 ifbp->IFB_MBRp = 0;
2064 }
2065 ifbp->IFB_MBInfoLen = ifbp->IFB_MBp[ifbp->IFB_MBRp];
2066 }
2067 }
2068 #endif // HCF_EXT_MB
2069 if ( q != NULL ) { //a special or CFG_TALLIES or CFG_MB_INFO
2070 i = min( len, *q ) + 1; //total size of destination (including T-field)
2071 while ( i-- ) {
2072 *p++ = *q;
2073 #if (HCF_TALLIES) & HCF_TALLIES_RESET
2074 if ( q > &ifbp->IFB_TallyTyp && type == CFG_TALLIES ) {
2075 *q = 0;
2076 }
2077 #endif // HCF_TALLIES_RESET
2078 q++;
2079 }
2080 } else { // not a special nor CFG_TALLIES nor CFG_MB_INFO
2081 if ( type == CFG_CNTL_OPT ) { //read back effective options
2082 ltvp->len = 2;
2083 ltvp->val[0] = ifbp->IFB_CntlOpt;
2084 #if (HCF_EXT) & HCF_EXT_NIC_ACCESS
2085 } else if ( type == CFG_PROD_DATA ) { //only needed for some test tool on top of H-II NDIS driver
2086 hcf_io io_port;
2087 wci_bufp pt; //pointer with the "right" type, just to help ease writing macros with embedded assembly
2088 OPW( HREG_AUX_PAGE, (hcf_16)(PLUG_DATA_OFFSET >> 7) );
2089 OPW( HREG_AUX_OFFSET, (hcf_16)(PLUG_DATA_OFFSET & 0x7E) );
2090 io_port = ifbp->IFB_IOBase + HREG_AUX_DATA; //to prevent side effects of the MSF-defined macro
2091 p = ltvp->val; //destination char pointer (in LTV record)
2092 i = len - 1;
2093 if (i > 0 ) {
2094 pt = (wci_bufp)p; //just to help ease writing macros with embedded assembly
2095 IN_PORT_STRING_8_16( io_port, pt, i ); //space used by T: -1
2096 }
2097 } else if ( type == CFG_CMD_HCF ) {
2098 #define P ((CFG_CMD_HCF_STRCT FAR *)ltvp)
2099 HCFASSERT( P->cmd == CFG_CMD_HCF_REG_ACCESS, P->cmd ) //only Hermes register access supported
2100 if ( P->cmd == CFG_CMD_HCF_REG_ACCESS ) {
2101 HCFASSERT( P->mode < ifbp->IFB_IOBase, P->mode ) //Check Register space
2102 ltvp->len = min( len, 4 ); //RESTORE ltv length
2103 P->add_info = IPW( P->mode );
2104 }
2105 #undef P
2106 #endif // HCF_EXT_NIC_ACCESS
2107 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
2108 } else if (type == CFG_FW_PRINTF) {
2109 rc = fw_printf(ifbp, (CFG_FW_PRINTF_STRCT*)ltvp);
2110 #endif // HCF_ASSERT_PRINTF
2111 } else if ( type >= CFG_RID_FW_MIN ) {
2112 //;? by using HCMD_BUSY option when calling cmd_exe, using a get_frag with length 0 just to set up the
2113 //;? BAP and calling cmd_cmpl, you could merge the 2 Busy waits. Whether this really helps (and what
2114 //;? would be the optimal sequence in cmd_exe and get_frag) would have to be MEASURED
2115 /*17*/ if ( ( rc = cmd_exe( ifbp, HCMD_ACCESS, type ) ) == HCF_SUCCESS &&
2116 ( rc = setup_bap( ifbp, type, 0, IO_IN ) ) == HCF_SUCCESS ) {
2117 get_frag( ifbp, (wci_bufp)&ltvp->len, 2*len+2 BE_PAR(2) );
2118 if ( IPW( HREG_STAT ) == 0xFFFF ) { //NIC removal test
2119 ltvp->len = 0;
2120 HCFASSERT( DO_ASSERT, type )
2121 }
2122 }
2123 /*12*/ } else HCFASSERT( DO_ASSERT, type ) /*NOP*/; //NOP in case HCFASSERT is dummy
2124 }
2125 if ( len < ltvp->len ) {
2126 ltvp->len = len;
2127 if ( rc == HCF_SUCCESS ) {
2128 rc = HCF_ERR_LEN;
2129 }
2130 }
2131 HCFASSERT( rc == HCF_SUCCESS || ( rc == HCF_ERR_LEN && ifbp->IFB_AssertTrace & 1<<HCF_TRACE_PUT_INFO ),
2132 MERGE_2( type, rc ) ) /*20*/
2133 HCFLOGEXIT( HCF_TRACE_GET_INFO )
2134 return rc;
2135 } // hcf_get_info
2136
2137
2138 /************************************************************************************************************
2139 *
2140 *.MODULE int hcf_put_info( IFBP ifbp, LTVP ltvp )
2141 *.PURPOSE Transfers operation and configuration information to the Card and to the HCF.
2142 *
2143 *.ARGUMENTS
2144 * ifbp address of the Interface Block
2145 * ltvp specifies the RID (as defined by Hermes I/F) or pseudo-RID (as defined by WCI)
2146 *
2147 *.RETURNS
2148 * HCF_SUCCESS
2149 *!! via cmd_exe
2150 * HCF_ERR_NO_NIC NIC removed during data retrieval
2151 * HCF_ERR_TIME_OUT Expected F/W event did not occur in time
2152 * HCF_ERR_DEFUNCT_...
2153 *!! via download CFG_DLNV_START <= type <= CFG_DL_STOP
2154 *!! via put_info CFG_RID_CFG_MIN <= type <= CFG_RID_CFG_MAX
2155 *!! via put_frag
2156 *
2157 *.DESCRIPTION
2158 * The L-field of the LTV-record (provided by the MSF in parameter ltvp) specifies the size of the buffer.
2159 * The L-value includes the size of the T-field, but not the size of the L-field.
2160 * The T- field specifies the RID placed in the V-field by the MSF.
2161 *
2162 * Not all CFG-codes can be used for hcf_put_info. The following CFG-codes are valid for hcf_put_info:
2163 * o One of the CFG-codes in the group "Network Parameters, Static Configuration Entities"
2164 * Changes made by hcf_put_info to CFG_codes in this group will not affect the F/W
2165 * and HCF behavior until hcf_cntl_port( HCF_PORT_ENABLE) is called.
2166 * o One of the CFG-codes in the group "Network Parameters, Dynamic Configuration Entities"
2167 * Changes made by hcf_put_info to CFG_codes will affect the F/W and HCF behavior immediately.
2168 * o CFG_PROG.
2169 * This code is used to initiate and terminate the process to download data either to
2170 * volatile or to non-volatile RAM on the NIC as well as for the actual download.
2171 * o CFG-codes related to the HCF behavior.
2172 * The related CFG-codes are:
2173 * - CFG_REG_MB
2174 * - CFG_REG_ASSERT_RTNP
2175 * - CFG_REG_INFO_LOG
2176 * - CFG_CMD_NIC
2177 * - CFG_CMD_DONGLE
2178 * - CFG_CMD_HCF
2179 * - CFG_NOTIFY
2180 *
2181 * All LTV-records "unknown" to the HCF are forwarded to the F/W.
2182 *
2183 * Assert fails if
2184 * - ifbp has a recognizable out-of-range value.
2185 * - ltvp is a NULL pointer.
2186 * - hcf_put_info was called without prior call to hcf_connect
2187 * - type field of the LTV-record is invalid, i.e. neither HCF nor F/W can handle the value.
2188 * - length field of the LTV-record at entry is less than 1 or exceeds MAX_LTV_SIZE.
2189 * - registering a MailBox with size less than 60 or a non-aligned buffer address is used.
2190 * - reentrancy, may be caused by calling hcf_functions without adequate protection against
2191 * NIC interrupts or multi-threading.
2192 *
2193 *.DIAGRAM
2194 *
2195 *.NOTICE
2196 * Remarks: In case of Hermes Configuration LTVs, the codes for the type are "cleverly" chosen to be
2197 * identical to the RID. Hermes Configuration information is copied from the provided data structure into the
2198 * Card.
2199 * In case of HCF Configuration LTVs, the type values are chosen in a range which does not overlap the
2200 * RID-range.
2201 *
2202 *20:
2203 *
2204 *.ENDDOC END DOCUMENTATION
2205 *
2206 ************************************************************************************************************/
2207
2208 int
2209 hcf_put_info( IFBP ifbp, LTVP ltvp )
2210 {
2211 int rc = HCF_SUCCESS;
2212
2213 HCFLOGENTRY( HCF_TRACE_PUT_INFO, ltvp->typ )
2214 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
2215 HCFASSERT_INT
2216 HCFASSERT( ltvp, 0 )
2217 HCFASSERT( 1 < ltvp->len && ltvp->len <= HCF_MAX_LTV + 1, ltvp->len )
2218
2219 //all codes between 0xFA00 and 0xFCFF are passed to Hermes
2220 #if (HCF_TYPE) & HCF_TYPE_WPA
2221 { hcf_16 i;
2222 hcf_32 FAR * key_p;
2223
2224 if ( ltvp->typ == CFG_ADD_TKIP_DEFAULT_KEY || ltvp->typ == CFG_ADD_TKIP_MAPPED_KEY ) {
2225 key_p = (hcf_32*)((CFG_ADD_TKIP_MAPPED_KEY_STRCT FAR *)ltvp)->tx_mic_key;
2226 i = TX_KEY; //i.e. TxKeyIndicator == 1, KeyID == 0
2227 if ( ltvp->typ == CFG_ADD_TKIP_DEFAULT_KEY ) {
2228 key_p = (hcf_32*)((CFG_ADD_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)->tx_mic_key;
2229 i = CNV_LITTLE_TO_SHORT(((CFG_ADD_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)->tkip_key_id_info);
2230 }
2231 if ( i & TX_KEY ) { /* TxKeyIndicator == 1
2232 (either really set by MSF in case of DEFAULT or faked by HCF in case of MAPPED ) */
2233 ifbp->IFB_MICTxCntl = (hcf_16)( HFS_TX_CNTL_MIC | (i & KEY_ID )<<8 );
2234 ifbp->IFB_MICTxKey[0] = CNV_LONGP_TO_LITTLE( key_p );
2235 ifbp->IFB_MICTxKey[1] = CNV_LONGP_TO_LITTLE( (key_p+1) );
2236 }
2237 i = ( i & KEY_ID ) * 2;
2238 ifbp->IFB_MICRxKey[i] = CNV_LONGP_TO_LITTLE( (key_p+2) );
2239 ifbp->IFB_MICRxKey[i+1] = CNV_LONGP_TO_LITTLE( (key_p+3) );
2240 }
2241 #define P ((CFG_REMOVE_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)
2242 if ( ( ltvp->typ == CFG_REMOVE_TKIP_MAPPED_KEY ) ||
2243 ( ltvp->typ == CFG_REMOVE_TKIP_DEFAULT_KEY &&
2244 ( (ifbp->IFB_MICTxCntl >> 8) & KEY_ID ) == CNV_SHORT_TO_LITTLE(P->tkip_key_id )
2245 )
2246 ) { ifbp->IFB_MICTxCntl = 0; } //disable MIC-engine
2247 #undef P
2248 }
2249 #endif // HCF_TYPE_WPA
2250
2251 if ( ltvp->typ == CFG_PROG ) {
2252 rc = download( ifbp, (CFG_PROG_STRCT FAR *)ltvp );
2253 } else switch (ltvp->typ) {
2254 #if (HCF_ASSERT) & HCF_ASSERT_RT_MSF_RTN
2255 case CFG_REG_ASSERT_RTNP: //Register MSF Routines
2256 #define P ((CFG_REG_ASSERT_RTNP_STRCT FAR *)ltvp)
2257 ifbp->IFB_AssertRtn = P->rtnp;
2258 // ifbp->IFB_AssertLvl = P->lvl; //TODO not yet supported so default is set in hcf_connect
2259 HCFASSERT( DO_ASSERT, MERGE_2( HCF_ASSERT, 0xCAF1 ) ) //just to proof that the complete assert machinery is working
2260 #undef P
2261 break;
2262 #endif // HCF_ASSERT_RT_MSF_RTN
2263 #if (HCF_EXT) & HCF_EXT_INFO_LOG
2264 case CFG_REG_INFO_LOG: //Register Log filter
2265 ifbp->IFB_RIDLogp = ((CFG_RID_LOG_STRCT FAR*)ltvp)->recordp;
2266 break;
2267 #endif // HCF_EXT_INFO_LOG
2268 case CFG_CNTL_OPT: //overrule option
2269 HCFASSERT( ( ltvp->val[0] & ~(USE_DMA | USE_16BIT) ) == 0, ltvp->val[0] )
2270 if ( ( ltvp->val[0] & USE_DMA ) == 0 ) ifbp->IFB_CntlOpt &= ~USE_DMA;
2271 ifbp->IFB_CntlOpt |= ltvp->val[0] & USE_16BIT;
2272 break;
2273 #if (HCF_EXT) & HCF_EXT_MB
2274 case CFG_REG_MB: //Register MailBox
2275 #define P ((CFG_REG_MB_STRCT FAR *)ltvp)
2276 HCFASSERT( ( (hcf_32)P->mb_addr & 0x0001 ) == 0, (hcf_32)P->mb_addr )
2277 HCFASSERT( (P)->mb_size >= 60, (P)->mb_size )
2278 ifbp->IFB_MBp = P->mb_addr;
2279 /* if no MB present, size must be 0 for ;?the old;? put_info_mb to work correctly */
2280 ifbp->IFB_MBSize = ifbp->IFB_MBp == NULL ? 0 : P->mb_size;
2281 ifbp->IFB_MBWp = ifbp->IFB_MBRp = 0;
2282 ifbp->IFB_MBp[0] = 0; //flag the MailBox as empty
2283 ifbp->IFB_MBInfoLen = 0;
2284 HCFASSERT( ifbp->IFB_MBSize >= 60 || ifbp->IFB_MBp == NULL, ifbp->IFB_MBSize )
2285 #undef P
2286 break;
2287 case CFG_MB_INFO: //store MailBoxInfoBlock
2288 rc = put_info_mb( ifbp, (CFG_MB_INFO_STRCT FAR *)ltvp );
2289 break;
2290 #endif // HCF_EXT_MB
2291
2292 #if (HCF_EXT) & HCF_EXT_NIC_ACCESS
2293 case CFG_CMD_NIC:
2294 #define P ((CFG_CMD_NIC_STRCT FAR *)ltvp)
2295 OPW( HREG_PARAM_2, P->parm2 );
2296 OPW( HREG_PARAM_1, P->parm1 );
2297 rc = cmd_exe( ifbp, P->cmd, P->parm0 );
2298 P->hcf_stat = (hcf_16)rc;
2299 P->stat = IPW( HREG_STAT );
2300 P->resp0 = IPW( HREG_RESP_0 );
2301 P->resp1 = IPW( HREG_RESP_1 );
2302 P->resp2 = IPW( HREG_RESP_2 );
2303 P->ifb_err_cmd = ifbp->IFB_ErrCmd;
2304 P->ifb_err_qualifier = ifbp->IFB_ErrQualifier;
2305 #undef P
2306 break;
2307 case CFG_CMD_HCF:
2308 #define P ((CFG_CMD_HCF_STRCT FAR *)ltvp)
2309 HCFASSERT( P->cmd == CFG_CMD_HCF_REG_ACCESS, P->cmd ) //only Hermes register access supported
2310 if ( P->cmd == CFG_CMD_HCF_REG_ACCESS ) {
2311 HCFASSERT( P->mode < ifbp->IFB_IOBase, P->mode ) //Check Register space
2312 OPW( P->mode, P->add_info);
2313 }
2314 #undef P
2315 break;
2316 #endif // HCF_EXT_NIC_ACCESS
2317
2318 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
2319 case CFG_FW_PRINTF_BUFFER_LOCATION:
2320 ifbp->IFB_FwPfBuff = *(CFG_FW_PRINTF_BUFFER_LOCATION_STRCT*)ltvp;
2321 break;
2322 #endif // HCF_ASSERT_PRINTF
2323
2324 default: //pass everything unknown above the "FID" range to the Hermes or Dongle
2325 rc = put_info( ifbp, ltvp );
2326 }
2327 //DO NOT !!! HCFASSERT( rc == HCF_SUCCESS, rc ) /* 20 */
2328 HCFLOGEXIT( HCF_TRACE_PUT_INFO )
2329 return rc;
2330 } // hcf_put_info
2331
2332
2333 #if (HCF_DL_ONLY) == 0
2334 /************************************************************************************************************
2335 *
2336 *.MODULE int hcf_rcv_msg( IFBP ifbp, DESC_STRCT *descp, unsigned int offset )
2337 *.PURPOSE All: decapsulate a message.
2338 * pre-HermesII.5: verify MIC.
2339 * non-USB, non-DMA mode: Transfer a message from the NIC to the Host and acknowledge reception.
2340 * USB: Transform a message from proprietary USB format to 802.3 format
2341 *
2342 *.ARGUMENTS
2343 * ifbp address of the Interface Block
2344 * descp Pointer to the Descriptor List location.
2345 * offset USB: not used
2346 * non-USB: specifies the beginning of the data to be obtained (0 corresponds with DestAddr field
2347 * of frame).
2348 *
2349 *.RETURNS
2350 * HCF_SUCCESS No SSN error ( or HCF_ERR_MIC already reported by hcf_service_nic)
2351 * HCF_ERR_MIC message contains an erroneous MIC ( HCF_SUCCESS is reported if HCF_ERR_MIC is already
2352 * reported by hcf_service_nic)
2353 * HCF_ERR_NO_NIC NIC removed during data retrieval
2354 * HCF_ERR_DEFUNCT...
2355 *
2356 *.DESCRIPTION
2357 * The Receive Message Function can be executed by the MSF to obtain the Data Info fields of the message that
2358 * is reported to be available by the Service NIC Function.
2359 *
2360 * The Receive Message Function copies the message data available in the Card memory into a buffer structure
2361 * provided by the MSF.
2362 * Only data of the message indicated by the Service NIC Function can be obtained.
2363 * Execution of the Service NIC function may result in the availability of a new message, but it definitely
2364 * makes the message reported by the preceding Service NIC function, unavailable.
2365 *
2366 * in non-USB/non-DMA mode, hcf_rcv_msg starts the copy process at the (non-negative) offset requested by the
2367 * parameter offset, relative to HFS_ADDR_DEST, e.g offset 0 starts copying from the Destination Address, the
2368 * very begin of the 802.3 frame message. Offset must either lay within the part of the 802.3 frame as stored
2369 * by hcf_service_nic in the lookahead buffer or be just behind it, i.e. the first byte not yet read.
2370 * When offset is within lookahead, data is copied from lookahead.
2371 * When offset is beyond lookahead, data is read directly from RxFS in NIC with disregard of the actual value
2372 * of offset
2373 *
2374 *.NOTICE:
2375 * o at entry: look ahead buffer as passed with hcf_service_nic is still accessible and unchanged
2376 * o at exit: Receive Frame in NIC memory is released
2377 *
2378 * Description:
2379 * Starting at the byte indicated by the Offset value, the bytes are copied from the Data Info
2380 * Part of the current Receive Frame Structure to the Host memory data buffer structure
2381 * identified by descp.
2382 * The maximum value for Offset is the number of characters of the 802.3 frame read into the
2383 * look ahead buffer by hcf_service_nic (i.e. the look ahead buffer size minus
2384 * Control and 802.11 fields)
2385 * If Offset is less than the maximum value, copying starts from the look ahead buffer till the
2386 * end of that buffer is reached
2387 * Then (or if the maximum value is specified for Offset), the
2388 * message is directly copied from NIC memory to Host memory.
2389 * If an invalid (i.e. too large) offset is specified, an assert catches but the buffer contents are
2390 * undefined.
2391 * Copying stops if either:
2392 * o the end of the 802.3 frame is reached
2393 * o the Descriptor with a NULL pointer in the next_desc_addr field is reached
2394 *
2395 * When the copying stops, the receiver is ack'ed, thus freeing the NIC memory where the frame is stored
2396 * As a consequence, hcf_rcv_msg can only be called once for any particular Rx frame.
2397 *
2398 * For the time being (PCI Bus mastering not yet supported), only the following fields of each
2399 * of the descriptors in the descriptor list must be set by the MSF:
2400 * o buf_cntl.buf_dim[1]
2401 * o *next_desc_addr
2402 * o *buf_addr
2403 * At return from hcf_rcv_msg, the field buf_cntl.buf_dim[0] of the used Descriptors reflects
2404 * the number of bytes in the buffer corresponding with the Descriptor.
2405 * On the last used Descriptor, buf_cntl.buf_dim[0] is less or equal to buf_cntl.buf_dim[1].
2406 * On all preceding Descriptors buf_cntl.buf_dim[0] is equal to buf_cntl.buf_dim[1].
2407 * On all succeeding (unused) Descriptors, buf_cntl.buf_dim[0] is zero.
2408 * Note: this I/F is based on the assumptions how the I/F needed for PCI Bus mastering will
2409 * be, so it may change.
2410 *
2411 * The most likely handling of HCF_ERR_NO_NIC by the MSF is to drop the already copied
2412 * data as elegantly as possible under the constraints and requirements posed by the (N)OS.
2413 * If no received Frame Structure is pending, "Success" rather than "Read error" is returned.
2414 * This error constitutes a logic flaw in the MSF
2415 * The HCF can only catch a minority of this
2416 * type of errors
2417 * Based on consistency ideas, the HCF catches none of these errors.
2418 *
2419 * Assert fails if
2420 * - ifbp has a recognizable out-of-range value
2421 * - there is no unacknowledged Rx-message available
2422 * - offset is out of range (outside look ahead buffer)
2423 * - descp is a NULL pointer
2424 * - any of the descriptors is not double word aligned
2425 * - reentrancy, may be caused by calling hcf_functions without adequate protection
2426 * against NIC interrupts or multi-threading.
2427 * - Interrupts are enabled.
2428 *
2429 *.DIAGRAM
2430 *
2431 *.NOTICE
2432 * - by using unsigned int as type for offset, no need to worry about negative offsets
2433 * - Asserting on being enabled/present is superfluous, since a non-zero IFB_lal implies that hcf_service_nic
2434 * was called and detected a Rx-message. A zero IFB_lal will set the BUF_CNT field of at least the first
2435 * descriptor to zero.
2436 *
2437 *.ENDDOC END DOCUMENTATION
2438 *
2439 ************************************************************************************************************/
2440 int
2441 hcf_rcv_msg( IFBP ifbp, DESC_STRCT *descp, unsigned int offset )
2442 {
2443 int rc = HCF_SUCCESS;
2444 wci_bufp cp; //char oriented working pointer
2445 hcf_16 i;
2446 int tot_len = ifbp->IFB_RxLen - offset; //total length
2447 wci_bufp lap = ifbp->IFB_lap + offset; //start address in LookAhead Buffer
2448 hcf_16 lal = ifbp->IFB_lal - offset; //available data within LookAhead Buffer
2449 hcf_16 j;
2450
2451 HCFLOGENTRY( HCF_TRACE_RCV_MSG, offset )
2452 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
2453 HCFASSERT_INT
2454 HCFASSERT( descp, HCF_TRACE_RCV_MSG )
2455 HCFASSERT( ifbp->IFB_RxLen, HCF_TRACE_RCV_MSG )
2456 HCFASSERT( ifbp->IFB_RxLen >= offset, MERGE_2( offset, ifbp->IFB_RxLen ) )
2457 HCFASSERT( ifbp->IFB_lal >= offset, offset )
2458 HCFASSERT( (ifbp->IFB_CntlOpt & USE_DMA) == 0, 0xDADA )
2459
2460 if ( tot_len < 0 ) {
2461 lal = 0; tot_len = 0; //suppress all copying activity in the do--while loop
2462 }
2463 do { //loop over all available fragments
2464 // obnoxious hcf.c(1480) : warning C4769: conversion of near pointer to long integer
2465 HCFASSERT( ((hcf_32)descp & 3 ) == 0, (hcf_32)descp )
2466 cp = descp->buf_addr;
2467 j = min( (hcf_16)tot_len, descp->BUF_SIZE ); //minimum of "what's` available" and fragment size
2468 descp->BUF_CNT = j;
2469 tot_len -= j; //adjust length still to go
2470 if ( lal ) { //if lookahead Buffer not yet completely copied
2471 i = min( lal, j ); //minimum of "what's available" in LookAhead and fragment size
2472 lal -= i; //adjust length still available in LookAhead
2473 j -= i; //adjust length still available in current fragment
2474 /*;? while loop could be improved by moving words but that is complicated on platforms with
2475 * alignment requirements*/
2476 while ( i-- ) *cp++ = *lap++;
2477 }
2478 if ( j ) { //if LookAhead Buffer exhausted but still space in fragment, copy directly from NIC RAM
2479 get_frag( ifbp, cp, j BE_PAR(0) );
2480 CALC_RX_MIC( cp, j );
2481 }
2482 } while ( ( descp = descp->next_desc_addr ) != NULL );
2483 #if (HCF_TYPE) & HCF_TYPE_WPA
2484 if ( ifbp->IFB_RxFID ) {
2485 rc = check_mic( ifbp ); //prevents MIC error report if hcf_service_nic already consumed all
2486 }
2487 #endif // HCF_TYPE_WPA
2488 (void)hcf_action( ifbp, HCF_ACT_RX_ACK ); //only 1 shot to get the data, so free the resources in the NIC
2489 HCFASSERT( rc == HCF_SUCCESS, rc )
2490 HCFLOGEXIT( HCF_TRACE_RCV_MSG )
2491 return rc;
2492 } // hcf_rcv_msg
2493 #endif // HCF_DL_ONLY
2494
2495
2496 #if (HCF_DL_ONLY) == 0
2497 /************************************************************************************************************
2498 *
2499 *.MODULE int hcf_send_msg( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
2500 *.PURPOSE Encapsulate a message and append padding and MIC.
2501 * non-USB: Transfers the resulting message from Host to NIC and initiates transmission.
2502 * USB: Transfer resulting message into a flat buffer.
2503 *
2504 *.ARGUMENTS
2505 * ifbp address of the Interface Block
2506 * descp pointer to the DescriptorList or NULL
2507 * tx_cntl indicates MAC-port and (Hermes) options
2508 * HFS_TX_CNTL_SPECTRALINK
2509 * HFS_TX_CNTL_PRIO
2510 * HFS_TX_CNTL_TX_OK
2511 * HFS_TX_CNTL_TX_EX
2512 * HFS_TX_CNTL_TX_DELAY
2513 * HFS_TX_CNTL_TX_CONT
2514 * HCF_PORT_0 MAC Port 0 (default)
2515 * HCF_PORT_1 (AP only) MAC Port 1
2516 * HCF_PORT_2 (AP only) MAC Port 2
2517 * HCF_PORT_3 (AP only) MAC Port 3
2518 * HCF_PORT_4 (AP only) MAC Port 4
2519 * HCF_PORT_5 (AP only) MAC Port 5
2520 * HCF_PORT_6 (AP only) MAC Port 6
2521 *
2522 *.RETURNS
2523 * HCF_SUCCESS
2524 * HCF_ERR_DEFUNCT_..
2525 * HCF_ERR_TIME_OUT
2526 *
2527 *.DESCRIPTION:
2528 * The Send Message Function embodies 2 functions:
2529 * o transfers a message (including MAC header) from the provided buffer structure in Host memory to the Transmit
2530 * Frame Structure (TxFS) in NIC memory.
2531 * o Issue a send command to the F/W to actually transmit the contents of the TxFS.
2532 *
2533 * Control is based on the Resource Indicator IFB_RscInd.
2534 * The Resource Indicator is maintained by the HCF and should only be interpreted but not changed by the MSF.
2535 * The MSF must check IFB_RscInd to be non-zero before executing the call to the Send Message Function.
2536 * When no resources are available, the MSF must handle the queuing of the Transmit frame and check the
2537 * Resource Indicator periodically after calling hcf_service_nic.
2538 *
2539 * The Send Message Functions transfers a message to NIC memory when it is called with a non-NULL descp.
2540 * Before the Send Message Function is invoked this way, the Resource Indicator (IFB_RscInd) must be checked.
2541 * If the Resource is not available, Send Message Function execution must be postponed until after processing of
2542 * a next hcf_service_nic it appears that the Resource has become available.
2543 * The message is copied from the buffer structure identified by descp to the NIC.
2544 * Copying stops if a NULL pointer in the next_desc_addr field is reached.
2545 * Hcf_send_msg does not check for transmit buffer overflow, because the F/W does this protection.
2546 * In case of a transmit buffer overflow, the surplus which does not fit in the buffer is simply dropped.
2547 *
2548 * The Send Message Function activates the F/W to actually send the message to the medium when the
2549 * HFS_TX_CNTL_TX_DELAY bit of the tx_cntl parameter is not set.
2550 * If the descp parameter of the current call is non-NULL, the message as represented by descp is send.
2551 * If the descp parameter of the current call is NULL, and if the preceding call of the Send Message Function had
2552 * a non-NULL descp and the preceding call had the HFS_TX_CNTL_TX_DELAY bit of tx_cntl set, then the message as
2553 * represented by the descp of the preceding call is send.
2554 *
2555 * Hcf_send_msg supports encapsulation (see HCF_ENCAP) of Ethernet-II frames.
2556 * An Ethernet-II frame is transferred to the Transmit Frame structure as an 802.3 frame.
2557 * Hcf_send_msg distinguishes between an 802.3 and an Ethernet-II frame by looking at the data length/type field
2558 * of the frame. If this field contains a value larger than 1514, the frame is considered to be an Ethernet-II
2559 * frame, otherwise it is treated as an 802.3 frame.
2560 * To ease implementation of the HCF, this type/type field must be located in the first descriptor structure,
2561 * i.e. the 1st fragment must have a size of at least 14 (to contain DestAddr, SrcAddr and Len/Type field).
2562 * An Ethernet-II frame is encapsulated by inserting a SNAP header between the addressing information and the
2563 * type field. This insertion is transparent for the MSF.
2564 * The HCF contains a fixed table that stores a number of types. If the value specified by the type/type field
2565 * occurs in this table, Bridge Tunnel Encapsulation is used, otherwise RFC1042 encapsulation is used.
2566 * Bridge Tunnel uses AA AA 03 00 00 F8 as SNAP header,
2567 * RFC1042 uses AA AA 03 00 00 00 as SNAP header.
2568 * The table currently contains:
2569 * 0 0x80F3 AppleTalk Address Resolution Protocol (AARP)
2570 * 0 0x8137 IPX
2571 *
2572 * The algorithm to distinguish between 802.3 and Ethernet-II frames limits the maximum length for frames of
2573 * 802.3 frames to 1514 bytes.
2574 * Encapsulation can be suppressed by means of the system constant HCF_ENCAP, e.g. to support proprietary
2575 * protocols with 802.3 like frames with a size larger than 1514 bytes.
2576 *
2577 * In case the HCF encapsulates the frame, the number of bytes that is actually transmitted is determined by the
2578 * cumulative value of the buf_cntl.buf_dim[0] fields.
2579 * In case the HCF does not encapsulate the frame, the number of bytes that is actually transmitted is not
2580 * determined by the cumulative value of the buf_cntl.buf_dim[DESC_CNTL_CNT] fields of the desc_strct's but by
2581 * the Length field of the 802.3 frame.
2582 * If there is a conflict between the cumulative value of the buf_cntl.buf_dim[0] fields and the
2583 * 802.3 Length field the 802.3 Length field determines the number of bytes actually transmitted by the NIC while
2584 * the cumulative value of the buf_cntl.buf_dim[0] fields determines the position of the MIC, hence a mismatch
2585 * will result in MIC errors on the Receiving side.
2586 * Currently this problem is flagged on the Transmit side by an Assert.
2587 * The following fields of each of the descriptors in the descriptor list must be set by the MSF:
2588 * o buf_cntl.buf_dim[0]
2589 * o *next_desc_addr
2590 * o *buf_addr
2591 *
2592 * All bits of the tx_cntl parameter except HFS_TX_CNTL_TX_DELAY and the HCF_PORT# bits are passed to the F/W via
2593 * the HFS_TX_CNTL field of the TxFS.
2594 *
2595 * Note that hcf_send_msg does not detect NIC absence. The MSF is supposed to have its own -platform dependent-
2596 * way to recognize card removal/insertion.
2597 * The total system must be robust against card removal and there is no principal difference between card removal
2598 * just after hcf_send_msg returns but before the actual transmission took place or sometime earlier.
2599 *
2600 * Assert fails if
2601 * - ifbp has a recognizable out-of-range value
2602 * - descp is a NULL pointer
2603 * - no resources for PIF available.
2604 * - Interrupts are enabled.
2605 * - reentrancy, may be caused by calling hcf_functions without adequate protection
2606 * against NIC interrupts or multi-threading.
2607 *
2608 *.DIAGRAM
2609 *4: for the normal case (i.e. no HFS_TX_CNTL_TX_DELAY option active), a fid is acquired via the
2610 * routine get_fid. If no FID is acquired, the remainder is skipped without an error notification. After
2611 * all, the MSF is not supposed to call hcf_send_msg when no Resource is available.
2612 *7: The ControlField of the TxFS is written. Since put_frag can only return the fatal Defunct or "No NIC", the
2613 * return status can be ignored because when it fails, cmd_wait will fail as well. (see also the note on the
2614 * need for a return code below).
2615 * Note that HFS_TX_CNTL has different values for H-I, H-I/SSN and H-II and HFS_ADDR_DEST has different
2616 * values for H-I (regardless of SSN) and H-II.
2617 * By writing 17, 1 or 2 ( implying 16, 0 or 1 garbage word after HFS_TX_CNTL) the BAP just gets to
2618 * HFS_ADDR_DEST for H-I, H-I/SSN and H-II respectively.
2619 *10: if neither encapsulation nor MIC calculation is needed, splitting the first fragment in two does not
2620 * really help but it makes the flow easier to follow to do not optimize on this difference
2621 *
2622 * hcf_send_msg checks whether the frame is an Ethernet-II rather than an "official" 802.3 frame.
2623 * The E-II check is based on the length/type field in the MAC header. If this field has a value larger than
2624 * 1500, E-II is assumed. The implementation of this test fails if the length/type field is not in the first
2625 * descriptor. If E-II is recognized, a SNAP header is inserted. This SNAP header represents either RFC1042
2626 * or Bridge-Tunnel encapsulation, depending on the return status of the support routine hcf_encap.
2627 *
2628 *.NOTICE
2629 * hcf_send_msg leaves the responsibility to only send messages on enabled ports at the MSF level.
2630 * This is considered the strategy which is sufficiently adequate for all "robust" MSFs, have the least
2631 * processor utilization and being still acceptable robust at the WCI !!!!!
2632 *
2633 * hcf_send_msg does not NEED a return value to report NIC absence or removal during the execution of
2634 * hcf_send_msg(), because the MSF and higher layers must be able to cope anyway with the NIC being removed
2635 * after a successful completion of hcf_send_msg() but before the actual transmission took place.
2636 * To accommodate user expectations the current implementation does report NIC absence.
2637 * Defunct blocks all NIC access and will (also) be reported on a number of other calls.
2638 *
2639 * hcf_send_msg does not check for transmit buffer overflow because the Hermes does this protection.
2640 * In case of a transmit buffer overflow, the surplus which does not fit in the buffer is simply dropped.
2641 * Note that this possibly results in the transmission of incomplete frames.
2642 *
2643 * After some deliberation with F/W team, it is decided that - being in the twilight zone of not knowing
2644 * whether the problem at hand is an MSF bug, HCF buf, F/W bug, H/W malfunction or even something else - there
2645 * is no "best thing to do" in case of a failing send, hence the HCF considers the TxFID ownership to be taken
2646 * over by the F/W and hopes for an Allocate event in due time
2647 *
2648 *.ENDDOC END DOCUMENTATION
2649 *
2650 ************************************************************************************************************/
2651 int
2652 hcf_send_msg( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
2653 {
2654 int rc = HCF_SUCCESS;
2655 DESC_STRCT *p /* = descp*/; //working pointer
2656 hcf_16 len; // total byte count
2657 hcf_16 i;
2658
2659 hcf_16 fid = 0;
2660
2661 HCFASSERT( ifbp->IFB_RscInd || descp == NULL, ifbp->IFB_RscInd )
2662 HCFASSERT( (ifbp->IFB_CntlOpt & USE_DMA) == 0, 0xDADB )
2663
2664 HCFLOGENTRY( HCF_TRACE_SEND_MSG, tx_cntl )
2665 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
2666 HCFASSERT_INT
2667 /* obnoxious c:/hcf/hcf.c(1480) : warning C4769: conversion of near pointer to long integer,
2668 * so skip */
2669 HCFASSERT( ((hcf_32)descp & 3 ) == 0, (hcf_32)descp )
2670 #if HCF_ASSERT
2671 { int x = ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ? tx_cntl & ~HFS_TX_CNTL_PORT : tx_cntl;
2672 HCFASSERT( (x & ~HCF_TX_CNTL_MASK ) == 0, tx_cntl )
2673 }
2674 #endif // HCF_ASSERT
2675
2676 if ( descp ) ifbp->IFB_TxFID = 0; //cancel a pre-put message
2677
2678 #if (HCF_EXT) & HCF_EXT_TX_CONT // Continuous transmit test
2679 if ( tx_cntl == HFS_TX_CNTL_TX_CONT ) {
2680 fid = get_fid(ifbp);
2681 if (fid != 0 ) {
2682 //setup BAP to begin of TxFS
2683 (void)setup_bap( ifbp, fid, 0, IO_OUT );
2684 //copy all the fragments in a transparent fashion
2685 for ( p = descp; p; p = p->next_desc_addr ) {
2686 /* obnoxious warning C4769: conversion of near pointer to long integer */
2687 HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p )
2688 put_frag( ifbp, p->buf_addr, p->BUF_CNT BE_PAR(0) );
2689 }
2690 rc = cmd_exe( ifbp, HCMD_THESEUS | HCMD_BUSY | HCMD_STARTPREAMBLE, fid );
2691 if ( ifbp->IFB_RscInd == 0 ) {
2692 ifbp->IFB_RscInd = get_fid( ifbp );
2693 }
2694 }
2695 // een slecht voorbeeld doet goed volgen ;?
2696 HCFLOGEXIT( HCF_TRACE_SEND_MSG )
2697 return rc;
2698 }
2699 #endif // HCF_EXT_TX_CONT
2700 /* the following initialization code is redundant for a pre-put message
2701 * but moving it inside the "if fid" logic makes the merging with the
2702 * USB flow awkward
2703 */
2704 #if (HCF_TYPE) & HCF_TYPE_WPA
2705 tx_cntl |= ifbp->IFB_MICTxCntl;
2706 #endif // HCF_TYPE_WPA
2707 fid = ifbp->IFB_TxFID;
2708 if (fid == 0 && ( fid = get_fid( ifbp ) ) != 0 ) /* 4 */
2709 /* skip the next compound statement if:
2710 - pre-put message or
2711 - no fid available (which should never occur if the MSF adheres to the WCI)
2712 */
2713 { // to match the closing curly bracket of above "if" in case of HCF_TYPE_USB
2714 //calculate total length ;? superfluous unless CCX or Encapsulation
2715 len = 0;
2716 p = descp;
2717 do len += p->BUF_CNT; while ( ( p = p->next_desc_addr ) != NULL );
2718 p = descp;
2719 //;? HCFASSERT( len <= HCF_MAX_MSG, len )
2720 /*7*/ (void)setup_bap( ifbp, fid, HFS_TX_CNTL, IO_OUT );
2721 #if (HCF_TYPE) & HCF_TYPE_TX_DELAY
2722 HCFASSERT( ( descp != NULL ) ^ ( tx_cntl & HFS_TX_CNTL_TX_DELAY ), tx_cntl )
2723 if ( tx_cntl & HFS_TX_CNTL_TX_DELAY ) {
2724 tx_cntl &= ~HFS_TX_CNTL_TX_DELAY; //!!HFS_TX_CNTL_TX_DELAY no longer available
2725 ifbp->IFB_TxFID = fid;
2726 fid = 0; //!!fid no longer available, be careful when modifying code
2727 }
2728 #endif // HCF_TYPE_TX_DELAY
2729 OPW( HREG_DATA_1, tx_cntl ) ;
2730 OPW( HREG_DATA_1, 0 );
2731 #if ! ( (HCF_TYPE) & HCF_TYPE_CCX )
2732 HCFASSERT( p->BUF_CNT >= 14, p->BUF_CNT )
2733 /* assume DestAddr/SrcAddr/Len/Type ALWAYS contained in 1st fragment
2734 * otherwise life gets too cumbersome for MIC and Encapsulation !!!!!!!!
2735 if ( p->BUF_CNT >= 14 ) { alternatively: add a safety escape !!!!!!!!!!!! } */
2736 #endif // HCF_TYPE_CCX
2737 CALC_TX_MIC( NULL, -1 ); //initialize MIC
2738 /*10*/ put_frag( ifbp, p->buf_addr, HCF_DASA_SIZE BE_PAR(0) ); //write DA, SA with MIC calculation
2739 CALC_TX_MIC( p->buf_addr, HCF_DASA_SIZE ); //MIC over DA, SA
2740 CALC_TX_MIC( null_addr, 4 ); //MIC over (virtual) priority field
2741 #if (HCF_TYPE) & HCF_TYPE_CCX
2742 //!!be careful do not use positive test on HCF_ACT_CCX_OFF, because IFB_CKIPStat is initially 0
2743 if(( ifbp->IFB_CKIPStat == HCF_ACT_CCX_ON ) ||
2744 ((GET_BUF_CNT(p) >= 20 ) && ( ifbp->IFB_CKIPStat == HCF_ACT_CCX_OFF ) &&
2745 (p->buf_addr[12] == 0xAA) && (p->buf_addr[13] == 0xAA) &&
2746 (p->buf_addr[14] == 0x03) && (p->buf_addr[15] == 0x00) &&
2747 (p->buf_addr[16] == 0x40) && (p->buf_addr[17] == 0x96) &&
2748 (p->buf_addr[18] == 0x00) && (p->buf_addr[19] == 0x00)))
2749 {
2750 i = HCF_DASA_SIZE;
2751
2752 OPW( HREG_DATA_1, CNV_SHORT_TO_BIG( len - i ));
2753
2754 /* need to send out the remainder of the fragment */
2755 put_frag( ifbp, &p->buf_addr[i], GET_BUF_CNT(p) - i BE_PAR(0) );
2756 }
2757 else
2758 #endif // HCF_TYPE_CCX
2759 {
2760 //if encapsulation needed
2761 #if (HCF_ENCAP) == HCF_ENC
2762 //write length (with SNAP-header,Type, without //DA,SA,Length ) no MIC calc.
2763 if ( ( snap_header[sizeof(snap_header)-1] = hcf_encap( &p->buf_addr[HCF_DASA_SIZE] ) ) != ENC_NONE ) {
2764 OPW( HREG_DATA_1, CNV_END_SHORT( len + (sizeof(snap_header) + 2) - ( 2*6 + 2 ) ) );
2765 //write splice with MIC calculation
2766 put_frag( ifbp, snap_header, sizeof(snap_header) BE_PAR(0) );
2767 CALC_TX_MIC( snap_header, sizeof(snap_header) ); //MIC over 6 byte SNAP
2768 i = HCF_DASA_SIZE;
2769 } else
2770 #endif // HCF_ENC
2771 {
2772 OPW( HREG_DATA_1, *(wci_recordp)&p->buf_addr[HCF_DASA_SIZE] );
2773 i = 14;
2774 }
2775 //complete 1st fragment starting with Type with MIC calculation
2776 put_frag( ifbp, &p->buf_addr[i], p->BUF_CNT - i BE_PAR(0) );
2777 CALC_TX_MIC( &p->buf_addr[i], p->BUF_CNT - i );
2778 }
2779 //do the remaining fragments with MIC calculation
2780 while ( ( p = p->next_desc_addr ) != NULL ) {
2781 /* obnoxious c:/hcf/hcf.c(1480) : warning C4769: conversion of near pointer to long integer,
2782 * so skip */
2783 HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p )
2784 put_frag( ifbp, p->buf_addr, p->BUF_CNT BE_PAR(0) );
2785 CALC_TX_MIC( p->buf_addr, p->BUF_CNT );
2786 }
2787 //pad message, finalize MIC calculation and write MIC to NIC
2788 put_frag_finalize( ifbp );
2789 }
2790 if ( fid ) {
2791 /*16*/ rc = cmd_exe( ifbp, HCMD_BUSY | HCMD_TX | HCMD_RECL, fid );
2792 ifbp->IFB_TxFID = 0;
2793 /* probably this (i.e. no RscInd AND "HREG_EV_ALLOC") at this point in time occurs so infrequent,
2794 * that it might just as well be acceptable to skip this
2795 * "optimization" code and handle that additional interrupt once in a while
2796 */
2797 // 180 degree error in logic ;? #if ALLOC_15
2798 /*20*/ if ( ifbp->IFB_RscInd == 0 ) {
2799 ifbp->IFB_RscInd = get_fid( ifbp );
2800 }
2801 // #endif // ALLOC_15
2802 }
2803 // HCFASSERT( level::ifbp->IFB_RscInd, ifbp->IFB_RscInd )
2804 HCFLOGEXIT( HCF_TRACE_SEND_MSG )
2805 return rc;
2806 } // hcf_send_msg
2807 #endif // HCF_DL_ONLY
2808
2809
2810 #if (HCF_DL_ONLY) == 0
2811 /************************************************************************************************************
2812 *
2813 *.MODULE int hcf_service_nic( IFBP ifbp, wci_bufp bufp, unsigned int len )
2814 *.PURPOSE Services (most) NIC events.
2815 * Provides received message
2816 * Provides status information.
2817 *
2818 *.ARGUMENTS
2819 * ifbp address of the Interface Block
2820 * In non-DMA mode:
2821 * bufp address of char buffer, sufficiently large to hold the first part of the RxFS up through HFS_TYPE
2822 * len length in bytes of buffer specified by bufp
2823 * value between HFS_TYPE + 2 and HFS_ADDR_DEST + HCF_MAX_MSG
2824 *
2825 *.RETURNS
2826 * HCF_SUCCESS
2827 * HCF_ERR_MIC message contains an erroneous MIC (only if frame fits completely in bufp)
2828 *
2829 *.DESCRIPTION
2830 *
2831 * MSF-accessible fields of Result Block
2832 * - IFB_RxLen 0 or Frame size.
2833 * - IFB_MBInfoLen 0 or the L-field of the oldest MBIB.
2834 * - IFB_RscInd
2835 * - IFB_HCF_Tallies updated if a corresponding event occurred.
2836 * - IFB_NIC_Tallies updated if a Tally Info frame received from the NIC.
2837 * - IFB_DmaPackets
2838 * - IFB_TxFsStat
2839 * - IFB_TxFsSwSup
2840 * - IFB_LinkStat reflects new link status or 0x0000 if no change relative to previous hcf_service_nic call.
2841 or
2842 * - IFB_LinkStat link status, 0x8000 reflects change relative to previous hcf_service_nic call.
2843 *
2844 * When IFB_MBInfoLen is non-zero, at least one MBIB is available.
2845 *
2846 * IFB_RxLen reflects the number of received bytes in 802.3 view (Including DestAddr, SrcAddr and Length,
2847 * excluding MIC-padding, MIC and sum check) of active Rx Frame Structure. If no Rx Data s available, IFB_RxLen
2848 * equals 0x0000.
2849 * Repeated execution causes the Service NIC Function to provide information about subsequently received
2850 * messages, irrespective whether a hcf_rcv_msg or hcf_action(HCF_ACT_RX) is performed in between.
2851 *
2852 * When IFB_RxLen is non-zero, a Received Frame Structure is available to be routed to the protocol stack.
2853 * When Monitor Mode is not active, this is guaranteed to be an error-free non-WMP frame.
2854 * In case of Monitor Mode, it may also be a frame with an error or a WMP frame.
2855 * Erroneous frames have a non-zero error-sub field in the HFS_STAT field in the look ahead buffer.
2856 *
2857 * If a Receive message is available in NIC RAM, the Receive Frame Structure is (partly) copied from the NIC to
2858 * the buffer identified by bufp.
2859 * Copying stops either after len bytes or when the complete 802.3 frame is copied.
2860 * During the copying the message is decapsulated (if appropriate).
2861 * If the frame is read completely by hcf_service_nic (i.e. the frame fits completely in the lookahead buffer),
2862 * the frame is automatically ACK'ed to the F/W and still available via the look ahead buffer and hcf_rcv_msg.
2863 * Only if the frame is read completely by hcf_service_nic, hcf_service_nic checks the MIC and sets the return
2864 * status accordingly. In this case, hcf_rcv_msg does not check the MIC.
2865 *
2866 * The MIC calculation algorithm works more efficient if the length of the look ahead buffer is
2867 * such that it fits exactly 4 n bytes of the 802.3 frame, i.e. len == HFS_ADDR_DEST + 4*n.
2868 *
2869 * The Service NIC Function supports the NIC event service handling process.
2870 * It performs the appropriate actions to service the NIC, such that the event cause is eliminated and related
2871 * information is saved.
2872 * The Service NIC Function is executed by the MSF ISR or polling routine as first step to determine the event
2873 * cause(s). It is the responsibility of the MSF to perform all not directly NIC related interrupt service
2874 * actions, e.g. in a PC environment this includes servicing the PIC, and managing the Processor Interrupt
2875 * Enabling/Disabling.
2876 * In case of a polled based system, the Service NIC Function must be executed "frequently".
2877 * The Service NIC Function may have side effects related to the Mailbox and Resource Indicator (IFB_RscInd).
2878 *
2879 * hcf_service_nic returns:
2880 * - The length of the data in the available MBIB (IFB_MBInfoLen)
2881 * - Changes in the link status (IFB_LinkStat)
2882 * - The length of the data in the available Receive Frame Structure (IFB_RxLen)
2883 * - updated IFB_RscInd
2884 * - Updated Tallies
2885 *
2886 * hcf_service_nic is presumed to neither interrupt other HCF-tasks nor to be interrupted by other HCF-tasks.
2887 * A way to achieve this is to precede hcf_service_nic as well as all other HCF-tasks with a call to
2888 * hcf_action to disable the card interrupts and, after all work is completed, with a call to hcf_action to
2889 * restore (which is not necessarily the same as enabling) the card interrupts.
2890 * In case of a polled environment, it is assumed that the MSF programmer is sufficiently familiar with the
2891 * specific requirements of that environment to translate the interrupt strategy to a polled strategy.
2892 *
2893 * hcf_service_nic services the following Hermes events:
2894 * - HREG_EV_INFO Asynchronous Information Frame
2895 * - HREG_EV_INFO_DROP WMAC did not have sufficient RAM to build Unsolicited Information Frame
2896 * - HREG_EV_TX_EXC (if applicable, i.e. selected via HCF_EXT_INT_TX_EX bit of HCF_EXT)
2897 * - HREG_EV_SLEEP_REQ (if applicable, i.e. selected via HCF_DDS/HCF_CDS bit of HCF_SLEEP)
2898 * ** in non_DMA mode
2899 * - HREG_EV_ALLOC Asynchronous part of Allocation/Reclaim completed while out of resources at
2900 * completion of hcf_send_msg/notify
2901 * - HREG_EV_RX the detection of the availability of received messages
2902 * including WaveLAN Management Protocol (WMP) message processing
2903 * ** in DMA mode
2904 * - HREG_EV_RDMAD
2905 * - HREG_EV_TDMAD
2906 *!! hcf_service_nic does not service the following Hermes events:
2907 *!! HREG_EV_TX (the "OK" Tx Event) is no longer supported by the WCI, if it occurs it is unclear
2908 *!! what the cause is, so no meaningful strategy is available. Not acking the bit is
2909 *!! probably the best help that can be given to the debugger.
2910 *!! HREG_EV_CMD handled in cmd_wait.
2911 *!! HREG_EV_FW_DMA (i.e. HREG_EV_RXDMA, HREG_EV_TXDMA and_EV_LPESC) are either not used or used
2912 *!! between the F/W and the DMA engine.
2913 *!! HREG_EV_ACK_REG_READY is only applicable for H-II (i.e. not HII.5 and up, see DAWA)
2914 *
2915 * If, in non-DMA mode, a Rx message is available, its length is reflected by the IFB_RxLen field of the IFB.
2916 * This length reflects the data itself and the Destination Address, Source Address and DataLength/Type field
2917 * but not the SNAP-header in case of decapsulation by the HCF. If no message is available, IFB_RxLen is
2918 * zero. Former versions of the HCF handled WMP messages and supported a "monitor" mode in hcf_service_nic,
2919 * which deposited certain or all Rx messages in the MailBox. The responsibility to handle these frames is
2920 * moved to the MSF. The HCF offers as supports hcf_put_info with CFG_MB_INFO as parameter to emulate the old
2921 * implementation under control of the MSF.
2922 *
2923 * **Rx Buffer free strategy
2924 * When hcf_service_nic reports the availability of a non-DMA message, the MSF can access that message by
2925 * means of hcf_rcv_msg. It must be prevented that the LAN Controller writes new data in the NIC buffer
2926 * before the MSF is finished with the current message. The NIC buffer is returned to the LAN Controller
2927 * when:
2928 * - the complete frame fits in the lookahead buffer or
2929 * - hcf_rcv_msg is called or
2930 * - hcf_action with HCF_ACT_RX is called or
2931 * - hcf_service_nic is called again
2932 * It can be reasoned that hcf_action( INT_ON ) should not be given before the MSF has completely processed
2933 * a reported Rx-frame. The reason is that the INT_ON action is guaranteed to cause a (Rx-)interrupt (the
2934 * MSF is processing a Rx-frame, hence the Rx-event bit in the Hermes register must be active). This
2935 * interrupt will cause hcf_service_nic to be called, which will cause the ack-ing of the "last" Rx-event
2936 * to the Hermes, causing the Hermes to discard the associated NIC RAM buffer.
2937 * Assert fails if
2938 * - ifbp is zero or other recognizable out-of-range value.
2939 * - hcf_service_nic is called without a prior call to hcf_connect.
2940 * - interrupts are enabled.
2941 * - reentrancy, may be caused by calling hcf_functions without adequate protection
2942 * against NIC interrupts or multi-threading.
2943 *
2944 *
2945 *.DIAGRAM
2946 *1: IFB_LinkStat is cleared, if a LinkStatus frame is received, IFB_LinkStat will be updated accordingly
2947 * by isr_info.
2948 or
2949 *1: IFB_LinkStat change indication is cleared. If a LinkStatus frame is received, IFB_LinkStat will be updated
2950 * accordingly by isr_info.
2951 *2: IFB_RxLen must be cleared before the NIC presence check otherwise:
2952 * - this value may stay non-zero if the NIC is pulled out at an inconvenient moment.
2953 * - the RxAck on a zero-FID needs a zero-value for IFB_RxLen to work
2954 * Note that as side-effect of the hcf_action call, the remainder of Rx related info is re-initialized as
2955 * well.
2956 *4: In case of Defunct mode, the information supplied by Hermes is unreliable, so the body of
2957 * hcf_service_nic is skipped. Since hcf_cntl turns into a NOP if Primary or Station F/W is incompatible,
2958 * hcf_service_nic is also skipped in those cases.
2959 * To prevent that hcf_service_nic reports bogus information to the MSF with all - possibly difficult to
2960 * debug - undesirable side effects, it is paramount to check the NIC presence. In former days the presence
2961 * test was based on the Hermes register HREG_SW_0. Since in HCF_ACT_INT_OFF is chosen for strategy based on
2962 * HREG_EV_STAT, this is now also used in hcf_service_nic. The motivation to change strategy is partly
2963 * due to inconsistent F/W implementations with respect to HREG_SW_0 manipulation around reset and download.
2964 * Note that in polled environments Card Removal is not detected by INT_OFF which makes the check in
2965 * hcf_service_nic even more important.
2966 *8: The event status register of the Hermes is sampled
2967 * The assert checks for unexpected events ;?????????????????????????????????????.
2968 * - HREG_EV_INFO_DROP is explicitly excluded from the acceptable HREG_EV_STAT bits because it indicates
2969 * a too heavily loaded system.
2970 * - HREG_EV_ACK_REG_READY is 0x0000 for H-I (and hopefully H-II.5)
2971 *
2972 *
2973 * HREG_EV_TX_EXC is accepted (via HREG_EV_TX_EXT) if and only if HCF_EXT_INT_TX_EX set in the HCF_EXT
2974 * definition at compile time.
2975 * The following activities are handled:
2976 * - Alloc events are handled by hcf_send_msg (and notify). Only if there is no "spare" resource, the
2977 * alloc event is superficially serviced by hcf_service_nic to create a pseudo-resource with value
2978 * 0x001. This value is recognized by get_fid (called by hcf_send_msg and notify) where the real
2979 * TxFid is retrieved and the Hermes is acked and - hopefully - the "normal" case with a spare TxFid
2980 * in IFB_RscInd is restored.
2981 * - Info drop events are handled by incrementing a tally
2982 * - LinkEvent (including solicited and unsolicited tallies) are handled by procedure isr_info.
2983 * - TxEx (if selected at compile time) is handled by copying the significant part of the TxFS
2984 * into the IFB for further processing by the MSF.
2985 * Note the complication of the zero-FID protection sub-scheme in DAWA.
2986 * Note, the Ack of all of above events is handled at the end of hcf_service_nic
2987 *16: In case of non-DMA ( either not compiled in or due to a run-time choice):
2988 * If an Rx-frame is available, first the FID of that frame is read, including the complication of the
2989 * zero-FID protection sub-scheme in DAWA. Note that such a zero-FID is acknowledged at the end of
2990 * hcf_service_nic and that this depends on the IFB_RxLen initialization in the begin of hcf_service_nic.
2991 * The Assert validates the HCF assumption about Hermes implementation upon which the range of
2992 * Pseudo-RIDs is based.
2993 * Then the control fields up to the start of the 802.3 frame are read from the NIC into the lookahead buffer.
2994 * The status field is converted to native Endianess.
2995 * The length is, after implicit Endianess conversion if needed, and adjustment for the 14 bytes of the
2996 * 802.3 MAC header, stored in IFB_RxLen.
2997 * In MAC Monitor mode, 802.11 control frames with a TOTAL length of 14 are received, so without this
2998 * length adjustment, IFB_RxLen could not be used to distinguish these frames from "no frame".
2999 * No MIC calculation processes are associated with the reading of these Control fields.
3000 *26: This length test feels like superfluous robustness against malformed frames, but it turned out to be
3001 * needed in the real (hostile) world.
3002 * The decapsulation check needs sufficient data to represent DA, SA, L, SNAP and Type which amounts to
3003 * 22 bytes. In MAC Monitor mode, 802.11 control frames with a smaller length are received. To prevent
3004 * that the implementation goes haywire, a check on the length is needed.
3005 * The actual decapsulation takes place on the fly in the copying process by overwriting the SNAP header.
3006 * Note that in case of decapsulation the SNAP header is not passed to the MSF, hence IFB_RxLen must be
3007 * compensated for the SNAP header length.
3008 * The 22 bytes needed for decapsulation are (more than) sufficient for the exceptional handling of the
3009 * MIC algorithm of the L-field (replacing the 2 byte L-field with 4 0x00 bytes).
3010 *30: The 12 in the no-SSN branch corresponds with the get_frag, the 2 with the IPW of the SSN branch
3011 *32: If Hermes reported MIC-presence, than the MIC engine is initialized with the non-dummy MIC calculation
3012 * routine address and appropriate key.
3013 *34: The 8 bytes after the DA, SA, L are read and it is checked whether decapsulation is needed i.e.:
3014 * - the Hermes reported Tunnel encapsulation or
3015 * - the Hermes reported 1042 Encapsulation and hcf_encap reports that the HCF would not have used
3016 * 1042 as the encapsulation mechanism
3017 * Note that the first field of the RxFS in bufp has Native Endianess due to the conversion done by the
3018 * BE_PAR in get_frag.
3019 *36: The Type field is the only word kept (after moving) of the just read 8 bytes, it is moved to the
3020 * L-field. The original L-field and 6 byte SNAP header are discarded, so IFB_RxLen and buf_addr must
3021 * be adjusted by 8.
3022 *40: Determine how much of the frame (starting with DA) fits in the Lookahead buffer, then read the not-yet
3023 * read data into the lookahead buffer.
3024 * If the lookahead buffer contains the complete message, check the MIC. The majority considered this
3025 * I/F more appropriate then have the MSF call hcf_get_data only to check the MIC.
3026 *44: Since the complete message is copied from NIC RAM to PC RAM, the Rx can be acknowledged to the Hermes
3027 * to optimize the flow ( a better chance to get new Rx data in the next pass through hcf_service_nic ).
3028 * This acknowledgement can not be done via hcf_action( HCF_ACT_RX_ACK ) because this also clears
3029 * IFB_RxLEN thus corrupting the I/F to the MSF.
3030 *;?: In case of DMA (compiled in and activated):
3031
3032
3033 *54: Limiting the number of places where the F/W is acked (e.g. the merging of the Rx-ACK with the other
3034 * ACKs), is supposed to diminish the potential of race conditions in the F/W.
3035 * Note 1: The CMD event is acknowledged in cmd_cmpl
3036 * Note 2: HREG_EV_ACK_REG_READY is 0x0000 for H-I (and hopefully H-II.5)
3037 * Note 3: The ALLOC event is acknowledged in get_fid (except for the initialization flow)
3038 *
3039 *.NOTICE
3040 * The Non-DMA HREG_EV_RX is handled different compared with the other F/W events.
3041 * The HREG_EV_RX event is acknowledged by the first hcf_service_nic call after the
3042 * hcf_service_nic call that reported the occurrence of this event.
3043 * This acknowledgment
3044 * makes the next Receive Frame Structure (if any) available.
3045 * An updated IFB_RxLen
3046 * field reflects this availability.
3047 *
3048 *.NOTICE
3049 * The minimum size for Len must supply space for:
3050 * - an F/W dependent number of bytes of Control Info field including the 802.11 Header field
3051 * - Destination Address
3052 * - Source Address
3053 * - Length field
3054 * - [ SNAP Header]
3055 * - [ Ethernet-II Type]
3056 * This results in 68 for Hermes-I and 80 for Hermes-II
3057 * This way the minimum amount of information is available needed by the HCF to determine whether the frame
3058 * must be decapsulated.
3059 *.ENDDOC END DOCUMENTATION
3060 *
3061 ************************************************************************************************************/
3062 int
3063 hcf_service_nic( IFBP ifbp, wci_bufp bufp, unsigned int len )
3064 {
3065
3066 int rc = HCF_SUCCESS;
3067 hcf_16 stat;
3068 wci_bufp buf_addr;
3069 hcf_16 i;
3070
3071 HCFLOGENTRY( HCF_TRACE_SERVICE_NIC, ifbp->IFB_IntOffCnt )
3072 HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
3073 HCFASSERT_INT
3074
3075 ifbp->IFB_LinkStat = 0; // ;? to be obsoleted ASAP /* 1*/
3076 ifbp->IFB_DSLinkStat &= ~CFG_LINK_STAT_CHANGE; /* 1*/
3077 (void)hcf_action( ifbp, HCF_ACT_RX_ACK ); /* 2*/
3078 if ( ifbp->IFB_CardStat == 0 && ( stat = IPW( HREG_EV_STAT ) ) != 0xFFFF ) { /* 4*/
3079 /* IF_NOT_DMA( HCFASSERT( !( stat & ~HREG_EV_BASIC_MASK, stat ) )
3080 * IF_NOT_USE_DMA( HCFASSERT( !( stat & ~HREG_EV_BASIC_MASK, stat ) )
3081 * IF_USE_DMA( HCFASSERT( !( stat & ~( HREG_EV_BASIC_MASK ^ ( HREG_EV_...DMA.... ), stat ) )
3082 */
3083 /* 8*/
3084 if ( ifbp->IFB_RscInd == 0 && stat & HREG_EV_ALLOC ) { //Note: IFB_RscInd is ALWAYS 1 for DMA
3085 ifbp->IFB_RscInd = 1;
3086 }
3087 IF_TALLY( if ( stat & HREG_EV_INFO_DROP ) ifbp->IFB_HCF_Tallies.NoBufInfo++; )
3088 #if (HCF_EXT) & HCF_EXT_INT_TICK
3089 if ( stat & HREG_EV_TICK ) {
3090 ifbp->IFB_TickCnt++;
3091 }
3092 #if 0 // (HCF_SLEEP) & HCF_DDS
3093 if ( ifbp->IFB_TickCnt == 3 && ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_CONNECTED ) == 0 ) {
3094 CFG_DDS_TICK_TIME_STRCT ltv;
3095 // 2 second period (with 1 tick uncertanty) in not-connected mode -->go into DS_OOR
3096 hcf_action( ifbp, HCF_ACT_SLEEP );
3097 ifbp->IFB_DSLinkStat |= CFG_LINK_STAT_DS_OOR; //set OutOfRange
3098 ltv.len = 2;
3099 ltv.typ = CFG_DDS_TICK_TIME;
3100 ltv.tick_time = ( ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_TIMER ) + 0x10 ) *64; //78 is more right
3101 hcf_put_info( ifbp, (LTVP)&ltv );
3102 printk( "<5>Preparing for sleep, link_status: %04X, timer : %d\n",
3103 ifbp->IFB_DSLinkStat, ltv.tick_time );//;?remove me 1 day
3104 ifbp->IFB_TickCnt++; //;?just to make sure we do not keep on printing above message
3105 if ( ltv.tick_time < 300 * 125 ) ifbp->IFB_DSLinkStat += 0x0010;
3106
3107 }
3108 #endif // HCF_DDS
3109 #endif // HCF_EXT_INT_TICK
3110 if ( stat & HREG_EV_INFO ) {
3111 isr_info( ifbp );
3112 }
3113 #if (HCF_EXT) & HCF_EXT_INT_TX_EX
3114 if ( stat & HREG_EV_TX_EXT && ( i = IPW( HREG_TX_COMPL_FID ) ) != 0 /*DAWA*/ ) {
3115 DAWA_ZERO_FID( HREG_TX_COMPL_FID )
3116 (void)setup_bap( ifbp, i, 0, IO_IN );
3117 get_frag( ifbp, &ifbp->IFB_TxFsStat, HFS_SWSUP BE_PAR(1) );
3118 }
3119 #endif // HCF_EXT_INT_TX_EX
3120 //!rlav DMA engine will handle the rx event, not the driver
3121 #if HCF_DMA
3122 if ( !( ifbp->IFB_CntlOpt & USE_DMA ) ) //!! be aware of the logical indentations
3123 #endif // HCF_DMA
3124 /*16*/ if ( stat & HREG_EV_RX && ( ifbp->IFB_RxFID = IPW( HREG_RX_FID ) ) != 0 ) { //if 0 then DAWA_ACK
3125 HCFASSERT( bufp, len )
3126 HCFASSERT( len >= HFS_DAT + 2, len )
3127 DAWA_ZERO_FID( HREG_RX_FID )
3128 HCFASSERT( ifbp->IFB_RxFID < CFG_PROD_DATA, ifbp->IFB_RxFID)
3129 (void)setup_bap( ifbp, ifbp->IFB_RxFID, 0, IO_IN );
3130 get_frag( ifbp, bufp, HFS_ADDR_DEST BE_PAR(1) );
3131 ifbp->IFB_lap = buf_addr = bufp + HFS_ADDR_DEST;
3132 ifbp->IFB_RxLen = (hcf_16)(bufp[HFS_DAT_LEN] + (bufp[HFS_DAT_LEN+1]<<8) + 2*6 + 2);
3133 /*26*/ if ( ifbp->IFB_RxLen >= 22 ) { // convenient for MIC calculation (5 DWs + 1 "skipped" W)
3134 //. get DA,SA,Len/Type and (SNAP,Type or 8 data bytes)
3135 /*30*/ get_frag( ifbp, buf_addr, 22 BE_PAR(0) );
3136 /*32*/ CALC_RX_MIC( bufp, -1 ); //. initialize MIC
3137 CALC_RX_MIC( buf_addr, HCF_DASA_SIZE ); //. MIC over DA, SA
3138 CALC_RX_MIC( null_addr, 4 ); //. MIC over (virtual) priority field
3139 CALC_RX_MIC( buf_addr+14, 8 ); //. skip Len, MIC over SNAP,Type or 8 data bytes)
3140 buf_addr += 22;
3141 #if (HCF_TYPE) & HCF_TYPE_CCX
3142 //!!be careful do not use positive test on HCF_ACT_CCX_OFF, because IFB_CKIPStat is initially 0
3143 if( ifbp->IFB_CKIPStat != HCF_ACT_CCX_ON )
3144 #endif // HCF_TYPE_CCX
3145 {
3146 #if (HCF_ENCAP) == HCF_ENC
3147 HCFASSERT( len >= HFS_DAT + 2 + sizeof(snap_header), len )
3148 /*34*/ i = *(wci_recordp)&bufp[HFS_STAT] & ( HFS_STAT_MSG_TYPE | HFS_STAT_ERR );
3149 if ( i == HFS_STAT_TUNNEL ||
3150 ( i == HFS_STAT_1042 && hcf_encap( (wci_bufp)&bufp[HFS_TYPE] ) != ENC_TUNNEL ) ) {
3151 //. copy E-II Type to 802.3 LEN field
3152 /*36*/ bufp[HFS_LEN ] = bufp[HFS_TYPE ];
3153 bufp[HFS_LEN+1] = bufp[HFS_TYPE+1];
3154 //. discard Snap by overwriting with data
3155 ifbp->IFB_RxLen -= (HFS_TYPE - HFS_LEN);
3156 buf_addr -= ( HFS_TYPE - HFS_LEN ); // this happens to bring us at a DW boundary of 36
3157 }
3158 #endif // HCF_ENC
3159 }
3160 }
3161 /*40*/ ifbp->IFB_lal = min( (hcf_16)(len - HFS_ADDR_DEST), ifbp->IFB_RxLen );
3162 i = ifbp->IFB_lal - ( buf_addr - ( bufp + HFS_ADDR_DEST ) );
3163 get_frag( ifbp, buf_addr, i BE_PAR(0) );
3164 CALC_RX_MIC( buf_addr, i );
3165 #if (HCF_TYPE) & HCF_TYPE_WPA
3166 if ( ifbp->IFB_lal == ifbp->IFB_RxLen ) {
3167 rc = check_mic( ifbp );
3168 }
3169 #endif // HCF_TYPE_WPA
3170 /*44*/ if ( len - HFS_ADDR_DEST >= ifbp->IFB_RxLen ) {
3171 ifbp->IFB_RxFID = 0;
3172 } else { /* IFB_RxFID is cleared, so you do not get another Rx_Ack at next entry of hcf_service_nic */
3173 stat &= (hcf_16)~HREG_EV_RX; //don't ack Rx if processing not yet completed
3174 }
3175 }
3176 // in case of DMA: signal availability of rx and/or tx packets to MSF
3177 IF_USE_DMA( ifbp->IFB_DmaPackets |= stat & ( HREG_EV_RDMAD | HREG_EV_TDMAD ); )
3178 // rlav : pending HREG_EV_RDMAD or HREG_EV_TDMAD events get acknowledged here.
3179 /*54*/ stat &= (hcf_16)~( HREG_EV_SLEEP_REQ | HREG_EV_CMD | HREG_EV_ACK_REG_READY | HREG_EV_ALLOC | HREG_EV_FW_DMA );
3180 //a positive mask would be easier to understand /*54*/ stat &= (hcf_16)~( HREG_EV_SLEEP_REQ | HREG_EV_CMD | HREG_EV_ACK_REG_READY | HREG_EV_ALLOC | HREG_EV_FW_DMA );
3181 IF_USE_DMA( stat &= (hcf_16)~HREG_EV_RX; )
3182 if ( stat ) {
3183 DAWA_ACK( stat ); /*DAWA*/
3184 }
3185 }
3186 HCFLOGEXIT( HCF_TRACE_SERVICE_NIC )
3187 return rc;
3188 } // hcf_service_nic
3189 #endif // HCF_DL_ONLY
3190
3191
3192 /************************************************************************************************************
3193 ************************** H C F S U P P O R T R O U T I N E S ******************************************
3194 ************************************************************************************************************/
3195
3196
3197 /************************************************************************************************************
3198 *
3199 *.SUBMODULE void calc_mic( hcf_32* p, hcf_32 m )
3200 *.PURPOSE calculate MIC on a quad byte.
3201 *
3202 *.ARGUMENTS
3203 * p address of the MIC
3204 * m 32 bit value to be processed by the MIC calculation engine
3205 *
3206 *.RETURNS N.A.
3207 *
3208 *.DESCRIPTION
3209 * calc_mic is the implementation of the MIC algorithm. It is a monkey-see monkey-do copy of
3210 * Michael::appendByte()
3211 * of Appendix C of ..........
3212 *
3213 *
3214 *.DIAGRAM
3215 *
3216 *.NOTICE
3217 *.ENDDOC END DOCUMENTATION
3218 *
3219 ************************************************************************************************************/
3220
3221 #if (HCF_TYPE) & HCF_TYPE_WPA
3222
3223 #define ROL32( A, n ) ( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) )
3224 #define ROR32( A, n ) ROL32( (A), 32-(n) )
3225
3226 #define L *p
3227 #define R *(p+1)
3228
3229 void
3230 calc_mic( hcf_32* p, hcf_32 m )
3231 {
3232 #if HCF_BIG_ENDIAN
3233 m = (m >> 16) | (m << 16);
3234 #endif // HCF_BIG_ENDIAN
3235 L ^= m;
3236 R ^= ROL32( L, 17 );
3237 L += R;
3238 R ^= ((L & 0xff00ff00) >> 8) | ((L & 0x00ff00ff) << 8);
3239 L += R;
3240 R ^= ROL32( L, 3 );
3241 L += R;
3242 R ^= ROR32( L, 2 );
3243 L += R;
3244 } // calc_mic
3245 #undef R
3246 #undef L
3247 #endif // HCF_TYPE_WPA
3248
3249
3250
3251 #if (HCF_TYPE) & HCF_TYPE_WPA
3252 /************************************************************************************************************
3253 *
3254 *.SUBMODULE void calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len )
3255 *.PURPOSE calculate MIC on a single fragment.
3256 *
3257 *.ARGUMENTS
3258 * ifbp address of the Interface Block
3259 * bufp (byte) address of buffer
3260 * len length in bytes of buffer specified by bufp
3261 *
3262 *.RETURNS N.A.
3263 *
3264 *.DESCRIPTION
3265 * calc_mic_rx_frag ........
3266 *
3267 * The MIC is located in the IFB.
3268 * The MIC is separate for Tx and Rx, thus allowing hcf_send_msg to occur between hcf_service_nic and
3269 * hcf_rcv_msg.
3270 *
3271 *
3272 *.DIAGRAM
3273 *
3274 *.NOTICE
3275 *.ENDDOC END DOCUMENTATION
3276 *
3277 ************************************************************************************************************/
3278 void
3279 calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len )
3280 {
3281 static union { hcf_32 x32; hcf_16 x16[2]; hcf_8 x8[4]; } x; //* area to accumulate 4 bytes input for MIC engine
3282 int i;
3283
3284 if ( len == -1 ) { //initialize MIC housekeeping
3285 i = *(wci_recordp)&p[HFS_STAT];
3286 /* i = CNV_SHORTP_TO_LITTLE(&p[HFS_STAT]); should not be neede to prevent alignment poroblems
3287 * since len == -1 if and only if p is lookahaead buffer which MUST be word aligned
3288 * to be re-investigated by NvR
3289 */
3290
3291 if ( ( i & HFS_STAT_MIC ) == 0 ) {
3292 ifbp->IFB_MICRxCarry = 0xFFFF; //suppress MIC calculation
3293 } else {
3294 ifbp->IFB_MICRxCarry = 0;
3295 //* Note that "coincidentally" the bit positions used in HFS_STAT
3296 //* correspond with the offset of the key in IFB_MICKey
3297 i = ( i & HFS_STAT_MIC_KEY_ID ) >> 10; /* coincidentally no shift needed for i itself */
3298 ifbp->IFB_MICRx[0] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICRxKey[i ]);
3299 ifbp->IFB_MICRx[1] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICRxKey[i+1]);
3300 }
3301 } else {
3302 if ( ifbp->IFB_MICRxCarry == 0 ) {
3303 x.x32 = CNV_LONGP_TO_LITTLE(p);
3304 p += 4;
3305 if ( len < 4 ) {
3306 ifbp->IFB_MICRxCarry = (hcf_16)len;
3307 } else {
3308 ifbp->IFB_MICRxCarry = 4;
3309 len -= 4;
3310 }
3311 } else while ( ifbp->IFB_MICRxCarry < 4 && len ) { //note for hcf_16 applies: 0xFFFF > 4
3312 x.x8[ifbp->IFB_MICRxCarry++] = *p++;
3313 len--;
3314 }
3315 while ( ifbp->IFB_MICRxCarry == 4 ) { //contrived so we have only 1 call to calc_mic so we could bring it in-line
3316 calc_mic( ifbp->IFB_MICRx, x.x32 );
3317 x.x32 = CNV_LONGP_TO_LITTLE(p);
3318 p += 4;
3319 if ( len < 4 ) {
3320 ifbp->IFB_MICRxCarry = (hcf_16)len;
3321 }
3322 len -= 4;
3323 }
3324 }
3325 } // calc_mic_rx_frag
3326 #endif // HCF_TYPE_WPA
3327
3328
3329 #if (HCF_TYPE) & HCF_TYPE_WPA
3330 /************************************************************************************************************
3331 *
3332 *.SUBMODULE void calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len )
3333 *.PURPOSE calculate MIC on a single fragment.
3334 *
3335 *.ARGUMENTS
3336 * ifbp address of the Interface Block
3337 * bufp (byte) address of buffer
3338 * len length in bytes of buffer specified by bufp
3339 *
3340 *.RETURNS N.A.
3341 *
3342 *.DESCRIPTION
3343 * calc_mic_tx_frag ........
3344 *
3345 * The MIC is located in the IFB.
3346 * The MIC is separate for Tx and Rx, thus allowing hcf_send_msg to occur between hcf_service_nic and
3347 * hcf_rcv_msg.
3348 *
3349 *
3350 *.DIAGRAM
3351 *
3352 *.NOTICE
3353 *.ENDDOC END DOCUMENTATION
3354 *
3355 ************************************************************************************************************/
3356 void
3357 calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len )
3358 {
3359 static union { hcf_32 x32; hcf_16 x16[2]; hcf_8 x8[4]; } x; //* area to accumulate 4 bytes input for MIC engine
3360
3361 //if initialization request
3362 if ( len == -1 ) {
3363 //. presume MIC calculation disabled
3364 ifbp->IFB_MICTxCarry = 0xFFFF;
3365 //. if MIC calculation enabled
3366 if ( ifbp->IFB_MICTxCntl ) {
3367 //. . clear MIC carry
3368 ifbp->IFB_MICTxCarry = 0;
3369 //. . initialize MIC-engine
3370 ifbp->IFB_MICTx[0] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICTxKey[0]); /*Tx always uses Key 0 */
3371 ifbp->IFB_MICTx[1] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICTxKey[1]);
3372 }
3373 //else
3374 } else {
3375 //. if MIC enabled (Tx) / if MIC present (Rx)
3376 //. and no carry from previous calc_mic_frag
3377 if ( ifbp->IFB_MICTxCarry == 0 ) {
3378 //. . preset accu with 4 bytes from buffer
3379 x.x32 = CNV_LONGP_TO_LITTLE(p);
3380 //. . adjust pointer accordingly
3381 p += 4;
3382 //. . if buffer contained less then 4 bytes
3383 if ( len < 4 ) {
3384 //. . . promote valid bytes in accu to carry
3385 //. . . flag accu to contain incomplete double word
3386 ifbp->IFB_MICTxCarry = (hcf_16)len;
3387 //. . else
3388 } else {
3389 //. . . flag accu to contain complete double word
3390 ifbp->IFB_MICTxCarry = 4;
3391 //. . adjust remaining buffer length
3392 len -= 4;
3393 }
3394 //. else if MIC enabled
3395 //. and if carry bytes from previous calc_mic_tx_frag
3396 //. . move (1-3) bytes from carry into accu
3397 } else while ( ifbp->IFB_MICTxCarry < 4 && len ) { /* note for hcf_16 applies: 0xFFFF > 4 */
3398 x.x8[ifbp->IFB_MICTxCarry++] = *p++;
3399 len--;
3400 }
3401 //. while accu contains complete double word
3402 //. and MIC enabled
3403 while ( ifbp->IFB_MICTxCarry == 4 ) {
3404 //. . pass accu to MIC engine
3405 calc_mic( ifbp->IFB_MICTx, x.x32 );
3406 //. . copy next 4 bytes from buffer to accu
3407 x.x32 = CNV_LONGP_TO_LITTLE(p);
3408 //. . adjust buffer pointer
3409 p += 4;
3410 //. . if buffer contained less then 4 bytes
3411 //. . . promote valid bytes in accu to carry
3412 //. . . flag accu to contain incomplete double word
3413 if ( len < 4 ) {
3414 ifbp->IFB_MICTxCarry = (hcf_16)len;
3415 }
3416 //. . adjust remaining buffer length
3417 len -= 4;
3418 }
3419 }
3420 } // calc_mic_tx_frag
3421 #endif // HCF_TYPE_WPA
3422
3423
3424 #if HCF_PROT_TIME
3425 /************************************************************************************************************
3426 *
3427 *.SUBMODULE void calibrate( IFBP ifbp )
3428 *.PURPOSE calibrates the S/W protection counter against the Hermes Timer tick.
3429 *
3430 *.ARGUMENTS
3431 * ifbp address of the Interface Block
3432 *
3433 *.RETURNS N.A.
3434 *
3435 *.DESCRIPTION
3436 * calibrates the S/W protection counter against the Hermes Timer tick
3437 * IFB_TickIni is the value used to initialize the S/W protection counter such that the expiration period
3438 * more or less independent of the processor speed. If IFB_TickIni is not yet calibrated, it is done now.
3439 * This calibration is "reasonably" accurate because the Hermes is in a quiet state as a result of the
3440 * Initialize command.
3441 *
3442 *
3443 *.DIAGRAM
3444 *
3445 *1: IFB_TickIni is initialized at INI_TICK_INI by hcf_connect. If calibrate succeeds, IFB_TickIni is
3446 * guaranteed to be changed. As a consequence there will be only 1 shot at calibration (regardless of the
3447 * number of init calls) under normal circumstances.
3448 *2: Calibration is done HCF_PROT_TIME_CNT times. This diminish the effects of jitter and interference,
3449 * especially in a pre-emptive environment. HCF_PROT_TIME_CNT is in the range of 16 through 32 and derived
3450 * from the HCF_PROT_TIME specified by the MSF programmer. The divisor needed to scale HCF_PROT_TIME into the
3451 * 16-32 range, is used as a multiplicator after the calibration, to scale the found value back to the
3452 * requested range. This way a compromise is achieved between accuracy and duration of the calibration
3453 * process.
3454 *3: Acknowledge the Timer Tick Event.
3455 * Each cycle is limited to at most INI_TICK_INI samples of the TimerTick status of the Hermes.
3456 * Since the start of calibrate is unrelated to the Hermes Internal Timer, the first interval may last from 0
3457 * to the normal interval, all subsequent intervals should be the full length of the Hermes Tick interval.
3458 * The Hermes Timer Tick is not reprogrammed by the HCF, hence it is running at the default of 10 k
3459 * microseconds.
3460 *4: If the Timer Tick Event is continuously up (prot_cnt still has the value INI_TICK_INI) or no Timer Tick
3461 * Event occurred before the protection counter expired, reset IFB_TickIni to INI_TICK_INI,
3462 * set the defunct bit of IFB_CardStat (thus rendering the Hermes inoperable) and exit the calibrate routine.
3463 *8: ifbp->IFB_TickIni is multiplied to scale the found value back to the requested range as explained under 2.
3464 *
3465 *.NOTICE
3466 * o Although there are a number of viewpoints possible, calibrate() uses as error strategy that a single
3467 * failure of the Hermes TimerTick is considered fatal.
3468 * o There is no hard and concrete time-out value defined for Hermes activities. The default 1 seconds is
3469 * believed to be sufficiently "relaxed" for real life and to be sufficiently short to be still useful in an
3470 * environment with humans.
3471 * o Note that via IFB_DefunctStat time outs in cmd_wait and in hcfio_string block all Hermes access till the
3472 * next init so functions which call a mix of cmd_wait and hcfio_string only need to check the return status
3473 * of the last call
3474 * o The return code is preset at Time out.
3475 * The additional complication that no calibrated value for the protection count can be assumed since
3476 * calibrate() does not yet have determined a calibrated value (a catch 22), is handled by setting the
3477 * initial value at INI_TICK_INI (by hcf_connect). This approach is considered safe, because:
3478 * - the HCF does not use the pipeline mechanism of Hermes commands.
3479 * - the likelihood of failure (the only time when protection count is relevant) is small.
3480 * - the time will be sufficiently large on a fast machine (busy bit drops on good NIC before counter
3481 * expires)
3482 * - the time will be sufficiently small on a slow machine (counter expires on bad NIC before the end user
3483 * switches the power off in despair
3484 * The time needed to wrap a 32 bit counter around is longer than many humans want to wait, hence the more or
3485 * less arbitrary value of 0x40000L is chosen, assuming it does not take too long on an XT and is not too
3486 * short on a scream-machine.
3487 *
3488 *.ENDDOC END DOCUMENTATION
3489 *
3490 ************************************************************************************************************/
3491 HCF_STATIC void
3492 calibrate( IFBP ifbp )
3493 {
3494 int cnt = HCF_PROT_TIME_CNT;
3495 hcf_32 prot_cnt;
3496
3497 HCFTRACE( ifbp, HCF_TRACE_CALIBRATE );
3498 if ( ifbp->IFB_TickIni == INI_TICK_INI ) { /*1*/
3499 ifbp->IFB_TickIni = 0; /*2*/
3500 while ( cnt-- ) {
3501 prot_cnt = INI_TICK_INI;
3502 OPW( HREG_EV_ACK, HREG_EV_TICK ); /*3*/
3503 while ( (IPW( HREG_EV_STAT ) & HREG_EV_TICK) == 0 && --prot_cnt ) {
3504 ifbp->IFB_TickIni++;
3505 }
3506 if ( prot_cnt == 0 || prot_cnt == INI_TICK_INI ) { /*4*/
3507 ifbp->IFB_TickIni = INI_TICK_INI;
3508 ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_TIMER;
3509 ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
3510 HCFASSERT( DO_ASSERT, prot_cnt )
3511 }
3512 }
3513 ifbp->IFB_TickIni <<= HCF_PROT_TIME_SHFT; /*8*/
3514 }
3515 HCFTRACE( ifbp, HCF_TRACE_CALIBRATE | HCF_TRACE_EXIT );
3516 } // calibrate
3517 #endif // HCF_PROT_TIME
3518
3519
3520 #if (HCF_DL_ONLY) == 0
3521 #if (HCF_TYPE) & HCF_TYPE_WPA
3522 /************************************************************************************************************
3523 *
3524 *.SUBMODULE int check_mic( IFBP ifbp )
3525 *.PURPOSE verifies the MIC of a received non-USB frame.
3526 *
3527 *.ARGUMENTS
3528 * ifbp address of the Interface Block
3529 *
3530 *.RETURNS
3531 * HCF_SUCCESS
3532 * HCF_ERR_MIC
3533 *
3534 *.DESCRIPTION
3535 *
3536 *
3537 *.DIAGRAM
3538 *
3539 *4: test whether or not a MIC is reported by the Hermes
3540 *14: the calculated MIC and the received MIC are compared, the return status is set when there is a mismatch
3541 *
3542 *.NOTICE
3543 *.ENDDOC END DOCUMENTATION
3544 *
3545 ************************************************************************************************************/
3546 int
3547 check_mic( IFBP ifbp )
3548 {
3549 int rc = HCF_SUCCESS;
3550 hcf_32 x32[2]; //* area to save rcvd 8 bytes MIC
3551
3552 //if MIC present in RxFS
3553 if ( *(wci_recordp)&ifbp->IFB_lap[-HFS_ADDR_DEST] & HFS_STAT_MIC ) {
3554 //or if ( ifbp->IFB_MICRxCarry != 0xFFFF )
3555 CALC_RX_MIC( mic_pad, 8 ); //. process up to 3 remaining bytes of data and append 5 to 8 bytes of padding to MIC calculation
3556 get_frag( ifbp, (wci_bufp)x32, 8 BE_PAR(0));//. get 8 byte MIC from NIC
3557 //. if calculated and received MIC do not match
3558 //. . set status at HCF_ERR_MIC
3559 /*14*/ if ( x32[0] != CNV_LITTLE_TO_LONG(ifbp->IFB_MICRx[0]) ||
3560 x32[1] != CNV_LITTLE_TO_LONG(ifbp->IFB_MICRx[1]) ) {
3561 rc = HCF_ERR_MIC;
3562 }
3563 }
3564 //return status
3565 return rc;
3566 } // check_mic
3567 #endif // HCF_TYPE_WPA
3568 #endif // HCF_DL_ONLY
3569
3570
3571 /************************************************************************************************************
3572 *
3573 *.SUBMODULE int cmd_cmpl( IFBP ifbp )
3574 *.PURPOSE waits for Hermes Command Completion.
3575 *
3576 *.ARGUMENTS
3577 * ifbp address of the Interface Block
3578 *
3579 *.RETURNS
3580 * IFB_DefunctStat
3581 * HCF_ERR_TIME_OUT
3582 * HCF_ERR_DEFUNCT_CMD_SEQ
3583 * HCF_SUCCESS
3584 *
3585 *.DESCRIPTION
3586 *
3587 *
3588 *.DIAGRAM
3589 *
3590 *2: Once cmd_cmpl is called, the Busy option bit in IFB_Cmd must be cleared
3591 *4: If Status register and command code don't match either:
3592 * - the Hermes and Host are out of sync ( a fatal error)
3593 * - error bits are reported via the Status Register.
3594 * Out of sync is considered fatal and brings the HCF in Defunct mode
3595 * Errors reported via the Status Register should be caused by sequence violations in Hermes command
3596 * sequences and hence these bugs should have been found during engineering testing. Since there is no
3597 * strategy to cope with this problem, it might as well be ignored at run time. Note that for any particular
3598 * situation where a strategy is formulated to handle the consequences of a particular bug causing a
3599 * particular Error situation reported via the Status Register, the bug should be removed rather than adding
3600 * logic to cope with the consequences of the bug.
3601 * There have been HCF versions where an error report via the Status Register even brought the HCF in defunct
3602 * mode (although it was not yet named like that at that time). This is particular undesirable behavior for a
3603 * general library.
3604 * Simply reporting the error (as "interesting") is debatable. There also have been HCF versions with this
3605 * strategy using the "vague" HCF_FAILURE code.
3606 * The error is reported via:
3607 * - MiscErr tally of the HCF Tally set
3608 * - the (informative) fields IFB_ErrCmd and IFB_ErrQualifier
3609 * - the assert mechanism
3610 *8: Here the Defunct case and the Status error are separately treated
3611 *
3612 *
3613 *.ENDDOC END DOCUMENTATION
3614 *
3615 ************************************************************************************************************/
3616 HCF_STATIC int
3617 cmd_cmpl( IFBP ifbp )
3618 {
3619
3620 PROT_CNT_INI
3621 int rc = HCF_SUCCESS;
3622 hcf_16 stat;
3623
3624 HCFLOGENTRY( HCF_TRACE_CMD_CPL, ifbp->IFB_Cmd )
3625 ifbp->IFB_Cmd &= ~HCMD_BUSY; /* 2 */
3626 HCF_WAIT_WHILE( (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 ); /* 4 */
3627 stat = IPW( HREG_STAT );
3628 #if HCF_PROT_TIME
3629 if ( prot_cnt == 0 ) {
3630 IF_TALLY( ifbp->IFB_HCF_Tallies.MiscErr++; )
3631 rc = HCF_ERR_TIME_OUT;
3632 HCFASSERT( DO_ASSERT, ifbp->IFB_Cmd )
3633 } else
3634 #endif // HCF_PROT_TIME
3635 {
3636 DAWA_ACK( HREG_EV_CMD );
3637 /*4*/ if ( stat != (ifbp->IFB_Cmd & HCMD_CMD_CODE) ) {
3638 /*8*/ if ( ( (stat ^ ifbp->IFB_Cmd ) & HCMD_CMD_CODE) != 0 ) {
3639 rc = ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_CMD_SEQ;
3640 ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
3641 }
3642 IF_TALLY( ifbp->IFB_HCF_Tallies.MiscErr++; )
3643 ifbp->IFB_ErrCmd = stat;
3644 ifbp->IFB_ErrQualifier = IPW( HREG_RESP_0 );
3645 HCFASSERT( DO_ASSERT, MERGE_2( IPW( HREG_PARAM_0 ), ifbp->IFB_Cmd ) )
3646 HCFASSERT( DO_ASSERT, MERGE_2( ifbp->IFB_ErrQualifier, ifbp->IFB_ErrCmd ) )
3647 }
3648 }
3649 HCFASSERT( rc == HCF_SUCCESS, rc)
3650 HCFLOGEXIT( HCF_TRACE_CMD_CPL )
3651 return rc;
3652 } // cmd_cmpl
3653
3654
3655 /************************************************************************************************************
3656 *
3657 *.SUBMODULE int cmd_exe( IFBP ifbp, int cmd_code, int par_0 )
3658 *.PURPOSE Executes synchronous part of Hermes Command and - optionally - waits for Command Completion.
3659 *
3660 *.ARGUMENTS
3661 * ifbp address of the Interface Block
3662 * cmd_code
3663 * par_0
3664 *
3665 *.RETURNS
3666 * IFB_DefunctStat
3667 * HCF_ERR_DEFUNCT_CMD_SEQ
3668 * HCF_SUCCESS
3669 * HCF_ERR_TO_BE_ADDED <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
3670 *
3671 *.DESCRIPTION
3672 * Executes synchronous Hermes Command and waits for Command Completion
3673 *
3674 * The general HCF strategy is to wait for command completion. As a consequence:
3675 * - the read of the busy bit before writing the command register is superfluous
3676 * - the Hermes requirement that no Inquiry command may be executed if there is still an unacknowledged
3677 * Inquiry command outstanding, is automatically met.
3678 * The Tx command uses the "Busy" bit in the cmd_code parameter to deviate from this general HCF strategy.
3679 * The idea is that by not busy-waiting on completion of this frequently used command the processor
3680 * utilization is diminished while using the busy-wait on all other seldom used commands the flow is kept
3681 * simple.
3682 *
3683 *
3684 *
3685 *.DIAGRAM
3686 *
3687 *1: skip the body of cmd_exe when in defunct mode or when - based on the S/W Support register write and
3688 * read back test - there is apparently no NIC.
3689 * Note: we gave up on the "old" strategy to write the S/W Support register at magic only when needed. Due to
3690 * the intricateness of Hermes F/W varieties ( which behave differently as far as corruption of the S/W
3691 * Support register is involved), the increasing number of Hermes commands which do an implicit initialize
3692 * (thus modifying the S/W Support register) and the workarounds of some OS/Support S/W induced aspects (e.g.
3693 * the System Soft library at WinNT which postpones the actual mapping of I/O space up to 30 seconds after
3694 * giving the go-ahead), the "magic" strategy is now reduced to a simple write and read back. This means that
3695 * problems like a bug tramping over the memory mapped Hermes registers will no longer be noticed as side
3696 * effect of the S/W Support register check.
3697 *2: check whether the preceding command skipped the busy wait and if so, check for command completion
3698 *
3699 *.NOTICE
3700 *.ENDDOC END DOCUMENTATION
3701 *
3702 ************************************************************************************************************/
3703
3704 HCF_STATIC int
3705 cmd_exe( IFBP ifbp, hcf_16 cmd_code, hcf_16 par_0 ) //if HCMD_BUSY of cmd_code set, then do NOT wait for completion
3706 {
3707 int rc;
3708
3709 HCFLOGENTRY( HCF_TRACE_CMD_EXE, cmd_code )
3710 HCFASSERT( (cmd_code & HCMD_CMD_CODE) != HCMD_TX || cmd_code & HCMD_BUSY, cmd_code ) //Tx must have Busy bit set
3711 OPW( HREG_SW_0, HCF_MAGIC );
3712 if ( IPW( HREG_SW_0 ) == HCF_MAGIC ) { /* 1 */
3713 rc = ifbp->IFB_DefunctStat;
3714 }
3715 else rc = HCF_ERR_NO_NIC;
3716 if ( rc == HCF_SUCCESS ) {
3717 //;?is this a hot idea, better MEASURE performance impact
3718 /*2*/ if ( ifbp->IFB_Cmd & HCMD_BUSY ) {
3719 rc = cmd_cmpl( ifbp );
3720 }
3721 OPW( HREG_PARAM_0, par_0 );
3722 OPW( HREG_CMD, cmd_code &~HCMD_BUSY );
3723 ifbp->IFB_Cmd = cmd_code;
3724 if ( (cmd_code & HCMD_BUSY) == 0 ) { //;?is this a hot idea, better MEASURE performance impact
3725 rc = cmd_cmpl( ifbp );
3726 }
3727 }
3728 HCFASSERT( rc == HCF_SUCCESS, MERGE_2( rc, cmd_code ) )
3729 HCFLOGEXIT( HCF_TRACE_CMD_EXE )
3730 return rc;
3731 } // cmd_exe
3732
3733
3734 /************************************************************************************************************
3735 *
3736 *.SUBMODULE int download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp )
3737 *.PURPOSE downloads F/W image into NIC and initiates execution of the downloaded F/W.
3738 *
3739 *.ARGUMENTS
3740 * ifbp address of the Interface Block
3741 * ltvp specifies the pseudo-RID (as defined by WCI)
3742 *
3743 *.RETURNS
3744 *
3745 *.DESCRIPTION
3746 *
3747 *
3748 *.DIAGRAM
3749 *1: First, Ack everything to unblock a (possibly) blocked cmd pipe line
3750 * Note 1: it is very likely that an Alloc event is pending and very well possible that a (Send) Cmd event is
3751 * pending
3752 * Note 2: it is assumed that this strategy takes away the need to ack every conceivable event after an
3753 * Hermes Initialize
3754 *
3755 *
3756 *.ENDDOC END DOCUMENTATION
3757 *
3758 ************************************************************************************************************/
3759 HCF_STATIC int
3760 download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp ) //Hermes-II download (volatile only)
3761 {
3762 hcf_16 i;
3763 int rc = HCF_SUCCESS;
3764 wci_bufp cp;
3765 hcf_io io_port = ifbp->IFB_IOBase + HREG_AUX_DATA;
3766
3767 HCFLOGENTRY( HCF_TRACE_DL, ltvp->typ )
3768 #if (HCF_TYPE) & HCF_TYPE_PRELOADED
3769 HCFASSERT( DO_ASSERT, ltvp->mode )
3770 #else
3771 //if initial "program" LTV
3772 if ( ifbp->IFB_DLMode == CFG_PROG_STOP && ltvp->mode == CFG_PROG_VOLATILE) {
3773 //. switch Hermes to initial mode
3774 /*1*/ OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
3775 rc = cmd_exe( ifbp, HCMD_INI, 0 ); /* HCMD_INI can not be part of init() because that is called on
3776 * other occasions as well */
3777 rc = init( ifbp );
3778 }
3779 //if final "program" LTV
3780 if ( ltvp->mode == CFG_PROG_STOP && ifbp->IFB_DLMode == CFG_PROG_VOLATILE) {
3781 //. start tertiary (or secondary)
3782 OPW( HREG_PARAM_1, (hcf_16)(ltvp->nic_addr >> 16) );
3783 rc = cmd_exe( ifbp, HCMD_EXECUTE, (hcf_16) ltvp->nic_addr );
3784 if (rc == HCF_SUCCESS) {
3785 rc = init( ifbp ); /*;? do we really want to skip init if cmd_exe failed, i.e.
3786 * IFB_FW_Comp_Id is than possibly incorrect */
3787 }
3788 //else (non-final)
3789 } else {
3790 //. if mode == Readback SEEPROM
3791 #if 0 //;? as long as the next if contains a hard coded 0, might as well leave it out even more obvious
3792 if ( 0 /*len is definitely not want we want;?*/ && ltvp->mode == CFG_PROG_SEEPROM_READBACK ) {
3793 OPW( HREG_PARAM_1, (hcf_16)(ltvp->nic_addr >> 16) );
3794 OPW( HREG_PARAM_2, MUL_BY_2(ltvp->len - 4));
3795 //. . perform Hermes prog cmd with appropriate mode bits
3796 rc = cmd_exe( ifbp, HCMD_PROGRAM | ltvp->mode, (hcf_16)ltvp->nic_addr );
3797 //. . set up NIC RAM addressability according Resp0-1
3798 OPW( HREG_AUX_PAGE, IPW( HREG_RESP_1) );
3799 OPW( HREG_AUX_OFFSET, IPW( HREG_RESP_0) );
3800 //. . set up L-field of LTV according Resp2
3801 i = ( IPW( HREG_RESP_2 ) + 1 ) / 2; // i contains max buffer size in words, a probably not very useful piece of information ;?
3802 /*Nico's code based on i is the "real amount of data available"
3803 if ( ltvp->len - 4 < i ) rc = HCF_ERR_LEN;
3804 else ltvp->len = i + 4;
3805 */
3806 /* Rolands code based on the idea that a MSF should not ask for more than is available
3807 // check if number of bytes requested exceeds max buffer size
3808 if ( ltvp->len - 4 > i ) {
3809 rc = HCF_ERR_LEN;
3810 ltvp->len = i + 4;
3811 }
3812 */
3813 //. . copy data from NIC via AUX port to LTV
3814 cp = (wci_bufp)ltvp->host_addr; /*IN_PORT_STRING_8_16 macro may modify its parameters*/
3815 i = ltvp->len - 4;
3816 IN_PORT_STRING_8_16( io_port, cp, i ); //!!!WORD length, cp MUST be a char pointer // $$ char
3817 //. else (non-final programming)
3818 } else
3819 #endif //;? as long as the above if contains a hard coded 0, might as well leave it out even more obvious
3820 { //. . get number of words to program
3821 HCFASSERT( ltvp->segment_size, *ltvp->host_addr )
3822 i = ltvp->segment_size/2;
3823 //. . copy data (words) from LTV via AUX port to NIC
3824 cp = (wci_bufp)ltvp->host_addr; //OUT_PORT_STRING_8_16 macro may modify its parameters
3825 //. . if mode == volatile programming
3826 if ( ltvp->mode == CFG_PROG_VOLATILE ) {
3827 //. . . set up NIC RAM addressability via AUX port
3828 OPW( HREG_AUX_PAGE, (hcf_16)(ltvp->nic_addr >> 16 << 9 | (ltvp->nic_addr & 0xFFFF) >> 7 ) );
3829 OPW( HREG_AUX_OFFSET, (hcf_16)(ltvp->nic_addr & 0x007E) );
3830 OUT_PORT_STRING_8_16( io_port, cp, i ); //!!!WORD length, cp MUST be a char pointer
3831 }
3832 }
3833 }
3834 ifbp->IFB_DLMode = ltvp->mode; //save state in IFB_DLMode
3835 #endif // HCF_TYPE_PRELOADED
3836 HCFASSERT( rc == HCF_SUCCESS, rc )
3837 HCFLOGEXIT( HCF_TRACE_DL )
3838 return rc;
3839 } // download
3840
3841
3842 #if (HCF_ASSERT) & HCF_ASSERT_PRINTF
3843 /**************************************************
3844 * Certain Hermes-II firmware versions can generate
3845 * debug information. This debug information is
3846 * contained in a buffer in nic-RAM, and can be read
3847 * via the aux port.
3848 **************************************************/
3849 HCF_STATIC int
3850 fw_printf(IFBP ifbp, CFG_FW_PRINTF_STRCT FAR *ltvp)
3851 {
3852 int rc = HCF_SUCCESS;
3853 hcf_16 fw_cnt;
3854 // hcf_32 DbMsgBuffer = 0x29D2, DbMsgCount= 0x000029D0;
3855 // hcf_16 DbMsgSize=0x00000080;
3856 hcf_32 DbMsgBuffer;
3857 CFG_FW_PRINTF_BUFFER_LOCATION_STRCT *p = &ifbp->IFB_FwPfBuff;
3858 ltvp->len = 1;
3859 if ( p->DbMsgSize != 0 ) {
3860 // first, check the counter in nic-RAM and compare it to the latest counter value of the HCF
3861 OPW( HREG_AUX_PAGE, (hcf_16)(p->DbMsgCount >> 7) );
3862 OPW( HREG_AUX_OFFSET, (hcf_16)(p->DbMsgCount & 0x7E) );
3863 fw_cnt = ((IPW( HREG_AUX_DATA) >>1 ) & ((hcf_16)p->DbMsgSize - 1));
3864 if ( fw_cnt != ifbp->IFB_DbgPrintF_Cnt ) {
3865 // DbgPrint("fw_cnt=%d IFB_DbgPrintF_Cnt=%d\n", fw_cnt, ifbp->IFB_DbgPrintF_Cnt);
3866 DbMsgBuffer = p->DbMsgBuffer + ifbp->IFB_DbgPrintF_Cnt * 6; // each entry is 3 words
3867 OPW( HREG_AUX_PAGE, (hcf_16)(DbMsgBuffer >> 7) );
3868 OPW( HREG_AUX_OFFSET, (hcf_16)(DbMsgBuffer & 0x7E) );
3869 ltvp->msg_id = IPW(HREG_AUX_DATA);
3870 ltvp->msg_par = IPW(HREG_AUX_DATA);
3871 ltvp->msg_tstamp = IPW(HREG_AUX_DATA);
3872 ltvp->len = 4;
3873 ifbp->IFB_DbgPrintF_Cnt++;
3874 ifbp->IFB_DbgPrintF_Cnt &= (p->DbMsgSize - 1);
3875 }
3876 }
3877 return rc;
3878 };
3879 #endif // HCF_ASSERT_PRINTF
3880
3881
3882 #if (HCF_DL_ONLY) == 0
3883 /************************************************************************************************************
3884 *
3885 *.SUBMODULE hcf_16 get_fid( IFBP ifbp )
3886 *.PURPOSE get allocated FID for either transmit or notify.
3887 *
3888 *.ARGUMENTS
3889 * ifbp address of the Interface Block
3890 *
3891 *.RETURNS
3892 * 0 no FID available
3893 * <>0 FID number
3894 *
3895 *.DESCRIPTION
3896 *
3897 *
3898 *.DIAGRAM
3899 * The preference is to use a "pending" alloc. If no alloc is pending, then - if available - the "spare" FID
3900 * is used.
3901 * If the spare FID is used, IFB_RscInd (representing the spare FID) must be cleared
3902 * If the pending alloc is used, the alloc event must be acknowledged to the Hermes.
3903 * In case the spare FID was depleted and the IFB_RscInd has been "faked" as pseudo resource with a 0x0001
3904 * value by hcf_service_nic, IFB_RscInd has to be "corrected" again to its 0x0000 value.
3905 *
3906 * Note that due to the Hermes-II H/W problems which are intended to be worked around by DAWA, the Alloc bit
3907 * in the Event register is no longer a reliable indication of the presence/absence of a FID. The "Clear FID"
3908 * part of the DAWA logic, together with the choice of the definition of the return information from get_fid,
3909 * handle this automatically, i.e. without additional code in get_fid.
3910 *.ENDDOC END DOCUMENTATION
3911 *
3912 ************************************************************************************************************/
3913 HCF_STATIC hcf_16
3914 get_fid( IFBP ifbp )
3915 {
3916
3917 hcf_16 fid = 0;
3918 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
3919 PROT_CNT_INI
3920 #endif // HCF_TYPE_HII5
3921
3922 IF_DMA( HCFASSERT(!(ifbp->IFB_CntlOpt & USE_DMA), ifbp->IFB_CntlOpt) )
3923
3924 if ( IPW( HREG_EV_STAT) & HREG_EV_ALLOC) {
3925 fid = IPW( HREG_ALLOC_FID );
3926 HCFASSERT( fid, ifbp->IFB_RscInd )
3927 DAWA_ZERO_FID( HREG_ALLOC_FID )
3928 #if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
3929 HCF_WAIT_WHILE( ( IPW( HREG_EV_STAT ) & HREG_EV_ACK_REG_READY ) == 0 );
3930 HCFASSERT( prot_cnt, IPW( HREG_EV_STAT ) )
3931 #endif // HCF_TYPE_HII5
3932 DAWA_ACK( HREG_EV_ALLOC ); //!!note that HREG_EV_ALLOC is written only once
3933 // 180 degree error in logic ;? #if ALLOC_15
3934 if ( ifbp->IFB_RscInd == 1 ) {
3935 ifbp->IFB_RscInd = 0;
3936 }
3937 //#endif // ALLOC_15
3938 } else {
3939 // 180 degree error in logic ;? #if ALLOC_15
3940 fid = ifbp->IFB_RscInd;
3941 //#endif // ALLOC_15
3942 ifbp->IFB_RscInd = 0;
3943 }
3944 return fid;
3945 } // get_fid
3946 #endif // HCF_DL_ONLY
3947
3948
3949 /************************************************************************************************************
3950 *
3951 *.SUBMODULE void get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
3952 *.PURPOSE reads with 16/32 bit I/O via BAP1 port from NIC RAM to Host memory.
3953 *
3954 *.ARGUMENTS
3955 * ifbp address of the Interface Block
3956 * bufp (byte) address of buffer
3957 * len length in bytes of buffer specified by bufp
3958 * word_len Big Endian only: number of leading bytes to swap in pairs
3959 *
3960 *.RETURNS N.A.
3961 *
3962 *.DESCRIPTION
3963 * process the single byte (if applicable) read by the previous get_frag and copy len (or len-1) bytes from
3964 * NIC to bufp.
3965 * On a Big Endian platform, the parameter word_len controls the number of leading bytes whose endianess is
3966 * converted (i.e. byte swapped)
3967 *
3968 *
3969 *.DIAGRAM
3970 *10: The PCMCIA card can be removed in the middle of the transfer. By depositing a "magic number" in the
3971 * HREG_SW_0 register of the Hermes at initialization time and by verifying this register, it can be
3972 * determined whether the card is still present. The return status is set accordingly.
3973 * Clearing the buffer is a (relative) cheap way to prevent that failing I/O results in run-away behavior
3974 * because the garbage in the buffer is interpreted by the caller irrespective of the return status (e.g.
3975 * hcf_service_nic has this behavior).
3976 *
3977 *.NOTICE
3978 * It turns out DOS ODI uses zero length fragments. The HCF code can cope with it, but as a consequence, no
3979 * Assert on len is possible
3980 *
3981 *.ENDDOC END DOCUMENTATION
3982 *
3983 ************************************************************************************************************/
3984 HCF_STATIC void
3985 get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
3986 {
3987 hcf_io io_port = ifbp->IFB_IOBase + HREG_DATA_1; //BAP data register
3988 wci_bufp p = bufp; //working pointer
3989 int i; //prevent side effects from macro
3990 int j;
3991
3992 HCFASSERT( ((hcf_32)bufp & (HCF_ALIGN-1) ) == 0, (hcf_32)bufp )
3993
3994 /*1: here recovery logic for intervening BAP access between hcf_service_nic and hcf_rcv_msg COULD be added
3995 * if current access is RxInitial
3996 * . persistent_offset += len
3997 */
3998
3999 i = len;
4000 //if buffer length > 0 and carry from previous get_frag
4001 if ( i && ifbp->IFB_CarryIn ) {
4002 //. move carry to buffer
4003 //. adjust buffer length and pointer accordingly
4004 *p++ = (hcf_8)(ifbp->IFB_CarryIn>>8);
4005 i--;
4006 //. clear carry flag
4007 ifbp->IFB_CarryIn = 0;
4008 }
4009 #if (HCF_IO) & HCF_IO_32BITS
4010 //skip zero-length I/O, single byte I/O and I/O not worthwhile (i.e. less than 6 bytes)for DW logic
4011 //if buffer length >= 6 and 32 bits I/O support
4012 if ( !(ifbp->IFB_CntlOpt & USE_16BIT) && i >= 6 ) {
4013 hcf_32 FAR *p4; //prevent side effects from macro
4014 if ( ( (hcf_32)p & 0x1 ) == 0 ) { //. if buffer at least word aligned
4015 if ( (hcf_32)p & 0x2 ) { //. . if buffer not double word aligned
4016 //. . . read single word to get double word aligned
4017 *(wci_recordp)p = IN_PORT_WORD( io_port );
4018 //. . . adjust buffer length and pointer accordingly
4019 p += 2;
4020 i -= 2;
4021 }
4022 //. . read as many double word as possible
4023 p4 = (hcf_32 FAR *)p;
4024 j = i/4;
4025 IN_PORT_STRING_32( io_port, p4, j );
4026 //. . adjust buffer length and pointer accordingly
4027 p += i & ~0x0003;
4028 i &= 0x0003;
4029 }
4030 }
4031 #endif // HCF_IO_32BITS
4032 //if no 32-bit support OR byte aligned OR 1-3 bytes left
4033 if ( i ) {
4034 //. read as many word as possible in "alignment safe" way
4035 j = i/2;
4036 IN_PORT_STRING_8_16( io_port, p, j );
4037 //. if 1 byte left
4038 if ( i & 0x0001 ) {
4039 //. . read 1 word
4040 ifbp->IFB_CarryIn = IN_PORT_WORD( io_port );
4041 //. . store LSB in last char of buffer
4042 bufp[len-1] = (hcf_8)ifbp->IFB_CarryIn;
4043 //. . save MSB in carry, set carry flag
4044 ifbp->IFB_CarryIn |= 0x1;
4045 }
4046 }
4047 #if HCF_BIG_ENDIAN
4048 HCFASSERT( word_len == 0 || word_len == 2 || word_len == 4, word_len )
4049 HCFASSERT( word_len == 0 || ((hcf_32)bufp & 1 ) == 0, (hcf_32)bufp )
4050 HCFASSERT( word_len <= len, MERGE2( word_len, len ) )
4051 //see put_frag for an alternative implementation, but be careful about what are int's and what are
4052 //hcf_16's
4053 if ( word_len ) { //. if there is anything to convert
4054 hcf_8 c;
4055 c = bufp[1]; //. . convert the 1st hcf_16
4056 bufp[1] = bufp[0];
4057 bufp[0] = c;
4058 if ( word_len > 1 ) { //. . if there is to convert more than 1 word ( i.e 2 )
4059 c = bufp[3]; //. . . convert the 2nd hcf_16
4060 bufp[3] = bufp[2];
4061 bufp[2] = c;
4062 }
4063 }
4064 #endif // HCF_BIG_ENDIAN
4065 } // get_frag
4066
4067 /************************************************************************************************************
4068 *
4069 *.SUBMODULE int init( IFBP ifbp )
4070 *.PURPOSE Handles common initialization aspects (H-I init, calibration, config.mngmt, allocation).
4071 *
4072 *.ARGUMENTS
4073 * ifbp address of the Interface Block
4074 *
4075 *.RETURNS
4076 * HCF_ERR_INCOMP_PRI
4077 * HCF_ERR_INCOMP_FW
4078 * HCF_ERR_TIME_OUT
4079 * >>hcf_get_info
4080 * HCF_ERR_NO_NIC
4081 * HCF_ERR_LEN
4082 *
4083 *.DESCRIPTION
4084 * init will successively:
4085 * - in case of a (non-preloaded) H-I, initialize the NIC
4086 * - calibrate the S/W protection timer against the Hermes Timer
4087 * - collect HSI, "active" F/W Configuration Management Information
4088 * - in case active F/W is Primary F/W: collect Primary F/W Configuration Management Information
4089 * - check HSI and Primary F/W compatibility with the HCF
4090 * - in case active F/W is Station or AP F/W: check Station or AP F/W compatibility with the HCF
4091 * - in case active F/W is not Primary F/W: allocate FIDs to be used in transmit/notify process
4092 *
4093 *
4094 *.DIAGRAM
4095 *2: drop all error status bits in IFB_CardStat since they are expected to be re-evaluated.
4096 *4: Ack everything except HREG_EV_SLEEP_REQ. It is very likely that an Alloc event is pending and
4097 * very well possible that a Send Cmd event is pending. Acking HREG_EV_SLEEP_REQ is handled by hcf_action(
4098 * HCF_ACT_INT_ON ) !!!
4099 *10: Calibrate the S/W time-out protection mechanism by calling calibrate(). Note that possible errors
4100 * in the calibration process are nor reported by init but will show up via the defunct mechanism in
4101 * subsequent hcf-calls.
4102 *14: usb_check_comp() is called to have the minimal visual clutter for the legacy H-I USB dongle
4103 * compatibility check.
4104 *16: The following configuration management related information is retrieved from the NIC:
4105 * - HSI supplier
4106 * - F/W Identity
4107 * - F/W supplier
4108 * if appropriate:
4109 * - PRI Identity
4110 * - PRI supplier
4111 * appropriate means on H-I: always
4112 * and on H-II if F/W supplier reflects a primary (i.e. only after an Hermes Reset or Init
4113 * command).
4114 * QUESTION ;? !!!!!! should, For each of the above RIDs the Endianess is converted to native Endianess.
4115 * Only the return code of the first hcf_get_info is used. All hcf_get_info calls are made, regardless of
4116 * the success or failure of the 1st hcf_get_info. The assumptions are:
4117 * - if any call fails, they all fail, so remembering the result of the 1st call is adequate
4118 * - a failing call will overwrite the L-field with a 0x0000 value, which services both as an
4119 * error indication for the values cached in the IFB as making mmd_check_comp fail.
4120 * In case of H-I, when getting the F/W identity fails, the F/W is assumed to be H-I AP F/W pre-dating
4121 * version 9.0 and the F/W Identity and Supplier are faked accordingly.
4122 * In case of H-II, the Primary, Station and AP Identity are merged into a single F/W Identity.
4123 * The same applies to the Supplier information. As a consequence the PRI information can no longer be
4124 * retrieved when a Tertiary runs. To accommodate MSFs and Utilities who depend on PRI information being
4125 * available at any time, this information is cached in the IFB. In this cache the generic "F/W" value of
4126 * the typ-fields is overwritten with the specific (legacy) "PRI" values. To actually re-route the (legacy)
4127 * PRI request via hcf_get_info, the xxxx-table must be set. In case of H-I, this caching, modifying and
4128 * re-routing is not needed because PRI information is always available directly from the NIC. For
4129 * consistency the caching fields in the IFB are filled with the PRI information anyway.
4130 *18: mdd_check_comp() is called to check the Supplier Variant and Range of the Host-S/W I/F (HSI) and the
4131 * Primary Firmware Variant and Range against the Top and Bottom level supported by this HCF. If either of
4132 * these tests fails, the CARD_STAT_INCOMP_PRI bit of IFB_CardStat is set
4133 * Note: There should always be a primary except during production, so this makes the HCF in its current form
4134 * unsuitable for manufacturing test systems like the FTS. This can be remedied by an adding a test like
4135 * ifbp->IFB_PRISup.id == COMP_ID_PRI
4136 *20: In case there is Tertiary F/W and this F/W is Station F/W, the Supplier Variant and Range of the Station
4137 * Firmware function as retrieved from the Hermes is checked against the Top and Bottom level supported by
4138 * this HCF.
4139 * Note: ;? the tertiary F/W compatibility checks could be moved to the DHF, which already has checked the
4140 * CFI and MFI compatibility of the image with the NIC before the image was downloaded.
4141 *28: In case of non-Primary F/W: allocates and acknowledge a (TX or Notify) FID and allocates without
4142 * acknowledge another (TX or Notify) FID (the so-called 1.5 alloc scheme) with the following steps:
4143 * - execute the allocate command by calling cmd_exe
4144 * - wait till either the alloc event or a time-out occurs
4145 * - regardless whether the alloc event occurs, call get_fid to
4146 * - read the FID and save it in IFB_RscInd to be used as "spare FID"
4147 * - acknowledge the alloc event
4148 * - do another "half" allocate to complete the "1.5 Alloc scheme"
4149 * Note that above 3 steps do not harm and thus give the "cheapest" acceptable strategy.
4150 * If a time-out occurred, then report time out status (after all)
4151 *
4152 *.ENDDOC END DOCUMENTATION
4153 *
4154 ************************************************************************************************************/
4155 HCF_STATIC int
4156 init( IFBP ifbp )
4157 {
4158
4159 int rc = HCF_SUCCESS;
4160
4161 HCFLOGENTRY( HCF_TRACE_INIT, 0 )
4162
4163 ifbp->IFB_CardStat = 0; /* 2*/
4164 OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ ); /* 4*/
4165 IF_PROT_TIME( calibrate( ifbp ); ) /*10*/
4166 #if 0 // OOR
4167 ifbp->IFB_FWIdentity.len = 2; //misuse the IFB space for a put
4168 ifbp->IFB_FWIdentity.typ = CFG_TICK_TIME;
4169 ifbp->IFB_FWIdentity.comp_id = (1000*1000)/1024 + 1; //roughly 1 second
4170 hcf_put_info( ifbp, (LTVP)&ifbp->IFB_FWIdentity.len );
4171 #endif // OOR
4172 ifbp->IFB_FWIdentity.len = sizeof(CFG_FW_IDENTITY_STRCT)/sizeof(hcf_16) - 1;
4173 ifbp->IFB_FWIdentity.typ = CFG_FW_IDENTITY;
4174 rc = hcf_get_info( ifbp, (LTVP)&ifbp->IFB_FWIdentity.len );
4175 /* ;? conversion should not be needed for mmd_check_comp */
4176 #if HCF_BIG_ENDIAN
4177 ifbp->IFB_FWIdentity.comp_id = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.comp_id );
4178 ifbp->IFB_FWIdentity.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.variant );
4179 ifbp->IFB_FWIdentity.version_major = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.version_major );
4180 ifbp->IFB_FWIdentity.version_minor = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.version_minor );
4181 #endif // HCF_BIG_ENDIAN
4182 #if defined MSF_COMPONENT_ID /*14*/
4183 if ( rc == HCF_SUCCESS ) { /*16*/
4184 ifbp->IFB_HSISup.len = sizeof(CFG_SUP_RANGE_STRCT)/sizeof(hcf_16) - 1;
4185 ifbp->IFB_HSISup.typ = CFG_NIC_HSI_SUP_RANGE;
4186 rc = hcf_get_info( ifbp, (LTVP)&ifbp->IFB_HSISup.len );
4187 /* ;? conversion should not be needed for mmd_check_comp , BUT according to a report of a BE-user it is
4188 * should be resolved in the WARP release
4189 * since some compilers make ugly but unnecessary code of these instructions even for LE,
4190 * it is conditionally compiled */
4191 #if HCF_BIG_ENDIAN
4192 ifbp->IFB_HSISup.role = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.role );
4193 ifbp->IFB_HSISup.id = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.id );
4194 ifbp->IFB_HSISup.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.variant );
4195 ifbp->IFB_HSISup.bottom = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.bottom );
4196 ifbp->IFB_HSISup.top = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.top );
4197 #endif // HCF_BIG_ENDIAN
4198 ifbp->IFB_FWSup.len = sizeof(CFG_SUP_RANGE_STRCT)/sizeof(hcf_16) - 1;
4199 ifbp->IFB_FWSup.typ = CFG_FW_SUP_RANGE;
4200 (void)hcf_get_info( ifbp, (LTVP)&ifbp->IFB_FWSup.len );
4201 /* ;? conversion should not be needed for mmd_check_comp */
4202 #if HCF_BIG_ENDIAN
4203 ifbp->IFB_FWSup.role = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.role );
4204 ifbp->IFB_FWSup.id = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.id );
4205 ifbp->IFB_FWSup.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.variant );
4206 ifbp->IFB_FWSup.bottom = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.bottom );
4207 ifbp->IFB_FWSup.top = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.top );
4208 #endif // HCF_BIG_ENDIAN
4209
4210 if ( ifbp->IFB_FWSup.id == COMP_ID_PRI ) { /* 20*/
4211 int i = sizeof( CFG_FW_IDENTITY_STRCT) + sizeof(CFG_SUP_RANGE_STRCT );
4212 while ( i-- ) ((hcf_8*)(&ifbp->IFB_PRIIdentity))[i] = ((hcf_8*)(&ifbp->IFB_FWIdentity))[i];
4213 ifbp->IFB_PRIIdentity.typ = CFG_PRI_IDENTITY;
4214 ifbp->IFB_PRISup.typ = CFG_PRI_SUP_RANGE;
4215 xxxx[xxxx_PRI_IDENTITY_OFFSET] = &ifbp->IFB_PRIIdentity.len;
4216 xxxx[xxxx_PRI_IDENTITY_OFFSET+1] = &ifbp->IFB_PRISup.len;
4217 }
4218 if ( !mmd_check_comp( (void*)&cfg_drv_act_ranges_hsi, &ifbp->IFB_HSISup) /* 22*/
4219 #if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0
4220 //;? the PRI compatibility check is only relevant for DHF
4221 || !mmd_check_comp( (void*)&cfg_drv_act_ranges_pri, &ifbp->IFB_PRISup)
4222 #endif // HCF_TYPE_PRELOADED
4223 ) {
4224 ifbp->IFB_CardStat = CARD_STAT_INCOMP_PRI;
4225 rc = HCF_ERR_INCOMP_PRI;
4226 }
4227 if ( ( ifbp->IFB_FWSup.id == COMP_ID_STA && !mmd_check_comp( (void*)&cfg_drv_act_ranges_sta, &ifbp->IFB_FWSup) ) ||
4228 ( ifbp->IFB_FWSup.id == COMP_ID_APF && !mmd_check_comp( (void*)&cfg_drv_act_ranges_apf, &ifbp->IFB_FWSup) )
4229 ) { /* 24 */
4230 ifbp->IFB_CardStat |= CARD_STAT_INCOMP_FW;
4231 rc = HCF_ERR_INCOMP_FW;
4232 }
4233 }
4234 #endif // MSF_COMPONENT_ID
4235 #if (HCF_DL_ONLY) == 0 /* 28 */
4236 if ( rc == HCF_SUCCESS && ifbp->IFB_FWIdentity.comp_id >= COMP_ID_FW_STA ) {
4237 PROT_CNT_INI
4238 /**************************************************************************************
4239 * rlav: the DMA engine needs the host to cause a 'hanging alloc event' for it to consume.
4240 * not sure if this is the right spot in the HCF, thinking about hcf_enable...
4241 **************************************************************************************/
4242 rc = cmd_exe( ifbp, HCMD_ALLOC, 0 );
4243 // 180 degree error in logic ;? #if ALLOC_15
4244 // ifbp->IFB_RscInd = 1; //let's hope that by the time hcf_send_msg isa called, there will be a FID
4245 //#else
4246 if ( rc == HCF_SUCCESS ) {
4247 HCF_WAIT_WHILE( (IPW( HREG_EV_STAT ) & HREG_EV_ALLOC) == 0 );
4248 IF_PROT_TIME( HCFASSERT(prot_cnt, IPW( HREG_EV_STAT ) ) /*NOP*/;)
4249 #if HCF_DMA
4250 if ( ! ( ifbp->IFB_CntlOpt & USE_DMA ) )
4251 #endif // HCF_DMA
4252 {
4253 ifbp->IFB_RscInd = get_fid( ifbp );
4254 HCFASSERT( ifbp->IFB_RscInd, 0 )
4255 cmd_exe( ifbp, HCMD_ALLOC, 0 );
4256 IF_PROT_TIME( if ( prot_cnt == 0 ) rc = HCF_ERR_TIME_OUT; )
4257 }
4258 }
4259 //#endif // ALLOC_15
4260 }
4261 #endif // HCF_DL_ONLY
4262 HCFASSERT( rc == HCF_SUCCESS, rc )
4263 HCFLOGEXIT( HCF_TRACE_INIT )
4264 return rc;
4265 } // init
4266
4267 #if (HCF_DL_ONLY) == 0
4268 /************************************************************************************************************
4269 *
4270 *.SUBMODULE void isr_info( IFBP ifbp )
4271 *.PURPOSE handles link events.
4272 *
4273 *.ARGUMENTS
4274 * ifbp address of the Interface Block
4275 *
4276 *.RETURNS N.A.
4277 *
4278 *.DESCRIPTION
4279 *
4280 *
4281 *.DIAGRAM
4282 *1: First the FID number corresponding with the InfoEvent is determined.
4283 * Note the complication of the zero-FID protection sub-scheme in DAWA.
4284 * Next the L-field and the T-field are fetched into scratch buffer info.
4285 *2: In case of tallies, the 16 bits Hermes values are accumulated in the IFB into 32 bits values. Info[0]
4286 * is (expected to be) HCF_NIC_TAL_CNT + 1. The contraption "while ( info[0]-- >1 )" rather than
4287 * "while ( --info[0] )" is used because it is dangerous to determine the length of the Value field by
4288 * decrementing info[0]. As a result of a bug in some version of the F/W, info[0] may be 0, resulting
4289 * in a very long loop in the pre-decrement logic.
4290 *4: In case of a link status frame, the information is copied to the IFB field IFB_linkStat
4291 *6: All other than Tallies (including "unknown" ones) are checked against the selection set by the MSF
4292 * via CFG_RID_LOG. If a match is found or the selection set has the wild-card type (i.e non-NULL buffer
4293 * pointer at the terminating zero-type), the frame is copied to the (type-specific) log buffer.
4294 * Note that to accumulate tallies into IFB AND to log them or to log a frame when a specific match occures
4295 * AND based on the wild-card selection, you have to call setup_bap again after the 1st copy.
4296 *
4297 *.ENDDOC END DOCUMENTATION
4298 *
4299 ************************************************************************************************************/
4300 HCF_STATIC void
4301 isr_info( IFBP ifbp )
4302 {
4303 hcf_16 info[2], fid;
4304 #if (HCF_EXT) & HCF_EXT_INFO_LOG
4305 RID_LOGP ridp = ifbp->IFB_RIDLogp; //NULL or pointer to array of RID_LOG structures (terminated by zero typ)
4306 #endif // HCF_EXT_INFO_LOG
4307
4308 HCFTRACE( ifbp, HCF_TRACE_ISR_INFO ); /* 1 */
4309 fid = IPW( HREG_INFO_FID );
4310 DAWA_ZERO_FID( HREG_INFO_FID )
4311 if ( fid ) {
4312 (void)setup_bap( ifbp, fid, 0, IO_IN );
4313 get_frag( ifbp, (wci_bufp)info, 4 BE_PAR(2) );
4314 HCFASSERT( info[0] <= HCF_MAX_LTV + 1, MERGE_2( info[1], info[0] ) ) //;? a smaller value makes more sense
4315 #if (HCF_TALLIES) & HCF_TALLIES_NIC //Hermes tally support
4316 if ( info[1] == CFG_TALLIES ) {
4317 hcf_32 *p;
4318 /*2*/ if ( info[0] > HCF_NIC_TAL_CNT ) {
4319 info[0] = HCF_NIC_TAL_CNT + 1;
4320 }
4321 p = (hcf_32*)&ifbp->IFB_NIC_Tallies;
4322 while ( info[0]-- >1 ) *p++ += IPW( HREG_DATA_1 ); //request may return zero length
4323 }
4324 else
4325 #endif // HCF_TALLIES_NIC
4326 {
4327 /*4*/ if ( info[1] == CFG_LINK_STAT ) {
4328 ifbp->IFB_LinkStat = IPW( HREG_DATA_1 );
4329 }
4330 #if (HCF_EXT) & HCF_EXT_INFO_LOG
4331 /*6*/ while ( 1 ) {
4332 if ( ridp->typ == 0 || ridp->typ == info[1] ) {
4333 if ( ridp->bufp ) {
4334 HCFASSERT( ridp->len >= 2, ridp->typ )
4335 ridp->bufp[0] = min((hcf_16)(ridp->len - 1), info[0] ); //save L
4336 ridp->bufp[1] = info[1]; //save T
4337 get_frag( ifbp, (wci_bufp)&ridp->bufp[2], (ridp->bufp[0] - 1)*2 BE_PAR(0) );
4338 }
4339 break;
4340 }
4341 ridp++;
4342 }
4343 #endif // HCF_EXT_INFO_LOG
4344 }
4345 HCFTRACE( ifbp, HCF_TRACE_ISR_INFO | HCF_TRACE_EXIT );
4346 }
4347 return;
4348 } // isr_info
4349 #endif // HCF_DL_ONLY
4350
4351 //
4352 //
4353 // #endif // HCF_TALLIES_NIC
4354 // /*4*/ if ( info[1] == CFG_LINK_STAT ) {
4355 // ifbp->IFB_DSLinkStat = IPW( HREG_DATA_1 ) | CFG_LINK_STAT_CHANGE; //corrupts BAP !! ;?
4356 // ifbp->IFB_LinkStat = ifbp->IFB_DSLinkStat & CFG_LINK_STAT_FW; //;? to be obsoleted
4357 // printk( "<4>linkstatus: %04x\n", ifbp->IFB_DSLinkStat ); //;?remove me 1 day
4358 // #if (HCF_SLEEP) & HCF_DDS
4359 // if ( ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_CONNECTED ) == 0 ) { //even values are disconnected etc.
4360 // ifbp->IFB_TickCnt = 0; //start 2 second period (with 1 tick uncertanty)
4361 // printk( "<5>isr_info: AwaitConnection phase started, IFB_TickCnt = 0\n" ); //;?remove me 1 day
4362 // }
4363 // #endif // HCF_DDS
4364 // }
4365 // #if (HCF_EXT) & HCF_EXT_INFO_LOG
4366 // /*6*/ while ( 1 ) {
4367 // if ( ridp->typ == 0 || ridp->typ == info[1] ) {
4368 // if ( ridp->bufp ) {
4369 // HCFASSERT( ridp->len >= 2, ridp->typ )
4370 // (void)setup_bap( ifbp, fid, 2, IO_IN ); //restore BAP for tallies, linkstat and specific type followed by wild card
4371 // ridp->bufp[0] = min( ridp->len - 1, info[0] ); //save L
4372 // get_frag( ifbp, (wci_bufp)&ridp->bufp[1], ridp->bufp[0]*2 BE_PAR(0) );
4373 // }
4374 // break; //;?this break is no longer needed due to setup_bap but lets concentrate on DDS first
4375 // }
4376 // ridp++;
4377 // }
4378 // #endif // HCF_EXT_INFO_LOG
4379 // }
4380 // HCFTRACE( ifbp, HCF_TRACE_ISR_INFO | HCF_TRACE_EXIT );
4381 //
4382 //
4383 //
4384 //
4385 // return;
4386 //} // isr_info
4387 //#endif // HCF_DL_ONLY
4388
4389
4390 /************************************************************************************************************
4391 *
4392 *.SUBMODULE void mdd_assert( IFBP ifbp, unsigned int line_number, hcf_32 q )
4393 *.PURPOSE filters assert on level and interfaces to the MSF supplied msf_assert routine.
4394 *
4395 *.ARGUMENTS
4396 * ifbp address of the Interface Block
4397 * line_number line number of the line which caused the assert
4398 * q qualifier, additional information which may give a clue about the problem
4399 *
4400 *.RETURNS N.A.
4401 *
4402 *.DESCRIPTION
4403 *
4404 *
4405 *.DIAGRAM
4406 *
4407 *.NOTICE
4408 * mdd_assert has been through a turmoil, renaming hcf_assert to assert and hcf_assert again and supporting off
4409 * and on being called from the MSF level and other ( immature ) ModularDriverDevelopment modules like DHF and
4410 * MMD.
4411 * !!!! The assert routine is not an hcf_..... routine in the sense that it may be called by the MSF,
4412 * however it is called from mmd.c and dhf.c, so it must be external.
4413 * To prevent namespace pollution it needs a prefix, to prevent that MSF programmers think that
4414 * they are allowed to call the assert logic, the prefix HCF can't be used, so MDD is selected!!!!
4415 *
4416 * When called from the DHF module the line number is incremented by DHF_FILE_NAME_OFFSET and when called from
4417 * the MMD module by MMD_FILE_NAME_OFFSET.
4418 *
4419 *.ENDDOC END DOCUMENTATION
4420 *
4421 ************************************************************************************************************/
4422 #if HCF_ASSERT
4423 void
4424 mdd_assert( IFBP ifbp, unsigned int line_number, hcf_32 q )
4425 {
4426 hcf_16 run_time_flag = ifbp->IFB_AssertLvl;
4427
4428 if ( run_time_flag /* > ;?????? */ ) { //prevent recursive behavior, later to be extended to level filtering
4429 ifbp->IFB_AssertQualifier = q;
4430 ifbp->IFB_AssertLine = (hcf_16)line_number;
4431 #if (HCF_ASSERT) & ( HCF_ASSERT_LNK_MSF_RTN | HCF_ASSERT_RT_MSF_RTN )
4432 if ( ifbp->IFB_AssertRtn ) {
4433 ifbp->IFB_AssertRtn( line_number, ifbp->IFB_AssertTrace, q );
4434 }
4435 #endif // HCF_ASSERT_LNK_MSF_RTN / HCF_ASSERT_RT_MSF_RTN
4436 #if (HCF_ASSERT) & HCF_ASSERT_SW_SUP
4437 OPW( HREG_SW_2, line_number );
4438 OPW( HREG_SW_2, ifbp->IFB_AssertTrace );
4439 OPW( HREG_SW_2, (hcf_16)q );
4440 OPW( HREG_SW_2, (hcf_16)(q >> 16 ) );
4441 #endif // HCF_ASSERT_SW_SUP
4442
4443 #if (HCF_EXT) & HCF_EXT_MB && (HCF_ASSERT) & HCF_ASSERT_MB
4444 ifbp->IFB_AssertLvl = 0; // prevent recursive behavior
4445 hcf_put_info( ifbp, (LTVP)&ifbp->IFB_AssertStrct );
4446 ifbp->IFB_AssertLvl = run_time_flag; // restore appropriate filter level
4447 #endif // HCF_EXT_MB / HCF_ASSERT_MB
4448 }
4449 } // mdd_assert
4450 #endif // HCF_ASSERT
4451
4452
4453 /************************************************************************************************************
4454 *
4455 *.SUBMODULE void put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
4456 *.PURPOSE writes with 16/32 bit I/O via BAP1 port from Host memory to NIC RAM.
4457 *
4458 *.ARGUMENTS
4459 * ifbp address of the Interface Block
4460 * bufp (byte) address of buffer
4461 * len length in bytes of buffer specified by bufp
4462 * word_len Big Endian only: number of leading bytes to swap in pairs
4463 *
4464 *.RETURNS N.A.
4465 *
4466 *.DESCRIPTION
4467 * process the single byte (if applicable) not yet written by the previous put_frag and copy len
4468 * (or len-1) bytes from bufp to NIC.
4469 *
4470 *
4471 *.DIAGRAM
4472 *
4473 *.NOTICE
4474 * It turns out DOS ODI uses zero length fragments. The HCF code can cope with it, but as a consequence, no
4475 * Assert on len is possible
4476 *
4477 *.ENDDOC END DOCUMENTATION
4478 *
4479 ************************************************************************************************************/
4480 HCF_STATIC void
4481 put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
4482 {
4483 hcf_io io_port = ifbp->IFB_IOBase + HREG_DATA_1; //BAP data register
4484 int i; //prevent side effects from macro
4485 hcf_16 j;
4486 HCFASSERT( ((hcf_32)bufp & (HCF_ALIGN-1) ) == 0, (hcf_32)bufp )
4487 #if HCF_BIG_ENDIAN
4488 HCFASSERT( word_len == 0 || word_len == 2 || word_len == 4, word_len )
4489 HCFASSERT( word_len == 0 || ((hcf_32)bufp & 1 ) == 0, (hcf_32)bufp )
4490 HCFASSERT( word_len <= len, MERGE_2( word_len, len ) )
4491
4492 if ( word_len ) { //if there is anything to convert
4493 //. convert and write the 1st hcf_16
4494 j = bufp[1] | bufp[0]<<8;
4495 OUT_PORT_WORD( io_port, j );
4496 //. update pointer and counter accordingly
4497 len -= 2;
4498 bufp += 2;
4499 if ( word_len > 1 ) { //. if there is to convert more than 1 word ( i.e 2 )
4500 //. . convert and write the 2nd hcf_16
4501 j = bufp[1] | bufp[0]<<8; /*bufp is already incremented by 2*/
4502 OUT_PORT_WORD( io_port, j );
4503 //. . update pointer and counter accordingly
4504 len -= 2;
4505 bufp += 2;
4506 }
4507 }
4508 #endif // HCF_BIG_ENDIAN
4509 i = len;
4510 if ( i && ifbp->IFB_CarryOut ) { //skip zero-length
4511 j = ((*bufp)<<8) + ( ifbp->IFB_CarryOut & 0xFF );
4512 OUT_PORT_WORD( io_port, j );
4513 bufp++; i--;
4514 ifbp->IFB_CarryOut = 0;
4515 }
4516 #if (HCF_IO) & HCF_IO_32BITS
4517 //skip zero-length I/O, single byte I/O and I/O not worthwhile (i.e. less than 6 bytes)for DW logic
4518 //if buffer length >= 6 and 32 bits I/O support
4519 if ( !(ifbp->IFB_CntlOpt & USE_16BIT) && i >= 6 ) {
4520 hcf_32 FAR *p4; //prevent side effects from macro
4521 if ( ( (hcf_32)bufp & 0x1 ) == 0 ) { //. if buffer at least word aligned
4522 if ( (hcf_32)bufp & 0x2 ) { //. . if buffer not double word aligned
4523 //. . . write a single word to get double word aligned
4524 j = *(wci_recordp)bufp; //just to help ease writing macros with embedded assembly
4525 OUT_PORT_WORD( io_port, j );
4526 //. . . adjust buffer length and pointer accordingly
4527 bufp += 2; i -= 2;
4528 }
4529 //. . write as many double word as possible
4530 p4 = (hcf_32 FAR *)bufp;
4531 j = (hcf_16)i/4;
4532 OUT_PORT_STRING_32( io_port, p4, j );
4533 //. . adjust buffer length and pointer accordingly
4534 bufp += i & ~0x0003;
4535 i &= 0x0003;
4536 }
4537 }
4538 #endif // HCF_IO_32BITS
4539 //if no 32-bit support OR byte aligned OR 1 word left
4540 if ( i ) {
4541 //. if odd number of bytes left
4542 if ( i & 0x0001 ) {
4543 //. . save left over byte (before bufp is corrupted) in carry, set carry flag
4544 ifbp->IFB_CarryOut = (hcf_16)bufp[i-1] | 0x0100; //note that i and bufp are always simultaneously modified, &bufp[i-1] is invariant
4545 }
4546 //. write as many word as possible in "alignment safe" way
4547 j = (hcf_16)i/2;
4548 OUT_PORT_STRING_8_16( io_port, bufp, j );
4549 }
4550 } // put_frag
4551
4552
4553 /************************************************************************************************************
4554 *
4555 *.SUBMODULE void put_frag_finalize( IFBP ifbp )
4556 *.PURPOSE cleanup after put_frag for trailing odd byte and MIC transfer to NIC.
4557 *
4558 *.ARGUMENTS
4559 * ifbp address of the Interface Block
4560 *
4561 *.RETURNS N.A.
4562 *
4563 *.DESCRIPTION
4564 * finalize the MIC calculation with the padding pattern, output the last byte (if applicable)
4565 * of the message and the MIC to the TxFS
4566 *
4567 *
4568 *.DIAGRAM
4569 *2: 1 byte of the last put_frag may be still in IFB_CarryOut ( the put_frag carry holder ), so ........
4570 * 1 - 3 bytes of the last put_frag may be still in IFB_tx_32 ( the MIC engine carry holder ), so ........
4571 * The call to the MIC calculation routine feeds these remaining bytes (if any) of put_frag and the
4572 * just as many bytes of the padding as needed to the MIC calculation engine. Note that the "unneeded" pad
4573 * bytes simply end up in the MIC engine carry holder and are never used.
4574 *8: write the remainder of the MIC and possible some garbage to NIC RAM
4575 * Note: i is always 4 (a loop-invariant of the while in point 2)
4576 *
4577 *.NOTICE
4578 *
4579 *.ENDDOC END DOCUMENTATION
4580 *
4581 ************************************************************************************************************/
4582 HCF_STATIC void
4583 put_frag_finalize( IFBP ifbp )
4584 {
4585 #if (HCF_TYPE) & HCF_TYPE_WPA
4586 if ( ifbp->IFB_MICTxCarry != 0xFFFF) { //if MIC calculation active
4587 CALC_TX_MIC( mic_pad, 8); //. feed (up to 8 bytes of) virtual padding to MIC engine
4588 //. write (possibly) trailing byte + (most of) MIC
4589 put_frag( ifbp, (wci_bufp)ifbp->IFB_MICTx, 8 BE_PAR(0) );
4590 }
4591 #endif // HCF_TYPE_WPA
4592 put_frag( ifbp, null_addr, 1 BE_PAR(0) ); //write (possibly) trailing data or MIC byte
4593 } // put_frag_finalize
4594
4595
4596 /************************************************************************************************************
4597 *
4598 *.SUBMODULE int put_info( IFBP ifbp, LTVP ltvp )
4599 *.PURPOSE support routine to handle the "basic" task of hcf_put_info to pass RIDs to the NIC.
4600 *
4601 *.ARGUMENTS
4602 * ifbp address of the Interface Block
4603 * ltvp address in NIC RAM where LVT-records are located
4604 *
4605 *.RETURNS
4606 * HCF_SUCCESS
4607 * >>put_frag
4608 * >>cmd_wait
4609 *
4610 *.DESCRIPTION
4611 *
4612 *
4613 *.DIAGRAM
4614 *20: do not write RIDs to NICs which have incompatible Firmware
4615 *24: If the RID does not exist, the L-field is set to zero.
4616 * Note that some RIDs can not be read, e.g. the pseudo RIDs for direct Hermes commands and CFG_DEFAULT_KEYS
4617 *28: If the RID is written successful, pass it to the NIC by means of an Access Write command
4618 *
4619 *.NOTICE
4620 * The mechanism to HCF_ASSERT on invalid typ-codes in the LTV record is based on the following strategy:
4621 * - some codes (e.g. CFG_REG_MB) are explicitly handled by the HCF which implies that these codes
4622 * are valid. These codes are already consumed by hcf_put_info.
4623 * - all other codes are passed to the Hermes. Before the put action is executed, hcf_get_info is called
4624 * with an LTV record with a value of 1 in the L-field and the intended put action type in the Typ-code
4625 * field. If the put action type is valid, it is also valid as a get action type code - except
4626 * for CFG_DEFAULT_KEYS and CFG_ADD_TKIP_DEFAULT_KEY - so the HCF_ASSERT logic of hcf_get_info should
4627 * not catch.
4628 *
4629 *.ENDDOC END DOCUMENTATION
4630 *
4631 ************************************************************************************************************/
4632 HCF_STATIC int
4633 put_info( IFBP ifbp, LTVP ltvp )
4634 {
4635
4636 int rc = HCF_SUCCESS;
4637
4638 HCFASSERT( ifbp->IFB_CardStat == 0, MERGE_2( ltvp->typ, ifbp->IFB_CardStat ) )
4639 HCFASSERT( CFG_RID_CFG_MIN <= ltvp->typ && ltvp->typ <= CFG_RID_CFG_MAX, ltvp->typ )
4640
4641 if ( ifbp->IFB_CardStat == 0 && /* 20*/
4642 ( ( CFG_RID_CFG_MIN <= ltvp->typ && ltvp->typ <= CFG_RID_CFG_MAX ) ||
4643 ( CFG_RID_ENG_MIN <= ltvp->typ /* && ltvp->typ <= 0xFFFF */ ) ) ) {
4644 #if HCF_ASSERT //FCC8, FCB0, FCB4, FCB6, FCB7, FCB8, FCC0, FCC4, FCBC, FCBD, FCBE, FCBF
4645 {
4646 hcf_16 t = ltvp->typ;
4647 LTV_STRCT x = { 2, t, {0} }; /*24*/
4648 hcf_get_info( ifbp, (LTVP)&x );
4649 if ( x.len == 0 &&
4650 ( t != CFG_DEFAULT_KEYS && t != CFG_ADD_TKIP_DEFAULT_KEY && t != CFG_REMOVE_TKIP_DEFAULT_KEY &&
4651 t != CFG_ADD_TKIP_MAPPED_KEY && t != CFG_REMOVE_TKIP_MAPPED_KEY &&
4652 t != CFG_HANDOVER_ADDR && t != CFG_DISASSOCIATE_ADDR &&
4653 t != CFG_FCBC && t != CFG_FCBD && t != CFG_FCBE && t != CFG_FCBF &&
4654 t != CFG_DEAUTHENTICATE_ADDR
4655 )
4656 ) {
4657 HCFASSERT( DO_ASSERT, ltvp->typ )
4658 }
4659 }
4660 #endif // HCF_ASSERT
4661
4662 rc = setup_bap( ifbp, ltvp->typ, 0, IO_OUT );
4663 put_frag( ifbp, (wci_bufp)ltvp, 2*ltvp->len + 2 BE_PAR(2) );
4664 /*28*/ if ( rc == HCF_SUCCESS ) {
4665 rc = cmd_exe( ifbp, HCMD_ACCESS + HCMD_ACCESS_WRITE, ltvp->typ );
4666 }
4667 }
4668 return rc;
4669 } // put_info
4670
4671
4672 #if (HCF_DL_ONLY) == 0
4673 /************************************************************************************************************
4674 *
4675 *.SUBMODULE int put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp )
4676 *.PURPOSE accumulates a ( series of) buffers into a single Info block into the MailBox.
4677 *
4678 *.ARGUMENTS
4679 * ifbp address of the Interface Block
4680 * ltvp address of structure specifying the "type" and the fragments of the information to be synthesized
4681 * as an LTV into the MailBox
4682 *
4683 *.RETURNS
4684 *
4685 *.DESCRIPTION
4686 * If the data does not fit (including no MailBox is available), the IFB_MBTally is incremented and an
4687 * error status is returned.
4688 * HCF_ASSERT does not catch.
4689 * Calling put_info_mb when their is no MailBox available, is considered a design error in the MSF.
4690 *
4691 * Note that there is always at least 1 word of unused space in the mail box.
4692 * As a consequence:
4693 * - no problem in pointer arithmetic (MB_RP == MB_WP means unambiguously mail box is completely empty
4694 * - There is always free space to write an L field with a value of zero after each MB_Info block. This
4695 * allows for an easy scan mechanism in the "get MB_Info block" logic.
4696 *
4697 *
4698 *.DIAGRAM
4699 *1: Calculate L field of the MBIB, i.e. 1 for the T-field + the cumulative length of the fragments.
4700 *2: The free space in the MailBox is calculated (2a: free part from Write Ptr to Read Ptr, 2b: free part
4701 * turns out to wrap around) . If this space suffices to store the number of words reflected by len (T-field
4702 * + Value-field) plus the additional MailBox Info L-field + a trailing 0 to act as the L-field of a trailing
4703 * dummy or empty LTV record, then a MailBox Info block is build in the MailBox consisting of
4704 * - the value len in the first word
4705 * - type in the second word
4706 * - a copy of the contents of the fragments in the second and higher word
4707 *
4708 *4: Since put_info_mb() can more or less directly be called from the MSF level, the I/F must be robust
4709 * against out-of-range variables. As failsafe coding, the MB update is skipped by changing tlen to 0 if
4710 * len == 0; This will indirectly cause an assert as result of the violation of the next if clause.
4711 *6: Check whether the free space in MailBox suffices (this covers the complete absence of the MailBox).
4712 * Note that len is unsigned, so even MSF I/F violation works out O.K.
4713 * The '2' in the expression "len+2" is used because 1 word is needed for L itself and 1 word is needed
4714 * for the zero-sentinel
4715 *8: update MailBox Info length report to MSF with "oldest" MB Info Block size. Be careful here, if you get
4716 * here before the MailBox is registered, you can't read from the buffer addressed by IFB_MBp (it is the
4717 * Null buffer) so don't move this code till the end of this routine but keep it where there is garuanteed
4718 * a buffer.
4719 *
4720 *.NOTICE
4721 * boundary testing depends on the fact that IFB_MBSize is guaranteed to be zero if no MailBox is present,
4722 * and to a lesser degree, that IFB_MBWp = IFB_MBRp = 0
4723 *
4724 *.ENDDOC END DOCUMENTATION
4725 *
4726 ************************************************************************************************************/
4727 #if (HCF_EXT) & HCF_EXT_MB
4728
4729 HCF_STATIC int
4730 put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp )
4731 {
4732
4733 int rc = HCF_SUCCESS;
4734 hcf_16 i; //work counter
4735 hcf_16 *dp; //destination pointer (in MailBox)
4736 wci_recordp sp; //source pointer
4737 hcf_16 len; //total length to copy to MailBox
4738 hcf_16 tlen; //free length/working length/offset in WMP frame
4739
4740 if ( ifbp->IFB_MBp == NULL ) return rc; //;?not sufficient
4741 HCFASSERT( ifbp->IFB_MBp != NULL, 0 ) //!!!be careful, don't get into an endless recursion
4742 HCFASSERT( ifbp->IFB_MBSize, 0 )
4743
4744 len = 1; /* 1 */
4745 for ( i = 0; i < ltvp->frag_cnt; i++ ) {
4746 len += ltvp->frag_buf[i].frag_len;
4747 }
4748 if ( ifbp->IFB_MBRp > ifbp->IFB_MBWp ) {
4749 tlen = ifbp->IFB_MBRp - ifbp->IFB_MBWp; /* 2a*/
4750 } else {
4751 if ( ifbp->IFB_MBRp == ifbp->IFB_MBWp ) {
4752 ifbp->IFB_MBRp = ifbp->IFB_MBWp = 0; // optimize Wrapping
4753 }
4754 tlen = ifbp->IFB_MBSize - ifbp->IFB_MBWp; /* 2b*/
4755 if ( ( tlen <= len + 2 ) && ( len + 2 < ifbp->IFB_MBRp ) ) { //if trailing space is too small but
4756 // leading space is sufficiently large
4757 ifbp->IFB_MBp[ifbp->IFB_MBWp] = 0xFFFF; //flag dummy LTV to fill the trailing space
4758 ifbp->IFB_MBWp = 0; //reset WritePointer to begin of MailBox
4759 tlen = ifbp->IFB_MBRp; //get new available space size
4760 }
4761 }
4762 dp = &ifbp->IFB_MBp[ifbp->IFB_MBWp];
4763 if ( len == 0 ) {
4764 tlen = 0; //;? what is this good for
4765 }
4766 if ( len + 2 >= tlen ){ /* 6 */
4767 //Do Not ASSERT, this is a normal condition
4768 IF_TALLY( ifbp->IFB_HCF_Tallies.NoBufMB++; ) /*NOP to cover against analomies with empty compound*/;
4769 rc = HCF_ERR_LEN;
4770 } else {
4771 *dp++ = len; //write Len (= size of T+V in words to MB_Info block
4772 *dp++ = ltvp->base_typ; //write Type to MB_Info block
4773 ifbp->IFB_MBWp += len + 1; //update WritePointer of MailBox
4774 for ( i = 0; i < ltvp->frag_cnt; i++ ) { // process each of the fragments
4775 sp = ltvp->frag_buf[i].frag_addr;
4776 len = ltvp->frag_buf[i].frag_len;
4777 while ( len-- ) *dp++ = *sp++;
4778 }
4779 ifbp->IFB_MBp[ifbp->IFB_MBWp] = 0; //to assure get_info for CFG_MB_INFO stops
4780 ifbp->IFB_MBInfoLen = ifbp->IFB_MBp[ifbp->IFB_MBRp]; /* 8 */
4781 }
4782 return rc;
4783 } // put_info_mb
4784
4785 #endif // HCF_EXT_MB
4786 #endif // HCF_DL_ONLY
4787
4788
4789 /************************************************************************************************************
4790 *
4791 *.SUBMODULE int setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type )
4792 *.PURPOSE set up data access to NIC RAM via BAP_1.
4793 *
4794 *.ARGUMENTS
4795 * ifbp address of I/F Block
4796 * fid FID/RID
4797 * offset !!even!! offset in FID/RID
4798 * type IO_IN, IO_OUT
4799 *
4800 *.RETURNS
4801 * HCF_SUCCESS O.K
4802 * HCF_ERR_NO_NIC card is removed
4803 * HCF_ERR_DEFUNCT_TIME_OUT Fatal malfunction detected
4804 * HCF_ERR_DEFUNCT_..... if and only if IFB_DefunctStat <> 0
4805 *
4806 *.DESCRIPTION
4807 *
4808 * A non-zero return status indicates:
4809 * - the NIC is considered nonoperational, e.g. due to a time-out of some Hermes activity in the past
4810 * - BAP_1 could not properly be initialized
4811 * - the card is removed before completion of the data transfer
4812 * In all other cases, a zero is returned.
4813 * BAP Initialization failure indicates an H/W error which is very likely to signal complete H/W failure.
4814 * Once a BAP Initialization failure has occurred all subsequent interactions with the Hermes will return a
4815 * "defunct" status till the Hermes is re-initialized by means of an hcf_connect.
4816 *
4817 * A BAP is a set of registers (Offset, Select and Data) offering read/write access to a particular FID or
4818 * RID. This access is based on a auto-increment feature.
4819 * There are two BAPs but these days the HCF uses only BAP_1 and leaves BAP_0 to the PCI Busmastering H/W.
4820 *
4821 * The BAP-mechanism is based on the Busy bit in the Offset register (see the Hermes definition). The waiting
4822 * for Busy must occur between writing the Offset register and accessing the Data register. The
4823 * implementation to wait for the Busy bit drop after each write to the Offset register, implies that the
4824 * requirement that the Busy bit is low before the Select register is written, is automatically met.
4825 * BAP-setup may be time consuming (e.g. 380 usec for large offsets occurs frequently). The wait for Busy bit
4826 * drop is protected by a loop counter, which is initialized with IFB_TickIni, which is calibrated in init.
4827 *
4828 * The NIC I/F is optimized for word transfer and can only handle word transfer at a word boundary in NIC
4829 * RAM. The intended solution for transfer of a single byte has multiple H/W flaws. There have been different
4830 * S/W Workaround strategies. RID access is hcf_16 based by "nature", so no byte access problems. For Tx/Rx
4831 * FID access, the byte logic became obsolete by absorbing it in the double word oriented nature of the MIC
4832 * feature.
4833 *
4834 *
4835 *.DIAGRAM
4836 *
4837 *2: the test on rc checks whether the HCF went into "defunct" mode ( e.g. BAP initialization or a call to
4838 * cmd_wait did ever fail).
4839 *4: the select register and offset register are set
4840 * the offset register is monitored till a successful condition (no busy bit) is detected or till the
4841 * (calibrated) protection counter expires
4842 * If the counter expires, this is reflected in IFB_DefunctStat, so all subsequent calls to setup_bap fail
4843 * immediately ( see 2)
4844 *6: initialization of the carry as used by pet/get_frag
4845 *8: HREG_OFFSET_ERR is ignored as error because:
4846 * a: the Hermes is robust against it
4847 * b: it is not known what causes it (probably a bug), hence no strategy can be specified which level is
4848 * to handle this error in which way. In the past, it could be induced by the MSF level, e.g. by calling
4849 * hcf_rcv_msg while there was no Rx-FID available. Since this is an MSF-error which is caught by ASSERT,
4850 * there is no run-time action required by the HCF.
4851 * Lumping the Offset error in with the Busy bit error, as has been done in the past turns out to be a
4852 * disaster or a life saver, just depending on what the cause of the error is. Since no prediction can be
4853 * done about the future, it is "felt" to be the best strategy to ignore this error. One day the code was
4854 * accompanied by the following comment:
4855 * // ignore HREG_OFFSET_ERR, someone, supposedly the MSF programmer ;) made a bug. Since we don't know
4856 * // what is going on, we might as well go on - under management pressure - by ignoring it
4857 *
4858 *.ENDDOC END DOCUMENTATION
4859 *
4860 ************************************************************************************************************/
4861 HCF_STATIC int
4862 setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type )
4863 {
4864 PROT_CNT_INI
4865 int rc;
4866
4867 HCFTRACE( ifbp, HCF_TRACE_STRIO );
4868 rc = ifbp->IFB_DefunctStat;
4869 if (rc == HCF_SUCCESS) { /*2*/
4870 OPW( HREG_SELECT_1, fid ); /*4*/
4871 OPW( HREG_OFFSET_1, offset );
4872 if ( type == IO_IN ) {
4873 ifbp->IFB_CarryIn = 0;
4874 }
4875 else ifbp->IFB_CarryOut = 0;
4876 HCF_WAIT_WHILE( IPW( HREG_OFFSET_1) & HCMD_BUSY );
4877 HCFASSERT( !( IPW( HREG_OFFSET_1) & HREG_OFFSET_ERR ), MERGE_2( fid, offset ) ) /*8*/
4878 if ( prot_cnt == 0 ) {
4879 HCFASSERT( DO_ASSERT, MERGE_2( fid, offset ) )
4880 rc = ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_TIME_OUT;
4881 ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
4882 }
4883 }
4884 HCFTRACE( ifbp, HCF_TRACE_STRIO | HCF_TRACE_EXIT );
4885 return rc;
4886 } // setup_bap
4887