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[mirror_ubuntu-bionic-kernel.git] / drivers / thermal / rcar_gen3_thermal.c
1 /*
2 * R-Car Gen3 THS thermal sensor driver
3 * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
4 *
5 * Copyright (C) 2016 Renesas Electronics Corporation.
6 * Copyright (C) 2016 Sang Engineering
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 */
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/interrupt.h>
21 #include <linux/io.h>
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/platform_device.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/spinlock.h>
27 #include <linux/sys_soc.h>
28 #include <linux/thermal.h>
29
30 #include "thermal_core.h"
31
32 /* Register offsets */
33 #define REG_GEN3_IRQSTR 0x04
34 #define REG_GEN3_IRQMSK 0x08
35 #define REG_GEN3_IRQCTL 0x0C
36 #define REG_GEN3_IRQEN 0x10
37 #define REG_GEN3_IRQTEMP1 0x14
38 #define REG_GEN3_IRQTEMP2 0x18
39 #define REG_GEN3_IRQTEMP3 0x1C
40 #define REG_GEN3_CTSR 0x20
41 #define REG_GEN3_THCTR 0x20
42 #define REG_GEN3_TEMP 0x28
43 #define REG_GEN3_THCODE1 0x50
44 #define REG_GEN3_THCODE2 0x54
45 #define REG_GEN3_THCODE3 0x58
46
47 /* IRQ{STR,MSK,EN} bits */
48 #define IRQ_TEMP1 BIT(0)
49 #define IRQ_TEMP2 BIT(1)
50 #define IRQ_TEMP3 BIT(2)
51 #define IRQ_TEMPD1 BIT(3)
52 #define IRQ_TEMPD2 BIT(4)
53 #define IRQ_TEMPD3 BIT(5)
54
55 /* CTSR bits */
56 #define CTSR_PONM BIT(8)
57 #define CTSR_AOUT BIT(7)
58 #define CTSR_THBGR BIT(5)
59 #define CTSR_VMEN BIT(4)
60 #define CTSR_VMST BIT(1)
61 #define CTSR_THSST BIT(0)
62
63 /* THCTR bits */
64 #define THCTR_PONM BIT(6)
65 #define THCTR_THSST BIT(0)
66
67 #define CTEMP_MASK 0xFFF
68
69 #define MCELSIUS(temp) ((temp) * 1000)
70 #define GEN3_FUSE_MASK 0xFFF
71
72 #define TSC_MAX_NUM 3
73
74 /* Structure for thermal temperature calculation */
75 struct equation_coefs {
76 int a1;
77 int b1;
78 int a2;
79 int b2;
80 };
81
82 struct rcar_gen3_thermal_tsc {
83 void __iomem *base;
84 struct thermal_zone_device *zone;
85 struct equation_coefs coef;
86 int low;
87 int high;
88 };
89
90 struct rcar_gen3_thermal_priv {
91 struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
92 unsigned int num_tscs;
93 spinlock_t lock; /* Protect interrupts on and off */
94 void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
95 };
96
97 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
98 u32 reg)
99 {
100 return ioread32(tsc->base + reg);
101 }
102
103 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
104 u32 reg, u32 data)
105 {
106 iowrite32(data, tsc->base + reg);
107 }
108
109 /*
110 * Linear approximation for temperature
111 *
112 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
113 *
114 * The constants a and b are calculated using two triplets of int values PTAT
115 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
116 * coded values from driver. The formula to calculate a and b are taken from
117 * BSP and sparsely documented and understood.
118 *
119 * Examining the linear formula and the formula used to calculate constants a
120 * and b while knowing that the span for PTAT and THCODE values are between
121 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
122 * Integer also needs to be signed so that leaves 7 bits for binary
123 * fixed point scaling.
124 */
125
126 #define FIXPT_SHIFT 7
127 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
128 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
129 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
130 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
131
132 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
133
134 /* no idea where these constants come from */
135 #define TJ_1 96
136 #define TJ_3 -41
137
138 static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
139 int *ptat, int *thcode)
140 {
141 int tj_2;
142
143 /* TODO: Find documentation and document constant calculation formula */
144
145 /*
146 * Division is not scaled in BSP and if scaled it might overflow
147 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
148 */
149 tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 137)
150 / (ptat[0] - ptat[2])) - FIXPT_INT(41);
151
152 coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
153 tj_2 - FIXPT_INT(TJ_3));
154 coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
155
156 coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
157 tj_2 - FIXPT_INT(TJ_1));
158 coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
159 }
160
161 static int rcar_gen3_thermal_round(int temp)
162 {
163 int result, round_offs;
164
165 round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
166 -RCAR3_THERMAL_GRAN / 2;
167 result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
168 return result * RCAR3_THERMAL_GRAN;
169 }
170
171 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
172 {
173 struct rcar_gen3_thermal_tsc *tsc = devdata;
174 int mcelsius, val1, val2;
175 u32 reg;
176
177 /* Read register and convert to mili Celsius */
178 reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
179
180 val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
181 val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
182 mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
183
184 /* Make sure we are inside specifications */
185 if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
186 return -EIO;
187
188 /* Round value to device granularity setting */
189 *temp = rcar_gen3_thermal_round(mcelsius);
190
191 return 0;
192 }
193
194 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
195 int mcelsius)
196 {
197 int celsius, val1, val2;
198
199 celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
200 val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
201 val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
202
203 return INT_FIXPT((val1 + val2) / 2);
204 }
205
206 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
207 {
208 struct rcar_gen3_thermal_tsc *tsc = devdata;
209
210 low = clamp_val(low, -40000, 125000);
211 high = clamp_val(high, -40000, 125000);
212
213 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
214 rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
215
216 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
217 rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
218
219 tsc->low = low;
220 tsc->high = high;
221
222 return 0;
223 }
224
225 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
226 .get_temp = rcar_gen3_thermal_get_temp,
227 .set_trips = rcar_gen3_thermal_set_trips,
228 };
229
230 static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
231 {
232 unsigned int i;
233 u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
234
235 for (i = 0; i < priv->num_tscs; i++)
236 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
237 }
238
239 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
240 {
241 struct rcar_gen3_thermal_priv *priv = data;
242 u32 status;
243 int i, ret = IRQ_HANDLED;
244
245 spin_lock(&priv->lock);
246 for (i = 0; i < priv->num_tscs; i++) {
247 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
248 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
249 if (status)
250 ret = IRQ_WAKE_THREAD;
251 }
252
253 if (ret == IRQ_WAKE_THREAD)
254 rcar_thermal_irq_set(priv, false);
255
256 spin_unlock(&priv->lock);
257
258 return ret;
259 }
260
261 static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
262 {
263 struct rcar_gen3_thermal_priv *priv = data;
264 unsigned long flags;
265 int i;
266
267 for (i = 0; i < priv->num_tscs; i++)
268 thermal_zone_device_update(priv->tscs[i]->zone,
269 THERMAL_EVENT_UNSPECIFIED);
270
271 spin_lock_irqsave(&priv->lock, flags);
272 rcar_thermal_irq_set(priv, true);
273 spin_unlock_irqrestore(&priv->lock, flags);
274
275 return IRQ_HANDLED;
276 }
277
278 static const struct soc_device_attribute r8a7795es1[] = {
279 { .soc_id = "r8a7795", .revision = "ES1.*" },
280 { /* sentinel */ }
281 };
282
283 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
284 {
285 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
286 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
287
288 usleep_range(1000, 2000);
289
290 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
291
292 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
293 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
294 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
295
296 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
297 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
298
299 usleep_range(100, 200);
300
301 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
302 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
303 CTSR_VMST | CTSR_THSST);
304
305 usleep_range(1000, 2000);
306 }
307
308 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
309 {
310 u32 reg_val;
311
312 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
313 reg_val &= ~THCTR_PONM;
314 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
315
316 usleep_range(1000, 2000);
317
318 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
319 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
320 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
321
322 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
323 reg_val |= THCTR_THSST;
324 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
325
326 usleep_range(1000, 2000);
327 }
328
329 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
330 { .compatible = "renesas,r8a7795-thermal", },
331 { .compatible = "renesas,r8a7796-thermal", },
332 {},
333 };
334 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
335
336 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
337 {
338 struct device *dev = &pdev->dev;
339
340 pm_runtime_put(dev);
341 pm_runtime_disable(dev);
342
343 return 0;
344 }
345
346 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
347 {
348 struct rcar_gen3_thermal_priv *priv;
349 struct device *dev = &pdev->dev;
350 struct resource *res;
351 struct thermal_zone_device *zone;
352 int ret, irq, i;
353 char *irqname;
354
355 /* default values if FUSEs are missing */
356 /* TODO: Read values from hardware on supported platforms */
357 int ptat[3] = { 2351, 1509, 435 };
358 int thcode[TSC_MAX_NUM][3] = {
359 { 3248, 2800, 2221 },
360 { 3245, 2795, 2216 },
361 { 3250, 2805, 2237 },
362 };
363
364 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
365 if (!priv)
366 return -ENOMEM;
367
368 priv->thermal_init = rcar_gen3_thermal_init;
369 if (soc_device_match(r8a7795es1))
370 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
371
372 spin_lock_init(&priv->lock);
373
374 platform_set_drvdata(pdev, priv);
375
376 /*
377 * Request 2 (of the 3 possible) IRQs, the driver only needs to
378 * to trigger on the low and high trip points of the current
379 * temp window at this point.
380 */
381 for (i = 0; i < 2; i++) {
382 irq = platform_get_irq(pdev, i);
383 if (irq < 0)
384 return irq;
385
386 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
387 dev_name(dev), i);
388 if (!irqname)
389 return -ENOMEM;
390
391 ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
392 rcar_gen3_thermal_irq_thread,
393 IRQF_SHARED, irqname, priv);
394 if (ret)
395 return ret;
396 }
397
398 pm_runtime_enable(dev);
399 pm_runtime_get_sync(dev);
400
401 for (i = 0; i < TSC_MAX_NUM; i++) {
402 struct rcar_gen3_thermal_tsc *tsc;
403
404 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
405 if (!res)
406 break;
407
408 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
409 if (!tsc) {
410 ret = -ENOMEM;
411 goto error_unregister;
412 }
413
414 tsc->base = devm_ioremap_resource(dev, res);
415 if (IS_ERR(tsc->base)) {
416 ret = PTR_ERR(tsc->base);
417 goto error_unregister;
418 }
419
420 priv->tscs[i] = tsc;
421
422 priv->thermal_init(tsc);
423 rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
424
425 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
426 &rcar_gen3_tz_of_ops);
427 if (IS_ERR(zone)) {
428 dev_err(dev, "Can't register thermal zone\n");
429 ret = PTR_ERR(zone);
430 goto error_unregister;
431 }
432 tsc->zone = zone;
433
434 ret = of_thermal_get_ntrips(tsc->zone);
435 if (ret < 0)
436 goto error_unregister;
437
438 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
439 }
440
441 priv->num_tscs = i;
442
443 if (!priv->num_tscs) {
444 ret = -ENODEV;
445 goto error_unregister;
446 }
447
448 rcar_thermal_irq_set(priv, true);
449
450 return 0;
451
452 error_unregister:
453 rcar_gen3_thermal_remove(pdev);
454
455 return ret;
456 }
457
458 static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
459 {
460 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
461
462 rcar_thermal_irq_set(priv, false);
463
464 return 0;
465 }
466
467 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
468 {
469 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
470 unsigned int i;
471
472 for (i = 0; i < priv->num_tscs; i++) {
473 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
474
475 priv->thermal_init(tsc);
476 rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
477 }
478
479 rcar_thermal_irq_set(priv, true);
480
481 return 0;
482 }
483
484 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
485 rcar_gen3_thermal_resume);
486
487 static struct platform_driver rcar_gen3_thermal_driver = {
488 .driver = {
489 .name = "rcar_gen3_thermal",
490 .pm = &rcar_gen3_thermal_pm_ops,
491 .of_match_table = rcar_gen3_thermal_dt_ids,
492 },
493 .probe = rcar_gen3_thermal_probe,
494 .remove = rcar_gen3_thermal_remove,
495 };
496 module_platform_driver(rcar_gen3_thermal_driver);
497
498 MODULE_LICENSE("GPL v2");
499 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
500 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");