drivers/thermal/rockchip_thermal.c

   1 /*
   2  * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
   3  * Caesar Wang <wxt@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/delay.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/of_address.h>
  22 #include <linux/of_irq.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/regmap.h>
  25 #include <linux/reset.h>
  26 #include <linux/thermal.h>
  27 #include <linux/mfd/syscon.h>
  28 #include <linux/pinctrl/consumer.h>
  29
  30 /**
  31  * If the temperature over a period of time High,
  32  * the resulting TSHUT gave CRU module,let it reset the entire chip,
  33  * or via GPIO give PMIC.
  34  */
  35 enum tshut_mode {
  36         TSHUT_MODE_CRU = 0,
  37         TSHUT_MODE_GPIO,
  38 };
  39
  40 /**
  41  * The system Temperature Sensors tshut(tshut) polarity
  42  * the bit 8 is tshut polarity.
  43  * 0: low active, 1: high active
  44  */
  45 enum tshut_polarity {
  46         TSHUT_LOW_ACTIVE = 0,
  47         TSHUT_HIGH_ACTIVE,
  48 };
  49
  50 /**
  51  * The system has two Temperature Sensors.
  52  * sensor0 is for CPU, and sensor1 is for GPU.
  53  */
  54 enum sensor_id {
  55         SENSOR_CPU = 0,
  56         SENSOR_GPU,
  57 };
  58
  59 /**
  60  * The conversion table has the adc value and temperature.
  61  * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
  62  * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
  63  */
  64 enum adc_sort_mode {
  65         ADC_DECREMENT = 0,
  66         ADC_INCREMENT,
  67 };
  68
  69 /**
  70  * The max sensors is two in rockchip SoCs.
  71  * Two sensors: CPU and GPU sensor.
  72  */
  73 #define SOC_MAX_SENSORS 2
  74
  75 /**
  76  * struct chip_tsadc_table - hold information about chip-specific differences
  77  * @id: conversion table
  78  * @length: size of conversion table
  79  * @data_mask: mask to apply on data inputs
  80  * @mode: sort mode of this adc variant (incrementing or decrementing)
  81  */
  82 struct chip_tsadc_table {
  83         const struct tsadc_table *id;
  84         unsigned int length;
  85         u32 data_mask;
  86         enum adc_sort_mode mode;
  87 };
  88
  89 /**
  90  * struct rockchip_tsadc_chip - hold the private data of tsadc chip
  91  * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
  92  * @chn_num: the channel number of tsadc chip
  93  * @tshut_temp: the hardware-controlled shutdown temperature value
  94  * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
  95  * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
  96  * @initialize: SoC special initialize tsadc controller method
  97  * @irq_ack: clear the interrupt
  98  * @get_temp: get the temperature
  99  * @set_alarm_temp: set the high temperature interrupt
 100  * @set_tshut_temp: set the hardware-controlled shutdown temperature
 101  * @set_tshut_mode: set the hardware-controlled shutdown mode
 102  * @table: the chip-specific conversion table
 103  */
 104 struct rockchip_tsadc_chip {
 105         /* The sensor id of chip correspond to the ADC channel */
 106         int chn_id[SOC_MAX_SENSORS];
 107         int chn_num;
 108
 109         /* The hardware-controlled tshut property */
 110         int tshut_temp;
 111         enum tshut_mode tshut_mode;
 112         enum tshut_polarity tshut_polarity;
 113
 114         /* Chip-wide methods */
 115         void (*initialize)(struct regmap *grf,
 116                            void __iomem *reg, enum tshut_polarity p);
 117         void (*irq_ack)(void __iomem *reg);
 118         void (*control)(void __iomem *reg, bool on);
 119
 120         /* Per-sensor methods */
 121         int (*get_temp)(struct chip_tsadc_table table,
 122                         int chn, void __iomem *reg, int *temp);
 123         void (*set_alarm_temp)(struct chip_tsadc_table table,
 124                                int chn, void __iomem *reg, int temp);
 125         void (*set_tshut_temp)(struct chip_tsadc_table table,
 126                                int chn, void __iomem *reg, int temp);
 127         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
 128
 129         /* Per-table methods */
 130         struct chip_tsadc_table table;
 131 };
 132
 133 /**
 134  * struct rockchip_thermal_sensor - hold the information of thermal sensor
 135  * @thermal:  pointer to the platform/configuration data
 136  * @tzd: pointer to a thermal zone
 137  * @id: identifier of the thermal sensor
 138  */
 139 struct rockchip_thermal_sensor {
 140         struct rockchip_thermal_data *thermal;
 141         struct thermal_zone_device *tzd;
 142         int id;
 143 };
 144
 145 /**
 146  * struct rockchip_thermal_data - hold the private data of thermal driver
 147  * @chip: pointer to the platform/configuration data
 148  * @pdev: platform device of thermal
 149  * @reset: the reset controller of tsadc
 150  * @sensors[SOC_MAX_SENSORS]: the thermal sensor
 151  * @clk: the controller clock is divided by the exteral 24MHz
 152  * @pclk: the advanced peripherals bus clock
 153  * @grf: the general register file will be used to do static set by software
 154  * @regs: the base address of tsadc controller
 155  * @tshut_temp: the hardware-controlled shutdown temperature value
 156  * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
 157  * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
 158  */
 159 struct rockchip_thermal_data {
 160         const struct rockchip_tsadc_chip *chip;
 161         struct platform_device *pdev;
 162         struct reset_control *reset;
 163
 164         struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 165
 166         struct clk *clk;
 167         struct clk *pclk;
 168
 169         struct regmap *grf;
 170         void __iomem *regs;
 171
 172         int tshut_temp;
 173         enum tshut_mode tshut_mode;
 174         enum tshut_polarity tshut_polarity;
 175 };
 176
 177 /**
 178  * TSADC Sensor Register description:
 179  *
 180  * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
 181  * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
 182  *
 183  */
 184 #define TSADCV2_USER_CON                        0x00
 185 #define TSADCV2_AUTO_CON                        0x04
 186 #define TSADCV2_INT_EN                          0x08
 187 #define TSADCV2_INT_PD                          0x0c
 188 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 189 #define TSADCV2_COMP_INT(chn)                   (0x30 + (chn) * 0x04)
 190 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 191 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 192 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 193 #define TSADCV2_AUTO_PERIOD                     0x68
 194 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
 195
 196 #define TSADCV2_AUTO_EN                         BIT(0)
 197 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 198 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 199
 200 #define TSADCV3_AUTO_Q_SEL_EN                   BIT(1)
 201
 202 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 203 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 204 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 205
 206 #define TSADCV2_INT_PD_CLEAR_MASK               ~BIT(8)
 207 #define TSADCV3_INT_PD_CLEAR_MASK               ~BIT(16)
 208
 209 #define TSADCV2_DATA_MASK                       0xfff
 210 #define TSADCV3_DATA_MASK                       0x3ff
 211
 212 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 213 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 214 #define TSADCV2_AUTO_PERIOD_TIME                250 /* 250ms */
 215 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* 50ms */
 216 #define TSADCV3_AUTO_PERIOD_TIME                1875 /* 2.5ms */
 217 #define TSADCV3_AUTO_PERIOD_HT_TIME             1875 /* 2.5ms */
 218
 219 #define TSADCV2_USER_INTER_PD_SOC               0x340 /* 13 clocks */
 220
 221 #define GRF_SARADC_TESTBIT                      0x0e644
 222 #define GRF_TSADC_TESTBIT_L                     0x0e648
 223 #define GRF_TSADC_TESTBIT_H                     0x0e64c
 224
 225 #define GRF_SARADC_TESTBIT_ON                   (0x10001 << 2)
 226 #define GRF_TSADC_TESTBIT_H_ON                  (0x10001 << 2)
 227 #define GRF_TSADC_VCM_EN_L                      (0x10001 << 7)
 228 #define GRF_TSADC_VCM_EN_H                      (0x10001 << 7)
 229
 230 /**
 231  * struct tsadc_table - code to temperature conversion table
 232  * @code: the value of adc channel
 233  * @temp: the temperature
 234  * Note:
 235  * code to temperature mapping of the temperature sensor is a piece wise linear
 236  * curve.Any temperature, code faling between to 2 give temperatures can be
 237  * linearly interpolated.
 238  * Code to Temperature mapping should be updated based on manufacturer results.
 239  */
 240 struct tsadc_table {
 241         u32 code;
 242         int temp;
 243 };
 244
 245 static const struct tsadc_table rk3228_code_table[] = {
 246         {0, -40000},
 247         {588, -40000},
 248         {593, -35000},
 249         {598, -30000},
 250         {603, -25000},
 251         {608, -20000},
 252         {613, -15000},
 253         {618, -10000},
 254         {623, -5000},
 255         {629, 0},
 256         {634, 5000},
 257         {639, 10000},
 258         {644, 15000},
 259         {649, 20000},
 260         {654, 25000},
 261         {660, 30000},
 262         {665, 35000},
 263         {670, 40000},
 264         {675, 45000},
 265         {681, 50000},
 266         {686, 55000},
 267         {691, 60000},
 268         {696, 65000},
 269         {702, 70000},
 270         {707, 75000},
 271         {712, 80000},
 272         {717, 85000},
 273         {723, 90000},
 274         {728, 95000},
 275         {733, 100000},
 276         {738, 105000},
 277         {744, 110000},
 278         {749, 115000},
 279         {754, 120000},
 280         {760, 125000},
 281         {TSADCV2_DATA_MASK, 125000},
 282 };
 283
 284 static const struct tsadc_table rk3288_code_table[] = {
 285         {TSADCV2_DATA_MASK, -40000},
 286         {3800, -40000},
 287         {3792, -35000},
 288         {3783, -30000},
 289         {3774, -25000},
 290         {3765, -20000},
 291         {3756, -15000},
 292         {3747, -10000},
 293         {3737, -5000},
 294         {3728, 0},
 295         {3718, 5000},
 296         {3708, 10000},
 297         {3698, 15000},
 298         {3688, 20000},
 299         {3678, 25000},
 300         {3667, 30000},
 301         {3656, 35000},
 302         {3645, 40000},
 303         {3634, 45000},
 304         {3623, 50000},
 305         {3611, 55000},
 306         {3600, 60000},
 307         {3588, 65000},
 308         {3575, 70000},
 309         {3563, 75000},
 310         {3550, 80000},
 311         {3537, 85000},
 312         {3524, 90000},
 313         {3510, 95000},
 314         {3496, 100000},
 315         {3482, 105000},
 316         {3467, 110000},
 317         {3452, 115000},
 318         {3437, 120000},
 319         {3421, 125000},
 320 };
 321
 322 static const struct tsadc_table rk3368_code_table[] = {
 323         {0, -40000},
 324         {106, -40000},
 325         {108, -35000},
 326         {110, -30000},
 327         {112, -25000},
 328         {114, -20000},
 329         {116, -15000},
 330         {118, -10000},
 331         {120, -5000},
 332         {122, 0},
 333         {124, 5000},
 334         {126, 10000},
 335         {128, 15000},
 336         {130, 20000},
 337         {132, 25000},
 338         {134, 30000},
 339         {136, 35000},
 340         {138, 40000},
 341         {140, 45000},
 342         {142, 50000},
 343         {144, 55000},
 344         {146, 60000},
 345         {148, 65000},
 346         {150, 70000},
 347         {152, 75000},
 348         {154, 80000},
 349         {156, 85000},
 350         {158, 90000},
 351         {160, 95000},
 352         {162, 100000},
 353         {163, 105000},
 354         {165, 110000},
 355         {167, 115000},
 356         {169, 120000},
 357         {171, 125000},
 358         {TSADCV3_DATA_MASK, 125000},
 359 };
 360
 361 static const struct tsadc_table rk3399_code_table[] = {
 362         {0, -40000},
 363         {402, -40000},
 364         {410, -35000},
 365         {419, -30000},
 366         {427, -25000},
 367         {436, -20000},
 368         {444, -15000},
 369         {453, -10000},
 370         {461, -5000},
 371         {470, 0},
 372         {478, 5000},
 373         {487, 10000},
 374         {496, 15000},
 375         {504, 20000},
 376         {513, 25000},
 377         {521, 30000},
 378         {530, 35000},
 379         {538, 40000},
 380         {547, 45000},
 381         {555, 50000},
 382         {564, 55000},
 383         {573, 60000},
 384         {581, 65000},
 385         {590, 70000},
 386         {599, 75000},
 387         {607, 80000},
 388         {616, 85000},
 389         {624, 90000},
 390         {633, 95000},
 391         {642, 100000},
 392         {650, 105000},
 393         {659, 110000},
 394         {668, 115000},
 395         {677, 120000},
 396         {685, 125000},
 397         {TSADCV3_DATA_MASK, 125000},
 398 };
 399
 400 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 401                                    int temp)
 402 {
 403         int high, low, mid;
 404         u32 error = 0;
 405
 406         low = 0;
 407         high = table.length - 1;
 408         mid = (high + low) / 2;
 409
 410         /* Return mask code data when the temp is over table range */
 411         if (temp < table.id[low].temp || temp > table.id[high].temp) {
 412                 error = table.data_mask;
 413                 goto exit;
 414         }
 415
 416         while (low <= high) {
 417                 if (temp == table.id[mid].temp)
 418                         return table.id[mid].code;
 419                 else if (temp < table.id[mid].temp)
 420                         high = mid - 1;
 421                 else
 422                         low = mid + 1;
 423                 mid = (low + high) / 2;
 424         }
 425
 426 exit:
 427         pr_err("Invalid the conversion, error=%d\n", error);
 428         return error;
 429 }
 430
 431 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 432                                    int *temp)
 433 {
 434         unsigned int low = 1;
 435         unsigned int high = table.length - 1;
 436         unsigned int mid = (low + high) / 2;
 437         unsigned int num;
 438         unsigned long denom;
 439
 440         WARN_ON(table.length < 2);
 441
 442         switch (table.mode) {
 443         case ADC_DECREMENT:
 444                 code &= table.data_mask;
 445                 if (code < table.id[high].code)
 446                         return -EAGAIN;         /* Incorrect reading */
 447
 448                 while (low <= high) {
 449                         if (code >= table.id[mid].code &&
 450                             code < table.id[mid - 1].code)
 451                                 break;
 452                         else if (code < table.id[mid].code)
 453                                 low = mid + 1;
 454                         else
 455                                 high = mid - 1;
 456
 457                         mid = (low + high) / 2;
 458                 }
 459                 break;
 460         case ADC_INCREMENT:
 461                 code &= table.data_mask;
 462                 if (code < table.id[low].code)
 463                         return -EAGAIN;         /* Incorrect reading */
 464
 465                 while (low <= high) {
 466                         if (code <= table.id[mid].code &&
 467                             code > table.id[mid - 1].code)
 468                                 break;
 469                         else if (code > table.id[mid].code)
 470                                 low = mid + 1;
 471                         else
 472                                 high = mid - 1;
 473
 474                         mid = (low + high) / 2;
 475                 }
 476                 break;
 477         default:
 478                 pr_err("Invalid the conversion table\n");
 479         }
 480
 481         /*
 482          * The 5C granularity provided by the table is too much. Let's
 483          * assume that the relationship between sensor readings and
 484          * temperature between 2 table entries is linear and interpolate
 485          * to produce less granular result.
 486          */
 487         num = table.id[mid].temp - table.id[mid - 1].temp;
 488         num *= abs(table.id[mid - 1].code - code);
 489         denom = abs(table.id[mid - 1].code - table.id[mid].code);
 490         *temp = table.id[mid - 1].temp + (num / denom);
 491
 492         return 0;
 493 }
 494
 495 /**
 496  * rk_tsadcv2_initialize - initialize TASDC Controller.
 497  *
 498  * (1) Set TSADC_V2_AUTO_PERIOD:
 499  *     Configure the interleave between every two accessing of
 500  *     TSADC in normal operation.
 501  *
 502  * (2) Set TSADCV2_AUTO_PERIOD_HT:
 503  *     Configure the interleave between every two accessing of
 504  *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 505  *
 506  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 507  *     If the temperature is higher than COMP_INT or COMP_SHUT for
 508  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 509  */
 510 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
 511                                   enum tshut_polarity tshut_polarity)
 512 {
 513         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 514                 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 515                                regs + TSADCV2_AUTO_CON);
 516         else
 517                 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 518                                regs + TSADCV2_AUTO_CON);
 519
 520         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 521         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 522                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 523         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 524                        regs + TSADCV2_AUTO_PERIOD_HT);
 525         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 526                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 527 }
 528
 529 /**
 530  * rk_tsadcv3_initialize - initialize TASDC Controller.
 531  *
 532  * (1) The tsadc control power sequence.
 533  *
 534  * (2) Set TSADC_V2_AUTO_PERIOD:
 535  *     Configure the interleave between every two accessing of
 536  *     TSADC in normal operation.
 537  *
 538  * (2) Set TSADCV2_AUTO_PERIOD_HT:
 539  *     Configure the interleave between every two accessing of
 540  *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 541  *
 542  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 543  *     If the temperature is higher than COMP_INT or COMP_SHUT for
 544  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 545  */
 546 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 547                                   enum tshut_polarity tshut_polarity)
 548 {
 549         /* The tsadc control power sequence */
 550         if (IS_ERR(grf)) {
 551                 /* Set interleave value to workround ic time sync issue */
 552                 writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
 553                                TSADCV2_USER_CON);
 554
 555                 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME,
 556                                regs + TSADCV2_AUTO_PERIOD);
 557                 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 558                                regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 559                 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 560                                regs + TSADCV2_AUTO_PERIOD_HT);
 561                 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 562                                regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 563
 564         } else {
 565                 /* Enable the voltage common mode feature */
 566                 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
 567                 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
 568
 569                 usleep_range(15, 100); /* The spec note says at least 15 us */
 570                 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
 571                 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
 572                 usleep_range(90, 200); /* The spec note says at least 90 us */
 573
 574                 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME,
 575                                regs + TSADCV2_AUTO_PERIOD);
 576                 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 577                                regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 578                 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
 579                                regs + TSADCV2_AUTO_PERIOD_HT);
 580                 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 581                                regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 582         }
 583
 584         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 585                 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 586                                regs + TSADCV2_AUTO_CON);
 587         else
 588                 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 589                                regs + TSADCV2_AUTO_CON);
 590 }
 591
 592 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 593 {
 594         u32 val;
 595
 596         val = readl_relaxed(regs + TSADCV2_INT_PD);
 597         writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 598 }
 599
 600 static void rk_tsadcv3_irq_ack(void __iomem *regs)
 601 {
 602         u32 val;
 603
 604         val = readl_relaxed(regs + TSADCV2_INT_PD);
 605         writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 606 }
 607
 608 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 609 {
 610         u32 val;
 611
 612         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 613         if (enable)
 614                 val |= TSADCV2_AUTO_EN;
 615         else
 616                 val &= ~TSADCV2_AUTO_EN;
 617
 618         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 619 }
 620
 621 /**
 622  * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
 623  *
 624  * NOTE: TSADC controller works at auto mode, and some SoCs need set the
 625  * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
 626  * adc value if setting this bit to enable.
 627  */
 628 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
 629 {
 630         u32 val;
 631
 632         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 633         if (enable)
 634                 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
 635         else
 636                 val &= ~TSADCV2_AUTO_EN;
 637
 638         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 639 }
 640
 641 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
 642                                int chn, void __iomem *regs, int *temp)
 643 {
 644         u32 val;
 645
 646         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 647
 648         return rk_tsadcv2_code_to_temp(table, val, temp);
 649 }
 650
 651 static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
 652                                   int chn, void __iomem *regs, int temp)
 653 {
 654         u32 alarm_value, int_en;
 655
 656         /* Make sure the value is valid */
 657         alarm_value = rk_tsadcv2_temp_to_code(table, temp);
 658         if (alarm_value == table.data_mask)
 659                 return;
 660
 661         writel_relaxed(alarm_value & table.data_mask,
 662                        regs + TSADCV2_COMP_INT(chn));
 663
 664         int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 665         int_en |= TSADCV2_INT_SRC_EN(chn);
 666         writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 667 }
 668
 669 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
 670                                   int chn, void __iomem *regs, int temp)
 671 {
 672         u32 tshut_value, val;
 673
 674         /* Make sure the value is valid */
 675         tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 676         if (tshut_value == table.data_mask)
 677                 return;
 678
 679         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 680
 681         /* TSHUT will be valid */
 682         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 683         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 684 }
 685
 686 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 687                                   enum tshut_mode mode)
 688 {
 689         u32 val;
 690
 691         val = readl_relaxed(regs + TSADCV2_INT_EN);
 692         if (mode == TSHUT_MODE_GPIO) {
 693                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 694                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 695         } else {
 696                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 697                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 698         }
 699
 700         writel_relaxed(val, regs + TSADCV2_INT_EN);
 701 }
 702
 703 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 704         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 705         .chn_num = 1, /* one channel for tsadc */
 706
 707         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 708         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 709         .tshut_temp = 95000,
 710
 711         .initialize = rk_tsadcv2_initialize,
 712         .irq_ack = rk_tsadcv3_irq_ack,
 713         .control = rk_tsadcv3_control,
 714         .get_temp = rk_tsadcv2_get_temp,
 715         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 716         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 717         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 718
 719         .table = {
 720                 .id = rk3228_code_table,
 721                 .length = ARRAY_SIZE(rk3228_code_table),
 722                 .data_mask = TSADCV3_DATA_MASK,
 723                 .mode = ADC_INCREMENT,
 724         },
 725 };
 726
 727 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 728         .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
 729         .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
 730         .chn_num = 2, /* two channels for tsadc */
 731
 732         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 733         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 734         .tshut_temp = 95000,
 735
 736         .initialize = rk_tsadcv2_initialize,
 737         .irq_ack = rk_tsadcv2_irq_ack,
 738         .control = rk_tsadcv2_control,
 739         .get_temp = rk_tsadcv2_get_temp,
 740         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 741         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 742         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 743
 744         .table = {
 745                 .id = rk3288_code_table,
 746                 .length = ARRAY_SIZE(rk3288_code_table),
 747                 .data_mask = TSADCV2_DATA_MASK,
 748                 .mode = ADC_DECREMENT,
 749         },
 750 };
 751
 752 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
 753         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 754         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 755         .chn_num = 2, /* two channels for tsadc */
 756
 757         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 758         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 759         .tshut_temp = 95000,
 760
 761         .initialize = rk_tsadcv3_initialize,
 762         .irq_ack = rk_tsadcv3_irq_ack,
 763         .control = rk_tsadcv3_control,
 764         .get_temp = rk_tsadcv2_get_temp,
 765         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 766         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 767         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 768
 769         .table = {
 770                 .id = rk3228_code_table,
 771                 .length = ARRAY_SIZE(rk3228_code_table),
 772                 .data_mask = TSADCV3_DATA_MASK,
 773                 .mode = ADC_INCREMENT,
 774         },
 775 };
 776
 777 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 778         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 779         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 780         .chn_num = 2, /* two channels for tsadc */
 781
 782         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 783         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 784         .tshut_temp = 95000,
 785
 786         .initialize = rk_tsadcv2_initialize,
 787         .irq_ack = rk_tsadcv2_irq_ack,
 788         .control = rk_tsadcv2_control,
 789         .get_temp = rk_tsadcv2_get_temp,
 790         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 791         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 792         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 793
 794         .table = {
 795                 .id = rk3368_code_table,
 796                 .length = ARRAY_SIZE(rk3368_code_table),
 797                 .data_mask = TSADCV3_DATA_MASK,
 798                 .mode = ADC_INCREMENT,
 799         },
 800 };
 801
 802 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 803         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 804         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 805         .chn_num = 2, /* two channels for tsadc */
 806
 807         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 808         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 809         .tshut_temp = 95000,
 810
 811         .initialize = rk_tsadcv3_initialize,
 812         .irq_ack = rk_tsadcv3_irq_ack,
 813         .control = rk_tsadcv3_control,
 814         .get_temp = rk_tsadcv2_get_temp,
 815         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 816         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 817         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 818
 819         .table = {
 820                 .id = rk3399_code_table,
 821                 .length = ARRAY_SIZE(rk3399_code_table),
 822                 .data_mask = TSADCV3_DATA_MASK,
 823                 .mode = ADC_INCREMENT,
 824         },
 825 };
 826
 827 static const struct of_device_id of_rockchip_thermal_match[] = {
 828         {
 829                 .compatible = "rockchip,rk3228-tsadc",
 830                 .data = (void *)&rk3228_tsadc_data,
 831         },
 832         {
 833                 .compatible = "rockchip,rk3288-tsadc",
 834                 .data = (void *)&rk3288_tsadc_data,
 835         },
 836         {
 837                 .compatible = "rockchip,rk3366-tsadc",
 838                 .data = (void *)&rk3366_tsadc_data,
 839         },
 840         {
 841                 .compatible = "rockchip,rk3368-tsadc",
 842                 .data = (void *)&rk3368_tsadc_data,
 843         },
 844         {
 845                 .compatible = "rockchip,rk3399-tsadc",
 846                 .data = (void *)&rk3399_tsadc_data,
 847         },
 848         { /* end */ },
 849 };
 850 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 851
 852 static void
 853 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
 854 {
 855         struct thermal_zone_device *tzd = sensor->tzd;
 856
 857         tzd->ops->set_mode(tzd,
 858                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 859 }
 860
 861 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 862 {
 863         struct rockchip_thermal_data *thermal = dev;
 864         int i;
 865
 866         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 867
 868         thermal->chip->irq_ack(thermal->regs);
 869
 870         for (i = 0; i < thermal->chip->chn_num; i++)
 871                 thermal_zone_device_update(thermal->sensors[i].tzd,
 872                                            THERMAL_EVENT_UNSPECIFIED);
 873
 874         return IRQ_HANDLED;
 875 }
 876
 877 static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
 878 {
 879         struct rockchip_thermal_sensor *sensor = _sensor;
 880         struct rockchip_thermal_data *thermal = sensor->thermal;
 881         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 882
 883         dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
 884                 __func__, sensor->id, low, high);
 885
 886         tsadc->set_alarm_temp(tsadc->table,
 887                               sensor->id, thermal->regs, high);
 888
 889         return 0;
 890 }
 891
 892 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 893 {
 894         struct rockchip_thermal_sensor *sensor = _sensor;
 895         struct rockchip_thermal_data *thermal = sensor->thermal;
 896         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 897         int retval;
 898
 899         retval = tsadc->get_temp(tsadc->table,
 900                                  sensor->id, thermal->regs, out_temp);
 901         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
 902                 sensor->id, *out_temp, retval);
 903
 904         return retval;
 905 }
 906
 907 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
 908         .get_temp = rockchip_thermal_get_temp,
 909         .set_trips = rockchip_thermal_set_trips,
 910 };
 911
 912 static int rockchip_configure_from_dt(struct device *dev,
 913                                       struct device_node *np,
 914                                       struct rockchip_thermal_data *thermal)
 915 {
 916         u32 shut_temp, tshut_mode, tshut_polarity;
 917
 918         if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
 919                 dev_warn(dev,
 920                          "Missing tshut temp property, using default %d\n",
 921                          thermal->chip->tshut_temp);
 922                 thermal->tshut_temp = thermal->chip->tshut_temp;
 923         } else {
 924                 if (shut_temp > INT_MAX) {
 925                         dev_err(dev, "Invalid tshut temperature specified: %d\n",
 926                                 shut_temp);
 927                         return -ERANGE;
 928                 }
 929                 thermal->tshut_temp = shut_temp;
 930         }
 931
 932         if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
 933                 dev_warn(dev,
 934                          "Missing tshut mode property, using default (%s)\n",
 935                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 936                                 "gpio" : "cru");
 937                 thermal->tshut_mode = thermal->chip->tshut_mode;
 938         } else {
 939                 thermal->tshut_mode = tshut_mode;
 940         }
 941
 942         if (thermal->tshut_mode > 1) {
 943                 dev_err(dev, "Invalid tshut mode specified: %d\n",
 944                         thermal->tshut_mode);
 945                 return -EINVAL;
 946         }
 947
 948         if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
 949                                  &tshut_polarity)) {
 950                 dev_warn(dev,
 951                          "Missing tshut-polarity property, using default (%s)\n",
 952                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 953                                 "low" : "high");
 954                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
 955         } else {
 956                 thermal->tshut_polarity = tshut_polarity;
 957         }
 958
 959         if (thermal->tshut_polarity > 1) {
 960                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
 961                         thermal->tshut_polarity);
 962                 return -EINVAL;
 963         }
 964
 965         /* The tsadc wont to handle the error in here since some SoCs didn't
 966          * need this property.
 967          */
 968         thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
 969         if (IS_ERR(thermal->grf))
 970                 dev_warn(dev, "Missing rockchip,grf property\n");
 971
 972         return 0;
 973 }
 974
 975 static int
 976 rockchip_thermal_register_sensor(struct platform_device *pdev,
 977                                  struct rockchip_thermal_data *thermal,
 978                                  struct rockchip_thermal_sensor *sensor,
 979                                  int id)
 980 {
 981         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 982         int error;
 983
 984         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
 985         tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
 986                               thermal->tshut_temp);
 987
 988         sensor->thermal = thermal;
 989         sensor->id = id;
 990         sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
 991                                         sensor, &rockchip_of_thermal_ops);
 992         if (IS_ERR(sensor->tzd)) {
 993                 error = PTR_ERR(sensor->tzd);
 994                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
 995                         id, error);
 996                 return error;
 997         }
 998
 999         return 0;
1000 }
1001
1002 /**
1003  * Reset TSADC Controller, reset all tsadc registers.
1004  */
1005 static void rockchip_thermal_reset_controller(struct reset_control *reset)
1006 {
1007         reset_control_assert(reset);
1008         usleep_range(10, 20);
1009         reset_control_deassert(reset);
1010 }
1011
1012 static int rockchip_thermal_probe(struct platform_device *pdev)
1013 {
1014         struct device_node *np = pdev->dev.of_node;
1015         struct rockchip_thermal_data *thermal;
1016         const struct of_device_id *match;
1017         struct resource *res;
1018         int irq;
1019         int i;
1020         int error;
1021
1022         match = of_match_node(of_rockchip_thermal_match, np);
1023         if (!match)
1024                 return -ENXIO;
1025
1026         irq = platform_get_irq(pdev, 0);
1027         if (irq < 0) {
1028                 dev_err(&pdev->dev, "no irq resource?\n");
1029                 return -EINVAL;
1030         }
1031
1032         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
1033                                GFP_KERNEL);
1034         if (!thermal)
1035                 return -ENOMEM;
1036
1037         thermal->pdev = pdev;
1038
1039         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
1040         if (!thermal->chip)
1041                 return -EINVAL;
1042
1043         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1044         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
1045         if (IS_ERR(thermal->regs))
1046                 return PTR_ERR(thermal->regs);
1047
1048         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1049         if (IS_ERR(thermal->reset)) {
1050                 error = PTR_ERR(thermal->reset);
1051                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1052                 return error;
1053         }
1054
1055         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1056         if (IS_ERR(thermal->clk)) {
1057                 error = PTR_ERR(thermal->clk);
1058                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1059                 return error;
1060         }
1061
1062         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1063         if (IS_ERR(thermal->pclk)) {
1064                 error = PTR_ERR(thermal->pclk);
1065                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1066                         error);
1067                 return error;
1068         }
1069
1070         error = clk_prepare_enable(thermal->clk);
1071         if (error) {
1072                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1073                         error);
1074                 return error;
1075         }
1076
1077         error = clk_prepare_enable(thermal->pclk);
1078         if (error) {
1079                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1080                 goto err_disable_clk;
1081         }
1082
1083         rockchip_thermal_reset_controller(thermal->reset);
1084
1085         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1086         if (error) {
1087                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1088                         error);
1089                 goto err_disable_pclk;
1090         }
1091
1092         thermal->chip->initialize(thermal->grf, thermal->regs,
1093                                   thermal->tshut_polarity);
1094
1095         for (i = 0; i < thermal->chip->chn_num; i++) {
1096                 error = rockchip_thermal_register_sensor(pdev, thermal,
1097                                                 &thermal->sensors[i],
1098                                                 thermal->chip->chn_id[i]);
1099                 if (error) {
1100                         dev_err(&pdev->dev,
1101                                 "failed to register sensor[%d] : error = %d\n",
1102                                 i, error);
1103                         goto err_disable_pclk;
1104                 }
1105         }
1106
1107         error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1108                                           &rockchip_thermal_alarm_irq_thread,
1109                                           IRQF_ONESHOT,
1110                                           "rockchip_thermal", thermal);
1111         if (error) {
1112                 dev_err(&pdev->dev,
1113                         "failed to request tsadc irq: %d\n", error);
1114                 goto err_disable_pclk;
1115         }
1116
1117         thermal->chip->control(thermal->regs, true);
1118
1119         for (i = 0; i < thermal->chip->chn_num; i++)
1120                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1121
1122         platform_set_drvdata(pdev, thermal);
1123
1124         return 0;
1125
1126 err_disable_pclk:
1127         clk_disable_unprepare(thermal->pclk);
1128 err_disable_clk:
1129         clk_disable_unprepare(thermal->clk);
1130
1131         return error;
1132 }
1133
1134 static int rockchip_thermal_remove(struct platform_device *pdev)
1135 {
1136         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1137         int i;
1138
1139         for (i = 0; i < thermal->chip->chn_num; i++) {
1140                 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1141
1142                 rockchip_thermal_toggle_sensor(sensor, false);
1143         }
1144
1145         thermal->chip->control(thermal->regs, false);
1146
1147         clk_disable_unprepare(thermal->pclk);
1148         clk_disable_unprepare(thermal->clk);
1149
1150         return 0;
1151 }
1152
1153 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1154 {
1155         struct platform_device *pdev = to_platform_device(dev);
1156         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1157         int i;
1158
1159         for (i = 0; i < thermal->chip->chn_num; i++)
1160                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1161
1162         thermal->chip->control(thermal->regs, false);
1163
1164         clk_disable(thermal->pclk);
1165         clk_disable(thermal->clk);
1166
1167         pinctrl_pm_select_sleep_state(dev);
1168
1169         return 0;
1170 }
1171
1172 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1173 {
1174         struct platform_device *pdev = to_platform_device(dev);
1175         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1176         int i;
1177         int error;
1178
1179         error = clk_enable(thermal->clk);
1180         if (error)
1181                 return error;
1182
1183         error = clk_enable(thermal->pclk);
1184         if (error) {
1185                 clk_disable(thermal->clk);
1186                 return error;
1187         }
1188
1189         rockchip_thermal_reset_controller(thermal->reset);
1190
1191         thermal->chip->initialize(thermal->grf, thermal->regs,
1192                                   thermal->tshut_polarity);
1193
1194         for (i = 0; i < thermal->chip->chn_num; i++) {
1195                 int id = thermal->sensors[i].id;
1196
1197                 thermal->chip->set_tshut_mode(id, thermal->regs,
1198                                               thermal->tshut_mode);
1199                 thermal->chip->set_tshut_temp(thermal->chip->table,
1200                                               id, thermal->regs,
1201                                               thermal->tshut_temp);
1202         }
1203
1204         thermal->chip->control(thermal->regs, true);
1205
1206         for (i = 0; i < thermal->chip->chn_num; i++)
1207                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1208
1209         pinctrl_pm_select_default_state(dev);
1210
1211         return 0;
1212 }
1213
1214 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1215                          rockchip_thermal_suspend, rockchip_thermal_resume);
1216
1217 static struct platform_driver rockchip_thermal_driver = {
1218         .driver = {
1219                 .name = "rockchip-thermal",
1220                 .pm = &rockchip_thermal_pm_ops,
1221                 .of_match_table = of_rockchip_thermal_match,
1222         },
1223         .probe = rockchip_thermal_probe,
1224         .remove = rockchip_thermal_remove,
1225 };
1226
1227 module_platform_driver(rockchip_thermal_driver);
1228
1229 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1230 MODULE_AUTHOR("Rockchip, Inc.");
1231 MODULE_LICENSE("GPL v2");
1232 MODULE_ALIAS("platform:rockchip-thermal");