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thunderbolt: Add support for preboot ACL
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1 /*
2 * Thunderbolt control channel messages
3 *
4 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
5 * Copyright (C) 2017, Intel Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #ifndef _TB_MSGS
13 #define _TB_MSGS
14
15 #include <linux/types.h>
16 #include <linux/uuid.h>
17
18 enum tb_cfg_space {
19 TB_CFG_HOPS = 0,
20 TB_CFG_PORT = 1,
21 TB_CFG_SWITCH = 2,
22 TB_CFG_COUNTERS = 3,
23 };
24
25 enum tb_cfg_error {
26 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
27 TB_CFG_ERROR_LINK_ERROR = 1,
28 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
29 TB_CFG_ERROR_NO_SUCH_PORT = 4,
30 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
31 TB_CFG_ERROR_LOOP = 8,
32 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
33 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
34 };
35
36 /* common header */
37 struct tb_cfg_header {
38 u32 route_hi:22;
39 u32 unknown:10; /* highest order bit is set on replies */
40 u32 route_lo;
41 } __packed;
42
43 /* additional header for read/write packets */
44 struct tb_cfg_address {
45 u32 offset:13; /* in dwords */
46 u32 length:6; /* in dwords */
47 u32 port:6;
48 enum tb_cfg_space space:2;
49 u32 seq:2; /* sequence number */
50 u32 zero:3;
51 } __packed;
52
53 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
54 struct cfg_read_pkg {
55 struct tb_cfg_header header;
56 struct tb_cfg_address addr;
57 } __packed;
58
59 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
60 struct cfg_write_pkg {
61 struct tb_cfg_header header;
62 struct tb_cfg_address addr;
63 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
64 } __packed;
65
66 /* TB_CFG_PKG_ERROR */
67 struct cfg_error_pkg {
68 struct tb_cfg_header header;
69 enum tb_cfg_error error:4;
70 u32 zero1:4;
71 u32 port:6;
72 u32 zero2:2; /* Both should be zero, still they are different fields. */
73 u32 zero3:16;
74 } __packed;
75
76 /* TB_CFG_PKG_EVENT */
77 struct cfg_event_pkg {
78 struct tb_cfg_header header;
79 u32 port:6;
80 u32 zero:25;
81 bool unplug:1;
82 } __packed;
83
84 /* TB_CFG_PKG_RESET */
85 struct cfg_reset_pkg {
86 struct tb_cfg_header header;
87 } __packed;
88
89 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
90 struct cfg_pts_pkg {
91 struct tb_cfg_header header;
92 u32 data;
93 } __packed;
94
95 /* ICM messages */
96
97 enum icm_pkg_code {
98 ICM_GET_TOPOLOGY = 0x1,
99 ICM_DRIVER_READY = 0x3,
100 ICM_APPROVE_DEVICE = 0x4,
101 ICM_CHALLENGE_DEVICE = 0x5,
102 ICM_ADD_DEVICE_KEY = 0x6,
103 ICM_GET_ROUTE = 0xa,
104 ICM_APPROVE_XDOMAIN = 0x10,
105 ICM_PREBOOT_ACL = 0x18,
106 };
107
108 enum icm_event_code {
109 ICM_EVENT_DEVICE_CONNECTED = 3,
110 ICM_EVENT_DEVICE_DISCONNECTED = 4,
111 ICM_EVENT_XDOMAIN_CONNECTED = 6,
112 ICM_EVENT_XDOMAIN_DISCONNECTED = 7,
113 };
114
115 struct icm_pkg_header {
116 u8 code;
117 u8 flags;
118 u8 packet_id;
119 u8 total_packets;
120 };
121
122 #define ICM_FLAGS_ERROR BIT(0)
123 #define ICM_FLAGS_NO_KEY BIT(1)
124 #define ICM_FLAGS_SLEVEL_SHIFT 3
125 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
126 #define ICM_FLAGS_WRITE BIT(7)
127
128 struct icm_pkg_driver_ready {
129 struct icm_pkg_header hdr;
130 };
131
132 /* Falcon Ridge only messages */
133
134 struct icm_fr_pkg_driver_ready_response {
135 struct icm_pkg_header hdr;
136 u8 romver;
137 u8 ramver;
138 u16 security_level;
139 };
140
141 #define ICM_FR_SLEVEL_MASK 0xf
142
143 /* Falcon Ridge & Alpine Ridge common messages */
144
145 struct icm_fr_pkg_get_topology {
146 struct icm_pkg_header hdr;
147 };
148
149 #define ICM_GET_TOPOLOGY_PACKETS 14
150
151 struct icm_fr_pkg_get_topology_response {
152 struct icm_pkg_header hdr;
153 u32 route_lo;
154 u32 route_hi;
155 u8 first_data;
156 u8 second_data;
157 u8 drom_i2c_address_index;
158 u8 switch_index;
159 u32 reserved[2];
160 u32 ports[16];
161 u32 port_hop_info[16];
162 };
163
164 #define ICM_SWITCH_USED BIT(0)
165 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
166 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
167
168 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
169 #define ICM_PORT_INDEX_SHIFT 24
170 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
171
172 struct icm_fr_event_device_connected {
173 struct icm_pkg_header hdr;
174 uuid_t ep_uuid;
175 u8 connection_key;
176 u8 connection_id;
177 u16 link_info;
178 u32 ep_name[55];
179 };
180
181 #define ICM_LINK_INFO_LINK_MASK 0x7
182 #define ICM_LINK_INFO_DEPTH_SHIFT 4
183 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
184 #define ICM_LINK_INFO_APPROVED BIT(8)
185 #define ICM_LINK_INFO_REJECTED BIT(9)
186 #define ICM_LINK_INFO_BOOT BIT(10)
187
188 struct icm_fr_pkg_approve_device {
189 struct icm_pkg_header hdr;
190 uuid_t ep_uuid;
191 u8 connection_key;
192 u8 connection_id;
193 u16 reserved;
194 };
195
196 struct icm_fr_event_device_disconnected {
197 struct icm_pkg_header hdr;
198 u16 reserved;
199 u16 link_info;
200 };
201
202 struct icm_fr_event_xdomain_connected {
203 struct icm_pkg_header hdr;
204 u16 reserved;
205 u16 link_info;
206 uuid_t remote_uuid;
207 uuid_t local_uuid;
208 u32 local_route_hi;
209 u32 local_route_lo;
210 u32 remote_route_hi;
211 u32 remote_route_lo;
212 };
213
214 struct icm_fr_event_xdomain_disconnected {
215 struct icm_pkg_header hdr;
216 u16 reserved;
217 u16 link_info;
218 uuid_t remote_uuid;
219 };
220
221 struct icm_fr_pkg_add_device_key {
222 struct icm_pkg_header hdr;
223 uuid_t ep_uuid;
224 u8 connection_key;
225 u8 connection_id;
226 u16 reserved;
227 u32 key[8];
228 };
229
230 struct icm_fr_pkg_add_device_key_response {
231 struct icm_pkg_header hdr;
232 uuid_t ep_uuid;
233 u8 connection_key;
234 u8 connection_id;
235 u16 reserved;
236 };
237
238 struct icm_fr_pkg_challenge_device {
239 struct icm_pkg_header hdr;
240 uuid_t ep_uuid;
241 u8 connection_key;
242 u8 connection_id;
243 u16 reserved;
244 u32 challenge[8];
245 };
246
247 struct icm_fr_pkg_challenge_device_response {
248 struct icm_pkg_header hdr;
249 uuid_t ep_uuid;
250 u8 connection_key;
251 u8 connection_id;
252 u16 reserved;
253 u32 challenge[8];
254 u32 response[8];
255 };
256
257 struct icm_fr_pkg_approve_xdomain {
258 struct icm_pkg_header hdr;
259 u16 reserved;
260 u16 link_info;
261 uuid_t remote_uuid;
262 u16 transmit_path;
263 u16 transmit_ring;
264 u16 receive_path;
265 u16 receive_ring;
266 };
267
268 struct icm_fr_pkg_approve_xdomain_response {
269 struct icm_pkg_header hdr;
270 u16 reserved;
271 u16 link_info;
272 uuid_t remote_uuid;
273 u16 transmit_path;
274 u16 transmit_ring;
275 u16 receive_path;
276 u16 receive_ring;
277 };
278
279 /* Alpine Ridge only messages */
280
281 struct icm_ar_pkg_driver_ready_response {
282 struct icm_pkg_header hdr;
283 u8 romver;
284 u8 ramver;
285 u16 info;
286 };
287
288 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
289 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
290 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
291 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
292
293 struct icm_ar_pkg_get_route {
294 struct icm_pkg_header hdr;
295 u16 reserved;
296 u16 link_info;
297 };
298
299 struct icm_ar_pkg_get_route_response {
300 struct icm_pkg_header hdr;
301 u16 reserved;
302 u16 link_info;
303 u32 route_hi;
304 u32 route_lo;
305 };
306
307 struct icm_ar_boot_acl_entry {
308 u32 uuid_lo;
309 u32 uuid_hi;
310 };
311
312 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
313
314 struct icm_ar_pkg_preboot_acl {
315 struct icm_pkg_header hdr;
316 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
317 };
318
319 struct icm_ar_pkg_preboot_acl_response {
320 struct icm_pkg_header hdr;
321 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
322 };
323
324 /* XDomain messages */
325
326 struct tb_xdomain_header {
327 u32 route_hi;
328 u32 route_lo;
329 u32 length_sn;
330 };
331
332 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
333 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
334 #define TB_XDOMAIN_SN_SHIFT 27
335
336 enum tb_xdp_type {
337 UUID_REQUEST_OLD = 1,
338 UUID_RESPONSE = 2,
339 PROPERTIES_REQUEST,
340 PROPERTIES_RESPONSE,
341 PROPERTIES_CHANGED_REQUEST,
342 PROPERTIES_CHANGED_RESPONSE,
343 ERROR_RESPONSE,
344 UUID_REQUEST = 12,
345 };
346
347 struct tb_xdp_header {
348 struct tb_xdomain_header xd_hdr;
349 uuid_t uuid;
350 u32 type;
351 };
352
353 struct tb_xdp_properties {
354 struct tb_xdp_header hdr;
355 uuid_t src_uuid;
356 uuid_t dst_uuid;
357 u16 offset;
358 u16 reserved;
359 };
360
361 struct tb_xdp_properties_response {
362 struct tb_xdp_header hdr;
363 uuid_t src_uuid;
364 uuid_t dst_uuid;
365 u16 offset;
366 u16 data_length;
367 u32 generation;
368 u32 data[0];
369 };
370
371 /*
372 * Max length of data array single XDomain property response is allowed
373 * to carry.
374 */
375 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
376 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
377
378 /* Maximum size of the total property block in dwords we allow */
379 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
380
381 struct tb_xdp_properties_changed {
382 struct tb_xdp_header hdr;
383 uuid_t src_uuid;
384 };
385
386 struct tb_xdp_properties_changed_response {
387 struct tb_xdp_header hdr;
388 };
389
390 enum tb_xdp_error {
391 ERROR_SUCCESS,
392 ERROR_UNKNOWN_PACKET,
393 ERROR_UNKNOWN_DOMAIN,
394 ERROR_NOT_SUPPORTED,
395 ERROR_NOT_READY,
396 };
397
398 struct tb_xdp_error_response {
399 struct tb_xdp_header hdr;
400 u32 error;
401 };
402
403 #endif