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serial: xuartps: Fix out-of-bounds access through DT alias
[mirror_ubuntu-bionic-kernel.git] / drivers / tty / moxa.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*****************************************************************************/
3 /*
4 * moxa.c -- MOXA Intellio family multiport serial driver.
5 *
6 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
7 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 */
12
13 /*
14 * MOXA Intellio Series Driver
15 * for : LINUX
16 * date : 1999/1/7
17 * version : 5.1
18 */
19
20 #include <linux/module.h>
21 #include <linux/types.h>
22 #include <linux/mm.h>
23 #include <linux/ioport.h>
24 #include <linux/errno.h>
25 #include <linux/firmware.h>
26 #include <linux/signal.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/serial.h>
37 #include <linux/tty_driver.h>
38 #include <linux/delay.h>
39 #include <linux/pci.h>
40 #include <linux/init.h>
41 #include <linux/bitops.h>
42 #include <linux/slab.h>
43 #include <linux/ratelimit.h>
44
45 #include <asm/io.h>
46 #include <linux/uaccess.h>
47
48 #include "moxa.h"
49
50 #define MOXA_VERSION "6.0k"
51
52 #define MOXA_FW_HDRLEN 32
53
54 #define MOXAMAJOR 172
55
56 #define MAX_BOARDS 4 /* Don't change this value */
57 #define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
58 #define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
59
60 #define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
61 (brd)->boardType == MOXA_BOARD_C320_PCI)
62
63 /*
64 * Define the Moxa PCI vendor and device IDs.
65 */
66 #define MOXA_BUS_TYPE_ISA 0
67 #define MOXA_BUS_TYPE_PCI 1
68
69 enum {
70 MOXA_BOARD_C218_PCI = 1,
71 MOXA_BOARD_C218_ISA,
72 MOXA_BOARD_C320_PCI,
73 MOXA_BOARD_C320_ISA,
74 MOXA_BOARD_CP204J,
75 };
76
77 static char *moxa_brdname[] =
78 {
79 "C218 Turbo PCI series",
80 "C218 Turbo ISA series",
81 "C320 Turbo PCI series",
82 "C320 Turbo ISA series",
83 "CP-204J series",
84 };
85
86 #ifdef CONFIG_PCI
87 static const struct pci_device_id moxa_pcibrds[] = {
88 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
89 .driver_data = MOXA_BOARD_C218_PCI },
90 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
91 .driver_data = MOXA_BOARD_C320_PCI },
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
93 .driver_data = MOXA_BOARD_CP204J },
94 { 0 }
95 };
96 MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
97 #endif /* CONFIG_PCI */
98
99 struct moxa_port;
100
101 static struct moxa_board_conf {
102 int boardType;
103 int numPorts;
104 int busType;
105
106 unsigned int ready;
107
108 struct moxa_port *ports;
109
110 void __iomem *basemem;
111 void __iomem *intNdx;
112 void __iomem *intPend;
113 void __iomem *intTable;
114 } moxa_boards[MAX_BOARDS];
115
116 struct mxser_mstatus {
117 tcflag_t cflag;
118 int cts;
119 int dsr;
120 int ri;
121 int dcd;
122 };
123
124 struct moxaq_str {
125 int inq;
126 int outq;
127 };
128
129 struct moxa_port {
130 struct tty_port port;
131 struct moxa_board_conf *board;
132 void __iomem *tableAddr;
133
134 int type;
135 int cflag;
136 unsigned long statusflags;
137
138 u8 DCDState; /* Protected by the port lock */
139 u8 lineCtrl;
140 u8 lowChkFlag;
141 };
142
143 struct mon_str {
144 int tick;
145 int rxcnt[MAX_PORTS];
146 int txcnt[MAX_PORTS];
147 };
148
149 /* statusflags */
150 #define TXSTOPPED 1
151 #define LOWWAIT 2
152 #define EMPTYWAIT 3
153
154
155 #define WAKEUP_CHARS 256
156
157 static int ttymajor = MOXAMAJOR;
158 static struct mon_str moxaLog;
159 static unsigned int moxaFuncTout = HZ / 2;
160 static unsigned int moxaLowWaterChk;
161 static DEFINE_MUTEX(moxa_openlock);
162 static DEFINE_SPINLOCK(moxa_lock);
163
164 static unsigned long baseaddr[MAX_BOARDS];
165 static unsigned int type[MAX_BOARDS];
166 static unsigned int numports[MAX_BOARDS];
167 static struct tty_port moxa_service_port;
168
169 MODULE_AUTHOR("William Chen");
170 MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
171 MODULE_LICENSE("GPL");
172 MODULE_FIRMWARE("c218tunx.cod");
173 MODULE_FIRMWARE("cp204unx.cod");
174 MODULE_FIRMWARE("c320tunx.cod");
175
176 module_param_array(type, uint, NULL, 0);
177 MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
178 module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
179 MODULE_PARM_DESC(baseaddr, "base address");
180 module_param_array(numports, uint, NULL, 0);
181 MODULE_PARM_DESC(numports, "numports (ignored for C218)");
182
183 module_param(ttymajor, int, 0);
184
185 /*
186 * static functions:
187 */
188 static int moxa_open(struct tty_struct *, struct file *);
189 static void moxa_close(struct tty_struct *, struct file *);
190 static int moxa_write(struct tty_struct *, const unsigned char *, int);
191 static int moxa_write_room(struct tty_struct *);
192 static void moxa_flush_buffer(struct tty_struct *);
193 static int moxa_chars_in_buffer(struct tty_struct *);
194 static void moxa_set_termios(struct tty_struct *, struct ktermios *);
195 static void moxa_stop(struct tty_struct *);
196 static void moxa_start(struct tty_struct *);
197 static void moxa_hangup(struct tty_struct *);
198 static int moxa_tiocmget(struct tty_struct *tty);
199 static int moxa_tiocmset(struct tty_struct *tty,
200 unsigned int set, unsigned int clear);
201 static void moxa_poll(struct timer_list *);
202 static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
203 static void moxa_shutdown(struct tty_port *);
204 static int moxa_carrier_raised(struct tty_port *);
205 static void moxa_dtr_rts(struct tty_port *, int);
206 /*
207 * moxa board interface functions:
208 */
209 static void MoxaPortEnable(struct moxa_port *);
210 static void MoxaPortDisable(struct moxa_port *);
211 static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
212 static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
213 static void MoxaPortLineCtrl(struct moxa_port *, int, int);
214 static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
215 static int MoxaPortLineStatus(struct moxa_port *);
216 static void MoxaPortFlushData(struct moxa_port *, int);
217 static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
218 static int MoxaPortReadData(struct moxa_port *);
219 static int MoxaPortTxQueue(struct moxa_port *);
220 static int MoxaPortRxQueue(struct moxa_port *);
221 static int MoxaPortTxFree(struct moxa_port *);
222 static void MoxaPortTxDisable(struct moxa_port *);
223 static void MoxaPortTxEnable(struct moxa_port *);
224 static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
225 static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
226 static void MoxaSetFifo(struct moxa_port *port, int enable);
227
228 /*
229 * I/O functions
230 */
231
232 static DEFINE_SPINLOCK(moxafunc_lock);
233
234 static void moxa_wait_finish(void __iomem *ofsAddr)
235 {
236 unsigned long end = jiffies + moxaFuncTout;
237
238 while (readw(ofsAddr + FuncCode) != 0)
239 if (time_after(jiffies, end))
240 return;
241 if (readw(ofsAddr + FuncCode) != 0)
242 printk_ratelimited(KERN_WARNING "moxa function expired\n");
243 }
244
245 static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
246 {
247 unsigned long flags;
248 spin_lock_irqsave(&moxafunc_lock, flags);
249 writew(arg, ofsAddr + FuncArg);
250 writew(cmd, ofsAddr + FuncCode);
251 moxa_wait_finish(ofsAddr);
252 spin_unlock_irqrestore(&moxafunc_lock, flags);
253 }
254
255 static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
256 {
257 unsigned long flags;
258 u16 ret;
259 spin_lock_irqsave(&moxafunc_lock, flags);
260 writew(arg, ofsAddr + FuncArg);
261 writew(cmd, ofsAddr + FuncCode);
262 moxa_wait_finish(ofsAddr);
263 ret = readw(ofsAddr + FuncArg);
264 spin_unlock_irqrestore(&moxafunc_lock, flags);
265 return ret;
266 }
267
268 static void moxa_low_water_check(void __iomem *ofsAddr)
269 {
270 u16 rptr, wptr, mask, len;
271
272 if (readb(ofsAddr + FlagStat) & Xoff_state) {
273 rptr = readw(ofsAddr + RXrptr);
274 wptr = readw(ofsAddr + RXwptr);
275 mask = readw(ofsAddr + RX_mask);
276 len = (wptr - rptr) & mask;
277 if (len <= Low_water)
278 moxafunc(ofsAddr, FC_SendXon, 0);
279 }
280 }
281
282 /*
283 * TTY operations
284 */
285
286 static int moxa_ioctl(struct tty_struct *tty,
287 unsigned int cmd, unsigned long arg)
288 {
289 struct moxa_port *ch = tty->driver_data;
290 void __user *argp = (void __user *)arg;
291 int status, ret = 0;
292
293 if (tty->index == MAX_PORTS) {
294 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
295 cmd != MOXA_GETMSTATUS)
296 return -EINVAL;
297 } else if (!ch)
298 return -ENODEV;
299
300 switch (cmd) {
301 case MOXA_GETDATACOUNT:
302 moxaLog.tick = jiffies;
303 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
304 ret = -EFAULT;
305 break;
306 case MOXA_FLUSH_QUEUE:
307 MoxaPortFlushData(ch, arg);
308 break;
309 case MOXA_GET_IOQUEUE: {
310 struct moxaq_str __user *argm = argp;
311 struct moxaq_str tmp;
312 struct moxa_port *p;
313 unsigned int i, j;
314
315 for (i = 0; i < MAX_BOARDS; i++) {
316 p = moxa_boards[i].ports;
317 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
318 memset(&tmp, 0, sizeof(tmp));
319 spin_lock_bh(&moxa_lock);
320 if (moxa_boards[i].ready) {
321 tmp.inq = MoxaPortRxQueue(p);
322 tmp.outq = MoxaPortTxQueue(p);
323 }
324 spin_unlock_bh(&moxa_lock);
325 if (copy_to_user(argm, &tmp, sizeof(tmp)))
326 return -EFAULT;
327 }
328 }
329 break;
330 } case MOXA_GET_OQUEUE:
331 status = MoxaPortTxQueue(ch);
332 ret = put_user(status, (unsigned long __user *)argp);
333 break;
334 case MOXA_GET_IQUEUE:
335 status = MoxaPortRxQueue(ch);
336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
338 case MOXA_GETMSTATUS: {
339 struct mxser_mstatus __user *argm = argp;
340 struct mxser_mstatus tmp;
341 struct moxa_port *p;
342 unsigned int i, j;
343
344 for (i = 0; i < MAX_BOARDS; i++) {
345 p = moxa_boards[i].ports;
346 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
347 struct tty_struct *ttyp;
348 memset(&tmp, 0, sizeof(tmp));
349 spin_lock_bh(&moxa_lock);
350 if (!moxa_boards[i].ready) {
351 spin_unlock_bh(&moxa_lock);
352 goto copy;
353 }
354
355 status = MoxaPortLineStatus(p);
356 spin_unlock_bh(&moxa_lock);
357
358 if (status & 1)
359 tmp.cts = 1;
360 if (status & 2)
361 tmp.dsr = 1;
362 if (status & 4)
363 tmp.dcd = 1;
364
365 ttyp = tty_port_tty_get(&p->port);
366 if (!ttyp)
367 tmp.cflag = p->cflag;
368 else
369 tmp.cflag = ttyp->termios.c_cflag;
370 tty_kref_put(ttyp);
371 copy:
372 if (copy_to_user(argm, &tmp, sizeof(tmp)))
373 return -EFAULT;
374 }
375 }
376 break;
377 }
378 case TIOCGSERIAL:
379 mutex_lock(&ch->port.mutex);
380 ret = moxa_get_serial_info(ch, argp);
381 mutex_unlock(&ch->port.mutex);
382 break;
383 case TIOCSSERIAL:
384 mutex_lock(&ch->port.mutex);
385 ret = moxa_set_serial_info(ch, argp);
386 mutex_unlock(&ch->port.mutex);
387 break;
388 default:
389 ret = -ENOIOCTLCMD;
390 }
391 return ret;
392 }
393
394 static int moxa_break_ctl(struct tty_struct *tty, int state)
395 {
396 struct moxa_port *port = tty->driver_data;
397
398 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
399 Magic_code);
400 return 0;
401 }
402
403 static const struct tty_operations moxa_ops = {
404 .open = moxa_open,
405 .close = moxa_close,
406 .write = moxa_write,
407 .write_room = moxa_write_room,
408 .flush_buffer = moxa_flush_buffer,
409 .chars_in_buffer = moxa_chars_in_buffer,
410 .ioctl = moxa_ioctl,
411 .set_termios = moxa_set_termios,
412 .stop = moxa_stop,
413 .start = moxa_start,
414 .hangup = moxa_hangup,
415 .break_ctl = moxa_break_ctl,
416 .tiocmget = moxa_tiocmget,
417 .tiocmset = moxa_tiocmset,
418 };
419
420 static const struct tty_port_operations moxa_port_ops = {
421 .carrier_raised = moxa_carrier_raised,
422 .dtr_rts = moxa_dtr_rts,
423 .shutdown = moxa_shutdown,
424 };
425
426 static struct tty_driver *moxaDriver;
427 static DEFINE_TIMER(moxaTimer, moxa_poll);
428
429 /*
430 * HW init
431 */
432
433 static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
434 {
435 switch (brd->boardType) {
436 case MOXA_BOARD_C218_ISA:
437 case MOXA_BOARD_C218_PCI:
438 if (model != 1)
439 goto err;
440 break;
441 case MOXA_BOARD_CP204J:
442 if (model != 3)
443 goto err;
444 break;
445 default:
446 if (model != 2)
447 goto err;
448 break;
449 }
450 return 0;
451 err:
452 return -EINVAL;
453 }
454
455 static int moxa_check_fw(const void *ptr)
456 {
457 const __le16 *lptr = ptr;
458
459 if (*lptr != cpu_to_le16(0x7980))
460 return -EINVAL;
461
462 return 0;
463 }
464
465 static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
466 size_t len)
467 {
468 void __iomem *baseAddr = brd->basemem;
469 u16 tmp;
470
471 writeb(HW_reset, baseAddr + Control_reg); /* reset */
472 msleep(10);
473 memset_io(baseAddr, 0, 4096);
474 memcpy_toio(baseAddr, buf, len); /* download BIOS */
475 writeb(0, baseAddr + Control_reg); /* restart */
476
477 msleep(2000);
478
479 switch (brd->boardType) {
480 case MOXA_BOARD_C218_ISA:
481 case MOXA_BOARD_C218_PCI:
482 tmp = readw(baseAddr + C218_key);
483 if (tmp != C218_KeyCode)
484 goto err;
485 break;
486 case MOXA_BOARD_CP204J:
487 tmp = readw(baseAddr + C218_key);
488 if (tmp != CP204J_KeyCode)
489 goto err;
490 break;
491 default:
492 tmp = readw(baseAddr + C320_key);
493 if (tmp != C320_KeyCode)
494 goto err;
495 tmp = readw(baseAddr + C320_status);
496 if (tmp != STS_init) {
497 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
498 "module not found\n");
499 return -EIO;
500 }
501 break;
502 }
503
504 return 0;
505 err:
506 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
507 return -EIO;
508 }
509
510 static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
511 size_t len)
512 {
513 void __iomem *baseAddr = brd->basemem;
514
515 if (len < 7168) {
516 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
517 return -EINVAL;
518 }
519
520 writew(len - 7168 - 2, baseAddr + C320bapi_len);
521 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
522 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
523 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
524 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
525
526 return 0;
527 }
528
529 static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
530 size_t len)
531 {
532 void __iomem *baseAddr = brd->basemem;
533 const __le16 *uptr = ptr;
534 size_t wlen, len2, j;
535 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
536 unsigned int i, retry;
537 u16 usum, keycode;
538
539 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
540 C218_KeyCode;
541
542 switch (brd->boardType) {
543 case MOXA_BOARD_CP204J:
544 case MOXA_BOARD_C218_ISA:
545 case MOXA_BOARD_C218_PCI:
546 key = C218_key;
547 loadbuf = C218_LoadBuf;
548 loadlen = C218DLoad_len;
549 checksum = C218check_sum;
550 checksum_ok = C218chksum_ok;
551 break;
552 default:
553 key = C320_key;
554 keycode = C320_KeyCode;
555 loadbuf = C320_LoadBuf;
556 loadlen = C320DLoad_len;
557 checksum = C320check_sum;
558 checksum_ok = C320chksum_ok;
559 break;
560 }
561
562 usum = 0;
563 wlen = len >> 1;
564 for (i = 0; i < wlen; i++)
565 usum += le16_to_cpu(uptr[i]);
566 retry = 0;
567 do {
568 wlen = len >> 1;
569 j = 0;
570 while (wlen) {
571 len2 = (wlen > 2048) ? 2048 : wlen;
572 wlen -= len2;
573 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
574 j += len2 << 1;
575
576 writew(len2, baseAddr + loadlen);
577 writew(0, baseAddr + key);
578 for (i = 0; i < 100; i++) {
579 if (readw(baseAddr + key) == keycode)
580 break;
581 msleep(10);
582 }
583 if (readw(baseAddr + key) != keycode)
584 return -EIO;
585 }
586 writew(0, baseAddr + loadlen);
587 writew(usum, baseAddr + checksum);
588 writew(0, baseAddr + key);
589 for (i = 0; i < 100; i++) {
590 if (readw(baseAddr + key) == keycode)
591 break;
592 msleep(10);
593 }
594 retry++;
595 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
596 if (readb(baseAddr + checksum_ok) != 1)
597 return -EIO;
598
599 writew(0, baseAddr + key);
600 for (i = 0; i < 600; i++) {
601 if (readw(baseAddr + Magic_no) == Magic_code)
602 break;
603 msleep(10);
604 }
605 if (readw(baseAddr + Magic_no) != Magic_code)
606 return -EIO;
607
608 if (MOXA_IS_320(brd)) {
609 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
610 writew(0x3800, baseAddr + TMS320_PORT1);
611 writew(0x3900, baseAddr + TMS320_PORT2);
612 writew(28499, baseAddr + TMS320_CLOCK);
613 } else {
614 writew(0x3200, baseAddr + TMS320_PORT1);
615 writew(0x3400, baseAddr + TMS320_PORT2);
616 writew(19999, baseAddr + TMS320_CLOCK);
617 }
618 }
619 writew(1, baseAddr + Disable_IRQ);
620 writew(0, baseAddr + Magic_no);
621 for (i = 0; i < 500; i++) {
622 if (readw(baseAddr + Magic_no) == Magic_code)
623 break;
624 msleep(10);
625 }
626 if (readw(baseAddr + Magic_no) != Magic_code)
627 return -EIO;
628
629 if (MOXA_IS_320(brd)) {
630 j = readw(baseAddr + Module_cnt);
631 if (j <= 0)
632 return -EIO;
633 brd->numPorts = j * 8;
634 writew(j, baseAddr + Module_no);
635 writew(0, baseAddr + Magic_no);
636 for (i = 0; i < 600; i++) {
637 if (readw(baseAddr + Magic_no) == Magic_code)
638 break;
639 msleep(10);
640 }
641 if (readw(baseAddr + Magic_no) != Magic_code)
642 return -EIO;
643 }
644 brd->intNdx = baseAddr + IRQindex;
645 brd->intPend = baseAddr + IRQpending;
646 brd->intTable = baseAddr + IRQtable;
647
648 return 0;
649 }
650
651 static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
652 size_t len)
653 {
654 void __iomem *ofsAddr, *baseAddr = brd->basemem;
655 struct moxa_port *port;
656 int retval, i;
657
658 if (len % 2) {
659 printk(KERN_ERR "MOXA: bios length is not even\n");
660 return -EINVAL;
661 }
662
663 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
664 if (retval)
665 return retval;
666
667 switch (brd->boardType) {
668 case MOXA_BOARD_C218_ISA:
669 case MOXA_BOARD_C218_PCI:
670 case MOXA_BOARD_CP204J:
671 port = brd->ports;
672 for (i = 0; i < brd->numPorts; i++, port++) {
673 port->board = brd;
674 port->DCDState = 0;
675 port->tableAddr = baseAddr + Extern_table +
676 Extern_size * i;
677 ofsAddr = port->tableAddr;
678 writew(C218rx_mask, ofsAddr + RX_mask);
679 writew(C218tx_mask, ofsAddr + TX_mask);
680 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
681 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
682
683 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
684 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
685
686 }
687 break;
688 default:
689 port = brd->ports;
690 for (i = 0; i < brd->numPorts; i++, port++) {
691 port->board = brd;
692 port->DCDState = 0;
693 port->tableAddr = baseAddr + Extern_table +
694 Extern_size * i;
695 ofsAddr = port->tableAddr;
696 switch (brd->numPorts) {
697 case 8:
698 writew(C320p8rx_mask, ofsAddr + RX_mask);
699 writew(C320p8tx_mask, ofsAddr + TX_mask);
700 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
701 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
702 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
703 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
704
705 break;
706 case 16:
707 writew(C320p16rx_mask, ofsAddr + RX_mask);
708 writew(C320p16tx_mask, ofsAddr + TX_mask);
709 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
710 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
711 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
712 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
713 break;
714
715 case 24:
716 writew(C320p24rx_mask, ofsAddr + RX_mask);
717 writew(C320p24tx_mask, ofsAddr + TX_mask);
718 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
719 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
720 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
721 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
722 break;
723 case 32:
724 writew(C320p32rx_mask, ofsAddr + RX_mask);
725 writew(C320p32tx_mask, ofsAddr + TX_mask);
726 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
727 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
728 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
729 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
730 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
731 break;
732 }
733 }
734 break;
735 }
736 return 0;
737 }
738
739 static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
740 {
741 const void *ptr = fw->data;
742 char rsn[64];
743 u16 lens[5];
744 size_t len;
745 unsigned int a, lenp, lencnt;
746 int ret = -EINVAL;
747 struct {
748 __le32 magic; /* 0x34303430 */
749 u8 reserved1[2];
750 u8 type; /* UNIX = 3 */
751 u8 model; /* C218T=1, C320T=2, CP204=3 */
752 u8 reserved2[8];
753 __le16 len[5];
754 } const *hdr = ptr;
755
756 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
757
758 if (fw->size < MOXA_FW_HDRLEN) {
759 strcpy(rsn, "too short (even header won't fit)");
760 goto err;
761 }
762 if (hdr->magic != cpu_to_le32(0x30343034)) {
763 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
764 goto err;
765 }
766 if (hdr->type != 3) {
767 sprintf(rsn, "not for linux, type is %u", hdr->type);
768 goto err;
769 }
770 if (moxa_check_fw_model(brd, hdr->model)) {
771 sprintf(rsn, "not for this card, model is %u", hdr->model);
772 goto err;
773 }
774
775 len = MOXA_FW_HDRLEN;
776 lencnt = hdr->model == 2 ? 5 : 3;
777 for (a = 0; a < ARRAY_SIZE(lens); a++) {
778 lens[a] = le16_to_cpu(hdr->len[a]);
779 if (lens[a] && len + lens[a] <= fw->size &&
780 moxa_check_fw(&fw->data[len]))
781 printk(KERN_WARNING "MOXA firmware: unexpected input "
782 "at offset %u, but going on\n", (u32)len);
783 if (!lens[a] && a < lencnt) {
784 sprintf(rsn, "too few entries in fw file");
785 goto err;
786 }
787 len += lens[a];
788 }
789
790 if (len != fw->size) {
791 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
792 (u32)len);
793 goto err;
794 }
795
796 ptr += MOXA_FW_HDRLEN;
797 lenp = 0; /* bios */
798
799 strcpy(rsn, "read above");
800
801 ret = moxa_load_bios(brd, ptr, lens[lenp]);
802 if (ret)
803 goto err;
804
805 /* we skip the tty section (lens[1]), since we don't need it */
806 ptr += lens[lenp] + lens[lenp + 1];
807 lenp += 2; /* comm */
808
809 if (hdr->model == 2) {
810 ret = moxa_load_320b(brd, ptr, lens[lenp]);
811 if (ret)
812 goto err;
813 /* skip another tty */
814 ptr += lens[lenp] + lens[lenp + 1];
815 lenp += 2;
816 }
817
818 ret = moxa_load_code(brd, ptr, lens[lenp]);
819 if (ret)
820 goto err;
821
822 return 0;
823 err:
824 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
825 return ret;
826 }
827
828 static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
829 {
830 const struct firmware *fw;
831 const char *file;
832 struct moxa_port *p;
833 unsigned int i, first_idx;
834 int ret;
835
836 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
837 GFP_KERNEL);
838 if (brd->ports == NULL) {
839 printk(KERN_ERR "cannot allocate memory for ports\n");
840 ret = -ENOMEM;
841 goto err;
842 }
843
844 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
845 tty_port_init(&p->port);
846 p->port.ops = &moxa_port_ops;
847 p->type = PORT_16550A;
848 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
849 }
850
851 switch (brd->boardType) {
852 case MOXA_BOARD_C218_ISA:
853 case MOXA_BOARD_C218_PCI:
854 file = "c218tunx.cod";
855 break;
856 case MOXA_BOARD_CP204J:
857 file = "cp204unx.cod";
858 break;
859 default:
860 file = "c320tunx.cod";
861 break;
862 }
863
864 ret = request_firmware(&fw, file, dev);
865 if (ret) {
866 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
867 "you've placed '%s' file into your firmware "
868 "loader directory (e.g. /lib/firmware)\n",
869 file);
870 goto err_free;
871 }
872
873 ret = moxa_load_fw(brd, fw);
874
875 release_firmware(fw);
876
877 if (ret)
878 goto err_free;
879
880 spin_lock_bh(&moxa_lock);
881 brd->ready = 1;
882 if (!timer_pending(&moxaTimer))
883 mod_timer(&moxaTimer, jiffies + HZ / 50);
884 spin_unlock_bh(&moxa_lock);
885
886 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
887 for (i = 0; i < brd->numPorts; i++)
888 tty_port_register_device(&brd->ports[i].port, moxaDriver,
889 first_idx + i, dev);
890
891 return 0;
892 err_free:
893 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
894 tty_port_destroy(&brd->ports[i].port);
895 kfree(brd->ports);
896 err:
897 return ret;
898 }
899
900 static void moxa_board_deinit(struct moxa_board_conf *brd)
901 {
902 unsigned int a, opened, first_idx;
903
904 mutex_lock(&moxa_openlock);
905 spin_lock_bh(&moxa_lock);
906 brd->ready = 0;
907 spin_unlock_bh(&moxa_lock);
908
909 /* pci hot-un-plug support */
910 for (a = 0; a < brd->numPorts; a++)
911 if (tty_port_initialized(&brd->ports[a].port))
912 tty_port_tty_hangup(&brd->ports[a].port, false);
913
914 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
915 tty_port_destroy(&brd->ports[a].port);
916
917 while (1) {
918 opened = 0;
919 for (a = 0; a < brd->numPorts; a++)
920 if (tty_port_initialized(&brd->ports[a].port))
921 opened++;
922 mutex_unlock(&moxa_openlock);
923 if (!opened)
924 break;
925 msleep(50);
926 mutex_lock(&moxa_openlock);
927 }
928
929 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
930 for (a = 0; a < brd->numPorts; a++)
931 tty_unregister_device(moxaDriver, first_idx + a);
932
933 iounmap(brd->basemem);
934 brd->basemem = NULL;
935 kfree(brd->ports);
936 }
937
938 #ifdef CONFIG_PCI
939 static int moxa_pci_probe(struct pci_dev *pdev,
940 const struct pci_device_id *ent)
941 {
942 struct moxa_board_conf *board;
943 unsigned int i;
944 int board_type = ent->driver_data;
945 int retval;
946
947 retval = pci_enable_device(pdev);
948 if (retval) {
949 dev_err(&pdev->dev, "can't enable pci device\n");
950 goto err;
951 }
952
953 for (i = 0; i < MAX_BOARDS; i++)
954 if (moxa_boards[i].basemem == NULL)
955 break;
956
957 retval = -ENODEV;
958 if (i >= MAX_BOARDS) {
959 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
960 "found. Board is ignored.\n", MAX_BOARDS);
961 goto err;
962 }
963
964 board = &moxa_boards[i];
965
966 retval = pci_request_region(pdev, 2, "moxa-base");
967 if (retval) {
968 dev_err(&pdev->dev, "can't request pci region 2\n");
969 goto err;
970 }
971
972 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
973 if (board->basemem == NULL) {
974 dev_err(&pdev->dev, "can't remap io space 2\n");
975 retval = -ENOMEM;
976 goto err_reg;
977 }
978
979 board->boardType = board_type;
980 switch (board_type) {
981 case MOXA_BOARD_C218_ISA:
982 case MOXA_BOARD_C218_PCI:
983 board->numPorts = 8;
984 break;
985
986 case MOXA_BOARD_CP204J:
987 board->numPorts = 4;
988 break;
989 default:
990 board->numPorts = 0;
991 break;
992 }
993 board->busType = MOXA_BUS_TYPE_PCI;
994
995 retval = moxa_init_board(board, &pdev->dev);
996 if (retval)
997 goto err_base;
998
999 pci_set_drvdata(pdev, board);
1000
1001 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
1002 moxa_brdname[board_type - 1], board->numPorts);
1003
1004 return 0;
1005 err_base:
1006 iounmap(board->basemem);
1007 board->basemem = NULL;
1008 err_reg:
1009 pci_release_region(pdev, 2);
1010 err:
1011 return retval;
1012 }
1013
1014 static void moxa_pci_remove(struct pci_dev *pdev)
1015 {
1016 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1017
1018 moxa_board_deinit(brd);
1019
1020 pci_release_region(pdev, 2);
1021 }
1022
1023 static struct pci_driver moxa_pci_driver = {
1024 .name = "moxa",
1025 .id_table = moxa_pcibrds,
1026 .probe = moxa_pci_probe,
1027 .remove = moxa_pci_remove
1028 };
1029 #endif /* CONFIG_PCI */
1030
1031 static int __init moxa_init(void)
1032 {
1033 unsigned int isabrds = 0;
1034 int retval = 0;
1035 struct moxa_board_conf *brd = moxa_boards;
1036 unsigned int i;
1037
1038 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1039 MOXA_VERSION);
1040
1041 tty_port_init(&moxa_service_port);
1042
1043 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1044 TTY_DRIVER_REAL_RAW |
1045 TTY_DRIVER_DYNAMIC_DEV);
1046 if (IS_ERR(moxaDriver))
1047 return PTR_ERR(moxaDriver);
1048
1049 moxaDriver->name = "ttyMX";
1050 moxaDriver->major = ttymajor;
1051 moxaDriver->minor_start = 0;
1052 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1053 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1054 moxaDriver->init_termios = tty_std_termios;
1055 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1056 moxaDriver->init_termios.c_ispeed = 9600;
1057 moxaDriver->init_termios.c_ospeed = 9600;
1058 tty_set_operations(moxaDriver, &moxa_ops);
1059 /* Having one more port only for ioctls is ugly */
1060 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1061
1062 if (tty_register_driver(moxaDriver)) {
1063 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1064 put_tty_driver(moxaDriver);
1065 return -1;
1066 }
1067
1068 /* Find the boards defined from module args. */
1069
1070 for (i = 0; i < MAX_BOARDS; i++) {
1071 if (!baseaddr[i])
1072 break;
1073 if (type[i] == MOXA_BOARD_C218_ISA ||
1074 type[i] == MOXA_BOARD_C320_ISA) {
1075 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1076 isabrds + 1, moxa_brdname[type[i] - 1],
1077 baseaddr[i]);
1078 brd->boardType = type[i];
1079 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1080 numports[i];
1081 brd->busType = MOXA_BUS_TYPE_ISA;
1082 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
1083 if (!brd->basemem) {
1084 printk(KERN_ERR "MOXA: can't remap %lx\n",
1085 baseaddr[i]);
1086 continue;
1087 }
1088 if (moxa_init_board(brd, NULL)) {
1089 iounmap(brd->basemem);
1090 brd->basemem = NULL;
1091 continue;
1092 }
1093
1094 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
1095 "ready (%u ports, firmware loaded)\n",
1096 baseaddr[i], brd->numPorts);
1097
1098 brd++;
1099 isabrds++;
1100 }
1101 }
1102
1103 #ifdef CONFIG_PCI
1104 retval = pci_register_driver(&moxa_pci_driver);
1105 if (retval) {
1106 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1107 if (isabrds)
1108 retval = 0;
1109 }
1110 #endif
1111
1112 return retval;
1113 }
1114
1115 static void __exit moxa_exit(void)
1116 {
1117 unsigned int i;
1118
1119 #ifdef CONFIG_PCI
1120 pci_unregister_driver(&moxa_pci_driver);
1121 #endif
1122
1123 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1124 if (moxa_boards[i].ready)
1125 moxa_board_deinit(&moxa_boards[i]);
1126
1127 del_timer_sync(&moxaTimer);
1128
1129 if (tty_unregister_driver(moxaDriver))
1130 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1131 "serial driver\n");
1132 put_tty_driver(moxaDriver);
1133 }
1134
1135 module_init(moxa_init);
1136 module_exit(moxa_exit);
1137
1138 static void moxa_shutdown(struct tty_port *port)
1139 {
1140 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1141 MoxaPortDisable(ch);
1142 MoxaPortFlushData(ch, 2);
1143 }
1144
1145 static int moxa_carrier_raised(struct tty_port *port)
1146 {
1147 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1148 int dcd;
1149
1150 spin_lock_irq(&port->lock);
1151 dcd = ch->DCDState;
1152 spin_unlock_irq(&port->lock);
1153 return dcd;
1154 }
1155
1156 static void moxa_dtr_rts(struct tty_port *port, int onoff)
1157 {
1158 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1159 MoxaPortLineCtrl(ch, onoff, onoff);
1160 }
1161
1162
1163 static int moxa_open(struct tty_struct *tty, struct file *filp)
1164 {
1165 struct moxa_board_conf *brd;
1166 struct moxa_port *ch;
1167 int port;
1168
1169 port = tty->index;
1170 if (port == MAX_PORTS) {
1171 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1172 }
1173 if (mutex_lock_interruptible(&moxa_openlock))
1174 return -ERESTARTSYS;
1175 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1176 if (!brd->ready) {
1177 mutex_unlock(&moxa_openlock);
1178 return -ENODEV;
1179 }
1180
1181 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1182 mutex_unlock(&moxa_openlock);
1183 return -ENODEV;
1184 }
1185
1186 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1187 ch->port.count++;
1188 tty->driver_data = ch;
1189 tty_port_tty_set(&ch->port, tty);
1190 mutex_lock(&ch->port.mutex);
1191 if (!tty_port_initialized(&ch->port)) {
1192 ch->statusflags = 0;
1193 moxa_set_tty_param(tty, &tty->termios);
1194 MoxaPortLineCtrl(ch, 1, 1);
1195 MoxaPortEnable(ch);
1196 MoxaSetFifo(ch, ch->type == PORT_16550A);
1197 tty_port_set_initialized(&ch->port, 1);
1198 }
1199 mutex_unlock(&ch->port.mutex);
1200 mutex_unlock(&moxa_openlock);
1201
1202 return tty_port_block_til_ready(&ch->port, tty, filp);
1203 }
1204
1205 static void moxa_close(struct tty_struct *tty, struct file *filp)
1206 {
1207 struct moxa_port *ch = tty->driver_data;
1208 ch->cflag = tty->termios.c_cflag;
1209 tty_port_close(&ch->port, tty, filp);
1210 }
1211
1212 static int moxa_write(struct tty_struct *tty,
1213 const unsigned char *buf, int count)
1214 {
1215 struct moxa_port *ch = tty->driver_data;
1216 unsigned long flags;
1217 int len;
1218
1219 if (ch == NULL)
1220 return 0;
1221
1222 spin_lock_irqsave(&moxa_lock, flags);
1223 len = MoxaPortWriteData(tty, buf, count);
1224 spin_unlock_irqrestore(&moxa_lock, flags);
1225
1226 set_bit(LOWWAIT, &ch->statusflags);
1227 return len;
1228 }
1229
1230 static int moxa_write_room(struct tty_struct *tty)
1231 {
1232 struct moxa_port *ch;
1233
1234 if (tty->stopped)
1235 return 0;
1236 ch = tty->driver_data;
1237 if (ch == NULL)
1238 return 0;
1239 return MoxaPortTxFree(ch);
1240 }
1241
1242 static void moxa_flush_buffer(struct tty_struct *tty)
1243 {
1244 struct moxa_port *ch = tty->driver_data;
1245
1246 if (ch == NULL)
1247 return;
1248 MoxaPortFlushData(ch, 1);
1249 tty_wakeup(tty);
1250 }
1251
1252 static int moxa_chars_in_buffer(struct tty_struct *tty)
1253 {
1254 struct moxa_port *ch = tty->driver_data;
1255 int chars;
1256
1257 chars = MoxaPortTxQueue(ch);
1258 if (chars)
1259 /*
1260 * Make it possible to wakeup anything waiting for output
1261 * in tty_ioctl.c, etc.
1262 */
1263 set_bit(EMPTYWAIT, &ch->statusflags);
1264 return chars;
1265 }
1266
1267 static int moxa_tiocmget(struct tty_struct *tty)
1268 {
1269 struct moxa_port *ch = tty->driver_data;
1270 int flag = 0, dtr, rts;
1271
1272 MoxaPortGetLineOut(ch, &dtr, &rts);
1273 if (dtr)
1274 flag |= TIOCM_DTR;
1275 if (rts)
1276 flag |= TIOCM_RTS;
1277 dtr = MoxaPortLineStatus(ch);
1278 if (dtr & 1)
1279 flag |= TIOCM_CTS;
1280 if (dtr & 2)
1281 flag |= TIOCM_DSR;
1282 if (dtr & 4)
1283 flag |= TIOCM_CD;
1284 return flag;
1285 }
1286
1287 static int moxa_tiocmset(struct tty_struct *tty,
1288 unsigned int set, unsigned int clear)
1289 {
1290 struct moxa_port *ch;
1291 int dtr, rts;
1292
1293 mutex_lock(&moxa_openlock);
1294 ch = tty->driver_data;
1295 if (!ch) {
1296 mutex_unlock(&moxa_openlock);
1297 return -EINVAL;
1298 }
1299
1300 MoxaPortGetLineOut(ch, &dtr, &rts);
1301 if (set & TIOCM_RTS)
1302 rts = 1;
1303 if (set & TIOCM_DTR)
1304 dtr = 1;
1305 if (clear & TIOCM_RTS)
1306 rts = 0;
1307 if (clear & TIOCM_DTR)
1308 dtr = 0;
1309 MoxaPortLineCtrl(ch, dtr, rts);
1310 mutex_unlock(&moxa_openlock);
1311 return 0;
1312 }
1313
1314 static void moxa_set_termios(struct tty_struct *tty,
1315 struct ktermios *old_termios)
1316 {
1317 struct moxa_port *ch = tty->driver_data;
1318
1319 if (ch == NULL)
1320 return;
1321 moxa_set_tty_param(tty, old_termios);
1322 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1323 wake_up_interruptible(&ch->port.open_wait);
1324 }
1325
1326 static void moxa_stop(struct tty_struct *tty)
1327 {
1328 struct moxa_port *ch = tty->driver_data;
1329
1330 if (ch == NULL)
1331 return;
1332 MoxaPortTxDisable(ch);
1333 set_bit(TXSTOPPED, &ch->statusflags);
1334 }
1335
1336
1337 static void moxa_start(struct tty_struct *tty)
1338 {
1339 struct moxa_port *ch = tty->driver_data;
1340
1341 if (ch == NULL)
1342 return;
1343
1344 if (!test_bit(TXSTOPPED, &ch->statusflags))
1345 return;
1346
1347 MoxaPortTxEnable(ch);
1348 clear_bit(TXSTOPPED, &ch->statusflags);
1349 }
1350
1351 static void moxa_hangup(struct tty_struct *tty)
1352 {
1353 struct moxa_port *ch = tty->driver_data;
1354 tty_port_hangup(&ch->port);
1355 }
1356
1357 static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1358 {
1359 unsigned long flags;
1360 dcd = !!dcd;
1361
1362 spin_lock_irqsave(&p->port.lock, flags);
1363 if (dcd != p->DCDState) {
1364 p->DCDState = dcd;
1365 spin_unlock_irqrestore(&p->port.lock, flags);
1366 if (!dcd)
1367 tty_port_tty_hangup(&p->port, true);
1368 }
1369 else
1370 spin_unlock_irqrestore(&p->port.lock, flags);
1371 }
1372
1373 static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1374 u16 __iomem *ip)
1375 {
1376 struct tty_struct *tty = tty_port_tty_get(&p->port);
1377 void __iomem *ofsAddr;
1378 unsigned int inited = tty_port_initialized(&p->port);
1379 u16 intr;
1380
1381 if (tty) {
1382 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1383 MoxaPortTxQueue(p) == 0) {
1384 clear_bit(EMPTYWAIT, &p->statusflags);
1385 tty_wakeup(tty);
1386 }
1387 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
1388 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1389 clear_bit(LOWWAIT, &p->statusflags);
1390 tty_wakeup(tty);
1391 }
1392
1393 if (inited && !tty_throttled(tty) &&
1394 MoxaPortRxQueue(p) > 0) { /* RX */
1395 MoxaPortReadData(p);
1396 tty_schedule_flip(&p->port);
1397 }
1398 } else {
1399 clear_bit(EMPTYWAIT, &p->statusflags);
1400 MoxaPortFlushData(p, 0); /* flush RX */
1401 }
1402
1403 if (!handle) /* nothing else to do */
1404 goto put;
1405
1406 intr = readw(ip); /* port irq status */
1407 if (intr == 0)
1408 goto put;
1409
1410 writew(0, ip); /* ACK port */
1411 ofsAddr = p->tableAddr;
1412 if (intr & IntrTx) /* disable tx intr */
1413 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1414 ofsAddr + HostStat);
1415
1416 if (!inited)
1417 goto put;
1418
1419 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1420 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1421 tty_schedule_flip(&p->port);
1422 }
1423
1424 if (intr & IntrLine)
1425 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1426 put:
1427 tty_kref_put(tty);
1428
1429 return 0;
1430 }
1431
1432 static void moxa_poll(struct timer_list *unused)
1433 {
1434 struct moxa_board_conf *brd;
1435 u16 __iomem *ip;
1436 unsigned int card, port, served = 0;
1437
1438 spin_lock(&moxa_lock);
1439 for (card = 0; card < MAX_BOARDS; card++) {
1440 brd = &moxa_boards[card];
1441 if (!brd->ready)
1442 continue;
1443
1444 served++;
1445
1446 ip = NULL;
1447 if (readb(brd->intPend) == 0xff)
1448 ip = brd->intTable + readb(brd->intNdx);
1449
1450 for (port = 0; port < brd->numPorts; port++)
1451 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1452
1453 if (ip)
1454 writeb(0, brd->intPend); /* ACK */
1455
1456 if (moxaLowWaterChk) {
1457 struct moxa_port *p = brd->ports;
1458 for (port = 0; port < brd->numPorts; port++, p++)
1459 if (p->lowChkFlag) {
1460 p->lowChkFlag = 0;
1461 moxa_low_water_check(p->tableAddr);
1462 }
1463 }
1464 }
1465 moxaLowWaterChk = 0;
1466
1467 if (served)
1468 mod_timer(&moxaTimer, jiffies + HZ / 50);
1469 spin_unlock(&moxa_lock);
1470 }
1471
1472 /******************************************************************************/
1473
1474 static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1475 {
1476 register struct ktermios *ts = &tty->termios;
1477 struct moxa_port *ch = tty->driver_data;
1478 int rts, cts, txflow, rxflow, xany, baud;
1479
1480 rts = cts = txflow = rxflow = xany = 0;
1481 if (ts->c_cflag & CRTSCTS)
1482 rts = cts = 1;
1483 if (ts->c_iflag & IXON)
1484 txflow = 1;
1485 if (ts->c_iflag & IXOFF)
1486 rxflow = 1;
1487 if (ts->c_iflag & IXANY)
1488 xany = 1;
1489
1490 /* Clear the features we don't support */
1491 ts->c_cflag &= ~CMSPAR;
1492 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1493 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1494 if (baud == -1)
1495 baud = tty_termios_baud_rate(old_termios);
1496 /* Not put the baud rate into the termios data */
1497 tty_encode_baud_rate(tty, baud, baud);
1498 }
1499
1500 /*****************************************************************************
1501 * Driver level functions: *
1502 *****************************************************************************/
1503
1504 static void MoxaPortFlushData(struct moxa_port *port, int mode)
1505 {
1506 void __iomem *ofsAddr;
1507 if (mode < 0 || mode > 2)
1508 return;
1509 ofsAddr = port->tableAddr;
1510 moxafunc(ofsAddr, FC_FlushQueue, mode);
1511 if (mode != 1) {
1512 port->lowChkFlag = 0;
1513 moxa_low_water_check(ofsAddr);
1514 }
1515 }
1516
1517 /*
1518 * Moxa Port Number Description:
1519 *
1520 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1521 * the port number using in MOXA driver functions will be 0 to 31 for
1522 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1523 * to 127 for fourth. For example, if you setup three MOXA boards,
1524 * first board is C218, second board is C320-16 and third board is
1525 * C320-32. The port number of first board (C218 - 8 ports) is from
1526 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1527 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1528 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1529 * 127 will be invalid.
1530 *
1531 *
1532 * Moxa Functions Description:
1533 *
1534 * Function 1: Driver initialization routine, this routine must be
1535 * called when initialized driver.
1536 * Syntax:
1537 * void MoxaDriverInit();
1538 *
1539 *
1540 * Function 2: Moxa driver private IOCTL command processing.
1541 * Syntax:
1542 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1543 *
1544 * unsigned int cmd : IOCTL command
1545 * unsigned long arg : IOCTL argument
1546 * int port : port number (0 - 127)
1547 *
1548 * return: 0 (OK)
1549 * -EINVAL
1550 * -ENOIOCTLCMD
1551 *
1552 *
1553 * Function 6: Enable this port to start Tx/Rx data.
1554 * Syntax:
1555 * void MoxaPortEnable(int port);
1556 * int port : port number (0 - 127)
1557 *
1558 *
1559 * Function 7: Disable this port
1560 * Syntax:
1561 * void MoxaPortDisable(int port);
1562 * int port : port number (0 - 127)
1563 *
1564 *
1565 * Function 10: Setting baud rate of this port.
1566 * Syntax:
1567 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1568 * int port : port number (0 - 127)
1569 * long baud : baud rate (50 - 115200)
1570 *
1571 * return: 0 : this port is invalid or baud < 50
1572 * 50 - 115200 : the real baud rate set to the port, if
1573 * the argument baud is large than maximun
1574 * available baud rate, the real setting
1575 * baud rate will be the maximun baud rate.
1576 *
1577 *
1578 * Function 12: Configure the port.
1579 * Syntax:
1580 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1581 * int port : port number (0 - 127)
1582 * struct ktermios * termio : termio structure pointer
1583 * speed_t baud : baud rate
1584 *
1585 * return: -1 : this port is invalid or termio == NULL
1586 * 0 : setting O.K.
1587 *
1588 *
1589 * Function 13: Get the DTR/RTS state of this port.
1590 * Syntax:
1591 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1592 * int port : port number (0 - 127)
1593 * int * dtrState : pointer to INT to receive the current DTR
1594 * state. (if NULL, this function will not
1595 * write to this address)
1596 * int * rtsState : pointer to INT to receive the current RTS
1597 * state. (if NULL, this function will not
1598 * write to this address)
1599 *
1600 * return: -1 : this port is invalid
1601 * 0 : O.K.
1602 *
1603 *
1604 * Function 14: Setting the DTR/RTS output state of this port.
1605 * Syntax:
1606 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1607 * int port : port number (0 - 127)
1608 * int dtrState : DTR output state (0: off, 1: on)
1609 * int rtsState : RTS output state (0: off, 1: on)
1610 *
1611 *
1612 * Function 15: Setting the flow control of this port.
1613 * Syntax:
1614 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1615 * int txFlow,int xany);
1616 * int port : port number (0 - 127)
1617 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1618 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1619 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1620 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1621 * int xany : S/W XANY flow control (0: no, 1: yes)
1622 *
1623 *
1624 * Function 16: Get ths line status of this port
1625 * Syntax:
1626 * int MoxaPortLineStatus(int port);
1627 * int port : port number (0 - 127)
1628 *
1629 * return: Bit 0 - CTS state (0: off, 1: on)
1630 * Bit 1 - DSR state (0: off, 1: on)
1631 * Bit 2 - DCD state (0: off, 1: on)
1632 *
1633 *
1634 * Function 19: Flush the Rx/Tx buffer data of this port.
1635 * Syntax:
1636 * void MoxaPortFlushData(int port, int mode);
1637 * int port : port number (0 - 127)
1638 * int mode
1639 * 0 : flush the Rx buffer
1640 * 1 : flush the Tx buffer
1641 * 2 : flush the Rx and Tx buffer
1642 *
1643 *
1644 * Function 20: Write data.
1645 * Syntax:
1646 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1647 * int port : port number (0 - 127)
1648 * unsigned char * buffer : pointer to write data buffer.
1649 * int length : write data length
1650 *
1651 * return: 0 - length : real write data length
1652 *
1653 *
1654 * Function 21: Read data.
1655 * Syntax:
1656 * int MoxaPortReadData(int port, struct tty_struct *tty);
1657 * int port : port number (0 - 127)
1658 * struct tty_struct *tty : tty for data
1659 *
1660 * return: 0 - length : real read data length
1661 *
1662 *
1663 * Function 24: Get the Tx buffer current queued data bytes
1664 * Syntax:
1665 * int MoxaPortTxQueue(int port);
1666 * int port : port number (0 - 127)
1667 *
1668 * return: .. : Tx buffer current queued data bytes
1669 *
1670 *
1671 * Function 25: Get the Tx buffer current free space
1672 * Syntax:
1673 * int MoxaPortTxFree(int port);
1674 * int port : port number (0 - 127)
1675 *
1676 * return: .. : Tx buffer current free space
1677 *
1678 *
1679 * Function 26: Get the Rx buffer current queued data bytes
1680 * Syntax:
1681 * int MoxaPortRxQueue(int port);
1682 * int port : port number (0 - 127)
1683 *
1684 * return: .. : Rx buffer current queued data bytes
1685 *
1686 *
1687 * Function 28: Disable port data transmission.
1688 * Syntax:
1689 * void MoxaPortTxDisable(int port);
1690 * int port : port number (0 - 127)
1691 *
1692 *
1693 * Function 29: Enable port data transmission.
1694 * Syntax:
1695 * void MoxaPortTxEnable(int port);
1696 * int port : port number (0 - 127)
1697 *
1698 *
1699 * Function 31: Get the received BREAK signal count and reset it.
1700 * Syntax:
1701 * int MoxaPortResetBrkCnt(int port);
1702 * int port : port number (0 - 127)
1703 *
1704 * return: 0 - .. : BREAK signal count
1705 *
1706 *
1707 */
1708
1709 static void MoxaPortEnable(struct moxa_port *port)
1710 {
1711 void __iomem *ofsAddr;
1712 u16 lowwater = 512;
1713
1714 ofsAddr = port->tableAddr;
1715 writew(lowwater, ofsAddr + Low_water);
1716 if (MOXA_IS_320(port->board))
1717 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1718 else
1719 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1720 ofsAddr + HostStat);
1721
1722 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1723 moxafunc(ofsAddr, FC_FlushQueue, 2);
1724
1725 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1726 MoxaPortLineStatus(port);
1727 }
1728
1729 static void MoxaPortDisable(struct moxa_port *port)
1730 {
1731 void __iomem *ofsAddr = port->tableAddr;
1732
1733 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1734 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1735 writew(0, ofsAddr + HostStat);
1736 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1737 }
1738
1739 static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1740 {
1741 void __iomem *ofsAddr = port->tableAddr;
1742 unsigned int clock, val;
1743 speed_t max;
1744
1745 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1746 if (baud < 50)
1747 return 0;
1748 if (baud > max)
1749 baud = max;
1750 clock = 921600;
1751 val = clock / baud;
1752 moxafunc(ofsAddr, FC_SetBaud, val);
1753 baud = clock / val;
1754 return baud;
1755 }
1756
1757 static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1758 speed_t baud)
1759 {
1760 void __iomem *ofsAddr;
1761 tcflag_t mode = 0;
1762
1763 ofsAddr = port->tableAddr;
1764
1765 mode = termio->c_cflag & CSIZE;
1766 if (mode == CS5)
1767 mode = MX_CS5;
1768 else if (mode == CS6)
1769 mode = MX_CS6;
1770 else if (mode == CS7)
1771 mode = MX_CS7;
1772 else if (mode == CS8)
1773 mode = MX_CS8;
1774
1775 if (termio->c_cflag & CSTOPB) {
1776 if (mode == MX_CS5)
1777 mode |= MX_STOP15;
1778 else
1779 mode |= MX_STOP2;
1780 } else
1781 mode |= MX_STOP1;
1782
1783 if (termio->c_cflag & PARENB) {
1784 if (termio->c_cflag & PARODD)
1785 mode |= MX_PARODD;
1786 else
1787 mode |= MX_PAREVEN;
1788 } else
1789 mode |= MX_PARNONE;
1790
1791 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1792
1793 if (MOXA_IS_320(port->board) && baud >= 921600)
1794 return -1;
1795
1796 baud = MoxaPortSetBaud(port, baud);
1797
1798 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1799 spin_lock_irq(&moxafunc_lock);
1800 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1801 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1802 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1803 moxa_wait_finish(ofsAddr);
1804 spin_unlock_irq(&moxafunc_lock);
1805
1806 }
1807 return baud;
1808 }
1809
1810 static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1811 int *rtsState)
1812 {
1813 if (dtrState)
1814 *dtrState = !!(port->lineCtrl & DTR_ON);
1815 if (rtsState)
1816 *rtsState = !!(port->lineCtrl & RTS_ON);
1817
1818 return 0;
1819 }
1820
1821 static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1822 {
1823 u8 mode = 0;
1824
1825 if (dtr)
1826 mode |= DTR_ON;
1827 if (rts)
1828 mode |= RTS_ON;
1829 port->lineCtrl = mode;
1830 moxafunc(port->tableAddr, FC_LineControl, mode);
1831 }
1832
1833 static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1834 int txflow, int rxflow, int txany)
1835 {
1836 int mode = 0;
1837
1838 if (rts)
1839 mode |= RTS_FlowCtl;
1840 if (cts)
1841 mode |= CTS_FlowCtl;
1842 if (txflow)
1843 mode |= Tx_FlowCtl;
1844 if (rxflow)
1845 mode |= Rx_FlowCtl;
1846 if (txany)
1847 mode |= IXM_IXANY;
1848 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1849 }
1850
1851 static int MoxaPortLineStatus(struct moxa_port *port)
1852 {
1853 void __iomem *ofsAddr;
1854 int val;
1855
1856 ofsAddr = port->tableAddr;
1857 if (MOXA_IS_320(port->board))
1858 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1859 else
1860 val = readw(ofsAddr + FlagStat) >> 4;
1861 val &= 0x0B;
1862 if (val & 8)
1863 val |= 4;
1864 moxa_new_dcdstate(port, val & 8);
1865 val &= 7;
1866 return val;
1867 }
1868
1869 static int MoxaPortWriteData(struct tty_struct *tty,
1870 const unsigned char *buffer, int len)
1871 {
1872 struct moxa_port *port = tty->driver_data;
1873 void __iomem *baseAddr, *ofsAddr, *ofs;
1874 unsigned int c, total;
1875 u16 head, tail, tx_mask, spage, epage;
1876 u16 pageno, pageofs, bufhead;
1877
1878 ofsAddr = port->tableAddr;
1879 baseAddr = port->board->basemem;
1880 tx_mask = readw(ofsAddr + TX_mask);
1881 spage = readw(ofsAddr + Page_txb);
1882 epage = readw(ofsAddr + EndPage_txb);
1883 tail = readw(ofsAddr + TXwptr);
1884 head = readw(ofsAddr + TXrptr);
1885 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1886 if (c > len)
1887 c = len;
1888 moxaLog.txcnt[port->port.tty->index] += c;
1889 total = c;
1890 if (spage == epage) {
1891 bufhead = readw(ofsAddr + Ofs_txb);
1892 writew(spage, baseAddr + Control_reg);
1893 while (c > 0) {
1894 if (head > tail)
1895 len = head - tail - 1;
1896 else
1897 len = tx_mask + 1 - tail;
1898 len = (c > len) ? len : c;
1899 ofs = baseAddr + DynPage_addr + bufhead + tail;
1900 memcpy_toio(ofs, buffer, len);
1901 buffer += len;
1902 tail = (tail + len) & tx_mask;
1903 c -= len;
1904 }
1905 } else {
1906 pageno = spage + (tail >> 13);
1907 pageofs = tail & Page_mask;
1908 while (c > 0) {
1909 len = Page_size - pageofs;
1910 if (len > c)
1911 len = c;
1912 writeb(pageno, baseAddr + Control_reg);
1913 ofs = baseAddr + DynPage_addr + pageofs;
1914 memcpy_toio(ofs, buffer, len);
1915 buffer += len;
1916 if (++pageno == epage)
1917 pageno = spage;
1918 pageofs = 0;
1919 c -= len;
1920 }
1921 tail = (tail + total) & tx_mask;
1922 }
1923 writew(tail, ofsAddr + TXwptr);
1924 writeb(1, ofsAddr + CD180TXirq); /* start to send */
1925 return total;
1926 }
1927
1928 static int MoxaPortReadData(struct moxa_port *port)
1929 {
1930 struct tty_struct *tty = port->port.tty;
1931 unsigned char *dst;
1932 void __iomem *baseAddr, *ofsAddr, *ofs;
1933 unsigned int count, len, total;
1934 u16 tail, rx_mask, spage, epage;
1935 u16 pageno, pageofs, bufhead, head;
1936
1937 ofsAddr = port->tableAddr;
1938 baseAddr = port->board->basemem;
1939 head = readw(ofsAddr + RXrptr);
1940 tail = readw(ofsAddr + RXwptr);
1941 rx_mask = readw(ofsAddr + RX_mask);
1942 spage = readw(ofsAddr + Page_rxb);
1943 epage = readw(ofsAddr + EndPage_rxb);
1944 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1945 if (count == 0)
1946 return 0;
1947
1948 total = count;
1949 moxaLog.rxcnt[tty->index] += total;
1950 if (spage == epage) {
1951 bufhead = readw(ofsAddr + Ofs_rxb);
1952 writew(spage, baseAddr + Control_reg);
1953 while (count > 0) {
1954 ofs = baseAddr + DynPage_addr + bufhead + head;
1955 len = (tail >= head) ? (tail - head) :
1956 (rx_mask + 1 - head);
1957 len = tty_prepare_flip_string(&port->port, &dst,
1958 min(len, count));
1959 memcpy_fromio(dst, ofs, len);
1960 head = (head + len) & rx_mask;
1961 count -= len;
1962 }
1963 } else {
1964 pageno = spage + (head >> 13);
1965 pageofs = head & Page_mask;
1966 while (count > 0) {
1967 writew(pageno, baseAddr + Control_reg);
1968 ofs = baseAddr + DynPage_addr + pageofs;
1969 len = tty_prepare_flip_string(&port->port, &dst,
1970 min(Page_size - pageofs, count));
1971 memcpy_fromio(dst, ofs, len);
1972
1973 count -= len;
1974 pageofs = (pageofs + len) & Page_mask;
1975 if (pageofs == 0 && ++pageno == epage)
1976 pageno = spage;
1977 }
1978 head = (head + total) & rx_mask;
1979 }
1980 writew(head, ofsAddr + RXrptr);
1981 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1982 moxaLowWaterChk = 1;
1983 port->lowChkFlag = 1;
1984 }
1985 return total;
1986 }
1987
1988
1989 static int MoxaPortTxQueue(struct moxa_port *port)
1990 {
1991 void __iomem *ofsAddr = port->tableAddr;
1992 u16 rptr, wptr, mask;
1993
1994 rptr = readw(ofsAddr + TXrptr);
1995 wptr = readw(ofsAddr + TXwptr);
1996 mask = readw(ofsAddr + TX_mask);
1997 return (wptr - rptr) & mask;
1998 }
1999
2000 static int MoxaPortTxFree(struct moxa_port *port)
2001 {
2002 void __iomem *ofsAddr = port->tableAddr;
2003 u16 rptr, wptr, mask;
2004
2005 rptr = readw(ofsAddr + TXrptr);
2006 wptr = readw(ofsAddr + TXwptr);
2007 mask = readw(ofsAddr + TX_mask);
2008 return mask - ((wptr - rptr) & mask);
2009 }
2010
2011 static int MoxaPortRxQueue(struct moxa_port *port)
2012 {
2013 void __iomem *ofsAddr = port->tableAddr;
2014 u16 rptr, wptr, mask;
2015
2016 rptr = readw(ofsAddr + RXrptr);
2017 wptr = readw(ofsAddr + RXwptr);
2018 mask = readw(ofsAddr + RX_mask);
2019 return (wptr - rptr) & mask;
2020 }
2021
2022 static void MoxaPortTxDisable(struct moxa_port *port)
2023 {
2024 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2025 }
2026
2027 static void MoxaPortTxEnable(struct moxa_port *port)
2028 {
2029 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2030 }
2031
2032 static int moxa_get_serial_info(struct moxa_port *info,
2033 struct serial_struct __user *retinfo)
2034 {
2035 struct serial_struct tmp = {
2036 .type = info->type,
2037 .line = info->port.tty->index,
2038 .flags = info->port.flags,
2039 .baud_base = 921600,
2040 .close_delay = info->port.close_delay
2041 };
2042 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
2043 }
2044
2045
2046 static int moxa_set_serial_info(struct moxa_port *info,
2047 struct serial_struct __user *new_info)
2048 {
2049 struct serial_struct new_serial;
2050
2051 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2052 return -EFAULT;
2053
2054 if (new_serial.irq != 0 || new_serial.port != 0 ||
2055 new_serial.custom_divisor != 0 ||
2056 new_serial.baud_base != 921600)
2057 return -EPERM;
2058
2059 if (!capable(CAP_SYS_ADMIN)) {
2060 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
2061 (info->port.flags & ~ASYNC_USR_MASK)))
2062 return -EPERM;
2063 } else
2064 info->port.close_delay = new_serial.close_delay * HZ / 100;
2065
2066 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
2067 new_serial.flags |= (info->port.flags & ASYNC_FLAGS);
2068
2069 MoxaSetFifo(info, new_serial.type == PORT_16550A);
2070
2071 info->type = new_serial.type;
2072 return 0;
2073 }
2074
2075
2076
2077 /*****************************************************************************
2078 * Static local functions: *
2079 *****************************************************************************/
2080
2081 static void MoxaSetFifo(struct moxa_port *port, int enable)
2082 {
2083 void __iomem *ofsAddr = port->tableAddr;
2084
2085 if (!enable) {
2086 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2087 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2088 } else {
2089 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2090 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2091 }
2092 }
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