2 * RocketPort device driver for Linux
4 * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
6 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Kernel Synchronization:
26 * This driver has 2 kernel control paths - exception handlers (calls into the driver
27 * from user mode) and the timer bottom half (tasklet). This is a polled driver, interrupts
31 * - rp_table[], accessed through passed "info" pointers, is a global (static) array of
32 * serial port state information and the xmit_buf circular buffer. Protected by
33 * a per port spinlock.
34 * - xmit_flags[], an array of ints indexed by line (port) number, indicating that there
35 * is data to be transmitted. Protected by atomic bit operations.
36 * - rp_num_ports, int indicating number of open ports, protected by atomic operations.
38 * rp_write() and rp_write_char() functions use a per port semaphore to protect against
39 * simultaneous access to the same port by more than one process.
42 /****** Defines ******/
43 #define ROCKET_PARANOIA_CHECK
44 #define ROCKET_DISABLE_SIMUSAGE
46 #undef ROCKET_SOFT_FLOW
47 #undef ROCKET_DEBUG_OPEN
48 #undef ROCKET_DEBUG_INTR
49 #undef ROCKET_DEBUG_WRITE
50 #undef ROCKET_DEBUG_FLOW
51 #undef ROCKET_DEBUG_THROTTLE
52 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
53 #undef ROCKET_DEBUG_RECEIVE
54 #undef ROCKET_DEBUG_HANGUP
56 #undef ROCKET_DEBUG_IO
58 #define POLL_PERIOD HZ/100 /* Polling period .01 seconds (10ms) */
60 /****** Kernel includes ******/
62 #include <linux/module.h>
63 #include <linux/errno.h>
64 #include <linux/major.h>
65 #include <linux/kernel.h>
66 #include <linux/signal.h>
67 #include <linux/slab.h>
69 #include <linux/sched.h>
70 #include <linux/timer.h>
71 #include <linux/interrupt.h>
72 #include <linux/tty.h>
73 #include <linux/tty_driver.h>
74 #include <linux/tty_flip.h>
75 #include <linux/serial.h>
76 #include <linux/string.h>
77 #include <linux/fcntl.h>
78 #include <linux/ptrace.h>
79 #include <linux/mutex.h>
80 #include <linux/ioport.h>
81 #include <linux/delay.h>
82 #include <linux/completion.h>
83 #include <linux/wait.h>
84 #include <linux/pci.h>
85 #include <linux/uaccess.h>
86 #include <linux/atomic.h>
87 #include <asm/unaligned.h>
88 #include <linux/bitops.h>
89 #include <linux/spinlock.h>
90 #include <linux/init.h>
92 /****** RocketPort includes ******/
94 #include "rocket_int.h"
97 #define ROCKET_VERSION "2.09"
98 #define ROCKET_DATE "12-June-2003"
100 /****** RocketPort Local Variables ******/
102 static void rp_do_poll(unsigned long dummy
);
104 static struct tty_driver
*rocket_driver
;
106 static struct rocket_version driver_version
= {
107 ROCKET_VERSION
, ROCKET_DATE
110 static struct r_port
*rp_table
[MAX_RP_PORTS
]; /* The main repository of serial port state information. */
111 static unsigned int xmit_flags
[NUM_BOARDS
]; /* Bit significant, indicates port had data to transmit. */
112 /* eg. Bit 0 indicates port 0 has xmit data, ... */
113 static atomic_t rp_num_ports_open
; /* Number of serial ports open */
114 static DEFINE_TIMER(rocket_timer
, rp_do_poll
, 0, 0);
116 static unsigned long board1
; /* ISA addresses, retrieved from rocketport.conf */
117 static unsigned long board2
;
118 static unsigned long board3
;
119 static unsigned long board4
;
120 static unsigned long controller
;
121 static bool support_low_speed
;
122 static unsigned long modem1
;
123 static unsigned long modem2
;
124 static unsigned long modem3
;
125 static unsigned long modem4
;
126 static unsigned long pc104_1
[8];
127 static unsigned long pc104_2
[8];
128 static unsigned long pc104_3
[8];
129 static unsigned long pc104_4
[8];
130 static unsigned long *pc104
[4] = { pc104_1
, pc104_2
, pc104_3
, pc104_4
};
132 static int rp_baud_base
[NUM_BOARDS
]; /* Board config info (Someday make a per-board structure) */
133 static unsigned long rcktpt_io_addr
[NUM_BOARDS
];
134 static int rcktpt_type
[NUM_BOARDS
];
135 static int is_PCI
[NUM_BOARDS
];
136 static rocketModel_t rocketModel
[NUM_BOARDS
];
137 static int max_board
;
138 static const struct tty_port_operations rocket_port_ops
;
141 * The following arrays define the interrupt bits corresponding to each AIOP.
142 * These bits are different between the ISA and regular PCI boards and the
143 * Universal PCI boards.
146 static Word_t aiop_intr_bits
[AIOP_CTL_SIZE
] = {
153 static Word_t upci_aiop_intr_bits
[AIOP_CTL_SIZE
] = {
154 UPCI_AIOP_INTR_BIT_0
,
155 UPCI_AIOP_INTR_BIT_1
,
156 UPCI_AIOP_INTR_BIT_2
,
160 static Byte_t RData
[RDATASIZE
] = {
161 0x00, 0x09, 0xf6, 0x82,
162 0x02, 0x09, 0x86, 0xfb,
163 0x04, 0x09, 0x00, 0x0a,
164 0x06, 0x09, 0x01, 0x0a,
165 0x08, 0x09, 0x8a, 0x13,
166 0x0a, 0x09, 0xc5, 0x11,
167 0x0c, 0x09, 0x86, 0x85,
168 0x0e, 0x09, 0x20, 0x0a,
169 0x10, 0x09, 0x21, 0x0a,
170 0x12, 0x09, 0x41, 0xff,
171 0x14, 0x09, 0x82, 0x00,
172 0x16, 0x09, 0x82, 0x7b,
173 0x18, 0x09, 0x8a, 0x7d,
174 0x1a, 0x09, 0x88, 0x81,
175 0x1c, 0x09, 0x86, 0x7a,
176 0x1e, 0x09, 0x84, 0x81,
177 0x20, 0x09, 0x82, 0x7c,
178 0x22, 0x09, 0x0a, 0x0a
181 static Byte_t RRegData
[RREGDATASIZE
] = {
182 0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
183 0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
184 0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
185 0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
186 0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
187 0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
188 0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
189 0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
190 0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
191 0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
192 0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
193 0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
194 0x22, 0x09, 0x0a, 0x0a /* 30: Rx FIFO Enable */
197 static CONTROLLER_T sController
[CTL_SIZE
] = {
198 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
199 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
200 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
201 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
202 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
203 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
204 {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
205 {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
208 static Byte_t sBitMapClrTbl
[8] = {
209 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
212 static Byte_t sBitMapSetTbl
[8] = {
213 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
216 static int sClockPrescale
= 0x14;
219 * Line number is the ttySIx number (x), the Minor number. We
220 * assign them sequentially, starting at zero. The following
221 * array keeps track of the line number assigned to a given board/aiop/channel.
223 static unsigned char lineNumbers
[MAX_RP_PORTS
];
224 static unsigned long nextLineNumber
;
226 /***** RocketPort Static Prototypes *********/
227 static int __init
init_ISA(int i
);
228 static void rp_wait_until_sent(struct tty_struct
*tty
, int timeout
);
229 static void rp_flush_buffer(struct tty_struct
*tty
);
230 static void rmSpeakerReset(CONTROLLER_T
* CtlP
, unsigned long model
);
231 static unsigned char GetLineNumber(int ctrl
, int aiop
, int ch
);
232 static unsigned char SetLineNumber(int ctrl
, int aiop
, int ch
);
233 static void rp_start(struct tty_struct
*tty
);
234 static int sInitChan(CONTROLLER_T
* CtlP
, CHANNEL_T
* ChP
, int AiopNum
,
236 static void sSetInterfaceMode(CHANNEL_T
* ChP
, Byte_t mode
);
237 static void sFlushRxFIFO(CHANNEL_T
* ChP
);
238 static void sFlushTxFIFO(CHANNEL_T
* ChP
);
239 static void sEnInterrupts(CHANNEL_T
* ChP
, Word_t Flags
);
240 static void sDisInterrupts(CHANNEL_T
* ChP
, Word_t Flags
);
241 static void sModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
);
242 static void sPCIModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
);
243 static int sWriteTxPrioByte(CHANNEL_T
* ChP
, Byte_t Data
);
244 static int sPCIInitController(CONTROLLER_T
* CtlP
, int CtlNum
,
245 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
246 WordIO_t ConfigIO
, int IRQNum
, Byte_t Frequency
,
247 int PeriodicOnly
, int altChanRingIndicator
,
249 static int sInitController(CONTROLLER_T
* CtlP
, int CtlNum
, ByteIO_t MudbacIO
,
250 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
251 int IRQNum
, Byte_t Frequency
, int PeriodicOnly
);
252 static int sReadAiopID(ByteIO_t io
);
253 static int sReadAiopNumChan(WordIO_t io
);
255 MODULE_AUTHOR("Theodore Ts'o");
256 MODULE_DESCRIPTION("Comtrol RocketPort driver");
257 module_param(board1
, ulong
, 0);
258 MODULE_PARM_DESC(board1
, "I/O port for (ISA) board #1");
259 module_param(board2
, ulong
, 0);
260 MODULE_PARM_DESC(board2
, "I/O port for (ISA) board #2");
261 module_param(board3
, ulong
, 0);
262 MODULE_PARM_DESC(board3
, "I/O port for (ISA) board #3");
263 module_param(board4
, ulong
, 0);
264 MODULE_PARM_DESC(board4
, "I/O port for (ISA) board #4");
265 module_param(controller
, ulong
, 0);
266 MODULE_PARM_DESC(controller
, "I/O port for (ISA) rocketport controller");
267 module_param(support_low_speed
, bool, 0);
268 MODULE_PARM_DESC(support_low_speed
, "1 means support 50 baud, 0 means support 460400 baud");
269 module_param(modem1
, ulong
, 0);
270 MODULE_PARM_DESC(modem1
, "1 means (ISA) board #1 is a RocketModem");
271 module_param(modem2
, ulong
, 0);
272 MODULE_PARM_DESC(modem2
, "1 means (ISA) board #2 is a RocketModem");
273 module_param(modem3
, ulong
, 0);
274 MODULE_PARM_DESC(modem3
, "1 means (ISA) board #3 is a RocketModem");
275 module_param(modem4
, ulong
, 0);
276 MODULE_PARM_DESC(modem4
, "1 means (ISA) board #4 is a RocketModem");
277 module_param_array(pc104_1
, ulong
, NULL
, 0);
278 MODULE_PARM_DESC(pc104_1
, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
279 module_param_array(pc104_2
, ulong
, NULL
, 0);
280 MODULE_PARM_DESC(pc104_2
, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
281 module_param_array(pc104_3
, ulong
, NULL
, 0);
282 MODULE_PARM_DESC(pc104_3
, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
283 module_param_array(pc104_4
, ulong
, NULL
, 0);
284 MODULE_PARM_DESC(pc104_4
, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
286 static int rp_init(void);
287 static void rp_cleanup_module(void);
289 module_init(rp_init
);
290 module_exit(rp_cleanup_module
);
293 MODULE_LICENSE("Dual BSD/GPL");
295 /*************************************************************************/
296 /* Module code starts here */
298 static inline int rocket_paranoia_check(struct r_port
*info
,
301 #ifdef ROCKET_PARANOIA_CHECK
304 if (info
->magic
!= RPORT_MAGIC
) {
305 printk(KERN_WARNING
"Warning: bad magic number for rocketport "
306 "struct in %s\n", routine
);
314 /* Serial port receive data function. Called (from timer poll) when an AIOPIC signals
315 * that receive data is present on a serial port. Pulls data from FIFO, moves it into the
318 static void rp_do_receive(struct r_port
*info
,
319 struct tty_struct
*tty
,
320 CHANNEL_t
* cp
, unsigned int ChanStatus
)
322 unsigned int CharNStat
;
323 int ToRecv
, wRecv
, space
;
326 ToRecv
= sGetRxCnt(cp
);
327 #ifdef ROCKET_DEBUG_INTR
328 printk(KERN_INFO
"rp_do_receive(%d)...\n", ToRecv
);
334 * if status indicates there are errored characters in the
335 * FIFO, then enter status mode (a word in FIFO holds
336 * character and status).
338 if (ChanStatus
& (RXFOVERFL
| RXBREAK
| RXFRAME
| RXPARITY
)) {
339 if (!(ChanStatus
& STATMODE
)) {
340 #ifdef ROCKET_DEBUG_RECEIVE
341 printk(KERN_INFO
"Entering STATMODE...\n");
343 ChanStatus
|= STATMODE
;
349 * if we previously entered status mode, then read down the
350 * FIFO one word at a time, pulling apart the character and
351 * the status. Update error counters depending on status
353 if (ChanStatus
& STATMODE
) {
354 #ifdef ROCKET_DEBUG_RECEIVE
355 printk(KERN_INFO
"Ignore %x, read %x...\n",
356 info
->ignore_status_mask
, info
->read_status_mask
);
361 CharNStat
= sInW(sGetTxRxDataIO(cp
));
362 #ifdef ROCKET_DEBUG_RECEIVE
363 printk(KERN_INFO
"%x...\n", CharNStat
);
365 if (CharNStat
& STMBREAKH
)
366 CharNStat
&= ~(STMFRAMEH
| STMPARITYH
);
367 if (CharNStat
& info
->ignore_status_mask
) {
371 CharNStat
&= info
->read_status_mask
;
372 if (CharNStat
& STMBREAKH
)
374 else if (CharNStat
& STMPARITYH
)
376 else if (CharNStat
& STMFRAMEH
)
378 else if (CharNStat
& STMRCVROVRH
)
382 tty_insert_flip_char(&info
->port
, CharNStat
& 0xff,
388 * after we've emptied the FIFO in status mode, turn
389 * status mode back off
391 if (sGetRxCnt(cp
) == 0) {
392 #ifdef ROCKET_DEBUG_RECEIVE
393 printk(KERN_INFO
"Status mode off.\n");
395 sDisRxStatusMode(cp
);
399 * we aren't in status mode, so read down the FIFO two
400 * characters at time by doing repeated word IO
403 space
= tty_prepare_flip_string(&info
->port
, &cbuf
, ToRecv
);
404 if (space
< ToRecv
) {
405 #ifdef ROCKET_DEBUG_RECEIVE
406 printk(KERN_INFO
"rp_do_receive:insufficient space ToRecv=%d space=%d\n", ToRecv
, space
);
414 sInStrW(sGetTxRxDataIO(cp
), (unsigned short *) cbuf
, wRecv
);
416 cbuf
[ToRecv
- 1] = sInB(sGetTxRxDataIO(cp
));
418 /* Push the data up to the tty layer */
419 tty_flip_buffer_push(tty
);
423 * Serial port transmit data function. Called from the timer polling loop as a
424 * result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
425 * to be sent out the serial port. Data is buffered in rp_table[line].xmit_buf, it is
426 * moved to the port's xmit FIFO. *info is critical data, protected by spinlocks.
428 static void rp_do_transmit(struct r_port
*info
)
431 CHANNEL_t
*cp
= &info
->channel
;
432 struct tty_struct
*tty
;
435 #ifdef ROCKET_DEBUG_INTR
436 printk(KERN_DEBUG
"%s\n", __func__
);
440 tty
= tty_port_tty_get(&info
->port
);
443 printk(KERN_WARNING
"rp: WARNING %s called with tty==NULL\n", __func__
);
444 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
448 spin_lock_irqsave(&info
->slock
, flags
);
449 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
451 /* Loop sending data to FIFO until done or FIFO full */
453 if (tty
->stopped
|| tty
->hw_stopped
)
455 c
= min(info
->xmit_fifo_room
, info
->xmit_cnt
);
456 c
= min(c
, XMIT_BUF_SIZE
- info
->xmit_tail
);
457 if (c
<= 0 || info
->xmit_fifo_room
<= 0)
459 sOutStrW(sGetTxRxDataIO(cp
), (unsigned short *) (info
->xmit_buf
+ info
->xmit_tail
), c
/ 2);
461 sOutB(sGetTxRxDataIO(cp
), info
->xmit_buf
[info
->xmit_tail
+ c
- 1]);
462 info
->xmit_tail
+= c
;
463 info
->xmit_tail
&= XMIT_BUF_SIZE
- 1;
465 info
->xmit_fifo_room
-= c
;
466 #ifdef ROCKET_DEBUG_INTR
467 printk(KERN_INFO
"tx %d chars...\n", c
);
471 if (info
->xmit_cnt
== 0)
472 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
474 if (info
->xmit_cnt
< WAKEUP_CHARS
) {
476 #ifdef ROCKETPORT_HAVE_POLL_WAIT
477 wake_up_interruptible(&tty
->poll_wait
);
481 spin_unlock_irqrestore(&info
->slock
, flags
);
484 #ifdef ROCKET_DEBUG_INTR
485 printk(KERN_DEBUG
"(%d,%d,%d,%d)...\n", info
->xmit_cnt
, info
->xmit_head
,
486 info
->xmit_tail
, info
->xmit_fifo_room
);
491 * Called when a serial port signals it has read data in it's RX FIFO.
492 * It checks what interrupts are pending and services them, including
493 * receiving serial data.
495 static void rp_handle_port(struct r_port
*info
)
498 struct tty_struct
*tty
;
499 unsigned int IntMask
, ChanStatus
;
504 if ((info
->port
.flags
& ASYNC_INITIALIZED
) == 0) {
505 printk(KERN_WARNING
"rp: WARNING: rp_handle_port called with "
506 "info->flags & NOT_INIT\n");
509 tty
= tty_port_tty_get(&info
->port
);
511 printk(KERN_WARNING
"rp: WARNING: rp_handle_port called with "
517 IntMask
= sGetChanIntID(cp
) & info
->intmask
;
518 #ifdef ROCKET_DEBUG_INTR
519 printk(KERN_INFO
"rp_interrupt %02x...\n", IntMask
);
521 ChanStatus
= sGetChanStatus(cp
);
522 if (IntMask
& RXF_TRIG
) { /* Rx FIFO trigger level */
523 rp_do_receive(info
, tty
, cp
, ChanStatus
);
525 if (IntMask
& DELTA_CD
) { /* CD change */
526 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || defined(ROCKET_DEBUG_HANGUP))
527 printk(KERN_INFO
"ttyR%d CD now %s...\n", info
->line
,
528 (ChanStatus
& CD_ACT
) ? "on" : "off");
530 if (!(ChanStatus
& CD_ACT
) && info
->cd_status
) {
531 #ifdef ROCKET_DEBUG_HANGUP
532 printk(KERN_INFO
"CD drop, calling hangup.\n");
536 info
->cd_status
= (ChanStatus
& CD_ACT
) ? 1 : 0;
537 wake_up_interruptible(&info
->port
.open_wait
);
539 #ifdef ROCKET_DEBUG_INTR
540 if (IntMask
& DELTA_CTS
) { /* CTS change */
541 printk(KERN_INFO
"CTS change...\n");
543 if (IntMask
& DELTA_DSR
) { /* DSR change */
544 printk(KERN_INFO
"DSR change...\n");
551 * The top level polling routine. Repeats every 1/100 HZ (10ms).
553 static void rp_do_poll(unsigned long dummy
)
556 int ctrl
, aiop
, ch
, line
;
557 unsigned int xmitmask
, i
;
558 unsigned int CtlMask
;
559 unsigned char AiopMask
;
562 /* Walk through all the boards (ctrl's) */
563 for (ctrl
= 0; ctrl
< max_board
; ctrl
++) {
564 if (rcktpt_io_addr
[ctrl
] <= 0)
567 /* Get a ptr to the board's control struct */
568 ctlp
= sCtlNumToCtlPtr(ctrl
);
570 /* Get the interrupt status from the board */
572 if (ctlp
->BusType
== isPCI
)
573 CtlMask
= sPCIGetControllerIntStatus(ctlp
);
576 CtlMask
= sGetControllerIntStatus(ctlp
);
578 /* Check if any AIOP read bits are set */
579 for (aiop
= 0; CtlMask
; aiop
++) {
580 bit
= ctlp
->AiopIntrBits
[aiop
];
583 AiopMask
= sGetAiopIntStatus(ctlp
, aiop
);
585 /* Check if any port read bits are set */
586 for (ch
= 0; AiopMask
; AiopMask
>>= 1, ch
++) {
589 /* Get the line number (/dev/ttyRx number). */
590 /* Read the data from the port. */
591 line
= GetLineNumber(ctrl
, aiop
, ch
);
592 rp_handle_port(rp_table
[line
]);
598 xmitmask
= xmit_flags
[ctrl
];
601 * xmit_flags contains bit-significant flags, indicating there is data
602 * to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port
603 * 1, ... (32 total possible). The variable i has the aiop and ch
604 * numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
607 for (i
= 0; i
< rocketModel
[ctrl
].numPorts
; i
++) {
608 if (xmitmask
& (1 << i
)) {
609 aiop
= (i
& 0x18) >> 3;
611 line
= GetLineNumber(ctrl
, aiop
, ch
);
612 rp_do_transmit(rp_table
[line
]);
619 * Reset the timer so we get called at the next clock tick (10ms).
621 if (atomic_read(&rp_num_ports_open
))
622 mod_timer(&rocket_timer
, jiffies
+ POLL_PERIOD
);
626 * Initializes the r_port structure for a port, as well as enabling the port on
628 * Inputs: board, aiop, chan numbers
630 static void init_r_port(int board
, int aiop
, int chan
, struct pci_dev
*pci_dev
)
637 /* Get the next available line number */
638 line
= SetLineNumber(board
, aiop
, chan
);
640 ctlp
= sCtlNumToCtlPtr(board
);
642 /* Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
643 info
= kzalloc(sizeof (struct r_port
), GFP_KERNEL
);
645 printk(KERN_ERR
"Couldn't allocate info struct for line #%d\n",
650 info
->magic
= RPORT_MAGIC
;
656 tty_port_init(&info
->port
);
657 info
->port
.ops
= &rocket_port_ops
;
658 init_completion(&info
->close_wait
);
659 info
->flags
&= ~ROCKET_MODE_MASK
;
660 switch (pc104
[board
][line
]) {
662 info
->flags
|= ROCKET_MODE_RS422
;
665 info
->flags
|= ROCKET_MODE_RS485
;
669 info
->flags
|= ROCKET_MODE_RS232
;
673 info
->intmask
= RXF_TRIG
| TXFIFO_MT
| SRC_INT
| DELTA_CD
| DELTA_CTS
| DELTA_DSR
;
674 if (sInitChan(ctlp
, &info
->channel
, aiop
, chan
) == 0) {
675 printk(KERN_ERR
"RocketPort sInitChan(%d, %d, %d) failed!\n",
677 tty_port_destroy(&info
->port
);
682 rocketMode
= info
->flags
& ROCKET_MODE_MASK
;
684 if ((info
->flags
& ROCKET_RTS_TOGGLE
) || (rocketMode
== ROCKET_MODE_RS485
))
685 sEnRTSToggle(&info
->channel
);
687 sDisRTSToggle(&info
->channel
);
689 if (ctlp
->boardType
== ROCKET_TYPE_PC104
) {
690 switch (rocketMode
) {
691 case ROCKET_MODE_RS485
:
692 sSetInterfaceMode(&info
->channel
, InterfaceModeRS485
);
694 case ROCKET_MODE_RS422
:
695 sSetInterfaceMode(&info
->channel
, InterfaceModeRS422
);
697 case ROCKET_MODE_RS232
:
699 if (info
->flags
& ROCKET_RTS_TOGGLE
)
700 sSetInterfaceMode(&info
->channel
, InterfaceModeRS232T
);
702 sSetInterfaceMode(&info
->channel
, InterfaceModeRS232
);
706 spin_lock_init(&info
->slock
);
707 mutex_init(&info
->write_mtx
);
708 rp_table
[line
] = info
;
709 tty_port_register_device(&info
->port
, rocket_driver
, line
,
710 pci_dev
? &pci_dev
->dev
: NULL
);
714 * Configures a rocketport port according to its termio settings. Called from
715 * user mode into the driver (exception handler). *info CD manipulation is spinlock protected.
717 static void configure_r_port(struct tty_struct
*tty
, struct r_port
*info
,
718 struct ktermios
*old_termios
)
723 int bits
, baud
, divisor
;
725 struct ktermios
*t
= &tty
->termios
;
730 /* Byte size and parity */
731 if ((cflag
& CSIZE
) == CS8
) {
738 if (cflag
& CSTOPB
) {
745 if (cflag
& PARENB
) {
748 if (cflag
& PARODD
) {
758 baud
= tty_get_baud_rate(tty
);
761 divisor
= ((rp_baud_base
[info
->board
] + (baud
>> 1)) / baud
) - 1;
762 if ((divisor
>= 8192 || divisor
< 0) && old_termios
) {
763 baud
= tty_termios_baud_rate(old_termios
);
766 divisor
= (rp_baud_base
[info
->board
] / baud
) - 1;
768 if (divisor
>= 8192 || divisor
< 0) {
770 divisor
= (rp_baud_base
[info
->board
] / baud
) - 1;
772 info
->cps
= baud
/ bits
;
773 sSetBaud(cp
, divisor
);
775 /* FIXME: Should really back compute a baud rate from the divisor */
776 tty_encode_baud_rate(tty
, baud
, baud
);
778 if (cflag
& CRTSCTS
) {
779 info
->intmask
|= DELTA_CTS
;
782 info
->intmask
&= ~DELTA_CTS
;
785 if (cflag
& CLOCAL
) {
786 info
->intmask
&= ~DELTA_CD
;
788 spin_lock_irqsave(&info
->slock
, flags
);
789 if (sGetChanStatus(cp
) & CD_ACT
)
793 info
->intmask
|= DELTA_CD
;
794 spin_unlock_irqrestore(&info
->slock
, flags
);
798 * Handle software flow control in the board
800 #ifdef ROCKET_SOFT_FLOW
802 sEnTxSoftFlowCtl(cp
);
808 sSetTxXONChar(cp
, START_CHAR(tty
));
809 sSetTxXOFFChar(cp
, STOP_CHAR(tty
));
811 sDisTxSoftFlowCtl(cp
);
818 * Set up ignore/read mask words
820 info
->read_status_mask
= STMRCVROVRH
| 0xFF;
822 info
->read_status_mask
|= STMFRAMEH
| STMPARITYH
;
823 if (I_BRKINT(tty
) || I_PARMRK(tty
))
824 info
->read_status_mask
|= STMBREAKH
;
827 * Characters to ignore
829 info
->ignore_status_mask
= 0;
831 info
->ignore_status_mask
|= STMFRAMEH
| STMPARITYH
;
833 info
->ignore_status_mask
|= STMBREAKH
;
835 * If we're ignoring parity and break indicators,
836 * ignore overruns too. (For real raw support).
839 info
->ignore_status_mask
|= STMRCVROVRH
;
842 rocketMode
= info
->flags
& ROCKET_MODE_MASK
;
844 if ((info
->flags
& ROCKET_RTS_TOGGLE
)
845 || (rocketMode
== ROCKET_MODE_RS485
))
850 sSetRTS(&info
->channel
);
852 if (cp
->CtlP
->boardType
== ROCKET_TYPE_PC104
) {
853 switch (rocketMode
) {
854 case ROCKET_MODE_RS485
:
855 sSetInterfaceMode(cp
, InterfaceModeRS485
);
857 case ROCKET_MODE_RS422
:
858 sSetInterfaceMode(cp
, InterfaceModeRS422
);
860 case ROCKET_MODE_RS232
:
862 if (info
->flags
& ROCKET_RTS_TOGGLE
)
863 sSetInterfaceMode(cp
, InterfaceModeRS232T
);
865 sSetInterfaceMode(cp
, InterfaceModeRS232
);
871 static int carrier_raised(struct tty_port
*port
)
873 struct r_port
*info
= container_of(port
, struct r_port
, port
);
874 return (sGetChanStatusLo(&info
->channel
) & CD_ACT
) ? 1 : 0;
877 static void dtr_rts(struct tty_port
*port
, int on
)
879 struct r_port
*info
= container_of(port
, struct r_port
, port
);
881 sSetDTR(&info
->channel
);
882 sSetRTS(&info
->channel
);
884 sClrDTR(&info
->channel
);
885 sClrRTS(&info
->channel
);
890 * Exception handler that opens a serial port. Creates xmit_buf storage, fills in
891 * port's r_port struct. Initializes the port hardware.
893 static int rp_open(struct tty_struct
*tty
, struct file
*filp
)
896 struct tty_port
*port
;
901 info
= rp_table
[tty
->index
];
906 page
= __get_free_page(GFP_KERNEL
);
910 if (port
->flags
& ASYNC_CLOSING
) {
911 retval
= wait_for_completion_interruptible(&info
->close_wait
);
915 return ((port
->flags
& ASYNC_HUP_NOTIFY
) ? -EAGAIN
: -ERESTARTSYS
);
919 * We must not sleep from here until the port is marked fully in use.
924 info
->xmit_buf
= (unsigned char *) page
;
926 tty
->driver_data
= info
;
927 tty_port_tty_set(port
, tty
);
929 if (port
->count
++ == 0) {
930 atomic_inc(&rp_num_ports_open
);
932 #ifdef ROCKET_DEBUG_OPEN
933 printk(KERN_INFO
"rocket mod++ = %d...\n",
934 atomic_read(&rp_num_ports_open
));
937 #ifdef ROCKET_DEBUG_OPEN
938 printk(KERN_INFO
"rp_open ttyR%d, count=%d\n", info
->line
, info
->port
.count
);
942 * Info->count is now 1; so it's safe to sleep now.
944 if (!test_bit(ASYNCB_INITIALIZED
, &port
->flags
)) {
946 sSetRxTrigger(cp
, TRIG_1
);
947 if (sGetChanStatus(cp
) & CD_ACT
)
951 sDisRxStatusMode(cp
);
955 sEnInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
956 sSetRxTrigger(cp
, TRIG_1
);
959 sDisRxStatusMode(cp
);
963 sDisTxSoftFlowCtl(cp
);
968 set_bit(ASYNCB_INITIALIZED
, &info
->port
.flags
);
971 * Set up the tty->alt_speed kludge
973 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_HI
)
974 tty
->alt_speed
= 57600;
975 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_VHI
)
976 tty
->alt_speed
= 115200;
977 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_SHI
)
978 tty
->alt_speed
= 230400;
979 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_WARP
)
980 tty
->alt_speed
= 460800;
982 configure_r_port(tty
, info
, NULL
);
983 if (tty
->termios
.c_cflag
& CBAUD
) {
988 /* Starts (or resets) the maint polling loop */
989 mod_timer(&rocket_timer
, jiffies
+ POLL_PERIOD
);
991 retval
= tty_port_block_til_ready(port
, tty
, filp
);
993 #ifdef ROCKET_DEBUG_OPEN
994 printk(KERN_INFO
"rp_open returning after block_til_ready with %d\n", retval
);
1002 * Exception handler that closes a serial port. info->port.count is considered critical.
1004 static void rp_close(struct tty_struct
*tty
, struct file
*filp
)
1006 struct r_port
*info
= tty
->driver_data
;
1007 struct tty_port
*port
= &info
->port
;
1011 if (rocket_paranoia_check(info
, "rp_close"))
1014 #ifdef ROCKET_DEBUG_OPEN
1015 printk(KERN_INFO
"rp_close ttyR%d, count = %d\n", info
->line
, info
->port
.count
);
1018 if (tty_port_close_start(port
, tty
, filp
) == 0)
1021 mutex_lock(&port
->mutex
);
1022 cp
= &info
->channel
;
1024 * Before we drop DTR, make sure the UART transmitter
1025 * has completely drained; this is especially
1026 * important if there is a transmit FIFO!
1028 timeout
= (sGetTxCnt(cp
) + 1) * HZ
/ info
->cps
;
1031 rp_wait_until_sent(tty
, timeout
);
1032 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1035 sDisInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
1037 sDisTxSoftFlowCtl(cp
);
1045 rp_flush_buffer(tty
);
1047 tty_ldisc_flush(tty
);
1049 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1051 /* We can't yet use tty_port_close_end as the buffer handling in this
1052 driver is a bit different to the usual */
1054 if (port
->blocked_open
) {
1055 if (port
->close_delay
) {
1056 msleep_interruptible(jiffies_to_msecs(port
->close_delay
));
1058 wake_up_interruptible(&port
->open_wait
);
1060 if (info
->xmit_buf
) {
1061 free_page((unsigned long) info
->xmit_buf
);
1062 info
->xmit_buf
= NULL
;
1065 spin_lock_irq(&port
->lock
);
1066 info
->port
.flags
&= ~(ASYNC_INITIALIZED
| ASYNC_CLOSING
| ASYNC_NORMAL_ACTIVE
);
1068 spin_unlock_irq(&port
->lock
);
1069 mutex_unlock(&port
->mutex
);
1070 tty_port_tty_set(port
, NULL
);
1072 wake_up_interruptible(&port
->close_wait
);
1073 complete_all(&info
->close_wait
);
1074 atomic_dec(&rp_num_ports_open
);
1076 #ifdef ROCKET_DEBUG_OPEN
1077 printk(KERN_INFO
"rocket mod-- = %d...\n",
1078 atomic_read(&rp_num_ports_open
));
1079 printk(KERN_INFO
"rp_close ttyR%d complete shutdown\n", info
->line
);
1084 static void rp_set_termios(struct tty_struct
*tty
,
1085 struct ktermios
*old_termios
)
1087 struct r_port
*info
= tty
->driver_data
;
1091 if (rocket_paranoia_check(info
, "rp_set_termios"))
1094 cflag
= tty
->termios
.c_cflag
;
1097 * This driver doesn't support CS5 or CS6
1099 if (((cflag
& CSIZE
) == CS5
) || ((cflag
& CSIZE
) == CS6
))
1100 tty
->termios
.c_cflag
=
1101 ((cflag
& ~CSIZE
) | (old_termios
->c_cflag
& CSIZE
));
1103 tty
->termios
.c_cflag
&= ~CMSPAR
;
1105 configure_r_port(tty
, info
, old_termios
);
1107 cp
= &info
->channel
;
1109 /* Handle transition to B0 status */
1110 if ((old_termios
->c_cflag
& CBAUD
) && !(tty
->termios
.c_cflag
& CBAUD
)) {
1115 /* Handle transition away from B0 status */
1116 if (!(old_termios
->c_cflag
& CBAUD
) && (tty
->termios
.c_cflag
& CBAUD
)) {
1117 if (!tty
->hw_stopped
|| !(tty
->termios
.c_cflag
& CRTSCTS
))
1122 if ((old_termios
->c_cflag
& CRTSCTS
) && !(tty
->termios
.c_cflag
& CRTSCTS
)) {
1123 tty
->hw_stopped
= 0;
1128 static int rp_break(struct tty_struct
*tty
, int break_state
)
1130 struct r_port
*info
= tty
->driver_data
;
1131 unsigned long flags
;
1133 if (rocket_paranoia_check(info
, "rp_break"))
1136 spin_lock_irqsave(&info
->slock
, flags
);
1137 if (break_state
== -1)
1138 sSendBreak(&info
->channel
);
1140 sClrBreak(&info
->channel
);
1141 spin_unlock_irqrestore(&info
->slock
, flags
);
1146 * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1147 * the UPCI boards was added, it was decided to make this a function because
1148 * the macro was getting too complicated. All cases except the first one
1149 * (UPCIRingInd) are taken directly from the original macro.
1151 static int sGetChanRI(CHANNEL_T
* ChP
)
1153 CONTROLLER_t
*CtlP
= ChP
->CtlP
;
1154 int ChanNum
= ChP
->ChanNum
;
1157 if (CtlP
->UPCIRingInd
)
1158 RingInd
= !(sInB(CtlP
->UPCIRingInd
) & sBitMapSetTbl
[ChanNum
]);
1159 else if (CtlP
->AltChanRingIndicator
)
1160 RingInd
= sInB((ByteIO_t
) (ChP
->ChanStat
+ 8)) & DSR_ACT
;
1161 else if (CtlP
->boardType
== ROCKET_TYPE_PC104
)
1162 RingInd
= !(sInB(CtlP
->AiopIO
[3]) & sBitMapSetTbl
[ChanNum
]);
1167 /********************************************************************************************/
1168 /* Here are the routines used by rp_ioctl. These are all called from exception handlers. */
1171 * Returns the state of the serial modem control lines. These next 2 functions
1172 * are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1174 static int rp_tiocmget(struct tty_struct
*tty
)
1176 struct r_port
*info
= tty
->driver_data
;
1177 unsigned int control
, result
, ChanStatus
;
1179 ChanStatus
= sGetChanStatusLo(&info
->channel
);
1180 control
= info
->channel
.TxControl
[3];
1181 result
= ((control
& SET_RTS
) ? TIOCM_RTS
: 0) |
1182 ((control
& SET_DTR
) ? TIOCM_DTR
: 0) |
1183 ((ChanStatus
& CD_ACT
) ? TIOCM_CAR
: 0) |
1184 (sGetChanRI(&info
->channel
) ? TIOCM_RNG
: 0) |
1185 ((ChanStatus
& DSR_ACT
) ? TIOCM_DSR
: 0) |
1186 ((ChanStatus
& CTS_ACT
) ? TIOCM_CTS
: 0);
1192 * Sets the modem control lines
1194 static int rp_tiocmset(struct tty_struct
*tty
,
1195 unsigned int set
, unsigned int clear
)
1197 struct r_port
*info
= tty
->driver_data
;
1199 if (set
& TIOCM_RTS
)
1200 info
->channel
.TxControl
[3] |= SET_RTS
;
1201 if (set
& TIOCM_DTR
)
1202 info
->channel
.TxControl
[3] |= SET_DTR
;
1203 if (clear
& TIOCM_RTS
)
1204 info
->channel
.TxControl
[3] &= ~SET_RTS
;
1205 if (clear
& TIOCM_DTR
)
1206 info
->channel
.TxControl
[3] &= ~SET_DTR
;
1208 out32(info
->channel
.IndexAddr
, info
->channel
.TxControl
);
1212 static int get_config(struct r_port
*info
, struct rocket_config __user
*retinfo
)
1214 struct rocket_config tmp
;
1218 memset(&tmp
, 0, sizeof (tmp
));
1219 mutex_lock(&info
->port
.mutex
);
1220 tmp
.line
= info
->line
;
1221 tmp
.flags
= info
->flags
;
1222 tmp
.close_delay
= info
->port
.close_delay
;
1223 tmp
.closing_wait
= info
->port
.closing_wait
;
1224 tmp
.port
= rcktpt_io_addr
[(info
->line
>> 5) & 3];
1225 mutex_unlock(&info
->port
.mutex
);
1227 if (copy_to_user(retinfo
, &tmp
, sizeof (*retinfo
)))
1232 static int set_config(struct tty_struct
*tty
, struct r_port
*info
,
1233 struct rocket_config __user
*new_info
)
1235 struct rocket_config new_serial
;
1237 if (copy_from_user(&new_serial
, new_info
, sizeof (new_serial
)))
1240 mutex_lock(&info
->port
.mutex
);
1241 if (!capable(CAP_SYS_ADMIN
))
1243 if ((new_serial
.flags
& ~ROCKET_USR_MASK
) != (info
->flags
& ~ROCKET_USR_MASK
)) {
1244 mutex_unlock(&info
->port
.mutex
);
1247 info
->flags
= ((info
->flags
& ~ROCKET_USR_MASK
) | (new_serial
.flags
& ROCKET_USR_MASK
));
1248 configure_r_port(tty
, info
, NULL
);
1249 mutex_unlock(&info
->port
.mutex
);
1253 info
->flags
= ((info
->flags
& ~ROCKET_FLAGS
) | (new_serial
.flags
& ROCKET_FLAGS
));
1254 info
->port
.close_delay
= new_serial
.close_delay
;
1255 info
->port
.closing_wait
= new_serial
.closing_wait
;
1257 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_HI
)
1258 tty
->alt_speed
= 57600;
1259 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_VHI
)
1260 tty
->alt_speed
= 115200;
1261 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_SHI
)
1262 tty
->alt_speed
= 230400;
1263 if ((info
->flags
& ROCKET_SPD_MASK
) == ROCKET_SPD_WARP
)
1264 tty
->alt_speed
= 460800;
1265 mutex_unlock(&info
->port
.mutex
);
1267 configure_r_port(tty
, info
, NULL
);
1272 * This function fills in a rocket_ports struct with information
1273 * about what boards/ports are in the system. This info is passed
1274 * to user space. See setrocket.c where the info is used to create
1275 * the /dev/ttyRx ports.
1277 static int get_ports(struct r_port
*info
, struct rocket_ports __user
*retports
)
1279 struct rocket_ports tmp
;
1284 memset(&tmp
, 0, sizeof (tmp
));
1285 tmp
.tty_major
= rocket_driver
->major
;
1287 for (board
= 0; board
< 4; board
++) {
1288 tmp
.rocketModel
[board
].model
= rocketModel
[board
].model
;
1289 strcpy(tmp
.rocketModel
[board
].modelString
, rocketModel
[board
].modelString
);
1290 tmp
.rocketModel
[board
].numPorts
= rocketModel
[board
].numPorts
;
1291 tmp
.rocketModel
[board
].loadrm2
= rocketModel
[board
].loadrm2
;
1292 tmp
.rocketModel
[board
].startingPortNumber
= rocketModel
[board
].startingPortNumber
;
1294 if (copy_to_user(retports
, &tmp
, sizeof (*retports
)))
1299 static int reset_rm2(struct r_port
*info
, void __user
*arg
)
1303 if (!capable(CAP_SYS_ADMIN
))
1306 if (copy_from_user(&reset
, arg
, sizeof (int)))
1311 if (rcktpt_type
[info
->board
] != ROCKET_TYPE_MODEMII
&&
1312 rcktpt_type
[info
->board
] != ROCKET_TYPE_MODEMIII
)
1315 if (info
->ctlp
->BusType
== isISA
)
1316 sModemReset(info
->ctlp
, info
->chan
, reset
);
1318 sPCIModemReset(info
->ctlp
, info
->chan
, reset
);
1323 static int get_version(struct r_port
*info
, struct rocket_version __user
*retvers
)
1325 if (copy_to_user(retvers
, &driver_version
, sizeof (*retvers
)))
1330 /* IOCTL call handler into the driver */
1331 static int rp_ioctl(struct tty_struct
*tty
,
1332 unsigned int cmd
, unsigned long arg
)
1334 struct r_port
*info
= tty
->driver_data
;
1335 void __user
*argp
= (void __user
*)arg
;
1338 if (cmd
!= RCKP_GET_PORTS
&& rocket_paranoia_check(info
, "rp_ioctl"))
1342 case RCKP_GET_STRUCT
:
1343 if (copy_to_user(argp
, info
, sizeof (struct r_port
)))
1346 case RCKP_GET_CONFIG
:
1347 ret
= get_config(info
, argp
);
1349 case RCKP_SET_CONFIG
:
1350 ret
= set_config(tty
, info
, argp
);
1352 case RCKP_GET_PORTS
:
1353 ret
= get_ports(info
, argp
);
1355 case RCKP_RESET_RM2
:
1356 ret
= reset_rm2(info
, argp
);
1358 case RCKP_GET_VERSION
:
1359 ret
= get_version(info
, argp
);
1367 static void rp_send_xchar(struct tty_struct
*tty
, char ch
)
1369 struct r_port
*info
= tty
->driver_data
;
1372 if (rocket_paranoia_check(info
, "rp_send_xchar"))
1375 cp
= &info
->channel
;
1377 sWriteTxPrioByte(cp
, ch
);
1379 sWriteTxByte(sGetTxRxDataIO(cp
), ch
);
1382 static void rp_throttle(struct tty_struct
*tty
)
1384 struct r_port
*info
= tty
->driver_data
;
1386 #ifdef ROCKET_DEBUG_THROTTLE
1387 printk(KERN_INFO
"throttle %s: %d....\n", tty
->name
,
1388 tty
->ldisc
.chars_in_buffer(tty
));
1391 if (rocket_paranoia_check(info
, "rp_throttle"))
1395 rp_send_xchar(tty
, STOP_CHAR(tty
));
1397 sClrRTS(&info
->channel
);
1400 static void rp_unthrottle(struct tty_struct
*tty
)
1402 struct r_port
*info
= tty
->driver_data
;
1403 #ifdef ROCKET_DEBUG_THROTTLE
1404 printk(KERN_INFO
"unthrottle %s: %d....\n", tty
->name
,
1405 tty
->ldisc
.chars_in_buffer(tty
));
1408 if (rocket_paranoia_check(info
, "rp_throttle"))
1412 rp_send_xchar(tty
, START_CHAR(tty
));
1414 sSetRTS(&info
->channel
);
1418 * ------------------------------------------------------------
1419 * rp_stop() and rp_start()
1421 * This routines are called before setting or resetting tty->stopped.
1422 * They enable or disable transmitter interrupts, as necessary.
1423 * ------------------------------------------------------------
1425 static void rp_stop(struct tty_struct
*tty
)
1427 struct r_port
*info
= tty
->driver_data
;
1429 #ifdef ROCKET_DEBUG_FLOW
1430 printk(KERN_INFO
"stop %s: %d %d....\n", tty
->name
,
1431 info
->xmit_cnt
, info
->xmit_fifo_room
);
1434 if (rocket_paranoia_check(info
, "rp_stop"))
1437 if (sGetTxCnt(&info
->channel
))
1438 sDisTransmit(&info
->channel
);
1441 static void rp_start(struct tty_struct
*tty
)
1443 struct r_port
*info
= tty
->driver_data
;
1445 #ifdef ROCKET_DEBUG_FLOW
1446 printk(KERN_INFO
"start %s: %d %d....\n", tty
->name
,
1447 info
->xmit_cnt
, info
->xmit_fifo_room
);
1450 if (rocket_paranoia_check(info
, "rp_stop"))
1453 sEnTransmit(&info
->channel
);
1454 set_bit((info
->aiop
* 8) + info
->chan
,
1455 (void *) &xmit_flags
[info
->board
]);
1459 * rp_wait_until_sent() --- wait until the transmitter is empty
1461 static void rp_wait_until_sent(struct tty_struct
*tty
, int timeout
)
1463 struct r_port
*info
= tty
->driver_data
;
1465 unsigned long orig_jiffies
;
1466 int check_time
, exit_time
;
1469 if (rocket_paranoia_check(info
, "rp_wait_until_sent"))
1472 cp
= &info
->channel
;
1474 orig_jiffies
= jiffies
;
1475 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1476 printk(KERN_INFO
"In RP_wait_until_sent(%d) (jiff=%lu)...\n", timeout
,
1478 printk(KERN_INFO
"cps=%d...\n", info
->cps
);
1481 txcnt
= sGetTxCnt(cp
);
1483 if (sGetChanStatusLo(cp
) & TXSHRMT
)
1485 check_time
= (HZ
/ info
->cps
) / 5;
1487 check_time
= HZ
* txcnt
/ info
->cps
;
1490 exit_time
= orig_jiffies
+ timeout
- jiffies
;
1493 if (exit_time
< check_time
)
1494 check_time
= exit_time
;
1496 if (check_time
== 0)
1498 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1499 printk(KERN_INFO
"txcnt = %d (jiff=%lu,check=%d)...\n", txcnt
,
1500 jiffies
, check_time
);
1502 msleep_interruptible(jiffies_to_msecs(check_time
));
1503 if (signal_pending(current
))
1506 __set_current_state(TASK_RUNNING
);
1507 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1508 printk(KERN_INFO
"txcnt = %d (jiff=%lu)...done\n", txcnt
, jiffies
);
1513 * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1515 static void rp_hangup(struct tty_struct
*tty
)
1518 struct r_port
*info
= tty
->driver_data
;
1519 unsigned long flags
;
1521 if (rocket_paranoia_check(info
, "rp_hangup"))
1524 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1525 printk(KERN_INFO
"rp_hangup of ttyR%d...\n", info
->line
);
1527 rp_flush_buffer(tty
);
1528 spin_lock_irqsave(&info
->port
.lock
, flags
);
1529 if (info
->port
.flags
& ASYNC_CLOSING
) {
1530 spin_unlock_irqrestore(&info
->port
.lock
, flags
);
1533 if (info
->port
.count
)
1534 atomic_dec(&rp_num_ports_open
);
1535 clear_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1536 spin_unlock_irqrestore(&info
->port
.lock
, flags
);
1538 tty_port_hangup(&info
->port
);
1540 cp
= &info
->channel
;
1543 sDisInterrupts(cp
, (TXINT_EN
| MCINT_EN
| RXINT_EN
| SRCINT_EN
| CHANINT_EN
));
1545 sDisTxSoftFlowCtl(cp
);
1547 clear_bit(ASYNCB_INITIALIZED
, &info
->port
.flags
);
1549 wake_up_interruptible(&info
->port
.open_wait
);
1553 * Exception handler - write char routine. The RocketPort driver uses a
1554 * double-buffering strategy, with the twist that if the in-memory CPU
1555 * buffer is empty, and there's space in the transmit FIFO, the
1556 * writing routines will write directly to transmit FIFO.
1557 * Write buffer and counters protected by spinlocks
1559 static int rp_put_char(struct tty_struct
*tty
, unsigned char ch
)
1561 struct r_port
*info
= tty
->driver_data
;
1563 unsigned long flags
;
1565 if (rocket_paranoia_check(info
, "rp_put_char"))
1569 * Grab the port write mutex, locking out other processes that try to
1570 * write to this port
1572 mutex_lock(&info
->write_mtx
);
1574 #ifdef ROCKET_DEBUG_WRITE
1575 printk(KERN_INFO
"rp_put_char %c...\n", ch
);
1578 spin_lock_irqsave(&info
->slock
, flags
);
1579 cp
= &info
->channel
;
1581 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_fifo_room
== 0)
1582 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
1584 if (tty
->stopped
|| tty
->hw_stopped
|| info
->xmit_fifo_room
== 0 || info
->xmit_cnt
!= 0) {
1585 info
->xmit_buf
[info
->xmit_head
++] = ch
;
1586 info
->xmit_head
&= XMIT_BUF_SIZE
- 1;
1588 set_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1590 sOutB(sGetTxRxDataIO(cp
), ch
);
1591 info
->xmit_fifo_room
--;
1593 spin_unlock_irqrestore(&info
->slock
, flags
);
1594 mutex_unlock(&info
->write_mtx
);
1599 * Exception handler - write routine, called when user app writes to the device.
1600 * A per port write mutex is used to protect from another process writing to
1601 * this port at the same time. This other process could be running on the other CPU
1602 * or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out).
1603 * Spinlocks protect the info xmit members.
1605 static int rp_write(struct tty_struct
*tty
,
1606 const unsigned char *buf
, int count
)
1608 struct r_port
*info
= tty
->driver_data
;
1610 const unsigned char *b
;
1612 unsigned long flags
;
1614 if (count
<= 0 || rocket_paranoia_check(info
, "rp_write"))
1617 if (mutex_lock_interruptible(&info
->write_mtx
))
1618 return -ERESTARTSYS
;
1620 #ifdef ROCKET_DEBUG_WRITE
1621 printk(KERN_INFO
"rp_write %d chars...\n", count
);
1623 cp
= &info
->channel
;
1625 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_fifo_room
< count
)
1626 info
->xmit_fifo_room
= TXFIFO_SIZE
- sGetTxCnt(cp
);
1629 * If the write queue for the port is empty, and there is FIFO space, stuff bytes
1630 * into FIFO. Use the write queue for temp storage.
1632 if (!tty
->stopped
&& !tty
->hw_stopped
&& info
->xmit_cnt
== 0 && info
->xmit_fifo_room
> 0) {
1633 c
= min(count
, info
->xmit_fifo_room
);
1636 /* Push data into FIFO, 2 bytes at a time */
1637 sOutStrW(sGetTxRxDataIO(cp
), (unsigned short *) b
, c
/ 2);
1639 /* If there is a byte remaining, write it */
1641 sOutB(sGetTxRxDataIO(cp
), b
[c
- 1]);
1647 spin_lock_irqsave(&info
->slock
, flags
);
1648 info
->xmit_fifo_room
-= c
;
1649 spin_unlock_irqrestore(&info
->slock
, flags
);
1652 /* If count is zero, we wrote it all and are done */
1656 /* Write remaining data into the port's xmit_buf */
1659 if (!test_bit(ASYNCB_NORMAL_ACTIVE
, &info
->port
.flags
))
1661 c
= min(count
, XMIT_BUF_SIZE
- info
->xmit_cnt
- 1);
1662 c
= min(c
, XMIT_BUF_SIZE
- info
->xmit_head
);
1667 memcpy(info
->xmit_buf
+ info
->xmit_head
, b
, c
);
1669 spin_lock_irqsave(&info
->slock
, flags
);
1671 (info
->xmit_head
+ c
) & (XMIT_BUF_SIZE
- 1);
1672 info
->xmit_cnt
+= c
;
1673 spin_unlock_irqrestore(&info
->slock
, flags
);
1680 if ((retval
> 0) && !tty
->stopped
&& !tty
->hw_stopped
)
1681 set_bit((info
->aiop
* 8) + info
->chan
, (void *) &xmit_flags
[info
->board
]);
1684 if (info
->xmit_cnt
< WAKEUP_CHARS
) {
1686 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1687 wake_up_interruptible(&tty
->poll_wait
);
1690 mutex_unlock(&info
->write_mtx
);
1695 * Return the number of characters that can be sent. We estimate
1696 * only using the in-memory transmit buffer only, and ignore the
1697 * potential space in the transmit FIFO.
1699 static int rp_write_room(struct tty_struct
*tty
)
1701 struct r_port
*info
= tty
->driver_data
;
1704 if (rocket_paranoia_check(info
, "rp_write_room"))
1707 ret
= XMIT_BUF_SIZE
- info
->xmit_cnt
- 1;
1710 #ifdef ROCKET_DEBUG_WRITE
1711 printk(KERN_INFO
"rp_write_room returns %d...\n", ret
);
1717 * Return the number of characters in the buffer. Again, this only
1718 * counts those characters in the in-memory transmit buffer.
1720 static int rp_chars_in_buffer(struct tty_struct
*tty
)
1722 struct r_port
*info
= tty
->driver_data
;
1724 if (rocket_paranoia_check(info
, "rp_chars_in_buffer"))
1727 #ifdef ROCKET_DEBUG_WRITE
1728 printk(KERN_INFO
"rp_chars_in_buffer returns %d...\n", info
->xmit_cnt
);
1730 return info
->xmit_cnt
;
1734 * Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1735 * r_port struct for the port. Note that spinlock are used to protect info members,
1736 * do not call this function if the spinlock is already held.
1738 static void rp_flush_buffer(struct tty_struct
*tty
)
1740 struct r_port
*info
= tty
->driver_data
;
1742 unsigned long flags
;
1744 if (rocket_paranoia_check(info
, "rp_flush_buffer"))
1747 spin_lock_irqsave(&info
->slock
, flags
);
1748 info
->xmit_cnt
= info
->xmit_head
= info
->xmit_tail
= 0;
1749 spin_unlock_irqrestore(&info
->slock
, flags
);
1751 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1752 wake_up_interruptible(&tty
->poll_wait
);
1756 cp
= &info
->channel
;
1762 static struct pci_device_id __used rocket_pci_ids
[] = {
1763 { PCI_DEVICE(PCI_VENDOR_ID_RP
, PCI_ANY_ID
) },
1766 MODULE_DEVICE_TABLE(pci
, rocket_pci_ids
);
1769 * Called when a PCI card is found. Retrieves and stores model information,
1770 * init's aiopic and serial port hardware.
1771 * Inputs: i is the board number (0-n)
1773 static __init
int register_PCI(int i
, struct pci_dev
*dev
)
1775 int num_aiops
, aiop
, max_num_aiops
, num_chan
, chan
;
1776 unsigned int aiopio
[MAX_AIOPS_PER_BOARD
];
1780 int altChanRingIndicator
= 0;
1781 int ports_per_aiop
= 8;
1782 WordIO_t ConfigIO
= 0;
1783 ByteIO_t UPCIRingInd
= 0;
1785 if (!dev
|| pci_enable_device(dev
))
1788 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 0);
1790 rcktpt_type
[i
] = ROCKET_TYPE_NORMAL
;
1791 rocketModel
[i
].loadrm2
= 0;
1792 rocketModel
[i
].startingPortNumber
= nextLineNumber
;
1794 /* Depending on the model, set up some config variables */
1795 switch (dev
->device
) {
1796 case PCI_DEVICE_ID_RP4QUAD
:
1799 rocketModel
[i
].model
= MODEL_RP4QUAD
;
1800 strcpy(rocketModel
[i
].modelString
, "RocketPort 4 port w/quad cable");
1801 rocketModel
[i
].numPorts
= 4;
1803 case PCI_DEVICE_ID_RP8OCTA
:
1805 rocketModel
[i
].model
= MODEL_RP8OCTA
;
1806 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/octa cable");
1807 rocketModel
[i
].numPorts
= 8;
1809 case PCI_DEVICE_ID_URP8OCTA
:
1811 rocketModel
[i
].model
= MODEL_UPCI_RP8OCTA
;
1812 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 8 port w/octa cable");
1813 rocketModel
[i
].numPorts
= 8;
1815 case PCI_DEVICE_ID_RP8INTF
:
1817 rocketModel
[i
].model
= MODEL_RP8INTF
;
1818 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/external I/F");
1819 rocketModel
[i
].numPorts
= 8;
1821 case PCI_DEVICE_ID_URP8INTF
:
1823 rocketModel
[i
].model
= MODEL_UPCI_RP8INTF
;
1824 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 8 port w/external I/F");
1825 rocketModel
[i
].numPorts
= 8;
1827 case PCI_DEVICE_ID_RP8J
:
1829 rocketModel
[i
].model
= MODEL_RP8J
;
1830 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/RJ11 connectors");
1831 rocketModel
[i
].numPorts
= 8;
1833 case PCI_DEVICE_ID_RP4J
:
1836 rocketModel
[i
].model
= MODEL_RP4J
;
1837 strcpy(rocketModel
[i
].modelString
, "RocketPort 4 port w/RJ45 connectors");
1838 rocketModel
[i
].numPorts
= 4;
1840 case PCI_DEVICE_ID_RP8SNI
:
1842 rocketModel
[i
].model
= MODEL_RP8SNI
;
1843 strcpy(rocketModel
[i
].modelString
, "RocketPort 8 port w/ custom DB78");
1844 rocketModel
[i
].numPorts
= 8;
1846 case PCI_DEVICE_ID_RP16SNI
:
1848 rocketModel
[i
].model
= MODEL_RP16SNI
;
1849 strcpy(rocketModel
[i
].modelString
, "RocketPort 16 port w/ custom DB78");
1850 rocketModel
[i
].numPorts
= 16;
1852 case PCI_DEVICE_ID_RP16INTF
:
1854 rocketModel
[i
].model
= MODEL_RP16INTF
;
1855 strcpy(rocketModel
[i
].modelString
, "RocketPort 16 port w/external I/F");
1856 rocketModel
[i
].numPorts
= 16;
1858 case PCI_DEVICE_ID_URP16INTF
:
1860 rocketModel
[i
].model
= MODEL_UPCI_RP16INTF
;
1861 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 16 port w/external I/F");
1862 rocketModel
[i
].numPorts
= 16;
1864 case PCI_DEVICE_ID_CRP16INTF
:
1866 rocketModel
[i
].model
= MODEL_CPCI_RP16INTF
;
1867 strcpy(rocketModel
[i
].modelString
, "RocketPort Compact PCI 16 port w/external I/F");
1868 rocketModel
[i
].numPorts
= 16;
1870 case PCI_DEVICE_ID_RP32INTF
:
1872 rocketModel
[i
].model
= MODEL_RP32INTF
;
1873 strcpy(rocketModel
[i
].modelString
, "RocketPort 32 port w/external I/F");
1874 rocketModel
[i
].numPorts
= 32;
1876 case PCI_DEVICE_ID_URP32INTF
:
1878 rocketModel
[i
].model
= MODEL_UPCI_RP32INTF
;
1879 strcpy(rocketModel
[i
].modelString
, "RocketPort UPCI 32 port w/external I/F");
1880 rocketModel
[i
].numPorts
= 32;
1882 case PCI_DEVICE_ID_RPP4
:
1885 altChanRingIndicator
++;
1887 rocketModel
[i
].model
= MODEL_RPP4
;
1888 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 4 port");
1889 rocketModel
[i
].numPorts
= 4;
1891 case PCI_DEVICE_ID_RPP8
:
1894 altChanRingIndicator
++;
1896 rocketModel
[i
].model
= MODEL_RPP8
;
1897 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 8 port");
1898 rocketModel
[i
].numPorts
= 8;
1900 case PCI_DEVICE_ID_RP2_232
:
1903 altChanRingIndicator
++;
1905 rocketModel
[i
].model
= MODEL_RP2_232
;
1906 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 2 port RS232");
1907 rocketModel
[i
].numPorts
= 2;
1909 case PCI_DEVICE_ID_RP2_422
:
1912 altChanRingIndicator
++;
1914 rocketModel
[i
].model
= MODEL_RP2_422
;
1915 strcpy(rocketModel
[i
].modelString
, "RocketPort Plus 2 port RS422");
1916 rocketModel
[i
].numPorts
= 2;
1918 case PCI_DEVICE_ID_RP6M
:
1923 /* If revision is 1, the rocketmodem flash must be loaded.
1924 * If it is 2 it is a "socketed" version. */
1925 if (dev
->revision
== 1) {
1926 rcktpt_type
[i
] = ROCKET_TYPE_MODEMII
;
1927 rocketModel
[i
].loadrm2
= 1;
1929 rcktpt_type
[i
] = ROCKET_TYPE_MODEM
;
1932 rocketModel
[i
].model
= MODEL_RP6M
;
1933 strcpy(rocketModel
[i
].modelString
, "RocketModem 6 port");
1934 rocketModel
[i
].numPorts
= 6;
1936 case PCI_DEVICE_ID_RP4M
:
1939 if (dev
->revision
== 1) {
1940 rcktpt_type
[i
] = ROCKET_TYPE_MODEMII
;
1941 rocketModel
[i
].loadrm2
= 1;
1943 rcktpt_type
[i
] = ROCKET_TYPE_MODEM
;
1946 rocketModel
[i
].model
= MODEL_RP4M
;
1947 strcpy(rocketModel
[i
].modelString
, "RocketModem 4 port");
1948 rocketModel
[i
].numPorts
= 4;
1956 * Check for UPCI boards.
1959 switch (dev
->device
) {
1960 case PCI_DEVICE_ID_URP32INTF
:
1961 case PCI_DEVICE_ID_URP8INTF
:
1962 case PCI_DEVICE_ID_URP16INTF
:
1963 case PCI_DEVICE_ID_CRP16INTF
:
1964 case PCI_DEVICE_ID_URP8OCTA
:
1965 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
1966 ConfigIO
= pci_resource_start(dev
, 1);
1967 if (dev
->device
== PCI_DEVICE_ID_URP8OCTA
) {
1968 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
1971 * Check for octa or quad cable.
1974 (sInW(ConfigIO
+ _PCI_9030_GPIO_CTRL
) &
1975 PCI_GPIO_CTRL_8PORT
)) {
1977 rocketModel
[i
].numPorts
= 4;
1981 case PCI_DEVICE_ID_UPCI_RM3_8PORT
:
1983 rocketModel
[i
].model
= MODEL_UPCI_RM3_8PORT
;
1984 strcpy(rocketModel
[i
].modelString
, "RocketModem III 8 port");
1985 rocketModel
[i
].numPorts
= 8;
1986 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
1987 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
1988 ConfigIO
= pci_resource_start(dev
, 1);
1989 rcktpt_type
[i
] = ROCKET_TYPE_MODEMIII
;
1991 case PCI_DEVICE_ID_UPCI_RM3_4PORT
:
1993 rocketModel
[i
].model
= MODEL_UPCI_RM3_4PORT
;
1994 strcpy(rocketModel
[i
].modelString
, "RocketModem III 4 port");
1995 rocketModel
[i
].numPorts
= 4;
1996 rcktpt_io_addr
[i
] = pci_resource_start(dev
, 2);
1997 UPCIRingInd
= rcktpt_io_addr
[i
] + _PCI_9030_RING_IND
;
1998 ConfigIO
= pci_resource_start(dev
, 1);
1999 rcktpt_type
[i
] = ROCKET_TYPE_MODEMIII
;
2006 sClockPrescale
= 0x12; /* mod 2 (divide by 3) */
2007 rp_baud_base
[i
] = 921600;
2010 * If support_low_speed is set, use the slow clock
2011 * prescale, which supports 50 bps
2013 if (support_low_speed
) {
2014 /* mod 9 (divide by 10) prescale */
2015 sClockPrescale
= 0x19;
2016 rp_baud_base
[i
] = 230400;
2018 /* mod 4 (divide by 5) prescale */
2019 sClockPrescale
= 0x14;
2020 rp_baud_base
[i
] = 460800;
2024 for (aiop
= 0; aiop
< max_num_aiops
; aiop
++)
2025 aiopio
[aiop
] = rcktpt_io_addr
[i
] + (aiop
* 0x40);
2026 ctlp
= sCtlNumToCtlPtr(i
);
2027 num_aiops
= sPCIInitController(ctlp
, i
, aiopio
, max_num_aiops
, ConfigIO
, 0, FREQ_DIS
, 0, altChanRingIndicator
, UPCIRingInd
);
2028 for (aiop
= 0; aiop
< max_num_aiops
; aiop
++)
2029 ctlp
->AiopNumChan
[aiop
] = ports_per_aiop
;
2031 dev_info(&dev
->dev
, "comtrol PCI controller #%d found at "
2032 "address %04lx, %d AIOP(s) (%s), creating ttyR%d - %ld\n",
2033 i
, rcktpt_io_addr
[i
], num_aiops
, rocketModel
[i
].modelString
,
2034 rocketModel
[i
].startingPortNumber
,
2035 rocketModel
[i
].startingPortNumber
+ rocketModel
[i
].numPorts
-1);
2037 if (num_aiops
<= 0) {
2038 rcktpt_io_addr
[i
] = 0;
2043 /* Reset the AIOPIC, init the serial ports */
2044 for (aiop
= 0; aiop
< num_aiops
; aiop
++) {
2045 sResetAiopByNum(ctlp
, aiop
);
2046 num_chan
= ports_per_aiop
;
2047 for (chan
= 0; chan
< num_chan
; chan
++)
2048 init_r_port(i
, aiop
, chan
, dev
);
2051 /* Rocket modems must be reset */
2052 if ((rcktpt_type
[i
] == ROCKET_TYPE_MODEM
) ||
2053 (rcktpt_type
[i
] == ROCKET_TYPE_MODEMII
) ||
2054 (rcktpt_type
[i
] == ROCKET_TYPE_MODEMIII
)) {
2055 num_chan
= ports_per_aiop
;
2056 for (chan
= 0; chan
< num_chan
; chan
++)
2057 sPCIModemReset(ctlp
, chan
, 1);
2059 for (chan
= 0; chan
< num_chan
; chan
++)
2060 sPCIModemReset(ctlp
, chan
, 0);
2062 rmSpeakerReset(ctlp
, rocketModel
[i
].model
);
2068 * Probes for PCI cards, inits them if found
2069 * Input: board_found = number of ISA boards already found, or the
2070 * starting board number
2071 * Returns: Number of PCI boards found
2073 static int __init
init_PCI(int boards_found
)
2075 struct pci_dev
*dev
= NULL
;
2078 /* Work through the PCI device list, pulling out ours */
2079 while ((dev
= pci_get_device(PCI_VENDOR_ID_RP
, PCI_ANY_ID
, dev
))) {
2080 if (register_PCI(count
+ boards_found
, dev
))
2086 #endif /* CONFIG_PCI */
2089 * Probes for ISA cards
2090 * Input: i = the board number to look for
2091 * Returns: 1 if board found, 0 else
2093 static int __init
init_ISA(int i
)
2095 int num_aiops
, num_chan
= 0, total_num_chan
= 0;
2097 unsigned int aiopio
[MAX_AIOPS_PER_BOARD
];
2101 /* If io_addr is zero, no board configured */
2102 if (rcktpt_io_addr
[i
] == 0)
2105 /* Reserve the IO region */
2106 if (!request_region(rcktpt_io_addr
[i
], 64, "Comtrol RocketPort")) {
2107 printk(KERN_ERR
"Unable to reserve IO region for configured "
2108 "ISA RocketPort at address 0x%lx, board not "
2109 "installed...\n", rcktpt_io_addr
[i
]);
2110 rcktpt_io_addr
[i
] = 0;
2114 ctlp
= sCtlNumToCtlPtr(i
);
2116 ctlp
->boardType
= rcktpt_type
[i
];
2118 switch (rcktpt_type
[i
]) {
2119 case ROCKET_TYPE_PC104
:
2120 type_string
= "(PC104)";
2122 case ROCKET_TYPE_MODEM
:
2123 type_string
= "(RocketModem)";
2125 case ROCKET_TYPE_MODEMII
:
2126 type_string
= "(RocketModem II)";
2134 * If support_low_speed is set, use the slow clock prescale,
2135 * which supports 50 bps
2137 if (support_low_speed
) {
2138 sClockPrescale
= 0x19; /* mod 9 (divide by 10) prescale */
2139 rp_baud_base
[i
] = 230400;
2141 sClockPrescale
= 0x14; /* mod 4 (divide by 5) prescale */
2142 rp_baud_base
[i
] = 460800;
2145 for (aiop
= 0; aiop
< MAX_AIOPS_PER_BOARD
; aiop
++)
2146 aiopio
[aiop
] = rcktpt_io_addr
[i
] + (aiop
* 0x400);
2148 num_aiops
= sInitController(ctlp
, i
, controller
+ (i
* 0x400), aiopio
, MAX_AIOPS_PER_BOARD
, 0, FREQ_DIS
, 0);
2150 if (ctlp
->boardType
== ROCKET_TYPE_PC104
) {
2151 sEnAiop(ctlp
, 2); /* only one AIOPIC, but these */
2152 sEnAiop(ctlp
, 3); /* CSels used for other stuff */
2155 /* If something went wrong initing the AIOP's release the ISA IO memory */
2156 if (num_aiops
<= 0) {
2157 release_region(rcktpt_io_addr
[i
], 64);
2158 rcktpt_io_addr
[i
] = 0;
2162 rocketModel
[i
].startingPortNumber
= nextLineNumber
;
2164 for (aiop
= 0; aiop
< num_aiops
; aiop
++) {
2165 sResetAiopByNum(ctlp
, aiop
);
2166 sEnAiop(ctlp
, aiop
);
2167 num_chan
= sGetAiopNumChan(ctlp
, aiop
);
2168 total_num_chan
+= num_chan
;
2169 for (chan
= 0; chan
< num_chan
; chan
++)
2170 init_r_port(i
, aiop
, chan
, NULL
);
2173 if ((rcktpt_type
[i
] == ROCKET_TYPE_MODEM
) || (rcktpt_type
[i
] == ROCKET_TYPE_MODEMII
)) {
2174 num_chan
= sGetAiopNumChan(ctlp
, 0);
2175 total_num_chan
= num_chan
;
2176 for (chan
= 0; chan
< num_chan
; chan
++)
2177 sModemReset(ctlp
, chan
, 1);
2179 for (chan
= 0; chan
< num_chan
; chan
++)
2180 sModemReset(ctlp
, chan
, 0);
2182 strcpy(rocketModel
[i
].modelString
, "RocketModem ISA");
2184 strcpy(rocketModel
[i
].modelString
, "RocketPort ISA");
2186 rocketModel
[i
].numPorts
= total_num_chan
;
2187 rocketModel
[i
].model
= MODEL_ISA
;
2189 printk(KERN_INFO
"RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n",
2190 i
, rcktpt_io_addr
[i
], num_aiops
, type_string
);
2192 printk(KERN_INFO
"Installing %s, creating /dev/ttyR%d - %ld\n",
2193 rocketModel
[i
].modelString
,
2194 rocketModel
[i
].startingPortNumber
,
2195 rocketModel
[i
].startingPortNumber
+
2196 rocketModel
[i
].numPorts
- 1);
2201 static const struct tty_operations rocket_ops
= {
2205 .put_char
= rp_put_char
,
2206 .write_room
= rp_write_room
,
2207 .chars_in_buffer
= rp_chars_in_buffer
,
2208 .flush_buffer
= rp_flush_buffer
,
2210 .throttle
= rp_throttle
,
2211 .unthrottle
= rp_unthrottle
,
2212 .set_termios
= rp_set_termios
,
2215 .hangup
= rp_hangup
,
2216 .break_ctl
= rp_break
,
2217 .send_xchar
= rp_send_xchar
,
2218 .wait_until_sent
= rp_wait_until_sent
,
2219 .tiocmget
= rp_tiocmget
,
2220 .tiocmset
= rp_tiocmset
,
2223 static const struct tty_port_operations rocket_port_ops
= {
2224 .carrier_raised
= carrier_raised
,
2229 * The module "startup" routine; it's run when the module is loaded.
2231 static int __init
rp_init(void)
2233 int ret
= -ENOMEM
, pci_boards_found
, isa_boards_found
, i
;
2235 printk(KERN_INFO
"RocketPort device driver module, version %s, %s\n",
2236 ROCKET_VERSION
, ROCKET_DATE
);
2238 rocket_driver
= alloc_tty_driver(MAX_RP_PORTS
);
2243 * If board 1 is non-zero, there is at least one ISA configured. If controller is
2244 * zero, use the default controller IO address of board1 + 0x40.
2247 if (controller
== 0)
2248 controller
= board1
+ 0x40;
2250 controller
= 0; /* Used as a flag, meaning no ISA boards */
2253 /* If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2254 if (controller
&& (!request_region(controller
, 4, "Comtrol RocketPort"))) {
2255 printk(KERN_ERR
"Unable to reserve IO region for first "
2256 "configured ISA RocketPort controller 0x%lx. "
2257 "Driver exiting\n", controller
);
2262 /* Store ISA variable retrieved from command line or .conf file. */
2263 rcktpt_io_addr
[0] = board1
;
2264 rcktpt_io_addr
[1] = board2
;
2265 rcktpt_io_addr
[2] = board3
;
2266 rcktpt_io_addr
[3] = board4
;
2268 rcktpt_type
[0] = modem1
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2269 rcktpt_type
[0] = pc104_1
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[0];
2270 rcktpt_type
[1] = modem2
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2271 rcktpt_type
[1] = pc104_2
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[1];
2272 rcktpt_type
[2] = modem3
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2273 rcktpt_type
[2] = pc104_3
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[2];
2274 rcktpt_type
[3] = modem4
? ROCKET_TYPE_MODEM
: ROCKET_TYPE_NORMAL
;
2275 rcktpt_type
[3] = pc104_4
[0] ? ROCKET_TYPE_PC104
: rcktpt_type
[3];
2278 * Set up the tty driver structure and then register this
2279 * driver with the tty layer.
2282 rocket_driver
->flags
= TTY_DRIVER_DYNAMIC_DEV
;
2283 rocket_driver
->name
= "ttyR";
2284 rocket_driver
->driver_name
= "Comtrol RocketPort";
2285 rocket_driver
->major
= TTY_ROCKET_MAJOR
;
2286 rocket_driver
->minor_start
= 0;
2287 rocket_driver
->type
= TTY_DRIVER_TYPE_SERIAL
;
2288 rocket_driver
->subtype
= SERIAL_TYPE_NORMAL
;
2289 rocket_driver
->init_termios
= tty_std_termios
;
2290 rocket_driver
->init_termios
.c_cflag
=
2291 B9600
| CS8
| CREAD
| HUPCL
| CLOCAL
;
2292 rocket_driver
->init_termios
.c_ispeed
= 9600;
2293 rocket_driver
->init_termios
.c_ospeed
= 9600;
2294 #ifdef ROCKET_SOFT_FLOW
2295 rocket_driver
->flags
|= TTY_DRIVER_REAL_RAW
;
2297 tty_set_operations(rocket_driver
, &rocket_ops
);
2299 ret
= tty_register_driver(rocket_driver
);
2301 printk(KERN_ERR
"Couldn't install tty RocketPort driver\n");
2302 goto err_controller
;
2305 #ifdef ROCKET_DEBUG_OPEN
2306 printk(KERN_INFO
"RocketPort driver is major %d\n", rocket_driver
.major
);
2310 * OK, let's probe each of the controllers looking for boards. Any boards found
2311 * will be initialized here.
2313 isa_boards_found
= 0;
2314 pci_boards_found
= 0;
2316 for (i
= 0; i
< NUM_BOARDS
; i
++) {
2322 if (isa_boards_found
< NUM_BOARDS
)
2323 pci_boards_found
= init_PCI(isa_boards_found
);
2326 max_board
= pci_boards_found
+ isa_boards_found
;
2328 if (max_board
== 0) {
2329 printk(KERN_ERR
"No rocketport ports found; unloading driver\n");
2336 tty_unregister_driver(rocket_driver
);
2339 release_region(controller
, 4);
2341 put_tty_driver(rocket_driver
);
2347 static void rp_cleanup_module(void)
2352 del_timer_sync(&rocket_timer
);
2354 retval
= tty_unregister_driver(rocket_driver
);
2356 printk(KERN_ERR
"Error %d while trying to unregister "
2357 "rocketport driver\n", -retval
);
2359 for (i
= 0; i
< MAX_RP_PORTS
; i
++)
2361 tty_unregister_device(rocket_driver
, i
);
2362 tty_port_destroy(&rp_table
[i
]->port
);
2366 put_tty_driver(rocket_driver
);
2368 for (i
= 0; i
< NUM_BOARDS
; i
++) {
2369 if (rcktpt_io_addr
[i
] <= 0 || is_PCI
[i
])
2371 release_region(rcktpt_io_addr
[i
], 64);
2374 release_region(controller
, 4);
2377 /***************************************************************************
2378 Function: sInitController
2379 Purpose: Initialization of controller global registers and controller
2381 Call: sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2382 IRQNum,Frequency,PeriodicOnly)
2383 CONTROLLER_T *CtlP; Ptr to controller structure
2384 int CtlNum; Controller number
2385 ByteIO_t MudbacIO; Mudbac base I/O address.
2386 ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2387 This list must be in the order the AIOPs will be found on the
2388 controller. Once an AIOP in the list is not found, it is
2389 assumed that there are no more AIOPs on the controller.
2390 int AiopIOListSize; Number of addresses in AiopIOList
2391 int IRQNum; Interrupt Request number. Can be any of the following:
2392 0: Disable global interrupts
2401 Byte_t Frequency: A flag identifying the frequency
2402 of the periodic interrupt, can be any one of the following:
2403 FREQ_DIS - periodic interrupt disabled
2404 FREQ_137HZ - 137 Hertz
2405 FREQ_69HZ - 69 Hertz
2406 FREQ_34HZ - 34 Hertz
2407 FREQ_17HZ - 17 Hertz
2410 If IRQNum is set to 0 the Frequency parameter is
2411 overidden, it is forced to a value of FREQ_DIS.
2412 int PeriodicOnly: 1 if all interrupts except the periodic
2413 interrupt are to be blocked.
2414 0 is both the periodic interrupt and
2415 other channel interrupts are allowed.
2416 If IRQNum is set to 0 the PeriodicOnly parameter is
2417 overidden, it is forced to a value of 0.
2418 Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
2419 initialization failed.
2422 If periodic interrupts are to be disabled but AIOP interrupts
2423 are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2425 If interrupts are to be completely disabled set IRQNum to 0.
2427 Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2428 invalid combination.
2430 This function performs initialization of global interrupt modes,
2431 but it does not actually enable global interrupts. To enable
2432 and disable global interrupts use functions sEnGlobalInt() and
2433 sDisGlobalInt(). Enabling of global interrupts is normally not
2434 done until all other initializations are complete.
2436 Even if interrupts are globally enabled, they must also be
2437 individually enabled for each channel that is to generate
2440 Warnings: No range checking on any of the parameters is done.
2442 No context switches are allowed while executing this function.
2444 After this function all AIOPs on the controller are disabled,
2445 they can be enabled with sEnAiop().
2447 static int sInitController(CONTROLLER_T
* CtlP
, int CtlNum
, ByteIO_t MudbacIO
,
2448 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
2449 int IRQNum
, Byte_t Frequency
, int PeriodicOnly
)
2455 CtlP
->AiopIntrBits
= aiop_intr_bits
;
2456 CtlP
->AltChanRingIndicator
= 0;
2457 CtlP
->CtlNum
= CtlNum
;
2458 CtlP
->CtlID
= CTLID_0001
; /* controller release 1 */
2459 CtlP
->BusType
= isISA
;
2460 CtlP
->MBaseIO
= MudbacIO
;
2461 CtlP
->MReg1IO
= MudbacIO
+ 1;
2462 CtlP
->MReg2IO
= MudbacIO
+ 2;
2463 CtlP
->MReg3IO
= MudbacIO
+ 3;
2465 CtlP
->MReg2
= 0; /* interrupt disable */
2466 CtlP
->MReg3
= 0; /* no periodic interrupts */
2468 if (sIRQMap
[IRQNum
] == 0) { /* interrupts globally disabled */
2469 CtlP
->MReg2
= 0; /* interrupt disable */
2470 CtlP
->MReg3
= 0; /* no periodic interrupts */
2472 CtlP
->MReg2
= sIRQMap
[IRQNum
]; /* set IRQ number */
2473 CtlP
->MReg3
= Frequency
; /* set frequency */
2474 if (PeriodicOnly
) { /* periodic interrupt only */
2475 CtlP
->MReg3
|= PERIODIC_ONLY
;
2479 sOutB(CtlP
->MReg2IO
, CtlP
->MReg2
);
2480 sOutB(CtlP
->MReg3IO
, CtlP
->MReg3
);
2481 sControllerEOI(CtlP
); /* clear EOI if warm init */
2484 for (i
= done
= 0; i
< AiopIOListSize
; i
++) {
2486 CtlP
->AiopIO
[i
] = (WordIO_t
) io
;
2487 CtlP
->AiopIntChanIO
[i
] = io
+ _INT_CHAN
;
2488 sOutB(CtlP
->MReg2IO
, CtlP
->MReg2
| (i
& 0x03)); /* AIOP index */
2489 sOutB(MudbacIO
, (Byte_t
) (io
>> 6)); /* set up AIOP I/O in MUDBAC */
2492 sEnAiop(CtlP
, i
); /* enable the AIOP */
2493 CtlP
->AiopID
[i
] = sReadAiopID(io
); /* read AIOP ID */
2494 if (CtlP
->AiopID
[i
] == AIOPID_NULL
) /* if AIOP does not exist */
2495 done
= 1; /* done looking for AIOPs */
2497 CtlP
->AiopNumChan
[i
] = sReadAiopNumChan((WordIO_t
) io
); /* num channels in AIOP */
2498 sOutW((WordIO_t
) io
+ _INDX_ADDR
, _CLK_PRE
); /* clock prescaler */
2499 sOutB(io
+ _INDX_DATA
, sClockPrescale
);
2500 CtlP
->NumAiop
++; /* bump count of AIOPs */
2502 sDisAiop(CtlP
, i
); /* disable AIOP */
2505 if (CtlP
->NumAiop
== 0)
2508 return (CtlP
->NumAiop
);
2511 /***************************************************************************
2512 Function: sPCIInitController
2513 Purpose: Initialization of controller global registers and controller
2515 Call: sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
2516 IRQNum,Frequency,PeriodicOnly)
2517 CONTROLLER_T *CtlP; Ptr to controller structure
2518 int CtlNum; Controller number
2519 ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2520 This list must be in the order the AIOPs will be found on the
2521 controller. Once an AIOP in the list is not found, it is
2522 assumed that there are no more AIOPs on the controller.
2523 int AiopIOListSize; Number of addresses in AiopIOList
2524 int IRQNum; Interrupt Request number. Can be any of the following:
2525 0: Disable global interrupts
2534 Byte_t Frequency: A flag identifying the frequency
2535 of the periodic interrupt, can be any one of the following:
2536 FREQ_DIS - periodic interrupt disabled
2537 FREQ_137HZ - 137 Hertz
2538 FREQ_69HZ - 69 Hertz
2539 FREQ_34HZ - 34 Hertz
2540 FREQ_17HZ - 17 Hertz
2543 If IRQNum is set to 0 the Frequency parameter is
2544 overidden, it is forced to a value of FREQ_DIS.
2545 int PeriodicOnly: 1 if all interrupts except the periodic
2546 interrupt are to be blocked.
2547 0 is both the periodic interrupt and
2548 other channel interrupts are allowed.
2549 If IRQNum is set to 0 the PeriodicOnly parameter is
2550 overidden, it is forced to a value of 0.
2551 Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller
2552 initialization failed.
2555 If periodic interrupts are to be disabled but AIOP interrupts
2556 are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2558 If interrupts are to be completely disabled set IRQNum to 0.
2560 Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2561 invalid combination.
2563 This function performs initialization of global interrupt modes,
2564 but it does not actually enable global interrupts. To enable
2565 and disable global interrupts use functions sEnGlobalInt() and
2566 sDisGlobalInt(). Enabling of global interrupts is normally not
2567 done until all other initializations are complete.
2569 Even if interrupts are globally enabled, they must also be
2570 individually enabled for each channel that is to generate
2573 Warnings: No range checking on any of the parameters is done.
2575 No context switches are allowed while executing this function.
2577 After this function all AIOPs on the controller are disabled,
2578 they can be enabled with sEnAiop().
2580 static int sPCIInitController(CONTROLLER_T
* CtlP
, int CtlNum
,
2581 ByteIO_t
* AiopIOList
, int AiopIOListSize
,
2582 WordIO_t ConfigIO
, int IRQNum
, Byte_t Frequency
,
2583 int PeriodicOnly
, int altChanRingIndicator
,
2589 CtlP
->AltChanRingIndicator
= altChanRingIndicator
;
2590 CtlP
->UPCIRingInd
= UPCIRingInd
;
2591 CtlP
->CtlNum
= CtlNum
;
2592 CtlP
->CtlID
= CTLID_0001
; /* controller release 1 */
2593 CtlP
->BusType
= isPCI
; /* controller release 1 */
2597 CtlP
->PCIIO
= ConfigIO
+ _PCI_9030_INT_CTRL
;
2598 CtlP
->PCIIO2
= ConfigIO
+ _PCI_9030_GPIO_CTRL
;
2599 CtlP
->AiopIntrBits
= upci_aiop_intr_bits
;
2603 (WordIO_t
) ((ByteIO_t
) AiopIOList
[0] + _PCI_INT_FUNC
);
2604 CtlP
->AiopIntrBits
= aiop_intr_bits
;
2607 sPCIControllerEOI(CtlP
); /* clear EOI if warm init */
2610 for (i
= 0; i
< AiopIOListSize
; i
++) {
2612 CtlP
->AiopIO
[i
] = (WordIO_t
) io
;
2613 CtlP
->AiopIntChanIO
[i
] = io
+ _INT_CHAN
;
2615 CtlP
->AiopID
[i
] = sReadAiopID(io
); /* read AIOP ID */
2616 if (CtlP
->AiopID
[i
] == AIOPID_NULL
) /* if AIOP does not exist */
2617 break; /* done looking for AIOPs */
2619 CtlP
->AiopNumChan
[i
] = sReadAiopNumChan((WordIO_t
) io
); /* num channels in AIOP */
2620 sOutW((WordIO_t
) io
+ _INDX_ADDR
, _CLK_PRE
); /* clock prescaler */
2621 sOutB(io
+ _INDX_DATA
, sClockPrescale
);
2622 CtlP
->NumAiop
++; /* bump count of AIOPs */
2625 if (CtlP
->NumAiop
== 0)
2628 return (CtlP
->NumAiop
);
2631 /***************************************************************************
2632 Function: sReadAiopID
2633 Purpose: Read the AIOP idenfication number directly from an AIOP.
2634 Call: sReadAiopID(io)
2635 ByteIO_t io: AIOP base I/O address
2636 Return: int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2637 is replace by an identifying number.
2638 Flag AIOPID_NULL if no valid AIOP is found
2639 Warnings: No context switches are allowed while executing this function.
2642 static int sReadAiopID(ByteIO_t io
)
2644 Byte_t AiopID
; /* ID byte from AIOP */
2646 sOutB(io
+ _CMD_REG
, RESET_ALL
); /* reset AIOP */
2647 sOutB(io
+ _CMD_REG
, 0x0);
2648 AiopID
= sInW(io
+ _CHN_STAT0
) & 0x07;
2651 else /* AIOP does not exist */
2655 /***************************************************************************
2656 Function: sReadAiopNumChan
2657 Purpose: Read the number of channels available in an AIOP directly from
2659 Call: sReadAiopNumChan(io)
2660 WordIO_t io: AIOP base I/O address
2661 Return: int: The number of channels available
2662 Comments: The number of channels is determined by write/reads from identical
2663 offsets within the SRAM address spaces for channels 0 and 4.
2664 If the channel 4 space is mirrored to channel 0 it is a 4 channel
2665 AIOP, otherwise it is an 8 channel.
2666 Warnings: No context switches are allowed while executing this function.
2668 static int sReadAiopNumChan(WordIO_t io
)
2671 static Byte_t R
[4] = { 0x00, 0x00, 0x34, 0x12 };
2673 /* write to chan 0 SRAM */
2674 out32((DWordIO_t
) io
+ _INDX_ADDR
, R
);
2675 sOutW(io
+ _INDX_ADDR
, 0); /* read from SRAM, chan 0 */
2676 x
= sInW(io
+ _INDX_DATA
);
2677 sOutW(io
+ _INDX_ADDR
, 0x4000); /* read from SRAM, chan 4 */
2678 if (x
!= sInW(io
+ _INDX_DATA
)) /* if different must be 8 chan */
2684 /***************************************************************************
2686 Purpose: Initialization of a channel and channel structure
2687 Call: sInitChan(CtlP,ChP,AiopNum,ChanNum)
2688 CONTROLLER_T *CtlP; Ptr to controller structure
2689 CHANNEL_T *ChP; Ptr to channel structure
2690 int AiopNum; AIOP number within controller
2691 int ChanNum; Channel number within AIOP
2692 Return: int: 1 if initialization succeeded, 0 if it fails because channel
2693 number exceeds number of channels available in AIOP.
2694 Comments: This function must be called before a channel can be used.
2695 Warnings: No range checking on any of the parameters is done.
2697 No context switches are allowed while executing this function.
2699 static int sInitChan(CONTROLLER_T
* CtlP
, CHANNEL_T
* ChP
, int AiopNum
,
2710 if (ChanNum
>= CtlP
->AiopNumChan
[AiopNum
])
2711 return 0; /* exceeds num chans in AIOP */
2713 /* Channel, AIOP, and controller identifiers */
2715 ChP
->ChanID
= CtlP
->AiopID
[AiopNum
];
2716 ChP
->AiopNum
= AiopNum
;
2717 ChP
->ChanNum
= ChanNum
;
2719 /* Global direct addresses */
2720 AiopIO
= CtlP
->AiopIO
[AiopNum
];
2721 ChP
->Cmd
= (ByteIO_t
) AiopIO
+ _CMD_REG
;
2722 ChP
->IntChan
= (ByteIO_t
) AiopIO
+ _INT_CHAN
;
2723 ChP
->IntMask
= (ByteIO_t
) AiopIO
+ _INT_MASK
;
2724 ChP
->IndexAddr
= (DWordIO_t
) AiopIO
+ _INDX_ADDR
;
2725 ChP
->IndexData
= AiopIO
+ _INDX_DATA
;
2727 /* Channel direct addresses */
2728 ChIOOff
= AiopIO
+ ChP
->ChanNum
* 2;
2729 ChP
->TxRxData
= ChIOOff
+ _TD0
;
2730 ChP
->ChanStat
= ChIOOff
+ _CHN_STAT0
;
2731 ChP
->TxRxCount
= ChIOOff
+ _FIFO_CNT0
;
2732 ChP
->IntID
= (ByteIO_t
) AiopIO
+ ChP
->ChanNum
+ _INT_ID0
;
2734 /* Initialize the channel from the RData array */
2735 for (i
= 0; i
< RDATASIZE
; i
+= 4) {
2737 R
[1] = RData
[i
+ 1] + 0x10 * ChanNum
;
2738 R
[2] = RData
[i
+ 2];
2739 R
[3] = RData
[i
+ 3];
2740 out32(ChP
->IndexAddr
, R
);
2744 for (i
= 0; i
< RREGDATASIZE
; i
+= 4) {
2745 ChR
[i
] = RRegData
[i
];
2746 ChR
[i
+ 1] = RRegData
[i
+ 1] + 0x10 * ChanNum
;
2747 ChR
[i
+ 2] = RRegData
[i
+ 2];
2748 ChR
[i
+ 3] = RRegData
[i
+ 3];
2751 /* Indexed registers */
2752 ChOff
= (Word_t
) ChanNum
*0x1000;
2754 if (sClockPrescale
== 0x14)
2759 ChP
->BaudDiv
[0] = (Byte_t
) (ChOff
+ _BAUD
);
2760 ChP
->BaudDiv
[1] = (Byte_t
) ((ChOff
+ _BAUD
) >> 8);
2761 ChP
->BaudDiv
[2] = (Byte_t
) brd9600
;
2762 ChP
->BaudDiv
[3] = (Byte_t
) (brd9600
>> 8);
2763 out32(ChP
->IndexAddr
, ChP
->BaudDiv
);
2765 ChP
->TxControl
[0] = (Byte_t
) (ChOff
+ _TX_CTRL
);
2766 ChP
->TxControl
[1] = (Byte_t
) ((ChOff
+ _TX_CTRL
) >> 8);
2767 ChP
->TxControl
[2] = 0;
2768 ChP
->TxControl
[3] = 0;
2769 out32(ChP
->IndexAddr
, ChP
->TxControl
);
2771 ChP
->RxControl
[0] = (Byte_t
) (ChOff
+ _RX_CTRL
);
2772 ChP
->RxControl
[1] = (Byte_t
) ((ChOff
+ _RX_CTRL
) >> 8);
2773 ChP
->RxControl
[2] = 0;
2774 ChP
->RxControl
[3] = 0;
2775 out32(ChP
->IndexAddr
, ChP
->RxControl
);
2777 ChP
->TxEnables
[0] = (Byte_t
) (ChOff
+ _TX_ENBLS
);
2778 ChP
->TxEnables
[1] = (Byte_t
) ((ChOff
+ _TX_ENBLS
) >> 8);
2779 ChP
->TxEnables
[2] = 0;
2780 ChP
->TxEnables
[3] = 0;
2781 out32(ChP
->IndexAddr
, ChP
->TxEnables
);
2783 ChP
->TxCompare
[0] = (Byte_t
) (ChOff
+ _TXCMP1
);
2784 ChP
->TxCompare
[1] = (Byte_t
) ((ChOff
+ _TXCMP1
) >> 8);
2785 ChP
->TxCompare
[2] = 0;
2786 ChP
->TxCompare
[3] = 0;
2787 out32(ChP
->IndexAddr
, ChP
->TxCompare
);
2789 ChP
->TxReplace1
[0] = (Byte_t
) (ChOff
+ _TXREP1B1
);
2790 ChP
->TxReplace1
[1] = (Byte_t
) ((ChOff
+ _TXREP1B1
) >> 8);
2791 ChP
->TxReplace1
[2] = 0;
2792 ChP
->TxReplace1
[3] = 0;
2793 out32(ChP
->IndexAddr
, ChP
->TxReplace1
);
2795 ChP
->TxReplace2
[0] = (Byte_t
) (ChOff
+ _TXREP2
);
2796 ChP
->TxReplace2
[1] = (Byte_t
) ((ChOff
+ _TXREP2
) >> 8);
2797 ChP
->TxReplace2
[2] = 0;
2798 ChP
->TxReplace2
[3] = 0;
2799 out32(ChP
->IndexAddr
, ChP
->TxReplace2
);
2801 ChP
->TxFIFOPtrs
= ChOff
+ _TXF_OUTP
;
2802 ChP
->TxFIFO
= ChOff
+ _TX_FIFO
;
2804 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
| RESTXFCNT
); /* apply reset Tx FIFO count */
2805 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
); /* remove reset Tx FIFO count */
2806 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxFIFOPtrs
); /* clear Tx in/out ptrs */
2807 sOutW(ChP
->IndexData
, 0);
2808 ChP
->RxFIFOPtrs
= ChOff
+ _RXF_OUTP
;
2809 ChP
->RxFIFO
= ChOff
+ _RX_FIFO
;
2811 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
| RESRXFCNT
); /* apply reset Rx FIFO count */
2812 sOutB(ChP
->Cmd
, (Byte_t
) ChanNum
); /* remove reset Rx FIFO count */
2813 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
); /* clear Rx out ptr */
2814 sOutW(ChP
->IndexData
, 0);
2815 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
+ 2); /* clear Rx in ptr */
2816 sOutW(ChP
->IndexData
, 0);
2817 ChP
->TxPrioCnt
= ChOff
+ _TXP_CNT
;
2818 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxPrioCnt
);
2819 sOutB(ChP
->IndexData
, 0);
2820 ChP
->TxPrioPtr
= ChOff
+ _TXP_PNTR
;
2821 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxPrioPtr
);
2822 sOutB(ChP
->IndexData
, 0);
2823 ChP
->TxPrioBuf
= ChOff
+ _TXP_BUF
;
2824 sEnRxProcessor(ChP
); /* start the Rx processor */
2829 /***************************************************************************
2830 Function: sStopRxProcessor
2831 Purpose: Stop the receive processor from processing a channel.
2832 Call: sStopRxProcessor(ChP)
2833 CHANNEL_T *ChP; Ptr to channel structure
2835 Comments: The receive processor can be started again with sStartRxProcessor().
2836 This function causes the receive processor to skip over the
2837 stopped channel. It does not stop it from processing other channels.
2839 Warnings: No context switches are allowed while executing this function.
2841 Do not leave the receive processor stopped for more than one
2844 After calling this function a delay of 4 uS is required to ensure
2845 that the receive processor is no longer processing this channel.
2847 static void sStopRxProcessor(CHANNEL_T
* ChP
)
2855 out32(ChP
->IndexAddr
, R
);
2858 /***************************************************************************
2859 Function: sFlushRxFIFO
2860 Purpose: Flush the Rx FIFO
2861 Call: sFlushRxFIFO(ChP)
2862 CHANNEL_T *ChP; Ptr to channel structure
2864 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2865 while it is being flushed the receive processor is stopped
2866 and the transmitter is disabled. After these operations a
2867 4 uS delay is done before clearing the pointers to allow
2868 the receive processor to stop. These items are handled inside
2870 Warnings: No context switches are allowed while executing this function.
2872 static void sFlushRxFIFO(CHANNEL_T
* ChP
)
2875 Byte_t Ch
; /* channel number within AIOP */
2876 int RxFIFOEnabled
; /* 1 if Rx FIFO enabled */
2878 if (sGetRxCnt(ChP
) == 0) /* Rx FIFO empty */
2879 return; /* don't need to flush */
2882 if (ChP
->R
[0x32] == 0x08) { /* Rx FIFO is enabled */
2884 sDisRxFIFO(ChP
); /* disable it */
2885 for (i
= 0; i
< 2000 / 200; i
++) /* delay 2 uS to allow proc to disable FIFO */
2886 sInB(ChP
->IntChan
); /* depends on bus i/o timing */
2888 sGetChanStatus(ChP
); /* clear any pending Rx errors in chan stat */
2889 Ch
= (Byte_t
) sGetChanNum(ChP
);
2890 sOutB(ChP
->Cmd
, Ch
| RESRXFCNT
); /* apply reset Rx FIFO count */
2891 sOutB(ChP
->Cmd
, Ch
); /* remove reset Rx FIFO count */
2892 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
); /* clear Rx out ptr */
2893 sOutW(ChP
->IndexData
, 0);
2894 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->RxFIFOPtrs
+ 2); /* clear Rx in ptr */
2895 sOutW(ChP
->IndexData
, 0);
2897 sEnRxFIFO(ChP
); /* enable Rx FIFO */
2900 /***************************************************************************
2901 Function: sFlushTxFIFO
2902 Purpose: Flush the Tx FIFO
2903 Call: sFlushTxFIFO(ChP)
2904 CHANNEL_T *ChP; Ptr to channel structure
2906 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2907 while it is being flushed the receive processor is stopped
2908 and the transmitter is disabled. After these operations a
2909 4 uS delay is done before clearing the pointers to allow
2910 the receive processor to stop. These items are handled inside
2912 Warnings: No context switches are allowed while executing this function.
2914 static void sFlushTxFIFO(CHANNEL_T
* ChP
)
2917 Byte_t Ch
; /* channel number within AIOP */
2918 int TxEnabled
; /* 1 if transmitter enabled */
2920 if (sGetTxCnt(ChP
) == 0) /* Tx FIFO empty */
2921 return; /* don't need to flush */
2924 if (ChP
->TxControl
[3] & TX_ENABLE
) {
2926 sDisTransmit(ChP
); /* disable transmitter */
2928 sStopRxProcessor(ChP
); /* stop Rx processor */
2929 for (i
= 0; i
< 4000 / 200; i
++) /* delay 4 uS to allow proc to stop */
2930 sInB(ChP
->IntChan
); /* depends on bus i/o timing */
2931 Ch
= (Byte_t
) sGetChanNum(ChP
);
2932 sOutB(ChP
->Cmd
, Ch
| RESTXFCNT
); /* apply reset Tx FIFO count */
2933 sOutB(ChP
->Cmd
, Ch
); /* remove reset Tx FIFO count */
2934 sOutW((WordIO_t
) ChP
->IndexAddr
, ChP
->TxFIFOPtrs
); /* clear Tx in/out ptrs */
2935 sOutW(ChP
->IndexData
, 0);
2937 sEnTransmit(ChP
); /* enable transmitter */
2938 sStartRxProcessor(ChP
); /* restart Rx processor */
2941 /***************************************************************************
2942 Function: sWriteTxPrioByte
2943 Purpose: Write a byte of priority transmit data to a channel
2944 Call: sWriteTxPrioByte(ChP,Data)
2945 CHANNEL_T *ChP; Ptr to channel structure
2946 Byte_t Data; The transmit data byte
2948 Return: int: 1 if the bytes is successfully written, otherwise 0.
2950 Comments: The priority byte is transmitted before any data in the Tx FIFO.
2952 Warnings: No context switches are allowed while executing this function.
2954 static int sWriteTxPrioByte(CHANNEL_T
* ChP
, Byte_t Data
)
2956 Byte_t DWBuf
[4]; /* buffer for double word writes */
2957 Word_t
*WordPtr
; /* must be far because Win SS != DS */
2958 register DWordIO_t IndexAddr
;
2960 if (sGetTxCnt(ChP
) > 1) { /* write it to Tx priority buffer */
2961 IndexAddr
= ChP
->IndexAddr
;
2962 sOutW((WordIO_t
) IndexAddr
, ChP
->TxPrioCnt
); /* get priority buffer status */
2963 if (sInB((ByteIO_t
) ChP
->IndexData
) & PRI_PEND
) /* priority buffer busy */
2964 return (0); /* nothing sent */
2966 WordPtr
= (Word_t
*) (&DWBuf
[0]);
2967 *WordPtr
= ChP
->TxPrioBuf
; /* data byte address */
2969 DWBuf
[2] = Data
; /* data byte value */
2970 out32(IndexAddr
, DWBuf
); /* write it out */
2972 *WordPtr
= ChP
->TxPrioCnt
; /* Tx priority count address */
2974 DWBuf
[2] = PRI_PEND
+ 1; /* indicate 1 byte pending */
2975 DWBuf
[3] = 0; /* priority buffer pointer */
2976 out32(IndexAddr
, DWBuf
); /* write it out */
2977 } else { /* write it to Tx FIFO */
2979 sWriteTxByte(sGetTxRxDataIO(ChP
), Data
);
2981 return (1); /* 1 byte sent */
2984 /***************************************************************************
2985 Function: sEnInterrupts
2986 Purpose: Enable one or more interrupts for a channel
2987 Call: sEnInterrupts(ChP,Flags)
2988 CHANNEL_T *ChP; Ptr to channel structure
2989 Word_t Flags: Interrupt enable flags, can be any combination
2990 of the following flags:
2991 TXINT_EN: Interrupt on Tx FIFO empty
2992 RXINT_EN: Interrupt on Rx FIFO at trigger level (see
2994 SRCINT_EN: Interrupt on SRC (Special Rx Condition)
2995 MCINT_EN: Interrupt on modem input change
2996 CHANINT_EN: Allow channel interrupt signal to the AIOP's
2997 Interrupt Channel Register.
2999 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
3000 enabled. If an interrupt enable flag is not set in Flags, that
3001 interrupt will not be changed. Interrupts can be disabled with
3002 function sDisInterrupts().
3004 This function sets the appropriate bit for the channel in the AIOP's
3005 Interrupt Mask Register if the CHANINT_EN flag is set. This allows
3006 this channel's bit to be set in the AIOP's Interrupt Channel Register.
3008 Interrupts must also be globally enabled before channel interrupts
3009 will be passed on to the host. This is done with function
3012 In some cases it may be desirable to disable interrupts globally but
3013 enable channel interrupts. This would allow the global interrupt
3014 status register to be used to determine which AIOPs need service.
3016 static void sEnInterrupts(CHANNEL_T
* ChP
, Word_t Flags
)
3018 Byte_t Mask
; /* Interrupt Mask Register */
3020 ChP
->RxControl
[2] |=
3021 ((Byte_t
) Flags
& (RXINT_EN
| SRCINT_EN
| MCINT_EN
));
3023 out32(ChP
->IndexAddr
, ChP
->RxControl
);
3025 ChP
->TxControl
[2] |= ((Byte_t
) Flags
& TXINT_EN
);
3027 out32(ChP
->IndexAddr
, ChP
->TxControl
);
3029 if (Flags
& CHANINT_EN
) {
3030 Mask
= sInB(ChP
->IntMask
) | sBitMapSetTbl
[ChP
->ChanNum
];
3031 sOutB(ChP
->IntMask
, Mask
);
3035 /***************************************************************************
3036 Function: sDisInterrupts
3037 Purpose: Disable one or more interrupts for a channel
3038 Call: sDisInterrupts(ChP,Flags)
3039 CHANNEL_T *ChP; Ptr to channel structure
3040 Word_t Flags: Interrupt flags, can be any combination
3041 of the following flags:
3042 TXINT_EN: Interrupt on Tx FIFO empty
3043 RXINT_EN: Interrupt on Rx FIFO at trigger level (see
3045 SRCINT_EN: Interrupt on SRC (Special Rx Condition)
3046 MCINT_EN: Interrupt on modem input change
3047 CHANINT_EN: Disable channel interrupt signal to the
3048 AIOP's Interrupt Channel Register.
3050 Comments: If an interrupt flag is set in Flags, that interrupt will be
3051 disabled. If an interrupt flag is not set in Flags, that
3052 interrupt will not be changed. Interrupts can be enabled with
3053 function sEnInterrupts().
3055 This function clears the appropriate bit for the channel in the AIOP's
3056 Interrupt Mask Register if the CHANINT_EN flag is set. This blocks
3057 this channel's bit from being set in the AIOP's Interrupt Channel
3060 static void sDisInterrupts(CHANNEL_T
* ChP
, Word_t Flags
)
3062 Byte_t Mask
; /* Interrupt Mask Register */
3064 ChP
->RxControl
[2] &=
3065 ~((Byte_t
) Flags
& (RXINT_EN
| SRCINT_EN
| MCINT_EN
));
3066 out32(ChP
->IndexAddr
, ChP
->RxControl
);
3067 ChP
->TxControl
[2] &= ~((Byte_t
) Flags
& TXINT_EN
);
3068 out32(ChP
->IndexAddr
, ChP
->TxControl
);
3070 if (Flags
& CHANINT_EN
) {
3071 Mask
= sInB(ChP
->IntMask
) & sBitMapClrTbl
[ChP
->ChanNum
];
3072 sOutB(ChP
->IntMask
, Mask
);
3076 static void sSetInterfaceMode(CHANNEL_T
* ChP
, Byte_t mode
)
3078 sOutB(ChP
->CtlP
->AiopIO
[2], (mode
& 0x18) | ChP
->ChanNum
);
3082 * Not an official SSCI function, but how to reset RocketModems.
3085 static void sModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
)
3090 addr
= CtlP
->AiopIO
[0] + 0x400;
3091 val
= sInB(CtlP
->MReg3IO
);
3092 /* if AIOP[1] is not enabled, enable it */
3093 if ((val
& 2) == 0) {
3094 val
= sInB(CtlP
->MReg2IO
);
3095 sOutB(CtlP
->MReg2IO
, (val
& 0xfc) | (1 & 0x03));
3096 sOutB(CtlP
->MBaseIO
, (unsigned char) (addr
>> 6));
3102 sOutB(addr
+ chan
, 0); /* apply or remove reset */
3107 * Not an official SSCI function, but how to reset RocketModems.
3110 static void sPCIModemReset(CONTROLLER_T
* CtlP
, int chan
, int on
)
3114 addr
= CtlP
->AiopIO
[0] + 0x40; /* 2nd AIOP */
3117 sOutB(addr
+ chan
, 0); /* apply or remove reset */
3120 /* Resets the speaker controller on RocketModem II and III devices */
3121 static void rmSpeakerReset(CONTROLLER_T
* CtlP
, unsigned long model
)
3125 /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
3126 if ((model
== MODEL_RP4M
) || (model
== MODEL_RP6M
)) {
3127 addr
= CtlP
->AiopIO
[0] + 0x4F;
3131 /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
3132 if ((model
== MODEL_UPCI_RM3_8PORT
)
3133 || (model
== MODEL_UPCI_RM3_4PORT
)) {
3134 addr
= CtlP
->AiopIO
[0] + 0x88;
3139 /* Returns the line number given the controller (board), aiop and channel number */
3140 static unsigned char GetLineNumber(int ctrl
, int aiop
, int ch
)
3142 return lineNumbers
[(ctrl
<< 5) | (aiop
<< 3) | ch
];
3146 * Stores the line number associated with a given controller (board), aiop
3147 * and channel number.
3148 * Returns: The line number assigned
3150 static unsigned char SetLineNumber(int ctrl
, int aiop
, int ch
)
3152 lineNumbers
[(ctrl
<< 5) | (aiop
<< 3) | ch
] = nextLineNumber
++;
3153 return (nextLineNumber
- 1);