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1 /*
2 * Driver for 8250/16550-type serial ports
3 *
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5 *
6 * Copyright (C) 2001 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14 #include <linux/serial_8250.h>
15 #include <linux/serial_reg.h>
16 #include <linux/dmaengine.h>
17
18 struct uart_8250_dma {
19 dma_filter_fn fn;
20 void *rx_param;
21 void *tx_param;
22
23 int rx_chan_id;
24 int tx_chan_id;
25
26 struct dma_slave_config rxconf;
27 struct dma_slave_config txconf;
28
29 struct dma_chan *rxchan;
30 struct dma_chan *txchan;
31
32 dma_addr_t rx_addr;
33 dma_addr_t tx_addr;
34
35 dma_cookie_t rx_cookie;
36 dma_cookie_t tx_cookie;
37
38 void *rx_buf;
39
40 size_t rx_size;
41 size_t tx_size;
42
43 unsigned char tx_running:1;
44 };
45
46 struct old_serial_port {
47 unsigned int uart;
48 unsigned int baud_base;
49 unsigned int port;
50 unsigned int irq;
51 unsigned int flags;
52 unsigned char hub6;
53 unsigned char io_type;
54 unsigned char *iomem_base;
55 unsigned short iomem_reg_shift;
56 unsigned long irqflags;
57 };
58
59 struct serial8250_config {
60 const char *name;
61 unsigned short fifo_size;
62 unsigned short tx_loadsz;
63 unsigned char fcr;
64 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
65 unsigned int flags;
66 };
67
68 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
69 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
70 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
71 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
72 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
73 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
74 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
75
76 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
77 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
78 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
79 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
80 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
81
82 #define PROBE_RSA (1 << 0)
83 #define PROBE_ANY (~0)
84
85 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
86
87 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
88 #define SERIAL8250_SHARE_IRQS 1
89 #else
90 #define SERIAL8250_SHARE_IRQS 0
91 #endif
92
93 static inline int serial_in(struct uart_8250_port *up, int offset)
94 {
95 return up->port.serial_in(&up->port, offset);
96 }
97
98 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
99 {
100 up->port.serial_out(&up->port, offset, value);
101 }
102
103 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
104
105 static inline int serial_dl_read(struct uart_8250_port *up)
106 {
107 return up->dl_read(up);
108 }
109
110 static inline void serial_dl_write(struct uart_8250_port *up, int value)
111 {
112 up->dl_write(up, value);
113 }
114
115 #if defined(__alpha__) && !defined(CONFIG_PCI)
116 /*
117 * Digital did something really horribly wrong with the OUT1 and OUT2
118 * lines on at least some ALPHA's. The failure mode is that if either
119 * is cleared, the machine locks up with endless interrupts.
120 */
121 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
122 #else
123 #define ALPHA_KLUDGE_MCR 0
124 #endif
125
126 #ifdef CONFIG_SERIAL_8250_PNP
127 int serial8250_pnp_init(void);
128 void serial8250_pnp_exit(void);
129 #else
130 static inline int serial8250_pnp_init(void) { return 0; }
131 static inline void serial8250_pnp_exit(void) { }
132 #endif
133
134 #ifdef CONFIG_ARCH_OMAP1
135 static inline int is_omap1_8250(struct uart_8250_port *pt)
136 {
137 int res;
138
139 switch (pt->port.mapbase) {
140 case OMAP1_UART1_BASE:
141 case OMAP1_UART2_BASE:
142 case OMAP1_UART3_BASE:
143 res = 1;
144 break;
145 default:
146 res = 0;
147 break;
148 }
149
150 return res;
151 }
152
153 static inline int is_omap1510_8250(struct uart_8250_port *pt)
154 {
155 if (!cpu_is_omap1510())
156 return 0;
157
158 return is_omap1_8250(pt);
159 }
160 #else
161 static inline int is_omap1_8250(struct uart_8250_port *pt)
162 {
163 return 0;
164 }
165 static inline int is_omap1510_8250(struct uart_8250_port *pt)
166 {
167 return 0;
168 }
169 #endif
170
171 #ifdef CONFIG_SERIAL_8250_DMA
172 extern int serial8250_tx_dma(struct uart_8250_port *);
173 extern int serial8250_rx_dma(struct uart_8250_port *, unsigned int iir);
174 extern int serial8250_request_dma(struct uart_8250_port *);
175 extern void serial8250_release_dma(struct uart_8250_port *);
176 #else
177 static inline int serial8250_tx_dma(struct uart_8250_port *p)
178 {
179 return -1;
180 }
181 static inline int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
182 {
183 return -1;
184 }
185 static inline int serial8250_request_dma(struct uart_8250_port *p)
186 {
187 return -1;
188 }
189 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
190 #endif