drivers/tty/serial/mcf.c

   1 /****************************************************************************/
   2
   3 /*
   4  *      mcf.c -- Freescale ColdFire UART driver
   5  *
   6  *      (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 /****************************************************************************/
  15
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/module.h>
  20 #include <linux/console.h>
  21 #include <linux/tty.h>
  22 #include <linux/tty_flip.h>
  23 #include <linux/serial.h>
  24 #include <linux/serial_core.h>
  25 #include <linux/io.h>
  26 #include <linux/uaccess.h>
  27 #include <linux/platform_device.h>
  28 #include <asm/coldfire.h>
  29 #include <asm/mcfsim.h>
  30 #include <asm/mcfuart.h>
  31 #include <asm/nettel.h>
  32
  33 /****************************************************************************/
  34
  35 /*
  36  *      Some boards implement the DTR/DCD lines using GPIO lines, most
  37  *      don't. Dummy out the access macros for those that don't. Those
  38  *      that do should define these macros somewhere in there board
  39  *      specific inlude files.
  40  */
  41 #if !defined(mcf_getppdcd)
  42 #define mcf_getppdcd(p)         (1)
  43 #endif
  44 #if !defined(mcf_getppdtr)
  45 #define mcf_getppdtr(p)         (1)
  46 #endif
  47 #if !defined(mcf_setppdtr)
  48 #define mcf_setppdtr(p, v)      do { } while (0)
  49 #endif
  50
  51 /****************************************************************************/
  52
  53 /*
  54  *      Local per-uart structure.
  55  */
  56 struct mcf_uart {
  57         struct uart_port        port;
  58         unsigned int            sigs;           /* Local copy of line sigs */
  59         unsigned char           imr;            /* Local IMR mirror */
  60         struct serial_rs485     rs485;          /* RS485 settings */
  61 };
  62
  63 /****************************************************************************/
  64
  65 static unsigned int mcf_tx_empty(struct uart_port *port)
  66 {
  67         return (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXEMPTY) ?
  68                 TIOCSER_TEMT : 0;
  69 }
  70
  71 /****************************************************************************/
  72
  73 static unsigned int mcf_get_mctrl(struct uart_port *port)
  74 {
  75         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
  76         unsigned int sigs;
  77
  78         sigs = (readb(port->membase + MCFUART_UIPR) & MCFUART_UIPR_CTS) ?
  79                 0 : TIOCM_CTS;
  80         sigs |= (pp->sigs & TIOCM_RTS);
  81         sigs |= (mcf_getppdcd(port->line) ? TIOCM_CD : 0);
  82         sigs |= (mcf_getppdtr(port->line) ? TIOCM_DTR : 0);
  83
  84         return sigs;
  85 }
  86
  87 /****************************************************************************/
  88
  89 static void mcf_set_mctrl(struct uart_port *port, unsigned int sigs)
  90 {
  91         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
  92
  93         pp->sigs = sigs;
  94         mcf_setppdtr(port->line, (sigs & TIOCM_DTR));
  95         if (sigs & TIOCM_RTS)
  96                 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1);
  97         else
  98                 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP0);
  99 }
 100
 101 /****************************************************************************/
 102
 103 static void mcf_start_tx(struct uart_port *port)
 104 {
 105         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 106
 107         if (pp->rs485.flags & SER_RS485_ENABLED) {
 108                 /* Enable Transmitter */
 109                 writeb(MCFUART_UCR_TXENABLE, port->membase + MCFUART_UCR);
 110                 /* Manually assert RTS */
 111                 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1);
 112         }
 113         pp->imr |= MCFUART_UIR_TXREADY;
 114         writeb(pp->imr, port->membase + MCFUART_UIMR);
 115 }
 116
 117 /****************************************************************************/
 118
 119 static void mcf_stop_tx(struct uart_port *port)
 120 {
 121         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 122
 123         pp->imr &= ~MCFUART_UIR_TXREADY;
 124         writeb(pp->imr, port->membase + MCFUART_UIMR);
 125 }
 126
 127 /****************************************************************************/
 128
 129 static void mcf_stop_rx(struct uart_port *port)
 130 {
 131         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 132
 133         pp->imr &= ~MCFUART_UIR_RXREADY;
 134         writeb(pp->imr, port->membase + MCFUART_UIMR);
 135 }
 136
 137 /****************************************************************************/
 138
 139 static void mcf_break_ctl(struct uart_port *port, int break_state)
 140 {
 141         unsigned long flags;
 142
 143         spin_lock_irqsave(&port->lock, flags);
 144         if (break_state == -1)
 145                 writeb(MCFUART_UCR_CMDBREAKSTART, port->membase + MCFUART_UCR);
 146         else
 147                 writeb(MCFUART_UCR_CMDBREAKSTOP, port->membase + MCFUART_UCR);
 148         spin_unlock_irqrestore(&port->lock, flags);
 149 }
 150
 151 /****************************************************************************/
 152
 153 static void mcf_enable_ms(struct uart_port *port)
 154 {
 155 }
 156
 157 /****************************************************************************/
 158
 159 static int mcf_startup(struct uart_port *port)
 160 {
 161         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 162         unsigned long flags;
 163
 164         spin_lock_irqsave(&port->lock, flags);
 165
 166         /* Reset UART, get it into known state... */
 167         writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);
 168         writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);
 169
 170         /* Enable the UART transmitter and receiver */
 171         writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE,
 172                 port->membase + MCFUART_UCR);
 173
 174         /* Enable RX interrupts now */
 175         pp->imr = MCFUART_UIR_RXREADY;
 176         writeb(pp->imr, port->membase + MCFUART_UIMR);
 177
 178         spin_unlock_irqrestore(&port->lock, flags);
 179
 180         return 0;
 181 }
 182
 183 /****************************************************************************/
 184
 185 static void mcf_shutdown(struct uart_port *port)
 186 {
 187         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 188         unsigned long flags;
 189
 190         spin_lock_irqsave(&port->lock, flags);
 191
 192         /* Disable all interrupts now */
 193         pp->imr = 0;
 194         writeb(pp->imr, port->membase + MCFUART_UIMR);
 195
 196         /* Disable UART transmitter and receiver */
 197         writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);
 198         writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);
 199
 200         spin_unlock_irqrestore(&port->lock, flags);
 201 }
 202
 203 /****************************************************************************/
 204
 205 static void mcf_set_termios(struct uart_port *port, struct ktermios *termios,
 206         struct ktermios *old)
 207 {
 208         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 209         unsigned long flags;
 210         unsigned int baud, baudclk;
 211 #if defined(CONFIG_M5272)
 212         unsigned int baudfr;
 213 #endif
 214         unsigned char mr1, mr2;
 215
 216         baud = uart_get_baud_rate(port, termios, old, 0, 230400);
 217 #if defined(CONFIG_M5272)
 218         baudclk = (MCF_BUSCLK / baud) / 32;
 219         baudfr = (((MCF_BUSCLK / baud) + 1) / 2) % 16;
 220 #else
 221         baudclk = ((MCF_BUSCLK / baud) + 16) / 32;
 222 #endif
 223
 224         mr1 = MCFUART_MR1_RXIRQRDY | MCFUART_MR1_RXERRCHAR;
 225         mr2 = 0;
 226
 227         switch (termios->c_cflag & CSIZE) {
 228         case CS5: mr1 |= MCFUART_MR1_CS5; break;
 229         case CS6: mr1 |= MCFUART_MR1_CS6; break;
 230         case CS7: mr1 |= MCFUART_MR1_CS7; break;
 231         case CS8:
 232         default:  mr1 |= MCFUART_MR1_CS8; break;
 233         }
 234
 235         if (termios->c_cflag & PARENB) {
 236                 if (termios->c_cflag & CMSPAR) {
 237                         if (termios->c_cflag & PARODD)
 238                                 mr1 |= MCFUART_MR1_PARITYMARK;
 239                         else
 240                                 mr1 |= MCFUART_MR1_PARITYSPACE;
 241                 } else {
 242                         if (termios->c_cflag & PARODD)
 243                                 mr1 |= MCFUART_MR1_PARITYODD;
 244                         else
 245                                 mr1 |= MCFUART_MR1_PARITYEVEN;
 246                 }
 247         } else {
 248                 mr1 |= MCFUART_MR1_PARITYNONE;
 249         }
 250
 251         if (termios->c_cflag & CSTOPB)
 252                 mr2 |= MCFUART_MR2_STOP2;
 253         else
 254                 mr2 |= MCFUART_MR2_STOP1;
 255
 256         if (termios->c_cflag & CRTSCTS) {
 257                 mr1 |= MCFUART_MR1_RXRTS;
 258                 mr2 |= MCFUART_MR2_TXCTS;
 259         }
 260
 261         if (pp->rs485.flags & SER_RS485_ENABLED) {
 262                 dev_dbg(port->dev, "Setting UART to RS485\n");
 263                 mr2 |= MCFUART_MR2_TXRTS;
 264         }
 265
 266         spin_lock_irqsave(&port->lock, flags);
 267         uart_update_timeout(port, termios->c_cflag, baud);
 268         writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);
 269         writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);
 270         writeb(MCFUART_UCR_CMDRESETMRPTR, port->membase + MCFUART_UCR);
 271         writeb(mr1, port->membase + MCFUART_UMR);
 272         writeb(mr2, port->membase + MCFUART_UMR);
 273         writeb((baudclk & 0xff00) >> 8, port->membase + MCFUART_UBG1);
 274         writeb((baudclk & 0xff), port->membase + MCFUART_UBG2);
 275 #if defined(CONFIG_M5272)
 276         writeb((baudfr & 0x0f), port->membase + MCFUART_UFPD);
 277 #endif
 278         writeb(MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER,
 279                 port->membase + MCFUART_UCSR);
 280         writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE,
 281                 port->membase + MCFUART_UCR);
 282         spin_unlock_irqrestore(&port->lock, flags);
 283 }
 284
 285 /****************************************************************************/
 286
 287 static void mcf_rx_chars(struct mcf_uart *pp)
 288 {
 289         struct uart_port *port = &pp->port;
 290         unsigned char status, ch, flag;
 291
 292         while ((status = readb(port->membase + MCFUART_USR)) & MCFUART_USR_RXREADY) {
 293                 ch = readb(port->membase + MCFUART_URB);
 294                 flag = TTY_NORMAL;
 295                 port->icount.rx++;
 296
 297                 if (status & MCFUART_USR_RXERR) {
 298                         writeb(MCFUART_UCR_CMDRESETERR,
 299                                 port->membase + MCFUART_UCR);
 300
 301                         if (status & MCFUART_USR_RXBREAK) {
 302                                 port->icount.brk++;
 303                                 if (uart_handle_break(port))
 304                                         continue;
 305                         } else if (status & MCFUART_USR_RXPARITY) {
 306                                 port->icount.parity++;
 307                         } else if (status & MCFUART_USR_RXOVERRUN) {
 308                                 port->icount.overrun++;
 309                         } else if (status & MCFUART_USR_RXFRAMING) {
 310                                 port->icount.frame++;
 311                         }
 312
 313                         status &= port->read_status_mask;
 314
 315                         if (status & MCFUART_USR_RXBREAK)
 316                                 flag = TTY_BREAK;
 317                         else if (status & MCFUART_USR_RXPARITY)
 318                                 flag = TTY_PARITY;
 319                         else if (status & MCFUART_USR_RXFRAMING)
 320                                 flag = TTY_FRAME;
 321                 }
 322
 323                 if (uart_handle_sysrq_char(port, ch))
 324                         continue;
 325                 uart_insert_char(port, status, MCFUART_USR_RXOVERRUN, ch, flag);
 326         }
 327
 328         tty_flip_buffer_push(&port->state->port);
 329 }
 330
 331 /****************************************************************************/
 332
 333 static void mcf_tx_chars(struct mcf_uart *pp)
 334 {
 335         struct uart_port *port = &pp->port;
 336         struct circ_buf *xmit = &port->state->xmit;
 337
 338         if (port->x_char) {
 339                 /* Send special char - probably flow control */
 340                 writeb(port->x_char, port->membase + MCFUART_UTB);
 341                 port->x_char = 0;
 342                 port->icount.tx++;
 343                 return;
 344         }
 345
 346         while (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXREADY) {
 347                 if (xmit->head == xmit->tail)
 348                         break;
 349                 writeb(xmit->buf[xmit->tail], port->membase + MCFUART_UTB);
 350                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
 351                 port->icount.tx++;
 352         }
 353
 354         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 355                 uart_write_wakeup(port);
 356
 357         if (xmit->head == xmit->tail) {
 358                 pp->imr &= ~MCFUART_UIR_TXREADY;
 359                 writeb(pp->imr, port->membase + MCFUART_UIMR);
 360                 /* Disable TX to negate RTS automatically */
 361                 if (pp->rs485.flags & SER_RS485_ENABLED)
 362                         writeb(MCFUART_UCR_TXDISABLE,
 363                                 port->membase + MCFUART_UCR);
 364         }
 365 }
 366
 367 /****************************************************************************/
 368
 369 static irqreturn_t mcf_interrupt(int irq, void *data)
 370 {
 371         struct uart_port *port = data;
 372         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 373         unsigned int isr;
 374         irqreturn_t ret = IRQ_NONE;
 375
 376         isr = readb(port->membase + MCFUART_UISR) & pp->imr;
 377
 378         spin_lock(&port->lock);
 379         if (isr & MCFUART_UIR_RXREADY) {
 380                 mcf_rx_chars(pp);
 381                 ret = IRQ_HANDLED;
 382         }
 383         if (isr & MCFUART_UIR_TXREADY) {
 384                 mcf_tx_chars(pp);
 385                 ret = IRQ_HANDLED;
 386         }
 387         spin_unlock(&port->lock);
 388
 389         return ret;
 390 }
 391
 392 /****************************************************************************/
 393
 394 static void mcf_config_port(struct uart_port *port, int flags)
 395 {
 396         port->type = PORT_MCF;
 397         port->fifosize = MCFUART_TXFIFOSIZE;
 398
 399         /* Clear mask, so no surprise interrupts. */
 400         writeb(0, port->membase + MCFUART_UIMR);
 401
 402         if (request_irq(port->irq, mcf_interrupt, 0, "UART", port))
 403                 printk(KERN_ERR "MCF: unable to attach ColdFire UART %d "
 404                         "interrupt vector=%d\n", port->line, port->irq);
 405 }
 406
 407 /****************************************************************************/
 408
 409 static const char *mcf_type(struct uart_port *port)
 410 {
 411         return (port->type == PORT_MCF) ? "ColdFire UART" : NULL;
 412 }
 413
 414 /****************************************************************************/
 415
 416 static int mcf_request_port(struct uart_port *port)
 417 {
 418         /* UARTs always present */
 419         return 0;
 420 }
 421
 422 /****************************************************************************/
 423
 424 static void mcf_release_port(struct uart_port *port)
 425 {
 426         /* Nothing to release... */
 427 }
 428
 429 /****************************************************************************/
 430
 431 static int mcf_verify_port(struct uart_port *port, struct serial_struct *ser)
 432 {
 433         if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_MCF))
 434                 return -EINVAL;
 435         return 0;
 436 }
 437
 438 /****************************************************************************/
 439
 440 /* Enable or disable the RS485 support */
 441 static void mcf_config_rs485(struct uart_port *port, struct serial_rs485 *rs485)
 442 {
 443         struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 444         unsigned long flags;
 445         unsigned char mr1, mr2;
 446
 447         spin_lock_irqsave(&port->lock, flags);
 448         /* Get mode registers */
 449         mr1 = readb(port->membase + MCFUART_UMR);
 450         mr2 = readb(port->membase + MCFUART_UMR);
 451         if (rs485->flags & SER_RS485_ENABLED) {
 452                 dev_dbg(port->dev, "Setting UART to RS485\n");
 453                 /* Automatically negate RTS after TX completes */
 454                 mr2 |= MCFUART_MR2_TXRTS;
 455         } else {
 456                 dev_dbg(port->dev, "Setting UART to RS232\n");
 457                 mr2 &= ~MCFUART_MR2_TXRTS;
 458         }
 459         writeb(mr1, port->membase + MCFUART_UMR);
 460         writeb(mr2, port->membase + MCFUART_UMR);
 461         pp->rs485 = *rs485;
 462         spin_unlock_irqrestore(&port->lock, flags);
 463 }
 464
 465 static int mcf_ioctl(struct uart_port *port, unsigned int cmd,
 466                 unsigned long arg)
 467 {
 468         switch (cmd) {
 469         case TIOCSRS485: {
 470                 struct serial_rs485 rs485;
 471                 if (copy_from_user(&rs485, (struct serial_rs485 *)arg,
 472                                 sizeof(struct serial_rs485)))
 473                         return -EFAULT;
 474                 mcf_config_rs485(port, &rs485);
 475                 break;
 476         }
 477         case TIOCGRS485: {
 478                 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
 479                 if (copy_to_user((struct serial_rs485 *)arg, &pp->rs485,
 480                                 sizeof(struct serial_rs485)))
 481                         return -EFAULT;
 482                 break;
 483         }
 484         default:
 485                 return -ENOIOCTLCMD;
 486         }
 487         return 0;
 488 }
 489
 490 /****************************************************************************/
 491
 492 /*
 493  *      Define the basic serial functions we support.
 494  */
 495 static const struct uart_ops mcf_uart_ops = {
 496         .tx_empty       = mcf_tx_empty,
 497         .get_mctrl      = mcf_get_mctrl,
 498         .set_mctrl      = mcf_set_mctrl,
 499         .start_tx       = mcf_start_tx,
 500         .stop_tx        = mcf_stop_tx,
 501         .stop_rx        = mcf_stop_rx,
 502         .enable_ms      = mcf_enable_ms,
 503         .break_ctl      = mcf_break_ctl,
 504         .startup        = mcf_startup,
 505         .shutdown       = mcf_shutdown,
 506         .set_termios    = mcf_set_termios,
 507         .type           = mcf_type,
 508         .request_port   = mcf_request_port,
 509         .release_port   = mcf_release_port,
 510         .config_port    = mcf_config_port,
 511         .verify_port    = mcf_verify_port,
 512         .ioctl          = mcf_ioctl,
 513 };
 514
 515 static struct mcf_uart mcf_ports[4];
 516
 517 #define MCF_MAXPORTS    ARRAY_SIZE(mcf_ports)
 518
 519 /****************************************************************************/
 520 #if defined(CONFIG_SERIAL_MCF_CONSOLE)
 521 /****************************************************************************/
 522
 523 int __init early_mcf_setup(struct mcf_platform_uart *platp)
 524 {
 525         struct uart_port *port;
 526         int i;
 527
 528         for (i = 0; ((i < MCF_MAXPORTS) && (platp[i].mapbase)); i++) {
 529                 port = &mcf_ports[i].port;
 530
 531                 port->line = i;
 532                 port->type = PORT_MCF;
 533                 port->mapbase = platp[i].mapbase;
 534                 port->membase = (platp[i].membase) ? platp[i].membase :
 535                         (unsigned char __iomem *) port->mapbase;
 536                 port->iotype = SERIAL_IO_MEM;
 537                 port->irq = platp[i].irq;
 538                 port->uartclk = MCF_BUSCLK;
 539                 port->flags = ASYNC_BOOT_AUTOCONF;
 540                 port->ops = &mcf_uart_ops;
 541         }
 542
 543         return 0;
 544 }
 545
 546 /****************************************************************************/
 547
 548 static void mcf_console_putc(struct console *co, const char c)
 549 {
 550         struct uart_port *port = &(mcf_ports + co->index)->port;
 551         int i;
 552
 553         for (i = 0; (i < 0x10000); i++) {
 554                 if (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXREADY)
 555                         break;
 556         }
 557         writeb(c, port->membase + MCFUART_UTB);
 558         for (i = 0; (i < 0x10000); i++) {
 559                 if (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXREADY)
 560                         break;
 561         }
 562 }
 563
 564 /****************************************************************************/
 565
 566 static void mcf_console_write(struct console *co, const char *s, unsigned int count)
 567 {
 568         for (; (count); count--, s++) {
 569                 mcf_console_putc(co, *s);
 570                 if (*s == '\n')
 571                         mcf_console_putc(co, '\r');
 572         }
 573 }
 574
 575 /****************************************************************************/
 576
 577 static int __init mcf_console_setup(struct console *co, char *options)
 578 {
 579         struct uart_port *port;
 580         int baud = CONFIG_SERIAL_MCF_BAUDRATE;
 581         int bits = 8;
 582         int parity = 'n';
 583         int flow = 'n';
 584
 585         if ((co->index < 0) || (co->index >= MCF_MAXPORTS))
 586                 co->index = 0;
 587         port = &mcf_ports[co->index].port;
 588         if (port->membase == 0)
 589                 return -ENODEV;
 590
 591         if (options)
 592                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 593
 594         return uart_set_options(port, co, baud, parity, bits, flow);
 595 }
 596
 597 /****************************************************************************/
 598
 599 static struct uart_driver mcf_driver;
 600
 601 static struct console mcf_console = {
 602         .name           = "ttyS",
 603         .write          = mcf_console_write,
 604         .device         = uart_console_device,
 605         .setup          = mcf_console_setup,
 606         .flags          = CON_PRINTBUFFER,
 607         .index          = -1,
 608         .data           = &mcf_driver,
 609 };
 610
 611 static int __init mcf_console_init(void)
 612 {
 613         register_console(&mcf_console);
 614         return 0;
 615 }
 616
 617 console_initcall(mcf_console_init);
 618
 619 #define MCF_CONSOLE     &mcf_console
 620
 621 /****************************************************************************/
 622 #else
 623 /****************************************************************************/
 624
 625 #define MCF_CONSOLE     NULL
 626
 627 /****************************************************************************/
 628 #endif /* CONFIG_MCF_CONSOLE */
 629 /****************************************************************************/
 630
 631 /*
 632  *      Define the mcf UART driver structure.
 633  */
 634 static struct uart_driver mcf_driver = {
 635         .owner          = THIS_MODULE,
 636         .driver_name    = "mcf",
 637         .dev_name       = "ttyS",
 638         .major          = TTY_MAJOR,
 639         .minor          = 64,
 640         .nr             = MCF_MAXPORTS,
 641         .cons           = MCF_CONSOLE,
 642 };
 643
 644 /****************************************************************************/
 645
 646 static int mcf_probe(struct platform_device *pdev)
 647 {
 648         struct mcf_platform_uart *platp = dev_get_platdata(&pdev->dev);
 649         struct uart_port *port;
 650         int i;
 651
 652         for (i = 0; ((i < MCF_MAXPORTS) && (platp[i].mapbase)); i++) {
 653                 port = &mcf_ports[i].port;
 654
 655                 port->line = i;
 656                 port->type = PORT_MCF;
 657                 port->mapbase = platp[i].mapbase;
 658                 port->membase = (platp[i].membase) ? platp[i].membase :
 659                         (unsigned char __iomem *) platp[i].mapbase;
 660                 port->iotype = SERIAL_IO_MEM;
 661                 port->irq = platp[i].irq;
 662                 port->uartclk = MCF_BUSCLK;
 663                 port->ops = &mcf_uart_ops;
 664                 port->flags = ASYNC_BOOT_AUTOCONF;
 665
 666                 uart_add_one_port(&mcf_driver, port);
 667         }
 668
 669         return 0;
 670 }
 671
 672 /****************************************************************************/
 673
 674 static int mcf_remove(struct platform_device *pdev)
 675 {
 676         struct uart_port *port;
 677         int i;
 678
 679         for (i = 0; (i < MCF_MAXPORTS); i++) {
 680                 port = &mcf_ports[i].port;
 681                 if (port)
 682                         uart_remove_one_port(&mcf_driver, port);
 683         }
 684
 685         return 0;
 686 }
 687
 688 /****************************************************************************/
 689
 690 static struct platform_driver mcf_platform_driver = {
 691         .probe          = mcf_probe,
 692         .remove         = mcf_remove,
 693         .driver         = {
 694                 .name   = "mcfuart",
 695                 .owner  = THIS_MODULE,
 696         },
 697 };
 698
 699 /****************************************************************************/
 700
 701 static int __init mcf_init(void)
 702 {
 703         int rc;
 704
 705         printk("ColdFire internal UART serial driver\n");
 706
 707         rc = uart_register_driver(&mcf_driver);
 708         if (rc)
 709                 return rc;
 710         rc = platform_driver_register(&mcf_platform_driver);
 711         if (rc) {
 712                 uart_unregister_driver(&mcf_driver);
 713                 return rc;
 714         }
 715         return 0;
 716 }
 717
 718 /****************************************************************************/
 719
 720 static void __exit mcf_exit(void)
 721 {
 722         platform_driver_unregister(&mcf_platform_driver);
 723         uart_unregister_driver(&mcf_driver);
 724 }
 725
 726 /****************************************************************************/
 727
 728 module_init(mcf_init);
 729 module_exit(mcf_exit);
 730
 731 MODULE_AUTHOR("Greg Ungerer <gerg@snapgear.com>");
 732 MODULE_DESCRIPTION("Freescale ColdFire UART driver");
 733 MODULE_LICENSE("GPL");
 734 MODULE_ALIAS("platform:mcfuart");
 735
 736 /****************************************************************************/