2 * Support for the asynchronous serial interface (DUART) included
3 * in the BCM1250 and derived System-On-a-Chip (SOC) devices.
5 * Copyright (c) 2007 Maciej W. Rozycki
7 * Derived from drivers/char/sb1250_duart.c for which the following
10 * Copyright (c) 2000, 2001, 2002, 2003, 2004 Broadcom Corporation
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
19 * "BCM1250/BCM1125/BCM1125H User Manual", Broadcom Corporation
22 #if defined(CONFIG_SERIAL_SB1250_DUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
26 #include <linux/compiler.h>
27 #include <linux/console.h>
28 #include <linux/delay.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/ioport.h>
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/major.h>
36 #include <linux/serial.h>
37 #include <linux/serial_core.h>
38 #include <linux/spinlock.h>
39 #include <linux/sysrq.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/types.h>
44 #include <linux/refcount.h>
48 #include <asm/sibyte/sb1250.h>
49 #include <asm/sibyte/sb1250_uart.h>
50 #include <asm/sibyte/swarm.h>
53 #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
54 #include <asm/sibyte/bcm1480_regs.h>
55 #include <asm/sibyte/bcm1480_int.h>
57 #define SBD_CHANREGS(line) A_BCM1480_DUART_CHANREG((line), 0)
58 #define SBD_CTRLREGS(line) A_BCM1480_DUART_CTRLREG((line), 0)
59 #define SBD_INT(line) (K_BCM1480_INT_UART_0 + (line))
61 #define DUART_CHANREG_SPACING BCM1480_DUART_CHANREG_SPACING
63 #define R_DUART_IMRREG(line) R_BCM1480_DUART_IMRREG(line)
64 #define R_DUART_INCHREG(line) R_BCM1480_DUART_INCHREG(line)
65 #define R_DUART_ISRREG(line) R_BCM1480_DUART_ISRREG(line)
67 #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
68 #include <asm/sibyte/sb1250_regs.h>
69 #include <asm/sibyte/sb1250_int.h>
71 #define SBD_CHANREGS(line) A_DUART_CHANREG((line), 0)
72 #define SBD_CTRLREGS(line) A_DUART_CTRLREG(0)
73 #define SBD_INT(line) (K_INT_UART_0 + (line))
76 #error invalid SB1250 UART configuration
81 MODULE_AUTHOR("Maciej W. Rozycki <macro@linux-mips.org>");
82 MODULE_DESCRIPTION("BCM1xxx on-chip DUART serial driver");
83 MODULE_LICENSE("GPL");
86 #define DUART_MAX_CHIP 2
87 #define DUART_MAX_SIDE 2
93 struct sbd_duart
*duart
;
94 struct uart_port port
;
95 unsigned char __iomem
*memctrl
;
101 * Per-DUART state for the shared register space.
104 struct sbd_port sport
[2];
105 unsigned long mapctrl
;
106 refcount_t map_guard
;
109 #define to_sport(uport) container_of(uport, struct sbd_port, port)
111 static struct sbd_duart sbd_duarts
[DUART_MAX_CHIP
];
115 * Reading and writing SB1250 DUART registers.
117 * There are three register spaces: two per-channel ones and
118 * a shared one. We have to define accessors appropriately.
119 * All registers are 64-bit and all but the Baud Rate Clock
120 * registers only define 8 least significant bits. There is
121 * also a workaround to take into account. Raw accessors use
122 * the full register width, but cooked ones truncate it
123 * intentionally so that the rest of the driver does not care.
125 static u64
__read_sbdchn(struct sbd_port
*sport
, int reg
)
127 void __iomem
*csr
= sport
->port
.membase
+ reg
;
129 return __raw_readq(csr
);
132 static u64
__read_sbdshr(struct sbd_port
*sport
, int reg
)
134 void __iomem
*csr
= sport
->memctrl
+ reg
;
136 return __raw_readq(csr
);
139 static void __write_sbdchn(struct sbd_port
*sport
, int reg
, u64 value
)
141 void __iomem
*csr
= sport
->port
.membase
+ reg
;
143 __raw_writeq(value
, csr
);
146 static void __write_sbdshr(struct sbd_port
*sport
, int reg
, u64 value
)
148 void __iomem
*csr
= sport
->memctrl
+ reg
;
150 __raw_writeq(value
, csr
);
154 * In bug 1956, we get glitches that can mess up uart registers. This
155 * "read-mode-reg after any register access" is an accepted workaround.
157 static void __war_sbd1956(struct sbd_port
*sport
)
159 __read_sbdchn(sport
, R_DUART_MODE_REG_1
);
160 __read_sbdchn(sport
, R_DUART_MODE_REG_2
);
163 static unsigned char read_sbdchn(struct sbd_port
*sport
, int reg
)
165 unsigned char retval
;
167 retval
= __read_sbdchn(sport
, reg
);
169 __war_sbd1956(sport
);
173 static unsigned char read_sbdshr(struct sbd_port
*sport
, int reg
)
175 unsigned char retval
;
177 retval
= __read_sbdshr(sport
, reg
);
179 __war_sbd1956(sport
);
183 static void write_sbdchn(struct sbd_port
*sport
, int reg
, unsigned int value
)
185 __write_sbdchn(sport
, reg
, value
);
187 __war_sbd1956(sport
);
190 static void write_sbdshr(struct sbd_port
*sport
, int reg
, unsigned int value
)
192 __write_sbdshr(sport
, reg
, value
);
194 __war_sbd1956(sport
);
198 static int sbd_receive_ready(struct sbd_port
*sport
)
200 return read_sbdchn(sport
, R_DUART_STATUS
) & M_DUART_RX_RDY
;
203 static int sbd_receive_drain(struct sbd_port
*sport
)
207 while (sbd_receive_ready(sport
) && --loops
)
208 read_sbdchn(sport
, R_DUART_RX_HOLD
);
212 static int __maybe_unused
sbd_transmit_ready(struct sbd_port
*sport
)
214 return read_sbdchn(sport
, R_DUART_STATUS
) & M_DUART_TX_RDY
;
217 static int __maybe_unused
sbd_transmit_drain(struct sbd_port
*sport
)
221 while (!sbd_transmit_ready(sport
) && --loops
)
226 static int sbd_transmit_empty(struct sbd_port
*sport
)
228 return read_sbdchn(sport
, R_DUART_STATUS
) & M_DUART_TX_EMT
;
231 static int sbd_line_drain(struct sbd_port
*sport
)
235 while (!sbd_transmit_empty(sport
) && --loops
)
241 static unsigned int sbd_tx_empty(struct uart_port
*uport
)
243 struct sbd_port
*sport
= to_sport(uport
);
245 return sbd_transmit_empty(sport
) ? TIOCSER_TEMT
: 0;
248 static unsigned int sbd_get_mctrl(struct uart_port
*uport
)
250 struct sbd_port
*sport
= to_sport(uport
);
251 unsigned int mctrl
, status
;
253 status
= read_sbdshr(sport
, R_DUART_IN_PORT
);
254 status
>>= (uport
->line
) % 2;
255 mctrl
= (!(status
& M_DUART_IN_PIN0_VAL
) ? TIOCM_CTS
: 0) |
256 (!(status
& M_DUART_IN_PIN4_VAL
) ? TIOCM_CAR
: 0) |
257 (!(status
& M_DUART_RIN0_PIN
) ? TIOCM_RNG
: 0) |
258 (!(status
& M_DUART_IN_PIN2_VAL
) ? TIOCM_DSR
: 0);
262 static void sbd_set_mctrl(struct uart_port
*uport
, unsigned int mctrl
)
264 struct sbd_port
*sport
= to_sport(uport
);
265 unsigned int clr
= 0, set
= 0, mode2
;
267 if (mctrl
& TIOCM_DTR
)
268 set
|= M_DUART_SET_OPR2
;
270 clr
|= M_DUART_CLR_OPR2
;
271 if (mctrl
& TIOCM_RTS
)
272 set
|= M_DUART_SET_OPR0
;
274 clr
|= M_DUART_CLR_OPR0
;
275 clr
<<= (uport
->line
) % 2;
276 set
<<= (uport
->line
) % 2;
278 mode2
= read_sbdchn(sport
, R_DUART_MODE_REG_2
);
279 mode2
&= ~M_DUART_CHAN_MODE
;
280 if (mctrl
& TIOCM_LOOP
)
281 mode2
|= V_DUART_CHAN_MODE_LCL_LOOP
;
283 mode2
|= V_DUART_CHAN_MODE_NORMAL
;
285 write_sbdshr(sport
, R_DUART_CLEAR_OPR
, clr
);
286 write_sbdshr(sport
, R_DUART_SET_OPR
, set
);
287 write_sbdchn(sport
, R_DUART_MODE_REG_2
, mode2
);
290 static void sbd_stop_tx(struct uart_port
*uport
)
292 struct sbd_port
*sport
= to_sport(uport
);
294 write_sbdchn(sport
, R_DUART_CMD
, M_DUART_TX_DIS
);
295 sport
->tx_stopped
= 1;
298 static void sbd_start_tx(struct uart_port
*uport
)
300 struct sbd_port
*sport
= to_sport(uport
);
303 /* Enable tx interrupts. */
304 mask
= read_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2));
305 mask
|= M_DUART_IMR_TX
;
306 write_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2), mask
);
308 /* Go!, go!, go!... */
309 write_sbdchn(sport
, R_DUART_CMD
, M_DUART_TX_EN
);
310 sport
->tx_stopped
= 0;
313 static void sbd_stop_rx(struct uart_port
*uport
)
315 struct sbd_port
*sport
= to_sport(uport
);
317 write_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2), 0);
320 static void sbd_enable_ms(struct uart_port
*uport
)
322 struct sbd_port
*sport
= to_sport(uport
);
324 write_sbdchn(sport
, R_DUART_AUXCTL_X
,
325 M_DUART_CIN_CHNG_ENA
| M_DUART_CTS_CHNG_ENA
);
328 static void sbd_break_ctl(struct uart_port
*uport
, int break_state
)
330 struct sbd_port
*sport
= to_sport(uport
);
332 if (break_state
== -1)
333 write_sbdchn(sport
, R_DUART_CMD
, V_DUART_MISC_CMD_START_BREAK
);
335 write_sbdchn(sport
, R_DUART_CMD
, V_DUART_MISC_CMD_STOP_BREAK
);
339 static void sbd_receive_chars(struct sbd_port
*sport
)
341 struct uart_port
*uport
= &sport
->port
;
342 struct uart_icount
*icount
;
343 unsigned int status
, ch
, flag
;
346 for (count
= 16; count
; count
--) {
347 status
= read_sbdchn(sport
, R_DUART_STATUS
);
348 if (!(status
& M_DUART_RX_RDY
))
351 ch
= read_sbdchn(sport
, R_DUART_RX_HOLD
);
355 icount
= &uport
->icount
;
358 if (unlikely(status
&
359 (M_DUART_RCVD_BRK
| M_DUART_FRM_ERR
|
360 M_DUART_PARITY_ERR
| M_DUART_OVRUN_ERR
))) {
361 if (status
& M_DUART_RCVD_BRK
) {
363 if (uart_handle_break(uport
))
365 } else if (status
& M_DUART_FRM_ERR
)
367 else if (status
& M_DUART_PARITY_ERR
)
369 if (status
& M_DUART_OVRUN_ERR
)
372 status
&= uport
->read_status_mask
;
373 if (status
& M_DUART_RCVD_BRK
)
375 else if (status
& M_DUART_FRM_ERR
)
377 else if (status
& M_DUART_PARITY_ERR
)
381 if (uart_handle_sysrq_char(uport
, ch
))
384 uart_insert_char(uport
, status
, M_DUART_OVRUN_ERR
, ch
, flag
);
387 tty_flip_buffer_push(&uport
->state
->port
);
390 static void sbd_transmit_chars(struct sbd_port
*sport
)
392 struct uart_port
*uport
= &sport
->port
;
393 struct circ_buf
*xmit
= &sport
->port
.state
->xmit
;
397 /* XON/XOFF chars. */
398 if (sport
->port
.x_char
) {
399 write_sbdchn(sport
, R_DUART_TX_HOLD
, sport
->port
.x_char
);
400 sport
->port
.icount
.tx
++;
401 sport
->port
.x_char
= 0;
405 /* If nothing to do or stopped or hardware stopped. */
406 stop_tx
= (uart_circ_empty(xmit
) || uart_tx_stopped(&sport
->port
));
410 write_sbdchn(sport
, R_DUART_TX_HOLD
, xmit
->buf
[xmit
->tail
]);
411 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
412 sport
->port
.icount
.tx
++;
414 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
415 uart_write_wakeup(&sport
->port
);
418 /* Are we are done? */
419 if (stop_tx
|| uart_circ_empty(xmit
)) {
420 /* Disable tx interrupts. */
421 mask
= read_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2));
422 mask
&= ~M_DUART_IMR_TX
;
423 write_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2), mask
);
427 static void sbd_status_handle(struct sbd_port
*sport
)
429 struct uart_port
*uport
= &sport
->port
;
432 delta
= read_sbdshr(sport
, R_DUART_INCHREG((uport
->line
) % 2));
433 delta
>>= (uport
->line
) % 2;
435 if (delta
& (M_DUART_IN_PIN0_VAL
<< S_DUART_IN_PIN_CHNG
))
436 uart_handle_cts_change(uport
, !(delta
& M_DUART_IN_PIN0_VAL
));
438 if (delta
& (M_DUART_IN_PIN2_VAL
<< S_DUART_IN_PIN_CHNG
))
441 if (delta
& ((M_DUART_IN_PIN2_VAL
| M_DUART_IN_PIN0_VAL
) <<
442 S_DUART_IN_PIN_CHNG
))
443 wake_up_interruptible(&uport
->state
->port
.delta_msr_wait
);
446 static irqreturn_t
sbd_interrupt(int irq
, void *dev_id
)
448 struct sbd_port
*sport
= dev_id
;
449 struct uart_port
*uport
= &sport
->port
;
450 irqreturn_t status
= IRQ_NONE
;
451 unsigned int intstat
;
454 for (count
= 16; count
; count
--) {
455 intstat
= read_sbdshr(sport
,
456 R_DUART_ISRREG((uport
->line
) % 2));
457 intstat
&= read_sbdshr(sport
,
458 R_DUART_IMRREG((uport
->line
) % 2));
459 intstat
&= M_DUART_ISR_ALL
;
463 if (intstat
& M_DUART_ISR_RX
)
464 sbd_receive_chars(sport
);
465 if (intstat
& M_DUART_ISR_IN
)
466 sbd_status_handle(sport
);
467 if (intstat
& M_DUART_ISR_TX
)
468 sbd_transmit_chars(sport
);
470 status
= IRQ_HANDLED
;
477 static int sbd_startup(struct uart_port
*uport
)
479 struct sbd_port
*sport
= to_sport(uport
);
483 ret
= request_irq(sport
->port
.irq
, sbd_interrupt
,
484 IRQF_SHARED
, "sb1250-duart", sport
);
488 /* Clear the receive FIFO. */
489 sbd_receive_drain(sport
);
491 /* Clear the interrupt registers. */
492 write_sbdchn(sport
, R_DUART_CMD
, V_DUART_MISC_CMD_RESET_BREAK_INT
);
493 read_sbdshr(sport
, R_DUART_INCHREG((uport
->line
) % 2));
495 /* Set rx/tx interrupt to FIFO available. */
496 mode1
= read_sbdchn(sport
, R_DUART_MODE_REG_1
);
497 mode1
&= ~(M_DUART_RX_IRQ_SEL_RXFULL
| M_DUART_TX_IRQ_SEL_TXEMPT
);
498 write_sbdchn(sport
, R_DUART_MODE_REG_1
, mode1
);
500 /* Disable tx, enable rx. */
501 write_sbdchn(sport
, R_DUART_CMD
, M_DUART_TX_DIS
| M_DUART_RX_EN
);
502 sport
->tx_stopped
= 1;
504 /* Enable interrupts. */
505 write_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2),
506 M_DUART_IMR_IN
| M_DUART_IMR_RX
);
511 static void sbd_shutdown(struct uart_port
*uport
)
513 struct sbd_port
*sport
= to_sport(uport
);
515 write_sbdchn(sport
, R_DUART_CMD
, M_DUART_TX_DIS
| M_DUART_RX_DIS
);
516 sport
->tx_stopped
= 1;
517 free_irq(sport
->port
.irq
, sport
);
521 static void sbd_init_port(struct sbd_port
*sport
)
523 struct uart_port
*uport
= &sport
->port
;
525 if (sport
->initialised
)
528 /* There is no DUART reset feature, so just set some sane defaults. */
529 write_sbdchn(sport
, R_DUART_CMD
, V_DUART_MISC_CMD_RESET_TX
);
530 write_sbdchn(sport
, R_DUART_CMD
, V_DUART_MISC_CMD_RESET_RX
);
531 write_sbdchn(sport
, R_DUART_MODE_REG_1
, V_DUART_BITS_PER_CHAR_8
);
532 write_sbdchn(sport
, R_DUART_MODE_REG_2
, 0);
533 write_sbdchn(sport
, R_DUART_FULL_CTL
,
534 V_DUART_INT_TIME(0) | V_DUART_SIG_FULL(15));
535 write_sbdchn(sport
, R_DUART_OPCR_X
, 0);
536 write_sbdchn(sport
, R_DUART_AUXCTL_X
, 0);
537 write_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2), 0);
539 sport
->initialised
= 1;
542 static void sbd_set_termios(struct uart_port
*uport
, struct ktermios
*termios
,
543 struct ktermios
*old_termios
)
545 struct sbd_port
*sport
= to_sport(uport
);
546 unsigned int mode1
= 0, mode2
= 0, aux
= 0;
547 unsigned int mode1mask
= 0, mode2mask
= 0, auxmask
= 0;
548 unsigned int oldmode1
, oldmode2
, oldaux
;
549 unsigned int baud
, brg
;
550 unsigned int command
;
552 mode1mask
|= ~(M_DUART_PARITY_MODE
| M_DUART_PARITY_TYPE_ODD
|
553 M_DUART_BITS_PER_CHAR
);
554 mode2mask
|= ~M_DUART_STOP_BIT_LEN_2
;
555 auxmask
|= ~M_DUART_CTS_CHNG_ENA
;
558 switch (termios
->c_cflag
& CSIZE
) {
561 /* Unsupported, leave unchanged. */
562 mode1mask
|= M_DUART_PARITY_MODE
;
565 mode1
|= V_DUART_BITS_PER_CHAR_7
;
569 mode1
|= V_DUART_BITS_PER_CHAR_8
;
573 /* Parity and stop bits. */
574 if (termios
->c_cflag
& CSTOPB
)
575 mode2
|= M_DUART_STOP_BIT_LEN_2
;
577 mode2
|= M_DUART_STOP_BIT_LEN_1
;
578 if (termios
->c_cflag
& PARENB
)
579 mode1
|= V_DUART_PARITY_MODE_ADD
;
581 mode1
|= V_DUART_PARITY_MODE_NONE
;
582 if (termios
->c_cflag
& PARODD
)
583 mode1
|= M_DUART_PARITY_TYPE_ODD
;
585 mode1
|= M_DUART_PARITY_TYPE_EVEN
;
587 baud
= uart_get_baud_rate(uport
, termios
, old_termios
, 1200, 5000000);
588 brg
= V_DUART_BAUD_RATE(baud
);
589 /* The actual lower bound is 1221bps, so compensate. */
590 if (brg
> M_DUART_CLK_COUNTER
)
591 brg
= M_DUART_CLK_COUNTER
;
593 uart_update_timeout(uport
, termios
->c_cflag
, baud
);
595 uport
->read_status_mask
= M_DUART_OVRUN_ERR
;
596 if (termios
->c_iflag
& INPCK
)
597 uport
->read_status_mask
|= M_DUART_FRM_ERR
|
599 if (termios
->c_iflag
& (IGNBRK
| BRKINT
| PARMRK
))
600 uport
->read_status_mask
|= M_DUART_RCVD_BRK
;
602 uport
->ignore_status_mask
= 0;
603 if (termios
->c_iflag
& IGNPAR
)
604 uport
->ignore_status_mask
|= M_DUART_FRM_ERR
|
606 if (termios
->c_iflag
& IGNBRK
) {
607 uport
->ignore_status_mask
|= M_DUART_RCVD_BRK
;
608 if (termios
->c_iflag
& IGNPAR
)
609 uport
->ignore_status_mask
|= M_DUART_OVRUN_ERR
;
612 if (termios
->c_cflag
& CREAD
)
613 command
= M_DUART_RX_EN
;
615 command
= M_DUART_RX_DIS
;
617 if (termios
->c_cflag
& CRTSCTS
)
618 aux
|= M_DUART_CTS_CHNG_ENA
;
620 aux
&= ~M_DUART_CTS_CHNG_ENA
;
622 spin_lock(&uport
->lock
);
624 if (sport
->tx_stopped
)
625 command
|= M_DUART_TX_DIS
;
627 command
|= M_DUART_TX_EN
;
629 oldmode1
= read_sbdchn(sport
, R_DUART_MODE_REG_1
) & mode1mask
;
630 oldmode2
= read_sbdchn(sport
, R_DUART_MODE_REG_2
) & mode2mask
;
631 oldaux
= read_sbdchn(sport
, R_DUART_AUXCTL_X
) & auxmask
;
633 if (!sport
->tx_stopped
)
634 sbd_line_drain(sport
);
635 write_sbdchn(sport
, R_DUART_CMD
, M_DUART_TX_DIS
| M_DUART_RX_DIS
);
637 write_sbdchn(sport
, R_DUART_MODE_REG_1
, mode1
| oldmode1
);
638 write_sbdchn(sport
, R_DUART_MODE_REG_2
, mode2
| oldmode2
);
639 write_sbdchn(sport
, R_DUART_CLK_SEL
, brg
);
640 write_sbdchn(sport
, R_DUART_AUXCTL_X
, aux
| oldaux
);
642 write_sbdchn(sport
, R_DUART_CMD
, command
);
644 spin_unlock(&uport
->lock
);
648 static const char *sbd_type(struct uart_port
*uport
)
650 return "SB1250 DUART";
653 static void sbd_release_port(struct uart_port
*uport
)
655 struct sbd_port
*sport
= to_sport(uport
);
656 struct sbd_duart
*duart
= sport
->duart
;
658 iounmap(sport
->memctrl
);
659 sport
->memctrl
= NULL
;
660 iounmap(uport
->membase
);
661 uport
->membase
= NULL
;
663 if(refcount_dec_and_test(&duart
->map_guard
))
664 release_mem_region(duart
->mapctrl
, DUART_CHANREG_SPACING
);
665 release_mem_region(uport
->mapbase
, DUART_CHANREG_SPACING
);
668 static int sbd_map_port(struct uart_port
*uport
)
670 const char *err
= KERN_ERR
"sbd: Cannot map MMIO\n";
671 struct sbd_port
*sport
= to_sport(uport
);
672 struct sbd_duart
*duart
= sport
->duart
;
675 uport
->membase
= ioremap_nocache(uport
->mapbase
,
676 DUART_CHANREG_SPACING
);
677 if (!uport
->membase
) {
683 sport
->memctrl
= ioremap_nocache(duart
->mapctrl
,
684 DUART_CHANREG_SPACING
);
685 if (!sport
->memctrl
) {
687 iounmap(uport
->membase
);
688 uport
->membase
= NULL
;
695 static int sbd_request_port(struct uart_port
*uport
)
697 const char *err
= KERN_ERR
"sbd: Unable to reserve MMIO resource\n";
698 struct sbd_duart
*duart
= to_sport(uport
)->duart
;
701 if (!request_mem_region(uport
->mapbase
, DUART_CHANREG_SPACING
,
706 refcount_inc(&duart
->map_guard
);
707 if (refcount_read(&duart
->map_guard
) == 1) {
708 if (!request_mem_region(duart
->mapctrl
, DUART_CHANREG_SPACING
,
710 refcount_dec(&duart
->map_guard
);
716 ret
= sbd_map_port(uport
);
718 if (refcount_dec_and_test(&duart
->map_guard
))
719 release_mem_region(duart
->mapctrl
,
720 DUART_CHANREG_SPACING
);
724 release_mem_region(uport
->mapbase
, DUART_CHANREG_SPACING
);
730 static void sbd_config_port(struct uart_port
*uport
, int flags
)
732 struct sbd_port
*sport
= to_sport(uport
);
734 if (flags
& UART_CONFIG_TYPE
) {
735 if (sbd_request_port(uport
))
738 uport
->type
= PORT_SB1250_DUART
;
740 sbd_init_port(sport
);
744 static int sbd_verify_port(struct uart_port
*uport
, struct serial_struct
*ser
)
748 if (ser
->type
!= PORT_UNKNOWN
&& ser
->type
!= PORT_SB1250_DUART
)
750 if (ser
->irq
!= uport
->irq
)
752 if (ser
->baud_base
!= uport
->uartclk
/ 16)
758 static const struct uart_ops sbd_ops
= {
759 .tx_empty
= sbd_tx_empty
,
760 .set_mctrl
= sbd_set_mctrl
,
761 .get_mctrl
= sbd_get_mctrl
,
762 .stop_tx
= sbd_stop_tx
,
763 .start_tx
= sbd_start_tx
,
764 .stop_rx
= sbd_stop_rx
,
765 .enable_ms
= sbd_enable_ms
,
766 .break_ctl
= sbd_break_ctl
,
767 .startup
= sbd_startup
,
768 .shutdown
= sbd_shutdown
,
769 .set_termios
= sbd_set_termios
,
771 .release_port
= sbd_release_port
,
772 .request_port
= sbd_request_port
,
773 .config_port
= sbd_config_port
,
774 .verify_port
= sbd_verify_port
,
777 /* Initialize SB1250 DUART port structures. */
778 static void __init
sbd_probe_duarts(void)
787 /* Set the number of available units based on the SOC type. */
789 case K_SYS_SOC_TYPE_BCM1x55
:
790 case K_SYS_SOC_TYPE_BCM1x80
:
794 /* Assume at least two serial ports at the normal address. */
801 for (chip
= 0, line
= 0; chip
< DUART_MAX_CHIP
&& line
< max_lines
;
803 sbd_duarts
[chip
].mapctrl
= SBD_CTRLREGS(line
);
805 for (side
= 0; side
< DUART_MAX_SIDE
&& line
< max_lines
;
807 struct sbd_port
*sport
= &sbd_duarts
[chip
].sport
[side
];
808 struct uart_port
*uport
= &sport
->port
;
810 sport
->duart
= &sbd_duarts
[chip
];
812 uport
->irq
= SBD_INT(line
);
813 uport
->uartclk
= 100000000 / 20 * 16;
814 uport
->fifosize
= 16;
815 uport
->iotype
= UPIO_MEM
;
816 uport
->flags
= UPF_BOOT_AUTOCONF
;
817 uport
->ops
= &sbd_ops
;
819 uport
->mapbase
= SBD_CHANREGS(line
);
825 #ifdef CONFIG_SERIAL_SB1250_DUART_CONSOLE
827 * Serial console stuff. Very basic, polling driver for doing serial
828 * console output. The console_lock is held by the caller, so we
829 * shouldn't be interrupted for more console activity.
831 static void sbd_console_putchar(struct uart_port
*uport
, int ch
)
833 struct sbd_port
*sport
= to_sport(uport
);
835 sbd_transmit_drain(sport
);
836 write_sbdchn(sport
, R_DUART_TX_HOLD
, ch
);
839 static void sbd_console_write(struct console
*co
, const char *s
,
842 int chip
= co
->index
/ DUART_MAX_SIDE
;
843 int side
= co
->index
% DUART_MAX_SIDE
;
844 struct sbd_port
*sport
= &sbd_duarts
[chip
].sport
[side
];
845 struct uart_port
*uport
= &sport
->port
;
849 /* Disable transmit interrupts and enable the transmitter. */
850 spin_lock_irqsave(&uport
->lock
, flags
);
851 mask
= read_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2));
852 write_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2),
853 mask
& ~M_DUART_IMR_TX
);
854 write_sbdchn(sport
, R_DUART_CMD
, M_DUART_TX_EN
);
855 spin_unlock_irqrestore(&uport
->lock
, flags
);
857 uart_console_write(&sport
->port
, s
, count
, sbd_console_putchar
);
859 /* Restore transmit interrupts and the transmitter enable. */
860 spin_lock_irqsave(&uport
->lock
, flags
);
861 sbd_line_drain(sport
);
862 if (sport
->tx_stopped
)
863 write_sbdchn(sport
, R_DUART_CMD
, M_DUART_TX_DIS
);
864 write_sbdshr(sport
, R_DUART_IMRREG((uport
->line
) % 2), mask
);
865 spin_unlock_irqrestore(&uport
->lock
, flags
);
868 static int __init
sbd_console_setup(struct console
*co
, char *options
)
870 int chip
= co
->index
/ DUART_MAX_SIDE
;
871 int side
= co
->index
% DUART_MAX_SIDE
;
872 struct sbd_port
*sport
= &sbd_duarts
[chip
].sport
[side
];
873 struct uart_port
*uport
= &sport
->port
;
883 ret
= sbd_map_port(uport
);
887 sbd_init_port(sport
);
890 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
891 return uart_set_options(uport
, co
, baud
, parity
, bits
, flow
);
894 static struct uart_driver sbd_reg
;
895 static struct console sbd_console
= {
897 .write
= sbd_console_write
,
898 .device
= uart_console_device
,
899 .setup
= sbd_console_setup
,
900 .flags
= CON_PRINTBUFFER
,
905 static int __init
sbd_serial_console_init(void)
908 register_console(&sbd_console
);
913 console_initcall(sbd_serial_console_init
);
915 #define SERIAL_SB1250_DUART_CONSOLE &sbd_console
917 #define SERIAL_SB1250_DUART_CONSOLE NULL
918 #endif /* CONFIG_SERIAL_SB1250_DUART_CONSOLE */
921 static struct uart_driver sbd_reg
= {
922 .owner
= THIS_MODULE
,
923 .driver_name
= "sb1250_duart",
926 .minor
= SB1250_DUART_MINOR_BASE
,
927 .nr
= DUART_MAX_CHIP
* DUART_MAX_SIDE
,
928 .cons
= SERIAL_SB1250_DUART_CONSOLE
,
931 /* Set up the driver and register it. */
932 static int __init
sbd_init(void)
938 ret
= uart_register_driver(&sbd_reg
);
942 for (i
= 0; i
< DUART_MAX_CHIP
* DUART_MAX_SIDE
; i
++) {
943 struct sbd_duart
*duart
= &sbd_duarts
[i
/ DUART_MAX_SIDE
];
944 struct sbd_port
*sport
= &duart
->sport
[i
% DUART_MAX_SIDE
];
945 struct uart_port
*uport
= &sport
->port
;
948 uart_add_one_port(&sbd_reg
, uport
);
954 /* Unload the driver. Unregister stuff, get ready to go away. */
955 static void __exit
sbd_exit(void)
959 for (i
= DUART_MAX_CHIP
* DUART_MAX_SIDE
- 1; i
>= 0; i
--) {
960 struct sbd_duart
*duart
= &sbd_duarts
[i
/ DUART_MAX_SIDE
];
961 struct sbd_port
*sport
= &duart
->sport
[i
% DUART_MAX_SIDE
];
962 struct uart_port
*uport
= &sport
->port
;
965 uart_remove_one_port(&sbd_reg
, uport
);
968 uart_unregister_driver(&sbd_reg
);
971 module_init(sbd_init
);
972 module_exit(sbd_exit
);