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Merge tag 'trace-fixes-v3.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git...
[mirror_ubuntu-artful-kernel.git] / drivers / tty / serial / serial_txx9.c
1 /*
2 * Derived from many drivers using generic_serial interface,
3 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
4 * (was in Linux/VR tree) by Jim Pick.
5 *
6 * Copyright (C) 1999 Harald Koerfgen
7 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
8 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
9 * Copyright (C) 2000-2002 Toshiba Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
16 */
17
18 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
19 #define SUPPORT_SYSRQ
20 #endif
21
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/init.h>
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/platform_device.h>
28 #include <linux/pci.h>
29 #include <linux/serial_core.h>
30 #include <linux/serial.h>
31 #include <linux/tty.h>
32 #include <linux/tty_flip.h>
33
34 #include <asm/io.h>
35
36 static char *serial_version = "1.11";
37 static char *serial_name = "TX39/49 Serial driver";
38
39 #define PASS_LIMIT 256
40
41 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
42 /* "ttyS" is used for standard serial driver */
43 #define TXX9_TTY_NAME "ttyTX"
44 #define TXX9_TTY_MINOR_START 196
45 #define TXX9_TTY_MAJOR 204
46 #else
47 /* acts like standard serial driver */
48 #define TXX9_TTY_NAME "ttyS"
49 #define TXX9_TTY_MINOR_START 64
50 #define TXX9_TTY_MAJOR TTY_MAJOR
51 #endif
52
53 /* flag aliases */
54 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
55 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
56
57 #ifdef CONFIG_PCI
58 /* support for Toshiba TC86C001 SIO */
59 #define ENABLE_SERIAL_TXX9_PCI
60 #endif
61
62 /*
63 * Number of serial ports
64 */
65 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
66
67 struct uart_txx9_port {
68 struct uart_port port;
69 /* No additional info for now */
70 };
71
72 #define TXX9_REGION_SIZE 0x24
73
74 /* TXX9 Serial Registers */
75 #define TXX9_SILCR 0x00
76 #define TXX9_SIDICR 0x04
77 #define TXX9_SIDISR 0x08
78 #define TXX9_SICISR 0x0c
79 #define TXX9_SIFCR 0x10
80 #define TXX9_SIFLCR 0x14
81 #define TXX9_SIBGR 0x18
82 #define TXX9_SITFIFO 0x1c
83 #define TXX9_SIRFIFO 0x20
84
85 /* SILCR : Line Control */
86 #define TXX9_SILCR_SCS_MASK 0x00000060
87 #define TXX9_SILCR_SCS_IMCLK 0x00000000
88 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
89 #define TXX9_SILCR_SCS_SCLK 0x00000040
90 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
91 #define TXX9_SILCR_UEPS 0x00000010
92 #define TXX9_SILCR_UPEN 0x00000008
93 #define TXX9_SILCR_USBL_MASK 0x00000004
94 #define TXX9_SILCR_USBL_1BIT 0x00000000
95 #define TXX9_SILCR_USBL_2BIT 0x00000004
96 #define TXX9_SILCR_UMODE_MASK 0x00000003
97 #define TXX9_SILCR_UMODE_8BIT 0x00000000
98 #define TXX9_SILCR_UMODE_7BIT 0x00000001
99
100 /* SIDICR : DMA/Int. Control */
101 #define TXX9_SIDICR_TDE 0x00008000
102 #define TXX9_SIDICR_RDE 0x00004000
103 #define TXX9_SIDICR_TIE 0x00002000
104 #define TXX9_SIDICR_RIE 0x00001000
105 #define TXX9_SIDICR_SPIE 0x00000800
106 #define TXX9_SIDICR_CTSAC 0x00000600
107 #define TXX9_SIDICR_STIE_MASK 0x0000003f
108 #define TXX9_SIDICR_STIE_OERS 0x00000020
109 #define TXX9_SIDICR_STIE_CTSS 0x00000010
110 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
111 #define TXX9_SIDICR_STIE_TRDY 0x00000004
112 #define TXX9_SIDICR_STIE_TXALS 0x00000002
113 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
114
115 /* SIDISR : DMA/Int. Status */
116 #define TXX9_SIDISR_UBRK 0x00008000
117 #define TXX9_SIDISR_UVALID 0x00004000
118 #define TXX9_SIDISR_UFER 0x00002000
119 #define TXX9_SIDISR_UPER 0x00001000
120 #define TXX9_SIDISR_UOER 0x00000800
121 #define TXX9_SIDISR_ERI 0x00000400
122 #define TXX9_SIDISR_TOUT 0x00000200
123 #define TXX9_SIDISR_TDIS 0x00000100
124 #define TXX9_SIDISR_RDIS 0x00000080
125 #define TXX9_SIDISR_STIS 0x00000040
126 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
127
128 /* SICISR : Change Int. Status */
129 #define TXX9_SICISR_OERS 0x00000020
130 #define TXX9_SICISR_CTSS 0x00000010
131 #define TXX9_SICISR_RBRKD 0x00000008
132 #define TXX9_SICISR_TRDY 0x00000004
133 #define TXX9_SICISR_TXALS 0x00000002
134 #define TXX9_SICISR_UBRKD 0x00000001
135
136 /* SIFCR : FIFO Control */
137 #define TXX9_SIFCR_SWRST 0x00008000
138 #define TXX9_SIFCR_RDIL_MASK 0x00000180
139 #define TXX9_SIFCR_RDIL_1 0x00000000
140 #define TXX9_SIFCR_RDIL_4 0x00000080
141 #define TXX9_SIFCR_RDIL_8 0x00000100
142 #define TXX9_SIFCR_RDIL_12 0x00000180
143 #define TXX9_SIFCR_RDIL_MAX 0x00000180
144 #define TXX9_SIFCR_TDIL_MASK 0x00000018
145 #define TXX9_SIFCR_TDIL_MASK 0x00000018
146 #define TXX9_SIFCR_TDIL_1 0x00000000
147 #define TXX9_SIFCR_TDIL_4 0x00000001
148 #define TXX9_SIFCR_TDIL_8 0x00000010
149 #define TXX9_SIFCR_TDIL_MAX 0x00000010
150 #define TXX9_SIFCR_TFRST 0x00000004
151 #define TXX9_SIFCR_RFRST 0x00000002
152 #define TXX9_SIFCR_FRSTE 0x00000001
153 #define TXX9_SIO_TX_FIFO 8
154 #define TXX9_SIO_RX_FIFO 16
155
156 /* SIFLCR : Flow Control */
157 #define TXX9_SIFLCR_RCS 0x00001000
158 #define TXX9_SIFLCR_TES 0x00000800
159 #define TXX9_SIFLCR_RTSSC 0x00000200
160 #define TXX9_SIFLCR_RSDE 0x00000100
161 #define TXX9_SIFLCR_TSDE 0x00000080
162 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
163 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
164 #define TXX9_SIFLCR_TBRK 0x00000001
165
166 /* SIBGR : Baudrate Control */
167 #define TXX9_SIBGR_BCLK_MASK 0x00000300
168 #define TXX9_SIBGR_BCLK_T0 0x00000000
169 #define TXX9_SIBGR_BCLK_T2 0x00000100
170 #define TXX9_SIBGR_BCLK_T4 0x00000200
171 #define TXX9_SIBGR_BCLK_T6 0x00000300
172 #define TXX9_SIBGR_BRD_MASK 0x000000ff
173
174 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
175 {
176 switch (up->port.iotype) {
177 default:
178 return __raw_readl(up->port.membase + offset);
179 case UPIO_PORT:
180 return inl(up->port.iobase + offset);
181 }
182 }
183
184 static inline void
185 sio_out(struct uart_txx9_port *up, int offset, int value)
186 {
187 switch (up->port.iotype) {
188 default:
189 __raw_writel(value, up->port.membase + offset);
190 break;
191 case UPIO_PORT:
192 outl(value, up->port.iobase + offset);
193 break;
194 }
195 }
196
197 static inline void
198 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
199 {
200 sio_out(up, offset, sio_in(up, offset) & ~value);
201 }
202 static inline void
203 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
204 {
205 sio_out(up, offset, sio_in(up, offset) | value);
206 }
207
208 static inline void
209 sio_quot_set(struct uart_txx9_port *up, int quot)
210 {
211 quot >>= 1;
212 if (quot < 256)
213 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
214 else if (quot < (256 << 2))
215 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
216 else if (quot < (256 << 4))
217 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
218 else if (quot < (256 << 6))
219 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
220 else
221 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
222 }
223
224 static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
225 {
226 return container_of(port, struct uart_txx9_port, port);
227 }
228
229 static void serial_txx9_stop_tx(struct uart_port *port)
230 {
231 struct uart_txx9_port *up = to_uart_txx9_port(port);
232 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
233 }
234
235 static void serial_txx9_start_tx(struct uart_port *port)
236 {
237 struct uart_txx9_port *up = to_uart_txx9_port(port);
238 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
239 }
240
241 static void serial_txx9_stop_rx(struct uart_port *port)
242 {
243 struct uart_txx9_port *up = to_uart_txx9_port(port);
244 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
245 }
246
247 static void serial_txx9_enable_ms(struct uart_port *port)
248 {
249 /* TXX9-SIO can not control DTR... */
250 }
251
252 static void serial_txx9_initialize(struct uart_port *port)
253 {
254 struct uart_txx9_port *up = to_uart_txx9_port(port);
255 unsigned int tmout = 10000;
256
257 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
258 /* TX4925 BUG WORKAROUND. Accessing SIOC register
259 * immediately after soft reset causes bus error. */
260 mmiowb();
261 udelay(1);
262 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
263 udelay(1);
264 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
265 sio_set(up, TXX9_SIFCR,
266 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
267 /* initial settings */
268 sio_out(up, TXX9_SILCR,
269 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
270 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
271 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
272 sio_quot_set(up, uart_get_divisor(port, 9600));
273 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
274 sio_out(up, TXX9_SIDICR, 0);
275 }
276
277 static inline void
278 receive_chars(struct uart_txx9_port *up, unsigned int *status)
279 {
280 unsigned char ch;
281 unsigned int disr = *status;
282 int max_count = 256;
283 char flag;
284 unsigned int next_ignore_status_mask;
285
286 do {
287 ch = sio_in(up, TXX9_SIRFIFO);
288 flag = TTY_NORMAL;
289 up->port.icount.rx++;
290
291 /* mask out RFDN_MASK bit added by previous overrun */
292 next_ignore_status_mask =
293 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
294 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
295 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
296 /*
297 * For statistics only
298 */
299 if (disr & TXX9_SIDISR_UBRK) {
300 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
301 up->port.icount.brk++;
302 /*
303 * We do the SysRQ and SAK checking
304 * here because otherwise the break
305 * may get masked by ignore_status_mask
306 * or read_status_mask.
307 */
308 if (uart_handle_break(&up->port))
309 goto ignore_char;
310 } else if (disr & TXX9_SIDISR_UPER)
311 up->port.icount.parity++;
312 else if (disr & TXX9_SIDISR_UFER)
313 up->port.icount.frame++;
314 if (disr & TXX9_SIDISR_UOER) {
315 up->port.icount.overrun++;
316 /*
317 * The receiver read buffer still hold
318 * a char which caused overrun.
319 * Ignore next char by adding RFDN_MASK
320 * to ignore_status_mask temporarily.
321 */
322 next_ignore_status_mask |=
323 TXX9_SIDISR_RFDN_MASK;
324 }
325
326 /*
327 * Mask off conditions which should be ingored.
328 */
329 disr &= up->port.read_status_mask;
330
331 if (disr & TXX9_SIDISR_UBRK) {
332 flag = TTY_BREAK;
333 } else if (disr & TXX9_SIDISR_UPER)
334 flag = TTY_PARITY;
335 else if (disr & TXX9_SIDISR_UFER)
336 flag = TTY_FRAME;
337 }
338 if (uart_handle_sysrq_char(&up->port, ch))
339 goto ignore_char;
340
341 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
342
343 ignore_char:
344 up->port.ignore_status_mask = next_ignore_status_mask;
345 disr = sio_in(up, TXX9_SIDISR);
346 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
347 spin_unlock(&up->port.lock);
348 tty_flip_buffer_push(&up->port.state->port);
349 spin_lock(&up->port.lock);
350 *status = disr;
351 }
352
353 static inline void transmit_chars(struct uart_txx9_port *up)
354 {
355 struct circ_buf *xmit = &up->port.state->xmit;
356 int count;
357
358 if (up->port.x_char) {
359 sio_out(up, TXX9_SITFIFO, up->port.x_char);
360 up->port.icount.tx++;
361 up->port.x_char = 0;
362 return;
363 }
364 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
365 serial_txx9_stop_tx(&up->port);
366 return;
367 }
368
369 count = TXX9_SIO_TX_FIFO;
370 do {
371 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
372 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
373 up->port.icount.tx++;
374 if (uart_circ_empty(xmit))
375 break;
376 } while (--count > 0);
377
378 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
379 uart_write_wakeup(&up->port);
380
381 if (uart_circ_empty(xmit))
382 serial_txx9_stop_tx(&up->port);
383 }
384
385 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
386 {
387 int pass_counter = 0;
388 struct uart_txx9_port *up = dev_id;
389 unsigned int status;
390
391 while (1) {
392 spin_lock(&up->port.lock);
393 status = sio_in(up, TXX9_SIDISR);
394 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
395 status &= ~TXX9_SIDISR_TDIS;
396 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
397 TXX9_SIDISR_TOUT))) {
398 spin_unlock(&up->port.lock);
399 break;
400 }
401
402 if (status & TXX9_SIDISR_RDIS)
403 receive_chars(up, &status);
404 if (status & TXX9_SIDISR_TDIS)
405 transmit_chars(up);
406 /* Clear TX/RX Int. Status */
407 sio_mask(up, TXX9_SIDISR,
408 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
409 TXX9_SIDISR_TOUT);
410 spin_unlock(&up->port.lock);
411
412 if (pass_counter++ > PASS_LIMIT)
413 break;
414 }
415
416 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
417 }
418
419 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
420 {
421 struct uart_txx9_port *up = to_uart_txx9_port(port);
422 unsigned long flags;
423 unsigned int ret;
424
425 spin_lock_irqsave(&up->port.lock, flags);
426 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
427 spin_unlock_irqrestore(&up->port.lock, flags);
428
429 return ret;
430 }
431
432 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
433 {
434 struct uart_txx9_port *up = to_uart_txx9_port(port);
435 unsigned int ret;
436
437 /* no modem control lines */
438 ret = TIOCM_CAR | TIOCM_DSR;
439 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
440 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
441
442 return ret;
443 }
444
445 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
446 {
447 struct uart_txx9_port *up = to_uart_txx9_port(port);
448
449 if (mctrl & TIOCM_RTS)
450 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
451 else
452 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
453 }
454
455 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
456 {
457 struct uart_txx9_port *up = to_uart_txx9_port(port);
458 unsigned long flags;
459
460 spin_lock_irqsave(&up->port.lock, flags);
461 if (break_state == -1)
462 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
463 else
464 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
465 spin_unlock_irqrestore(&up->port.lock, flags);
466 }
467
468 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
469 /*
470 * Wait for transmitter & holding register to empty
471 */
472 static void wait_for_xmitr(struct uart_txx9_port *up)
473 {
474 unsigned int tmout = 10000;
475
476 /* Wait up to 10ms for the character(s) to be sent. */
477 while (--tmout &&
478 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
479 udelay(1);
480
481 /* Wait up to 1s for flow control if necessary */
482 if (up->port.flags & UPF_CONS_FLOW) {
483 tmout = 1000000;
484 while (--tmout &&
485 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
486 udelay(1);
487 }
488 }
489 #endif
490
491 #ifdef CONFIG_CONSOLE_POLL
492 /*
493 * Console polling routines for writing and reading from the uart while
494 * in an interrupt or debug context.
495 */
496
497 static int serial_txx9_get_poll_char(struct uart_port *port)
498 {
499 unsigned int ier;
500 unsigned char c;
501 struct uart_txx9_port *up = to_uart_txx9_port(port);
502
503 /*
504 * First save the IER then disable the interrupts
505 */
506 ier = sio_in(up, TXX9_SIDICR);
507 sio_out(up, TXX9_SIDICR, 0);
508
509 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
510 ;
511
512 c = sio_in(up, TXX9_SIRFIFO);
513
514 /*
515 * Finally, clear RX interrupt status
516 * and restore the IER
517 */
518 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
519 sio_out(up, TXX9_SIDICR, ier);
520 return c;
521 }
522
523
524 static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
525 {
526 unsigned int ier;
527 struct uart_txx9_port *up = to_uart_txx9_port(port);
528
529 /*
530 * First save the IER then disable the interrupts
531 */
532 ier = sio_in(up, TXX9_SIDICR);
533 sio_out(up, TXX9_SIDICR, 0);
534
535 wait_for_xmitr(up);
536 /*
537 * Send the character out.
538 */
539 sio_out(up, TXX9_SITFIFO, c);
540
541 /*
542 * Finally, wait for transmitter to become empty
543 * and restore the IER
544 */
545 wait_for_xmitr(up);
546 sio_out(up, TXX9_SIDICR, ier);
547 }
548
549 #endif /* CONFIG_CONSOLE_POLL */
550
551 static int serial_txx9_startup(struct uart_port *port)
552 {
553 struct uart_txx9_port *up = to_uart_txx9_port(port);
554 unsigned long flags;
555 int retval;
556
557 /*
558 * Clear the FIFO buffers and disable them.
559 * (they will be reenabled in set_termios())
560 */
561 sio_set(up, TXX9_SIFCR,
562 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
563 /* clear reset */
564 sio_mask(up, TXX9_SIFCR,
565 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
566 sio_out(up, TXX9_SIDICR, 0);
567
568 /*
569 * Clear the interrupt registers.
570 */
571 sio_out(up, TXX9_SIDISR, 0);
572
573 retval = request_irq(up->port.irq, serial_txx9_interrupt,
574 IRQF_SHARED, "serial_txx9", up);
575 if (retval)
576 return retval;
577
578 /*
579 * Now, initialize the UART
580 */
581 spin_lock_irqsave(&up->port.lock, flags);
582 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
583 spin_unlock_irqrestore(&up->port.lock, flags);
584
585 /* Enable RX/TX */
586 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
587
588 /*
589 * Finally, enable interrupts.
590 */
591 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
592
593 return 0;
594 }
595
596 static void serial_txx9_shutdown(struct uart_port *port)
597 {
598 struct uart_txx9_port *up = to_uart_txx9_port(port);
599 unsigned long flags;
600
601 /*
602 * Disable interrupts from this port
603 */
604 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
605
606 spin_lock_irqsave(&up->port.lock, flags);
607 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
608 spin_unlock_irqrestore(&up->port.lock, flags);
609
610 /*
611 * Disable break condition
612 */
613 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
614
615 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
616 if (up->port.cons && up->port.line == up->port.cons->index) {
617 free_irq(up->port.irq, up);
618 return;
619 }
620 #endif
621 /* reset FIFOs */
622 sio_set(up, TXX9_SIFCR,
623 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
624 /* clear reset */
625 sio_mask(up, TXX9_SIFCR,
626 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
627
628 /* Disable RX/TX */
629 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
630
631 free_irq(up->port.irq, up);
632 }
633
634 static void
635 serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
636 struct ktermios *old)
637 {
638 struct uart_txx9_port *up = to_uart_txx9_port(port);
639 unsigned int cval, fcr = 0;
640 unsigned long flags;
641 unsigned int baud, quot;
642
643 /*
644 * We don't support modem control lines.
645 */
646 termios->c_cflag &= ~(HUPCL | CMSPAR);
647 termios->c_cflag |= CLOCAL;
648
649 cval = sio_in(up, TXX9_SILCR);
650 /* byte size and parity */
651 cval &= ~TXX9_SILCR_UMODE_MASK;
652 switch (termios->c_cflag & CSIZE) {
653 case CS7:
654 cval |= TXX9_SILCR_UMODE_7BIT;
655 break;
656 default:
657 case CS5: /* not supported */
658 case CS6: /* not supported */
659 case CS8:
660 cval |= TXX9_SILCR_UMODE_8BIT;
661 break;
662 }
663
664 cval &= ~TXX9_SILCR_USBL_MASK;
665 if (termios->c_cflag & CSTOPB)
666 cval |= TXX9_SILCR_USBL_2BIT;
667 else
668 cval |= TXX9_SILCR_USBL_1BIT;
669 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
670 if (termios->c_cflag & PARENB)
671 cval |= TXX9_SILCR_UPEN;
672 if (!(termios->c_cflag & PARODD))
673 cval |= TXX9_SILCR_UEPS;
674
675 /*
676 * Ask the core to calculate the divisor for us.
677 */
678 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
679 quot = uart_get_divisor(port, baud);
680
681 /* Set up FIFOs */
682 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
683 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
684
685 /*
686 * Ok, we're now changing the port state. Do it with
687 * interrupts disabled.
688 */
689 spin_lock_irqsave(&up->port.lock, flags);
690
691 /*
692 * Update the per-port timeout.
693 */
694 uart_update_timeout(port, termios->c_cflag, baud);
695
696 up->port.read_status_mask = TXX9_SIDISR_UOER |
697 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
698 if (termios->c_iflag & INPCK)
699 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
700 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
701 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
702
703 /*
704 * Characteres to ignore
705 */
706 up->port.ignore_status_mask = 0;
707 if (termios->c_iflag & IGNPAR)
708 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
709 if (termios->c_iflag & IGNBRK) {
710 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
711 /*
712 * If we're ignoring parity and break indicators,
713 * ignore overruns too (for real raw support).
714 */
715 if (termios->c_iflag & IGNPAR)
716 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
717 }
718
719 /*
720 * ignore all characters if CREAD is not set
721 */
722 if ((termios->c_cflag & CREAD) == 0)
723 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
724
725 /* CTS flow control flag */
726 if ((termios->c_cflag & CRTSCTS) &&
727 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
728 sio_set(up, TXX9_SIFLCR,
729 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
730 } else {
731 sio_mask(up, TXX9_SIFLCR,
732 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
733 }
734
735 sio_out(up, TXX9_SILCR, cval);
736 sio_quot_set(up, quot);
737 sio_out(up, TXX9_SIFCR, fcr);
738
739 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
740 spin_unlock_irqrestore(&up->port.lock, flags);
741 }
742
743 static void
744 serial_txx9_pm(struct uart_port *port, unsigned int state,
745 unsigned int oldstate)
746 {
747 /*
748 * If oldstate was -1 this is called from
749 * uart_configure_port(). In this case do not initialize the
750 * port now, because the port was already initialized (for
751 * non-console port) or should not be initialized here (for
752 * console port). If we initialized the port here we lose
753 * serial console settings.
754 */
755 if (state == 0 && oldstate != -1)
756 serial_txx9_initialize(port);
757 }
758
759 static int serial_txx9_request_resource(struct uart_txx9_port *up)
760 {
761 unsigned int size = TXX9_REGION_SIZE;
762 int ret = 0;
763
764 switch (up->port.iotype) {
765 default:
766 if (!up->port.mapbase)
767 break;
768
769 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
770 ret = -EBUSY;
771 break;
772 }
773
774 if (up->port.flags & UPF_IOREMAP) {
775 up->port.membase = ioremap(up->port.mapbase, size);
776 if (!up->port.membase) {
777 release_mem_region(up->port.mapbase, size);
778 ret = -ENOMEM;
779 }
780 }
781 break;
782
783 case UPIO_PORT:
784 if (!request_region(up->port.iobase, size, "serial_txx9"))
785 ret = -EBUSY;
786 break;
787 }
788 return ret;
789 }
790
791 static void serial_txx9_release_resource(struct uart_txx9_port *up)
792 {
793 unsigned int size = TXX9_REGION_SIZE;
794
795 switch (up->port.iotype) {
796 default:
797 if (!up->port.mapbase)
798 break;
799
800 if (up->port.flags & UPF_IOREMAP) {
801 iounmap(up->port.membase);
802 up->port.membase = NULL;
803 }
804
805 release_mem_region(up->port.mapbase, size);
806 break;
807
808 case UPIO_PORT:
809 release_region(up->port.iobase, size);
810 break;
811 }
812 }
813
814 static void serial_txx9_release_port(struct uart_port *port)
815 {
816 struct uart_txx9_port *up = to_uart_txx9_port(port);
817 serial_txx9_release_resource(up);
818 }
819
820 static int serial_txx9_request_port(struct uart_port *port)
821 {
822 struct uart_txx9_port *up = to_uart_txx9_port(port);
823 return serial_txx9_request_resource(up);
824 }
825
826 static void serial_txx9_config_port(struct uart_port *port, int uflags)
827 {
828 struct uart_txx9_port *up = to_uart_txx9_port(port);
829 int ret;
830
831 /*
832 * Find the region that we can probe for. This in turn
833 * tells us whether we can probe for the type of port.
834 */
835 ret = serial_txx9_request_resource(up);
836 if (ret < 0)
837 return;
838 port->type = PORT_TXX9;
839 up->port.fifosize = TXX9_SIO_TX_FIFO;
840
841 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
842 if (up->port.line == up->port.cons->index)
843 return;
844 #endif
845 serial_txx9_initialize(port);
846 }
847
848 static const char *
849 serial_txx9_type(struct uart_port *port)
850 {
851 return "txx9";
852 }
853
854 static struct uart_ops serial_txx9_pops = {
855 .tx_empty = serial_txx9_tx_empty,
856 .set_mctrl = serial_txx9_set_mctrl,
857 .get_mctrl = serial_txx9_get_mctrl,
858 .stop_tx = serial_txx9_stop_tx,
859 .start_tx = serial_txx9_start_tx,
860 .stop_rx = serial_txx9_stop_rx,
861 .enable_ms = serial_txx9_enable_ms,
862 .break_ctl = serial_txx9_break_ctl,
863 .startup = serial_txx9_startup,
864 .shutdown = serial_txx9_shutdown,
865 .set_termios = serial_txx9_set_termios,
866 .pm = serial_txx9_pm,
867 .type = serial_txx9_type,
868 .release_port = serial_txx9_release_port,
869 .request_port = serial_txx9_request_port,
870 .config_port = serial_txx9_config_port,
871 #ifdef CONFIG_CONSOLE_POLL
872 .poll_get_char = serial_txx9_get_poll_char,
873 .poll_put_char = serial_txx9_put_poll_char,
874 #endif
875 };
876
877 static struct uart_txx9_port serial_txx9_ports[UART_NR];
878
879 static void __init serial_txx9_register_ports(struct uart_driver *drv,
880 struct device *dev)
881 {
882 int i;
883
884 for (i = 0; i < UART_NR; i++) {
885 struct uart_txx9_port *up = &serial_txx9_ports[i];
886
887 up->port.line = i;
888 up->port.ops = &serial_txx9_pops;
889 up->port.dev = dev;
890 if (up->port.iobase || up->port.mapbase)
891 uart_add_one_port(drv, &up->port);
892 }
893 }
894
895 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
896
897 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
898 {
899 struct uart_txx9_port *up = to_uart_txx9_port(port);
900
901 wait_for_xmitr(up);
902 sio_out(up, TXX9_SITFIFO, ch);
903 }
904
905 /*
906 * Print a string to the serial port trying not to disturb
907 * any possible real use of the port...
908 *
909 * The console_lock must be held when we get here.
910 */
911 static void
912 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
913 {
914 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
915 unsigned int ier, flcr;
916
917 /*
918 * First save the UER then disable the interrupts
919 */
920 ier = sio_in(up, TXX9_SIDICR);
921 sio_out(up, TXX9_SIDICR, 0);
922 /*
923 * Disable flow-control if enabled (and unnecessary)
924 */
925 flcr = sio_in(up, TXX9_SIFLCR);
926 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
927 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
928
929 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
930
931 /*
932 * Finally, wait for transmitter to become empty
933 * and restore the IER
934 */
935 wait_for_xmitr(up);
936 sio_out(up, TXX9_SIFLCR, flcr);
937 sio_out(up, TXX9_SIDICR, ier);
938 }
939
940 static int __init serial_txx9_console_setup(struct console *co, char *options)
941 {
942 struct uart_port *port;
943 struct uart_txx9_port *up;
944 int baud = 9600;
945 int bits = 8;
946 int parity = 'n';
947 int flow = 'n';
948
949 /*
950 * Check whether an invalid uart number has been specified, and
951 * if so, search for the first available port that does have
952 * console support.
953 */
954 if (co->index >= UART_NR)
955 co->index = 0;
956 up = &serial_txx9_ports[co->index];
957 port = &up->port;
958 if (!port->ops)
959 return -ENODEV;
960
961 serial_txx9_initialize(&up->port);
962
963 if (options)
964 uart_parse_options(options, &baud, &parity, &bits, &flow);
965
966 return uart_set_options(port, co, baud, parity, bits, flow);
967 }
968
969 static struct uart_driver serial_txx9_reg;
970 static struct console serial_txx9_console = {
971 .name = TXX9_TTY_NAME,
972 .write = serial_txx9_console_write,
973 .device = uart_console_device,
974 .setup = serial_txx9_console_setup,
975 .flags = CON_PRINTBUFFER,
976 .index = -1,
977 .data = &serial_txx9_reg,
978 };
979
980 static int __init serial_txx9_console_init(void)
981 {
982 register_console(&serial_txx9_console);
983 return 0;
984 }
985 console_initcall(serial_txx9_console_init);
986
987 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
988 #else
989 #define SERIAL_TXX9_CONSOLE NULL
990 #endif
991
992 static struct uart_driver serial_txx9_reg = {
993 .owner = THIS_MODULE,
994 .driver_name = "serial_txx9",
995 .dev_name = TXX9_TTY_NAME,
996 .major = TXX9_TTY_MAJOR,
997 .minor = TXX9_TTY_MINOR_START,
998 .nr = UART_NR,
999 .cons = SERIAL_TXX9_CONSOLE,
1000 };
1001
1002 int __init early_serial_txx9_setup(struct uart_port *port)
1003 {
1004 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
1005 return -ENODEV;
1006
1007 serial_txx9_ports[port->line].port = *port;
1008 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
1009 serial_txx9_ports[port->line].port.flags |=
1010 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1011 return 0;
1012 }
1013
1014 static DEFINE_MUTEX(serial_txx9_mutex);
1015
1016 /**
1017 * serial_txx9_register_port - register a serial port
1018 * @port: serial port template
1019 *
1020 * Configure the serial port specified by the request.
1021 *
1022 * The port is then probed and if necessary the IRQ is autodetected
1023 * If this fails an error is returned.
1024 *
1025 * On success the port is ready to use and the line number is returned.
1026 */
1027 static int serial_txx9_register_port(struct uart_port *port)
1028 {
1029 int i;
1030 struct uart_txx9_port *uart;
1031 int ret = -ENOSPC;
1032
1033 mutex_lock(&serial_txx9_mutex);
1034 for (i = 0; i < UART_NR; i++) {
1035 uart = &serial_txx9_ports[i];
1036 if (uart_match_port(&uart->port, port)) {
1037 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1038 break;
1039 }
1040 }
1041 if (i == UART_NR) {
1042 /* Find unused port */
1043 for (i = 0; i < UART_NR; i++) {
1044 uart = &serial_txx9_ports[i];
1045 if (!(uart->port.iobase || uart->port.mapbase))
1046 break;
1047 }
1048 }
1049 if (i < UART_NR) {
1050 uart->port.iobase = port->iobase;
1051 uart->port.membase = port->membase;
1052 uart->port.irq = port->irq;
1053 uart->port.uartclk = port->uartclk;
1054 uart->port.iotype = port->iotype;
1055 uart->port.flags = port->flags
1056 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1057 uart->port.mapbase = port->mapbase;
1058 if (port->dev)
1059 uart->port.dev = port->dev;
1060 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1061 if (ret == 0)
1062 ret = uart->port.line;
1063 }
1064 mutex_unlock(&serial_txx9_mutex);
1065 return ret;
1066 }
1067
1068 /**
1069 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1070 * @line: serial line number
1071 *
1072 * Remove one serial port. This may not be called from interrupt
1073 * context. We hand the port back to the our control.
1074 */
1075 static void serial_txx9_unregister_port(int line)
1076 {
1077 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1078
1079 mutex_lock(&serial_txx9_mutex);
1080 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1081 uart->port.flags = 0;
1082 uart->port.type = PORT_UNKNOWN;
1083 uart->port.iobase = 0;
1084 uart->port.mapbase = 0;
1085 uart->port.membase = NULL;
1086 uart->port.dev = NULL;
1087 mutex_unlock(&serial_txx9_mutex);
1088 }
1089
1090 /*
1091 * Register a set of serial devices attached to a platform device.
1092 */
1093 static int serial_txx9_probe(struct platform_device *dev)
1094 {
1095 struct uart_port *p = dev_get_platdata(&dev->dev);
1096 struct uart_port port;
1097 int ret, i;
1098
1099 memset(&port, 0, sizeof(struct uart_port));
1100 for (i = 0; p && p->uartclk != 0; p++, i++) {
1101 port.iobase = p->iobase;
1102 port.membase = p->membase;
1103 port.irq = p->irq;
1104 port.uartclk = p->uartclk;
1105 port.iotype = p->iotype;
1106 port.flags = p->flags;
1107 port.mapbase = p->mapbase;
1108 port.dev = &dev->dev;
1109 ret = serial_txx9_register_port(&port);
1110 if (ret < 0) {
1111 dev_err(&dev->dev, "unable to register port at index %d "
1112 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1113 p->iobase, (unsigned long long)p->mapbase,
1114 p->irq, ret);
1115 }
1116 }
1117 return 0;
1118 }
1119
1120 /*
1121 * Remove serial ports registered against a platform device.
1122 */
1123 static int serial_txx9_remove(struct platform_device *dev)
1124 {
1125 int i;
1126
1127 for (i = 0; i < UART_NR; i++) {
1128 struct uart_txx9_port *up = &serial_txx9_ports[i];
1129
1130 if (up->port.dev == &dev->dev)
1131 serial_txx9_unregister_port(i);
1132 }
1133 return 0;
1134 }
1135
1136 #ifdef CONFIG_PM
1137 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1138 {
1139 int i;
1140
1141 for (i = 0; i < UART_NR; i++) {
1142 struct uart_txx9_port *up = &serial_txx9_ports[i];
1143
1144 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1145 uart_suspend_port(&serial_txx9_reg, &up->port);
1146 }
1147
1148 return 0;
1149 }
1150
1151 static int serial_txx9_resume(struct platform_device *dev)
1152 {
1153 int i;
1154
1155 for (i = 0; i < UART_NR; i++) {
1156 struct uart_txx9_port *up = &serial_txx9_ports[i];
1157
1158 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1159 uart_resume_port(&serial_txx9_reg, &up->port);
1160 }
1161
1162 return 0;
1163 }
1164 #endif
1165
1166 static struct platform_driver serial_txx9_plat_driver = {
1167 .probe = serial_txx9_probe,
1168 .remove = serial_txx9_remove,
1169 #ifdef CONFIG_PM
1170 .suspend = serial_txx9_suspend,
1171 .resume = serial_txx9_resume,
1172 #endif
1173 .driver = {
1174 .name = "serial_txx9",
1175 .owner = THIS_MODULE,
1176 },
1177 };
1178
1179 #ifdef ENABLE_SERIAL_TXX9_PCI
1180 /*
1181 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1182 * to the arrangement of serial ports on a PCI card.
1183 */
1184 static int
1185 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1186 {
1187 struct uart_port port;
1188 int line;
1189 int rc;
1190
1191 rc = pci_enable_device(dev);
1192 if (rc)
1193 return rc;
1194
1195 memset(&port, 0, sizeof(port));
1196 port.ops = &serial_txx9_pops;
1197 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1198 port.uartclk = 66670000;
1199 port.irq = dev->irq;
1200 port.iotype = UPIO_PORT;
1201 port.iobase = pci_resource_start(dev, 1);
1202 port.dev = &dev->dev;
1203 line = serial_txx9_register_port(&port);
1204 if (line < 0) {
1205 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1206 pci_disable_device(dev);
1207 return line;
1208 }
1209 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1210
1211 return 0;
1212 }
1213
1214 static void pciserial_txx9_remove_one(struct pci_dev *dev)
1215 {
1216 struct uart_txx9_port *up = pci_get_drvdata(dev);
1217
1218 if (up) {
1219 serial_txx9_unregister_port(up->port.line);
1220 pci_disable_device(dev);
1221 }
1222 }
1223
1224 #ifdef CONFIG_PM
1225 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1226 {
1227 struct uart_txx9_port *up = pci_get_drvdata(dev);
1228
1229 if (up)
1230 uart_suspend_port(&serial_txx9_reg, &up->port);
1231 pci_save_state(dev);
1232 pci_set_power_state(dev, pci_choose_state(dev, state));
1233 return 0;
1234 }
1235
1236 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1237 {
1238 struct uart_txx9_port *up = pci_get_drvdata(dev);
1239
1240 pci_set_power_state(dev, PCI_D0);
1241 pci_restore_state(dev);
1242 if (up)
1243 uart_resume_port(&serial_txx9_reg, &up->port);
1244 return 0;
1245 }
1246 #endif
1247
1248 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1249 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1250 { 0, }
1251 };
1252
1253 static struct pci_driver serial_txx9_pci_driver = {
1254 .name = "serial_txx9",
1255 .probe = pciserial_txx9_init_one,
1256 .remove = pciserial_txx9_remove_one,
1257 #ifdef CONFIG_PM
1258 .suspend = pciserial_txx9_suspend_one,
1259 .resume = pciserial_txx9_resume_one,
1260 #endif
1261 .id_table = serial_txx9_pci_tbl,
1262 };
1263
1264 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1265 #endif /* ENABLE_SERIAL_TXX9_PCI */
1266
1267 static struct platform_device *serial_txx9_plat_devs;
1268
1269 static int __init serial_txx9_init(void)
1270 {
1271 int ret;
1272
1273 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1274
1275 ret = uart_register_driver(&serial_txx9_reg);
1276 if (ret)
1277 goto out;
1278
1279 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1280 if (!serial_txx9_plat_devs) {
1281 ret = -ENOMEM;
1282 goto unreg_uart_drv;
1283 }
1284
1285 ret = platform_device_add(serial_txx9_plat_devs);
1286 if (ret)
1287 goto put_dev;
1288
1289 serial_txx9_register_ports(&serial_txx9_reg,
1290 &serial_txx9_plat_devs->dev);
1291
1292 ret = platform_driver_register(&serial_txx9_plat_driver);
1293 if (ret)
1294 goto del_dev;
1295
1296 #ifdef ENABLE_SERIAL_TXX9_PCI
1297 ret = pci_register_driver(&serial_txx9_pci_driver);
1298 #endif
1299 if (ret == 0)
1300 goto out;
1301
1302 del_dev:
1303 platform_device_del(serial_txx9_plat_devs);
1304 put_dev:
1305 platform_device_put(serial_txx9_plat_devs);
1306 unreg_uart_drv:
1307 uart_unregister_driver(&serial_txx9_reg);
1308 out:
1309 return ret;
1310 }
1311
1312 static void __exit serial_txx9_exit(void)
1313 {
1314 int i;
1315
1316 #ifdef ENABLE_SERIAL_TXX9_PCI
1317 pci_unregister_driver(&serial_txx9_pci_driver);
1318 #endif
1319 platform_driver_unregister(&serial_txx9_plat_driver);
1320 platform_device_unregister(serial_txx9_plat_devs);
1321 for (i = 0; i < UART_NR; i++) {
1322 struct uart_txx9_port *up = &serial_txx9_ports[i];
1323 if (up->port.iobase || up->port.mapbase)
1324 uart_remove_one_port(&serial_txx9_reg, &up->port);
1325 }
1326
1327 uart_unregister_driver(&serial_txx9_reg);
1328 }
1329
1330 module_init(serial_txx9_init);
1331 module_exit(serial_txx9_exit);
1332
1333 MODULE_LICENSE("GPL");
1334 MODULE_DESCRIPTION("TX39/49 serial driver");
1335
1336 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
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