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1 /*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/dmapool.h>
16 #include <linux/err.h>
17 #include <linux/irqreturn.h>
18 #include <linux/kernel.h>
19 #include <linux/slab.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <linux/usb/otg-fsm.h>
24 #include <linux/usb/chipidea.h>
25
26 #include "ci.h"
27 #include "udc.h"
28 #include "bits.h"
29 #include "otg.h"
30 #include "otg_fsm.h"
31
32 /* control endpoint description */
33 static const struct usb_endpoint_descriptor
34 ctrl_endpt_out_desc = {
35 .bLength = USB_DT_ENDPOINT_SIZE,
36 .bDescriptorType = USB_DT_ENDPOINT,
37
38 .bEndpointAddress = USB_DIR_OUT,
39 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
40 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
41 };
42
43 static const struct usb_endpoint_descriptor
44 ctrl_endpt_in_desc = {
45 .bLength = USB_DT_ENDPOINT_SIZE,
46 .bDescriptorType = USB_DT_ENDPOINT,
47
48 .bEndpointAddress = USB_DIR_IN,
49 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
50 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
51 };
52
53 /**
54 * hw_ep_bit: calculates the bit number
55 * @num: endpoint number
56 * @dir: endpoint direction
57 *
58 * This function returns bit number
59 */
60 static inline int hw_ep_bit(int num, int dir)
61 {
62 return num + ((dir == TX) ? 16 : 0);
63 }
64
65 static inline int ep_to_bit(struct ci_hdrc *ci, int n)
66 {
67 int fill = 16 - ci->hw_ep_max / 2;
68
69 if (n >= ci->hw_ep_max / 2)
70 n += fill;
71
72 return n;
73 }
74
75 /**
76 * hw_device_state: enables/disables interrupts (execute without interruption)
77 * @dma: 0 => disable, !0 => enable and set dma engine
78 *
79 * This function returns an error code
80 */
81 static int hw_device_state(struct ci_hdrc *ci, u32 dma)
82 {
83 if (dma) {
84 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
85 /* interrupt, error, port change, reset, sleep/suspend */
86 hw_write(ci, OP_USBINTR, ~0,
87 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
88 } else {
89 hw_write(ci, OP_USBINTR, ~0, 0);
90 }
91 return 0;
92 }
93
94 /**
95 * hw_ep_flush: flush endpoint fifo (execute without interruption)
96 * @num: endpoint number
97 * @dir: endpoint direction
98 *
99 * This function returns an error code
100 */
101 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
102 {
103 int n = hw_ep_bit(num, dir);
104
105 do {
106 /* flush any pending transfer */
107 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
108 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
109 cpu_relax();
110 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
111
112 return 0;
113 }
114
115 /**
116 * hw_ep_disable: disables endpoint (execute without interruption)
117 * @num: endpoint number
118 * @dir: endpoint direction
119 *
120 * This function returns an error code
121 */
122 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
123 {
124 hw_write(ci, OP_ENDPTCTRL + num,
125 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
126 return 0;
127 }
128
129 /**
130 * hw_ep_enable: enables endpoint (execute without interruption)
131 * @num: endpoint number
132 * @dir: endpoint direction
133 * @type: endpoint type
134 *
135 * This function returns an error code
136 */
137 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
138 {
139 u32 mask, data;
140
141 if (dir == TX) {
142 mask = ENDPTCTRL_TXT; /* type */
143 data = type << __ffs(mask);
144
145 mask |= ENDPTCTRL_TXS; /* unstall */
146 mask |= ENDPTCTRL_TXR; /* reset data toggle */
147 data |= ENDPTCTRL_TXR;
148 mask |= ENDPTCTRL_TXE; /* enable */
149 data |= ENDPTCTRL_TXE;
150 } else {
151 mask = ENDPTCTRL_RXT; /* type */
152 data = type << __ffs(mask);
153
154 mask |= ENDPTCTRL_RXS; /* unstall */
155 mask |= ENDPTCTRL_RXR; /* reset data toggle */
156 data |= ENDPTCTRL_RXR;
157 mask |= ENDPTCTRL_RXE; /* enable */
158 data |= ENDPTCTRL_RXE;
159 }
160 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
161 return 0;
162 }
163
164 /**
165 * hw_ep_get_halt: return endpoint halt status
166 * @num: endpoint number
167 * @dir: endpoint direction
168 *
169 * This function returns 1 if endpoint halted
170 */
171 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
172 {
173 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
174
175 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
176 }
177
178 /**
179 * hw_ep_prime: primes endpoint (execute without interruption)
180 * @num: endpoint number
181 * @dir: endpoint direction
182 * @is_ctrl: true if control endpoint
183 *
184 * This function returns an error code
185 */
186 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
187 {
188 int n = hw_ep_bit(num, dir);
189
190 /* Synchronize before ep prime */
191 wmb();
192
193 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
194 return -EAGAIN;
195
196 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
197
198 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
199 cpu_relax();
200 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
201 return -EAGAIN;
202
203 /* status shoult be tested according with manual but it doesn't work */
204 return 0;
205 }
206
207 /**
208 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
209 * without interruption)
210 * @num: endpoint number
211 * @dir: endpoint direction
212 * @value: true => stall, false => unstall
213 *
214 * This function returns an error code
215 */
216 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
217 {
218 if (value != 0 && value != 1)
219 return -EINVAL;
220
221 do {
222 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
223 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
224 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
225
226 /* data toggle - reserved for EP0 but it's in ESS */
227 hw_write(ci, reg, mask_xs|mask_xr,
228 value ? mask_xs : mask_xr);
229 } while (value != hw_ep_get_halt(ci, num, dir));
230
231 return 0;
232 }
233
234 /**
235 * hw_is_port_high_speed: test if port is high speed
236 *
237 * This function returns true if high speed port
238 */
239 static int hw_port_is_high_speed(struct ci_hdrc *ci)
240 {
241 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
242 hw_read(ci, OP_PORTSC, PORTSC_HSP);
243 }
244
245 /**
246 * hw_test_and_clear_complete: test & clear complete status (execute without
247 * interruption)
248 * @n: endpoint number
249 *
250 * This function returns complete status
251 */
252 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
253 {
254 n = ep_to_bit(ci, n);
255 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
256 }
257
258 /**
259 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
260 * without interruption)
261 *
262 * This function returns active interrutps
263 */
264 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
265 {
266 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
267
268 hw_write(ci, OP_USBSTS, ~0, reg);
269 return reg;
270 }
271
272 /**
273 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
274 * interruption)
275 *
276 * This function returns guard value
277 */
278 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
279 {
280 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
281 }
282
283 /**
284 * hw_test_and_set_setup_guard: test & set setup guard (execute without
285 * interruption)
286 *
287 * This function returns guard value
288 */
289 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
290 {
291 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
292 }
293
294 /**
295 * hw_usb_set_address: configures USB address (execute without interruption)
296 * @value: new USB address
297 *
298 * This function explicitly sets the address, without the "USBADRA" (advance)
299 * feature, which is not supported by older versions of the controller.
300 */
301 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
302 {
303 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
304 value << __ffs(DEVICEADDR_USBADR));
305 }
306
307 /**
308 * hw_usb_reset: restart device after a bus reset (execute without
309 * interruption)
310 *
311 * This function returns an error code
312 */
313 static int hw_usb_reset(struct ci_hdrc *ci)
314 {
315 hw_usb_set_address(ci, 0);
316
317 /* ESS flushes only at end?!? */
318 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
319
320 /* clear setup token semaphores */
321 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
322
323 /* clear complete status */
324 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
325
326 /* wait until all bits cleared */
327 while (hw_read(ci, OP_ENDPTPRIME, ~0))
328 udelay(10); /* not RTOS friendly */
329
330 /* reset all endpoints ? */
331
332 /* reset internal status and wait for further instructions
333 no need to verify the port reset status (ESS does it) */
334
335 return 0;
336 }
337
338 /******************************************************************************
339 * UTIL block
340 *****************************************************************************/
341
342 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
343 unsigned length)
344 {
345 int i;
346 u32 temp;
347 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
348 GFP_ATOMIC);
349
350 if (node == NULL)
351 return -ENOMEM;
352
353 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
354 if (node->ptr == NULL) {
355 kfree(node);
356 return -ENOMEM;
357 }
358
359 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
360 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
361 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
362 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
363 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
364
365 if (hwreq->req.length == 0
366 || hwreq->req.length % hwep->ep.maxpacket)
367 mul++;
368 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
369 }
370
371 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
372 if (length) {
373 node->ptr->page[0] = cpu_to_le32(temp);
374 for (i = 1; i < TD_PAGE_COUNT; i++) {
375 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
376 page &= ~TD_RESERVED_MASK;
377 node->ptr->page[i] = cpu_to_le32(page);
378 }
379 }
380
381 hwreq->req.actual += length;
382
383 if (!list_empty(&hwreq->tds)) {
384 /* get the last entry */
385 lastnode = list_entry(hwreq->tds.prev,
386 struct td_node, td);
387 lastnode->ptr->next = cpu_to_le32(node->dma);
388 }
389
390 INIT_LIST_HEAD(&node->td);
391 list_add_tail(&node->td, &hwreq->tds);
392
393 return 0;
394 }
395
396 /**
397 * _usb_addr: calculates endpoint address from direction & number
398 * @ep: endpoint
399 */
400 static inline u8 _usb_addr(struct ci_hw_ep *ep)
401 {
402 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
403 }
404
405 /**
406 * _hardware_enqueue: configures a request at hardware level
407 * @hwep: endpoint
408 * @hwreq: request
409 *
410 * This function returns an error code
411 */
412 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
413 {
414 struct ci_hdrc *ci = hwep->ci;
415 int ret = 0;
416 unsigned rest = hwreq->req.length;
417 int pages = TD_PAGE_COUNT;
418 struct td_node *firstnode, *lastnode;
419
420 /* don't queue twice */
421 if (hwreq->req.status == -EALREADY)
422 return -EALREADY;
423
424 hwreq->req.status = -EALREADY;
425
426 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
427 &hwreq->req, hwep->dir);
428 if (ret)
429 return ret;
430
431 /*
432 * The first buffer could be not page aligned.
433 * In that case we have to span into one extra td.
434 */
435 if (hwreq->req.dma % PAGE_SIZE)
436 pages--;
437
438 if (rest == 0) {
439 ret = add_td_to_list(hwep, hwreq, 0);
440 if (ret < 0)
441 goto done;
442 }
443
444 while (rest > 0) {
445 unsigned count = min(hwreq->req.length - hwreq->req.actual,
446 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
447 ret = add_td_to_list(hwep, hwreq, count);
448 if (ret < 0)
449 goto done;
450
451 rest -= count;
452 }
453
454 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
455 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
456 ret = add_td_to_list(hwep, hwreq, 0);
457 if (ret < 0)
458 goto done;
459 }
460
461 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
462
463 lastnode = list_entry(hwreq->tds.prev,
464 struct td_node, td);
465
466 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
467 if (!hwreq->req.no_interrupt)
468 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
469 wmb();
470
471 hwreq->req.actual = 0;
472 if (!list_empty(&hwep->qh.queue)) {
473 struct ci_hw_req *hwreqprev;
474 int n = hw_ep_bit(hwep->num, hwep->dir);
475 int tmp_stat;
476 struct td_node *prevlastnode;
477 u32 next = firstnode->dma & TD_ADDR_MASK;
478
479 hwreqprev = list_entry(hwep->qh.queue.prev,
480 struct ci_hw_req, queue);
481 prevlastnode = list_entry(hwreqprev->tds.prev,
482 struct td_node, td);
483
484 prevlastnode->ptr->next = cpu_to_le32(next);
485 wmb();
486 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
487 goto done;
488 do {
489 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
490 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
491 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
492 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
493 if (tmp_stat)
494 goto done;
495 }
496
497 /* QH configuration */
498 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
499 hwep->qh.ptr->td.token &=
500 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
501
502 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
503 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
504
505 if (hwreq->req.length == 0
506 || hwreq->req.length % hwep->ep.maxpacket)
507 mul++;
508 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
509 }
510
511 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
512 hwep->type == USB_ENDPOINT_XFER_CONTROL);
513 done:
514 return ret;
515 }
516
517 /*
518 * free_pending_td: remove a pending request for the endpoint
519 * @hwep: endpoint
520 */
521 static void free_pending_td(struct ci_hw_ep *hwep)
522 {
523 struct td_node *pending = hwep->pending_td;
524
525 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
526 hwep->pending_td = NULL;
527 kfree(pending);
528 }
529
530 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
531 struct td_node *node)
532 {
533 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
534 hwep->qh.ptr->td.token &=
535 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
536
537 return hw_ep_prime(ci, hwep->num, hwep->dir,
538 hwep->type == USB_ENDPOINT_XFER_CONTROL);
539 }
540
541 /**
542 * _hardware_dequeue: handles a request at hardware level
543 * @gadget: gadget
544 * @hwep: endpoint
545 *
546 * This function returns an error code
547 */
548 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
549 {
550 u32 tmptoken;
551 struct td_node *node, *tmpnode;
552 unsigned remaining_length;
553 unsigned actual = hwreq->req.length;
554 struct ci_hdrc *ci = hwep->ci;
555
556 if (hwreq->req.status != -EALREADY)
557 return -EINVAL;
558
559 hwreq->req.status = 0;
560
561 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
562 tmptoken = le32_to_cpu(node->ptr->token);
563 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
564 int n = hw_ep_bit(hwep->num, hwep->dir);
565
566 if (ci->rev == CI_REVISION_24)
567 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
568 reprime_dtd(ci, hwep, node);
569 hwreq->req.status = -EALREADY;
570 return -EBUSY;
571 }
572
573 remaining_length = (tmptoken & TD_TOTAL_BYTES);
574 remaining_length >>= __ffs(TD_TOTAL_BYTES);
575 actual -= remaining_length;
576
577 hwreq->req.status = tmptoken & TD_STATUS;
578 if ((TD_STATUS_HALTED & hwreq->req.status)) {
579 hwreq->req.status = -EPIPE;
580 break;
581 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
582 hwreq->req.status = -EPROTO;
583 break;
584 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
585 hwreq->req.status = -EILSEQ;
586 break;
587 }
588
589 if (remaining_length) {
590 if (hwep->dir == TX) {
591 hwreq->req.status = -EPROTO;
592 break;
593 }
594 }
595 /*
596 * As the hardware could still address the freed td
597 * which will run the udc unusable, the cleanup of the
598 * td has to be delayed by one.
599 */
600 if (hwep->pending_td)
601 free_pending_td(hwep);
602
603 hwep->pending_td = node;
604 list_del_init(&node->td);
605 }
606
607 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
608 &hwreq->req, hwep->dir);
609
610 hwreq->req.actual += actual;
611
612 if (hwreq->req.status)
613 return hwreq->req.status;
614
615 return hwreq->req.actual;
616 }
617
618 /**
619 * _ep_nuke: dequeues all endpoint requests
620 * @hwep: endpoint
621 *
622 * This function returns an error code
623 * Caller must hold lock
624 */
625 static int _ep_nuke(struct ci_hw_ep *hwep)
626 __releases(hwep->lock)
627 __acquires(hwep->lock)
628 {
629 struct td_node *node, *tmpnode;
630 if (hwep == NULL)
631 return -EINVAL;
632
633 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
634
635 while (!list_empty(&hwep->qh.queue)) {
636
637 /* pop oldest request */
638 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
639 struct ci_hw_req, queue);
640
641 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
642 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
643 list_del_init(&node->td);
644 node->ptr = NULL;
645 kfree(node);
646 }
647
648 list_del_init(&hwreq->queue);
649 hwreq->req.status = -ESHUTDOWN;
650
651 if (hwreq->req.complete != NULL) {
652 spin_unlock(hwep->lock);
653 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
654 spin_lock(hwep->lock);
655 }
656 }
657
658 if (hwep->pending_td)
659 free_pending_td(hwep);
660
661 return 0;
662 }
663
664 static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
665 {
666 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
667 int direction, retval = 0;
668 unsigned long flags;
669
670 if (ep == NULL || hwep->ep.desc == NULL)
671 return -EINVAL;
672
673 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
674 return -EOPNOTSUPP;
675
676 spin_lock_irqsave(hwep->lock, flags);
677
678 if (value && hwep->dir == TX && check_transfer &&
679 !list_empty(&hwep->qh.queue) &&
680 !usb_endpoint_xfer_control(hwep->ep.desc)) {
681 spin_unlock_irqrestore(hwep->lock, flags);
682 return -EAGAIN;
683 }
684
685 direction = hwep->dir;
686 do {
687 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
688
689 if (!value)
690 hwep->wedge = 0;
691
692 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
693 hwep->dir = (hwep->dir == TX) ? RX : TX;
694
695 } while (hwep->dir != direction);
696
697 spin_unlock_irqrestore(hwep->lock, flags);
698 return retval;
699 }
700
701
702 /**
703 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
704 * @gadget: gadget
705 *
706 * This function returns an error code
707 */
708 static int _gadget_stop_activity(struct usb_gadget *gadget)
709 {
710 struct usb_ep *ep;
711 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
712 unsigned long flags;
713
714 spin_lock_irqsave(&ci->lock, flags);
715 ci->gadget.speed = USB_SPEED_UNKNOWN;
716 ci->remote_wakeup = 0;
717 ci->suspended = 0;
718 spin_unlock_irqrestore(&ci->lock, flags);
719
720 /* flush all endpoints */
721 gadget_for_each_ep(ep, gadget) {
722 usb_ep_fifo_flush(ep);
723 }
724 usb_ep_fifo_flush(&ci->ep0out->ep);
725 usb_ep_fifo_flush(&ci->ep0in->ep);
726
727 /* make sure to disable all endpoints */
728 gadget_for_each_ep(ep, gadget) {
729 usb_ep_disable(ep);
730 }
731
732 if (ci->status != NULL) {
733 usb_ep_free_request(&ci->ep0in->ep, ci->status);
734 ci->status = NULL;
735 }
736
737 return 0;
738 }
739
740 /******************************************************************************
741 * ISR block
742 *****************************************************************************/
743 /**
744 * isr_reset_handler: USB reset interrupt handler
745 * @ci: UDC device
746 *
747 * This function resets USB engine after a bus reset occurred
748 */
749 static void isr_reset_handler(struct ci_hdrc *ci)
750 __releases(ci->lock)
751 __acquires(ci->lock)
752 {
753 int retval;
754
755 spin_unlock(&ci->lock);
756 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
757 usb_gadget_udc_reset(&ci->gadget, ci->driver);
758
759 retval = _gadget_stop_activity(&ci->gadget);
760 if (retval)
761 goto done;
762
763 retval = hw_usb_reset(ci);
764 if (retval)
765 goto done;
766
767 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
768 if (ci->status == NULL)
769 retval = -ENOMEM;
770
771 done:
772 spin_lock(&ci->lock);
773
774 if (retval)
775 dev_err(ci->dev, "error: %i\n", retval);
776 }
777
778 /**
779 * isr_get_status_complete: get_status request complete function
780 * @ep: endpoint
781 * @req: request handled
782 *
783 * Caller must release lock
784 */
785 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
786 {
787 if (ep == NULL || req == NULL)
788 return;
789
790 kfree(req->buf);
791 usb_ep_free_request(ep, req);
792 }
793
794 /**
795 * _ep_queue: queues (submits) an I/O request to an endpoint
796 * @ep: endpoint
797 * @req: request
798 * @gfp_flags: GFP flags (not used)
799 *
800 * Caller must hold lock
801 * This function returns an error code
802 */
803 static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
804 gfp_t __maybe_unused gfp_flags)
805 {
806 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
807 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
808 struct ci_hdrc *ci = hwep->ci;
809 int retval = 0;
810
811 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
812 return -EINVAL;
813
814 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
815 if (req->length)
816 hwep = (ci->ep0_dir == RX) ?
817 ci->ep0out : ci->ep0in;
818 if (!list_empty(&hwep->qh.queue)) {
819 _ep_nuke(hwep);
820 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
821 _usb_addr(hwep));
822 }
823 }
824
825 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
826 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
827 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
828 return -EMSGSIZE;
829 }
830
831 /* first nuke then test link, e.g. previous status has not sent */
832 if (!list_empty(&hwreq->queue)) {
833 dev_err(hwep->ci->dev, "request already in queue\n");
834 return -EBUSY;
835 }
836
837 /* push request */
838 hwreq->req.status = -EINPROGRESS;
839 hwreq->req.actual = 0;
840
841 retval = _hardware_enqueue(hwep, hwreq);
842
843 if (retval == -EALREADY)
844 retval = 0;
845 if (!retval)
846 list_add_tail(&hwreq->queue, &hwep->qh.queue);
847
848 return retval;
849 }
850
851 /**
852 * isr_get_status_response: get_status request response
853 * @ci: ci struct
854 * @setup: setup request packet
855 *
856 * This function returns an error code
857 */
858 static int isr_get_status_response(struct ci_hdrc *ci,
859 struct usb_ctrlrequest *setup)
860 __releases(hwep->lock)
861 __acquires(hwep->lock)
862 {
863 struct ci_hw_ep *hwep = ci->ep0in;
864 struct usb_request *req = NULL;
865 gfp_t gfp_flags = GFP_ATOMIC;
866 int dir, num, retval;
867
868 if (hwep == NULL || setup == NULL)
869 return -EINVAL;
870
871 spin_unlock(hwep->lock);
872 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
873 spin_lock(hwep->lock);
874 if (req == NULL)
875 return -ENOMEM;
876
877 req->complete = isr_get_status_complete;
878 req->length = 2;
879 req->buf = kzalloc(req->length, gfp_flags);
880 if (req->buf == NULL) {
881 retval = -ENOMEM;
882 goto err_free_req;
883 }
884
885 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
886 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
887 ci->gadget.is_selfpowered;
888 } else if ((setup->bRequestType & USB_RECIP_MASK) \
889 == USB_RECIP_ENDPOINT) {
890 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
891 TX : RX;
892 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
893 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
894 }
895 /* else do nothing; reserved for future use */
896
897 retval = _ep_queue(&hwep->ep, req, gfp_flags);
898 if (retval)
899 goto err_free_buf;
900
901 return 0;
902
903 err_free_buf:
904 kfree(req->buf);
905 err_free_req:
906 spin_unlock(hwep->lock);
907 usb_ep_free_request(&hwep->ep, req);
908 spin_lock(hwep->lock);
909 return retval;
910 }
911
912 /**
913 * isr_setup_status_complete: setup_status request complete function
914 * @ep: endpoint
915 * @req: request handled
916 *
917 * Caller must release lock. Put the port in test mode if test mode
918 * feature is selected.
919 */
920 static void
921 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
922 {
923 struct ci_hdrc *ci = req->context;
924 unsigned long flags;
925
926 if (ci->setaddr) {
927 hw_usb_set_address(ci, ci->address);
928 ci->setaddr = false;
929 if (ci->address)
930 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
931 }
932
933 spin_lock_irqsave(&ci->lock, flags);
934 if (ci->test_mode)
935 hw_port_test_set(ci, ci->test_mode);
936 spin_unlock_irqrestore(&ci->lock, flags);
937 }
938
939 /**
940 * isr_setup_status_phase: queues the status phase of a setup transation
941 * @ci: ci struct
942 *
943 * This function returns an error code
944 */
945 static int isr_setup_status_phase(struct ci_hdrc *ci)
946 {
947 int retval;
948 struct ci_hw_ep *hwep;
949
950 /*
951 * Unexpected USB controller behavior, caused by bad signal integrity
952 * or ground reference problems, can lead to isr_setup_status_phase
953 * being called with ci->status equal to NULL.
954 * If this situation occurs, you should review your USB hardware design.
955 */
956 if (WARN_ON_ONCE(!ci->status))
957 return -EPIPE;
958
959 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
960 ci->status->context = ci;
961 ci->status->complete = isr_setup_status_complete;
962
963 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
964
965 return retval;
966 }
967
968 /**
969 * isr_tr_complete_low: transaction complete low level handler
970 * @hwep: endpoint
971 *
972 * This function returns an error code
973 * Caller must hold lock
974 */
975 static int isr_tr_complete_low(struct ci_hw_ep *hwep)
976 __releases(hwep->lock)
977 __acquires(hwep->lock)
978 {
979 struct ci_hw_req *hwreq, *hwreqtemp;
980 struct ci_hw_ep *hweptemp = hwep;
981 int retval = 0;
982
983 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
984 queue) {
985 retval = _hardware_dequeue(hwep, hwreq);
986 if (retval < 0)
987 break;
988 list_del_init(&hwreq->queue);
989 if (hwreq->req.complete != NULL) {
990 spin_unlock(hwep->lock);
991 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
992 hwreq->req.length)
993 hweptemp = hwep->ci->ep0in;
994 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
995 spin_lock(hwep->lock);
996 }
997 }
998
999 if (retval == -EBUSY)
1000 retval = 0;
1001
1002 return retval;
1003 }
1004
1005 static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1006 {
1007 dev_warn(&ci->gadget.dev,
1008 "connect the device to an alternate port if you want HNP\n");
1009 return isr_setup_status_phase(ci);
1010 }
1011
1012 /**
1013 * isr_setup_packet_handler: setup packet handler
1014 * @ci: UDC descriptor
1015 *
1016 * This function handles setup packet
1017 */
1018 static void isr_setup_packet_handler(struct ci_hdrc *ci)
1019 __releases(ci->lock)
1020 __acquires(ci->lock)
1021 {
1022 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1023 struct usb_ctrlrequest req;
1024 int type, num, dir, err = -EINVAL;
1025 u8 tmode = 0;
1026
1027 /*
1028 * Flush data and handshake transactions of previous
1029 * setup packet.
1030 */
1031 _ep_nuke(ci->ep0out);
1032 _ep_nuke(ci->ep0in);
1033
1034 /* read_setup_packet */
1035 do {
1036 hw_test_and_set_setup_guard(ci);
1037 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1038 } while (!hw_test_and_clear_setup_guard(ci));
1039
1040 type = req.bRequestType;
1041
1042 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1043
1044 switch (req.bRequest) {
1045 case USB_REQ_CLEAR_FEATURE:
1046 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1047 le16_to_cpu(req.wValue) ==
1048 USB_ENDPOINT_HALT) {
1049 if (req.wLength != 0)
1050 break;
1051 num = le16_to_cpu(req.wIndex);
1052 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1053 num &= USB_ENDPOINT_NUMBER_MASK;
1054 if (dir == TX)
1055 num += ci->hw_ep_max / 2;
1056 if (!ci->ci_hw_ep[num].wedge) {
1057 spin_unlock(&ci->lock);
1058 err = usb_ep_clear_halt(
1059 &ci->ci_hw_ep[num].ep);
1060 spin_lock(&ci->lock);
1061 if (err)
1062 break;
1063 }
1064 err = isr_setup_status_phase(ci);
1065 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1066 le16_to_cpu(req.wValue) ==
1067 USB_DEVICE_REMOTE_WAKEUP) {
1068 if (req.wLength != 0)
1069 break;
1070 ci->remote_wakeup = 0;
1071 err = isr_setup_status_phase(ci);
1072 } else {
1073 goto delegate;
1074 }
1075 break;
1076 case USB_REQ_GET_STATUS:
1077 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1078 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1079 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1080 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1081 goto delegate;
1082 if (le16_to_cpu(req.wLength) != 2 ||
1083 le16_to_cpu(req.wValue) != 0)
1084 break;
1085 err = isr_get_status_response(ci, &req);
1086 break;
1087 case USB_REQ_SET_ADDRESS:
1088 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1089 goto delegate;
1090 if (le16_to_cpu(req.wLength) != 0 ||
1091 le16_to_cpu(req.wIndex) != 0)
1092 break;
1093 ci->address = (u8)le16_to_cpu(req.wValue);
1094 ci->setaddr = true;
1095 err = isr_setup_status_phase(ci);
1096 break;
1097 case USB_REQ_SET_FEATURE:
1098 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1099 le16_to_cpu(req.wValue) ==
1100 USB_ENDPOINT_HALT) {
1101 if (req.wLength != 0)
1102 break;
1103 num = le16_to_cpu(req.wIndex);
1104 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1105 num &= USB_ENDPOINT_NUMBER_MASK;
1106 if (dir == TX)
1107 num += ci->hw_ep_max / 2;
1108
1109 spin_unlock(&ci->lock);
1110 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1111 spin_lock(&ci->lock);
1112 if (!err)
1113 isr_setup_status_phase(ci);
1114 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1115 if (req.wLength != 0)
1116 break;
1117 switch (le16_to_cpu(req.wValue)) {
1118 case USB_DEVICE_REMOTE_WAKEUP:
1119 ci->remote_wakeup = 1;
1120 err = isr_setup_status_phase(ci);
1121 break;
1122 case USB_DEVICE_TEST_MODE:
1123 tmode = le16_to_cpu(req.wIndex) >> 8;
1124 switch (tmode) {
1125 case TEST_J:
1126 case TEST_K:
1127 case TEST_SE0_NAK:
1128 case TEST_PACKET:
1129 case TEST_FORCE_EN:
1130 ci->test_mode = tmode;
1131 err = isr_setup_status_phase(
1132 ci);
1133 break;
1134 default:
1135 break;
1136 }
1137 break;
1138 case USB_DEVICE_B_HNP_ENABLE:
1139 if (ci_otg_is_fsm_mode(ci)) {
1140 ci->gadget.b_hnp_enable = 1;
1141 err = isr_setup_status_phase(
1142 ci);
1143 }
1144 break;
1145 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1146 if (ci_otg_is_fsm_mode(ci))
1147 err = otg_a_alt_hnp_support(ci);
1148 break;
1149 case USB_DEVICE_A_HNP_SUPPORT:
1150 if (ci_otg_is_fsm_mode(ci)) {
1151 ci->gadget.a_hnp_support = 1;
1152 err = isr_setup_status_phase(
1153 ci);
1154 }
1155 break;
1156 default:
1157 goto delegate;
1158 }
1159 } else {
1160 goto delegate;
1161 }
1162 break;
1163 default:
1164 delegate:
1165 if (req.wLength == 0) /* no data phase */
1166 ci->ep0_dir = TX;
1167
1168 spin_unlock(&ci->lock);
1169 err = ci->driver->setup(&ci->gadget, &req);
1170 spin_lock(&ci->lock);
1171 break;
1172 }
1173
1174 if (err < 0) {
1175 spin_unlock(&ci->lock);
1176 if (_ep_set_halt(&hwep->ep, 1, false))
1177 dev_err(ci->dev, "error: _ep_set_halt\n");
1178 spin_lock(&ci->lock);
1179 }
1180 }
1181
1182 /**
1183 * isr_tr_complete_handler: transaction complete interrupt handler
1184 * @ci: UDC descriptor
1185 *
1186 * This function handles traffic events
1187 */
1188 static void isr_tr_complete_handler(struct ci_hdrc *ci)
1189 __releases(ci->lock)
1190 __acquires(ci->lock)
1191 {
1192 unsigned i;
1193 int err;
1194
1195 for (i = 0; i < ci->hw_ep_max; i++) {
1196 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1197
1198 if (hwep->ep.desc == NULL)
1199 continue; /* not configured */
1200
1201 if (hw_test_and_clear_complete(ci, i)) {
1202 err = isr_tr_complete_low(hwep);
1203 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1204 if (err > 0) /* needs status phase */
1205 err = isr_setup_status_phase(ci);
1206 if (err < 0) {
1207 spin_unlock(&ci->lock);
1208 if (_ep_set_halt(&hwep->ep, 1, false))
1209 dev_err(ci->dev,
1210 "error: _ep_set_halt\n");
1211 spin_lock(&ci->lock);
1212 }
1213 }
1214 }
1215
1216 /* Only handle setup packet below */
1217 if (i == 0 &&
1218 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1219 isr_setup_packet_handler(ci);
1220 }
1221 }
1222
1223 /******************************************************************************
1224 * ENDPT block
1225 *****************************************************************************/
1226 /**
1227 * ep_enable: configure endpoint, making it usable
1228 *
1229 * Check usb_ep_enable() at "usb_gadget.h" for details
1230 */
1231 static int ep_enable(struct usb_ep *ep,
1232 const struct usb_endpoint_descriptor *desc)
1233 {
1234 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1235 int retval = 0;
1236 unsigned long flags;
1237 u32 cap = 0;
1238
1239 if (ep == NULL || desc == NULL)
1240 return -EINVAL;
1241
1242 spin_lock_irqsave(hwep->lock, flags);
1243
1244 /* only internal SW should enable ctrl endpts */
1245
1246 if (!list_empty(&hwep->qh.queue)) {
1247 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1248 spin_unlock_irqrestore(hwep->lock, flags);
1249 return -EBUSY;
1250 }
1251
1252 hwep->ep.desc = desc;
1253
1254 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1255 hwep->num = usb_endpoint_num(desc);
1256 hwep->type = usb_endpoint_type(desc);
1257
1258 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1259 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1260
1261 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1262 cap |= QH_IOS;
1263
1264 cap |= QH_ZLT;
1265 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1266 /*
1267 * For ISO-TX, we set mult at QH as the largest value, and use
1268 * MultO at TD as real mult value.
1269 */
1270 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1271 cap |= 3 << __ffs(QH_MULT);
1272
1273 hwep->qh.ptr->cap = cpu_to_le32(cap);
1274
1275 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1276
1277 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1278 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1279 retval = -EINVAL;
1280 }
1281
1282 /*
1283 * Enable endpoints in the HW other than ep0 as ep0
1284 * is always enabled
1285 */
1286 if (hwep->num)
1287 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1288 hwep->type);
1289
1290 spin_unlock_irqrestore(hwep->lock, flags);
1291 return retval;
1292 }
1293
1294 /**
1295 * ep_disable: endpoint is no longer usable
1296 *
1297 * Check usb_ep_disable() at "usb_gadget.h" for details
1298 */
1299 static int ep_disable(struct usb_ep *ep)
1300 {
1301 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1302 int direction, retval = 0;
1303 unsigned long flags;
1304
1305 if (ep == NULL)
1306 return -EINVAL;
1307 else if (hwep->ep.desc == NULL)
1308 return -EBUSY;
1309
1310 spin_lock_irqsave(hwep->lock, flags);
1311
1312 /* only internal SW should disable ctrl endpts */
1313
1314 direction = hwep->dir;
1315 do {
1316 retval |= _ep_nuke(hwep);
1317 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1318
1319 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1320 hwep->dir = (hwep->dir == TX) ? RX : TX;
1321
1322 } while (hwep->dir != direction);
1323
1324 hwep->ep.desc = NULL;
1325
1326 spin_unlock_irqrestore(hwep->lock, flags);
1327 return retval;
1328 }
1329
1330 /**
1331 * ep_alloc_request: allocate a request object to use with this endpoint
1332 *
1333 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1334 */
1335 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1336 {
1337 struct ci_hw_req *hwreq = NULL;
1338
1339 if (ep == NULL)
1340 return NULL;
1341
1342 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1343 if (hwreq != NULL) {
1344 INIT_LIST_HEAD(&hwreq->queue);
1345 INIT_LIST_HEAD(&hwreq->tds);
1346 }
1347
1348 return (hwreq == NULL) ? NULL : &hwreq->req;
1349 }
1350
1351 /**
1352 * ep_free_request: frees a request object
1353 *
1354 * Check usb_ep_free_request() at "usb_gadget.h" for details
1355 */
1356 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1357 {
1358 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1359 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1360 struct td_node *node, *tmpnode;
1361 unsigned long flags;
1362
1363 if (ep == NULL || req == NULL) {
1364 return;
1365 } else if (!list_empty(&hwreq->queue)) {
1366 dev_err(hwep->ci->dev, "freeing queued request\n");
1367 return;
1368 }
1369
1370 spin_lock_irqsave(hwep->lock, flags);
1371
1372 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1373 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1374 list_del_init(&node->td);
1375 node->ptr = NULL;
1376 kfree(node);
1377 }
1378
1379 kfree(hwreq);
1380
1381 spin_unlock_irqrestore(hwep->lock, flags);
1382 }
1383
1384 /**
1385 * ep_queue: queues (submits) an I/O request to an endpoint
1386 *
1387 * Check usb_ep_queue()* at usb_gadget.h" for details
1388 */
1389 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1390 gfp_t __maybe_unused gfp_flags)
1391 {
1392 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1393 int retval = 0;
1394 unsigned long flags;
1395
1396 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1397 return -EINVAL;
1398
1399 spin_lock_irqsave(hwep->lock, flags);
1400 retval = _ep_queue(ep, req, gfp_flags);
1401 spin_unlock_irqrestore(hwep->lock, flags);
1402 return retval;
1403 }
1404
1405 /**
1406 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1407 *
1408 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1409 */
1410 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1411 {
1412 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1413 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1414 unsigned long flags;
1415 struct td_node *node, *tmpnode;
1416
1417 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1418 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1419 list_empty(&hwep->qh.queue))
1420 return -EINVAL;
1421
1422 spin_lock_irqsave(hwep->lock, flags);
1423
1424 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1425
1426 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1427 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1428 list_del(&node->td);
1429 kfree(node);
1430 }
1431
1432 /* pop request */
1433 list_del_init(&hwreq->queue);
1434
1435 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1436
1437 req->status = -ECONNRESET;
1438
1439 if (hwreq->req.complete != NULL) {
1440 spin_unlock(hwep->lock);
1441 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1442 spin_lock(hwep->lock);
1443 }
1444
1445 spin_unlock_irqrestore(hwep->lock, flags);
1446 return 0;
1447 }
1448
1449 /**
1450 * ep_set_halt: sets the endpoint halt feature
1451 *
1452 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1453 */
1454 static int ep_set_halt(struct usb_ep *ep, int value)
1455 {
1456 return _ep_set_halt(ep, value, true);
1457 }
1458
1459 /**
1460 * ep_set_wedge: sets the halt feature and ignores clear requests
1461 *
1462 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1463 */
1464 static int ep_set_wedge(struct usb_ep *ep)
1465 {
1466 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1467 unsigned long flags;
1468
1469 if (ep == NULL || hwep->ep.desc == NULL)
1470 return -EINVAL;
1471
1472 spin_lock_irqsave(hwep->lock, flags);
1473 hwep->wedge = 1;
1474 spin_unlock_irqrestore(hwep->lock, flags);
1475
1476 return usb_ep_set_halt(ep);
1477 }
1478
1479 /**
1480 * ep_fifo_flush: flushes contents of a fifo
1481 *
1482 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1483 */
1484 static void ep_fifo_flush(struct usb_ep *ep)
1485 {
1486 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1487 unsigned long flags;
1488
1489 if (ep == NULL) {
1490 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1491 return;
1492 }
1493
1494 spin_lock_irqsave(hwep->lock, flags);
1495
1496 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1497
1498 spin_unlock_irqrestore(hwep->lock, flags);
1499 }
1500
1501 /**
1502 * Endpoint-specific part of the API to the USB controller hardware
1503 * Check "usb_gadget.h" for details
1504 */
1505 static const struct usb_ep_ops usb_ep_ops = {
1506 .enable = ep_enable,
1507 .disable = ep_disable,
1508 .alloc_request = ep_alloc_request,
1509 .free_request = ep_free_request,
1510 .queue = ep_queue,
1511 .dequeue = ep_dequeue,
1512 .set_halt = ep_set_halt,
1513 .set_wedge = ep_set_wedge,
1514 .fifo_flush = ep_fifo_flush,
1515 };
1516
1517 /******************************************************************************
1518 * GADGET block
1519 *****************************************************************************/
1520 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1521 {
1522 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1523 unsigned long flags;
1524 int gadget_ready = 0;
1525
1526 spin_lock_irqsave(&ci->lock, flags);
1527 ci->vbus_active = is_active;
1528 if (ci->driver)
1529 gadget_ready = 1;
1530 spin_unlock_irqrestore(&ci->lock, flags);
1531
1532 if (gadget_ready) {
1533 if (is_active) {
1534 pm_runtime_get_sync(&_gadget->dev);
1535 hw_device_reset(ci);
1536 hw_device_state(ci, ci->ep0out->qh.dma);
1537 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1538 usb_udc_vbus_handler(_gadget, true);
1539 } else {
1540 usb_udc_vbus_handler(_gadget, false);
1541 if (ci->driver)
1542 ci->driver->disconnect(&ci->gadget);
1543 hw_device_state(ci, 0);
1544 if (ci->platdata->notify_event)
1545 ci->platdata->notify_event(ci,
1546 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1547 _gadget_stop_activity(&ci->gadget);
1548 pm_runtime_put_sync(&_gadget->dev);
1549 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1550 }
1551 }
1552
1553 return 0;
1554 }
1555
1556 static int ci_udc_wakeup(struct usb_gadget *_gadget)
1557 {
1558 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1559 unsigned long flags;
1560 int ret = 0;
1561
1562 spin_lock_irqsave(&ci->lock, flags);
1563 if (!ci->remote_wakeup) {
1564 ret = -EOPNOTSUPP;
1565 goto out;
1566 }
1567 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1568 ret = -EINVAL;
1569 goto out;
1570 }
1571 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1572 out:
1573 spin_unlock_irqrestore(&ci->lock, flags);
1574 return ret;
1575 }
1576
1577 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1578 {
1579 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1580
1581 if (ci->usb_phy)
1582 return usb_phy_set_power(ci->usb_phy, ma);
1583 return -ENOTSUPP;
1584 }
1585
1586 static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1587 {
1588 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1589 struct ci_hw_ep *hwep = ci->ep0in;
1590 unsigned long flags;
1591
1592 spin_lock_irqsave(hwep->lock, flags);
1593 _gadget->is_selfpowered = (is_on != 0);
1594 spin_unlock_irqrestore(hwep->lock, flags);
1595
1596 return 0;
1597 }
1598
1599 /* Change Data+ pullup status
1600 * this func is used by usb_gadget_connect/disconnet
1601 */
1602 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1603 {
1604 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1605
1606 /*
1607 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1608 * and don't touch Data+ in host mode for dual role config.
1609 */
1610 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1611 return 0;
1612
1613 pm_runtime_get_sync(&ci->gadget.dev);
1614 if (is_on)
1615 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1616 else
1617 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1618 pm_runtime_put_sync(&ci->gadget.dev);
1619
1620 return 0;
1621 }
1622
1623 static int ci_udc_start(struct usb_gadget *gadget,
1624 struct usb_gadget_driver *driver);
1625 static int ci_udc_stop(struct usb_gadget *gadget);
1626 /**
1627 * Device operations part of the API to the USB controller hardware,
1628 * which don't involve endpoints (or i/o)
1629 * Check "usb_gadget.h" for details
1630 */
1631 static const struct usb_gadget_ops usb_gadget_ops = {
1632 .vbus_session = ci_udc_vbus_session,
1633 .wakeup = ci_udc_wakeup,
1634 .set_selfpowered = ci_udc_selfpowered,
1635 .pullup = ci_udc_pullup,
1636 .vbus_draw = ci_udc_vbus_draw,
1637 .udc_start = ci_udc_start,
1638 .udc_stop = ci_udc_stop,
1639 };
1640
1641 static int init_eps(struct ci_hdrc *ci)
1642 {
1643 int retval = 0, i, j;
1644
1645 for (i = 0; i < ci->hw_ep_max/2; i++)
1646 for (j = RX; j <= TX; j++) {
1647 int k = i + j * ci->hw_ep_max/2;
1648 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1649
1650 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1651 (j == TX) ? "in" : "out");
1652
1653 hwep->ci = ci;
1654 hwep->lock = &ci->lock;
1655 hwep->td_pool = ci->td_pool;
1656
1657 hwep->ep.name = hwep->name;
1658 hwep->ep.ops = &usb_ep_ops;
1659
1660 if (i == 0) {
1661 hwep->ep.caps.type_control = true;
1662 } else {
1663 hwep->ep.caps.type_iso = true;
1664 hwep->ep.caps.type_bulk = true;
1665 hwep->ep.caps.type_int = true;
1666 }
1667
1668 if (j == TX)
1669 hwep->ep.caps.dir_in = true;
1670 else
1671 hwep->ep.caps.dir_out = true;
1672
1673 /*
1674 * for ep0: maxP defined in desc, for other
1675 * eps, maxP is set by epautoconfig() called
1676 * by gadget layer
1677 */
1678 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1679
1680 INIT_LIST_HEAD(&hwep->qh.queue);
1681 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1682 &hwep->qh.dma);
1683 if (hwep->qh.ptr == NULL)
1684 retval = -ENOMEM;
1685
1686 /*
1687 * set up shorthands for ep0 out and in endpoints,
1688 * don't add to gadget's ep_list
1689 */
1690 if (i == 0) {
1691 if (j == RX)
1692 ci->ep0out = hwep;
1693 else
1694 ci->ep0in = hwep;
1695
1696 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1697 continue;
1698 }
1699
1700 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1701 }
1702
1703 return retval;
1704 }
1705
1706 static void destroy_eps(struct ci_hdrc *ci)
1707 {
1708 int i;
1709
1710 for (i = 0; i < ci->hw_ep_max; i++) {
1711 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1712
1713 if (hwep->pending_td)
1714 free_pending_td(hwep);
1715 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1716 }
1717 }
1718
1719 /**
1720 * ci_udc_start: register a gadget driver
1721 * @gadget: our gadget
1722 * @driver: the driver being registered
1723 *
1724 * Interrupts are enabled here.
1725 */
1726 static int ci_udc_start(struct usb_gadget *gadget,
1727 struct usb_gadget_driver *driver)
1728 {
1729 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1730 int retval = -ENOMEM;
1731
1732 if (driver->disconnect == NULL)
1733 return -EINVAL;
1734
1735
1736 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1737 retval = usb_ep_enable(&ci->ep0out->ep);
1738 if (retval)
1739 return retval;
1740
1741 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1742 retval = usb_ep_enable(&ci->ep0in->ep);
1743 if (retval)
1744 return retval;
1745
1746 ci->driver = driver;
1747
1748 /* Start otg fsm for B-device */
1749 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1750 ci_hdrc_otg_fsm_start(ci);
1751 return retval;
1752 }
1753
1754 pm_runtime_get_sync(&ci->gadget.dev);
1755 if (ci->vbus_active) {
1756 hw_device_reset(ci);
1757 } else {
1758 usb_udc_vbus_handler(&ci->gadget, false);
1759 pm_runtime_put_sync(&ci->gadget.dev);
1760 return retval;
1761 }
1762
1763 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1764 if (retval)
1765 pm_runtime_put_sync(&ci->gadget.dev);
1766
1767 return retval;
1768 }
1769
1770 static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1771 {
1772 if (!ci_otg_is_fsm_mode(ci))
1773 return;
1774
1775 mutex_lock(&ci->fsm.lock);
1776 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1777 ci->fsm.a_bidl_adis_tmout = 1;
1778 ci_hdrc_otg_fsm_start(ci);
1779 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1780 ci->fsm.protocol = PROTO_UNDEF;
1781 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1782 }
1783 mutex_unlock(&ci->fsm.lock);
1784 }
1785
1786 /**
1787 * ci_udc_stop: unregister a gadget driver
1788 */
1789 static int ci_udc_stop(struct usb_gadget *gadget)
1790 {
1791 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1792 unsigned long flags;
1793
1794 spin_lock_irqsave(&ci->lock, flags);
1795
1796 if (ci->vbus_active) {
1797 hw_device_state(ci, 0);
1798 spin_unlock_irqrestore(&ci->lock, flags);
1799 if (ci->platdata->notify_event)
1800 ci->platdata->notify_event(ci,
1801 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1802 _gadget_stop_activity(&ci->gadget);
1803 spin_lock_irqsave(&ci->lock, flags);
1804 pm_runtime_put(&ci->gadget.dev);
1805 }
1806
1807 ci->driver = NULL;
1808 spin_unlock_irqrestore(&ci->lock, flags);
1809
1810 ci_udc_stop_for_otg_fsm(ci);
1811 return 0;
1812 }
1813
1814 /******************************************************************************
1815 * BUS block
1816 *****************************************************************************/
1817 /**
1818 * udc_irq: ci interrupt handler
1819 *
1820 * This function returns IRQ_HANDLED if the IRQ has been handled
1821 * It locks access to registers
1822 */
1823 static irqreturn_t udc_irq(struct ci_hdrc *ci)
1824 {
1825 irqreturn_t retval;
1826 u32 intr;
1827
1828 if (ci == NULL)
1829 return IRQ_HANDLED;
1830
1831 spin_lock(&ci->lock);
1832
1833 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1834 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1835 USBMODE_CM_DC) {
1836 spin_unlock(&ci->lock);
1837 return IRQ_NONE;
1838 }
1839 }
1840 intr = hw_test_and_clear_intr_active(ci);
1841
1842 if (intr) {
1843 /* order defines priority - do NOT change it */
1844 if (USBi_URI & intr)
1845 isr_reset_handler(ci);
1846
1847 if (USBi_PCI & intr) {
1848 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1849 USB_SPEED_HIGH : USB_SPEED_FULL;
1850 if (ci->suspended) {
1851 if (ci->driver->resume) {
1852 spin_unlock(&ci->lock);
1853 ci->driver->resume(&ci->gadget);
1854 spin_lock(&ci->lock);
1855 }
1856 ci->suspended = 0;
1857 usb_gadget_set_state(&ci->gadget,
1858 ci->resume_state);
1859 }
1860 }
1861
1862 if (USBi_UI & intr)
1863 isr_tr_complete_handler(ci);
1864
1865 if ((USBi_SLI & intr) && !(ci->suspended)) {
1866 ci->suspended = 1;
1867 ci->resume_state = ci->gadget.state;
1868 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1869 ci->driver->suspend) {
1870 spin_unlock(&ci->lock);
1871 ci->driver->suspend(&ci->gadget);
1872 spin_lock(&ci->lock);
1873 }
1874 usb_gadget_set_state(&ci->gadget,
1875 USB_STATE_SUSPENDED);
1876 }
1877 retval = IRQ_HANDLED;
1878 } else {
1879 retval = IRQ_NONE;
1880 }
1881 spin_unlock(&ci->lock);
1882
1883 return retval;
1884 }
1885
1886 /**
1887 * udc_start: initialize gadget role
1888 * @ci: chipidea controller
1889 */
1890 static int udc_start(struct ci_hdrc *ci)
1891 {
1892 struct device *dev = ci->dev;
1893 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1894 int retval = 0;
1895
1896 ci->gadget.ops = &usb_gadget_ops;
1897 ci->gadget.speed = USB_SPEED_UNKNOWN;
1898 ci->gadget.max_speed = USB_SPEED_HIGH;
1899 ci->gadget.name = ci->platdata->name;
1900 ci->gadget.otg_caps = otg_caps;
1901
1902 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1903 otg_caps->adp_support))
1904 ci->gadget.is_otg = 1;
1905
1906 INIT_LIST_HEAD(&ci->gadget.ep_list);
1907
1908 /* alloc resources */
1909 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
1910 sizeof(struct ci_hw_qh),
1911 64, CI_HDRC_PAGE_SIZE);
1912 if (ci->qh_pool == NULL)
1913 return -ENOMEM;
1914
1915 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
1916 sizeof(struct ci_hw_td),
1917 64, CI_HDRC_PAGE_SIZE);
1918 if (ci->td_pool == NULL) {
1919 retval = -ENOMEM;
1920 goto free_qh_pool;
1921 }
1922
1923 retval = init_eps(ci);
1924 if (retval)
1925 goto free_pools;
1926
1927 ci->gadget.ep0 = &ci->ep0in->ep;
1928
1929 retval = usb_add_gadget_udc(dev, &ci->gadget);
1930 if (retval)
1931 goto destroy_eps;
1932
1933 pm_runtime_no_callbacks(&ci->gadget.dev);
1934 pm_runtime_enable(&ci->gadget.dev);
1935
1936 return retval;
1937
1938 destroy_eps:
1939 destroy_eps(ci);
1940 free_pools:
1941 dma_pool_destroy(ci->td_pool);
1942 free_qh_pool:
1943 dma_pool_destroy(ci->qh_pool);
1944 return retval;
1945 }
1946
1947 /**
1948 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1949 *
1950 * No interrupts active, the IRQ has been released
1951 */
1952 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1953 {
1954 if (!ci->roles[CI_ROLE_GADGET])
1955 return;
1956
1957 usb_del_gadget_udc(&ci->gadget);
1958
1959 destroy_eps(ci);
1960
1961 dma_pool_destroy(ci->td_pool);
1962 dma_pool_destroy(ci->qh_pool);
1963 }
1964
1965 static int udc_id_switch_for_device(struct ci_hdrc *ci)
1966 {
1967 if (ci->is_otg)
1968 /* Clear and enable BSV irq */
1969 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1970 OTGSC_BSVIS | OTGSC_BSVIE);
1971
1972 return 0;
1973 }
1974
1975 static void udc_id_switch_for_host(struct ci_hdrc *ci)
1976 {
1977 /*
1978 * host doesn't care B_SESSION_VALID event
1979 * so clear and disbale BSV irq
1980 */
1981 if (ci->is_otg)
1982 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
1983
1984 ci->vbus_active = 0;
1985 }
1986
1987 /**
1988 * ci_hdrc_gadget_init - initialize device related bits
1989 * ci: the controller
1990 *
1991 * This function initializes the gadget, if the device is "device capable".
1992 */
1993 int ci_hdrc_gadget_init(struct ci_hdrc *ci)
1994 {
1995 struct ci_role_driver *rdrv;
1996
1997 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1998 return -ENXIO;
1999
2000 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2001 if (!rdrv)
2002 return -ENOMEM;
2003
2004 rdrv->start = udc_id_switch_for_device;
2005 rdrv->stop = udc_id_switch_for_host;
2006 rdrv->irq = udc_irq;
2007 rdrv->name = "gadget";
2008 ci->roles[CI_ROLE_GADGET] = rdrv;
2009
2010 return udc_start(ci);
2011 }