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1 /*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/dmapool.h>
16 #include <linux/err.h>
17 #include <linux/irqreturn.h>
18 #include <linux/kernel.h>
19 #include <linux/slab.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <linux/usb/otg-fsm.h>
24 #include <linux/usb/chipidea.h>
25
26 #include "ci.h"
27 #include "udc.h"
28 #include "bits.h"
29 #include "otg.h"
30 #include "otg_fsm.h"
31
32 /* control endpoint description */
33 static const struct usb_endpoint_descriptor
34 ctrl_endpt_out_desc = {
35 .bLength = USB_DT_ENDPOINT_SIZE,
36 .bDescriptorType = USB_DT_ENDPOINT,
37
38 .bEndpointAddress = USB_DIR_OUT,
39 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
40 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
41 };
42
43 static const struct usb_endpoint_descriptor
44 ctrl_endpt_in_desc = {
45 .bLength = USB_DT_ENDPOINT_SIZE,
46 .bDescriptorType = USB_DT_ENDPOINT,
47
48 .bEndpointAddress = USB_DIR_IN,
49 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
50 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
51 };
52
53 /**
54 * hw_ep_bit: calculates the bit number
55 * @num: endpoint number
56 * @dir: endpoint direction
57 *
58 * This function returns bit number
59 */
60 static inline int hw_ep_bit(int num, int dir)
61 {
62 return num + (dir ? 16 : 0);
63 }
64
65 static inline int ep_to_bit(struct ci_hdrc *ci, int n)
66 {
67 int fill = 16 - ci->hw_ep_max / 2;
68
69 if (n >= ci->hw_ep_max / 2)
70 n += fill;
71
72 return n;
73 }
74
75 /**
76 * hw_device_state: enables/disables interrupts (execute without interruption)
77 * @dma: 0 => disable, !0 => enable and set dma engine
78 *
79 * This function returns an error code
80 */
81 static int hw_device_state(struct ci_hdrc *ci, u32 dma)
82 {
83 if (dma) {
84 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
85 /* interrupt, error, port change, reset, sleep/suspend */
86 hw_write(ci, OP_USBINTR, ~0,
87 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
88 } else {
89 hw_write(ci, OP_USBINTR, ~0, 0);
90 }
91 return 0;
92 }
93
94 /**
95 * hw_ep_flush: flush endpoint fifo (execute without interruption)
96 * @num: endpoint number
97 * @dir: endpoint direction
98 *
99 * This function returns an error code
100 */
101 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
102 {
103 int n = hw_ep_bit(num, dir);
104
105 do {
106 /* flush any pending transfer */
107 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
108 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
109 cpu_relax();
110 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
111
112 return 0;
113 }
114
115 /**
116 * hw_ep_disable: disables endpoint (execute without interruption)
117 * @num: endpoint number
118 * @dir: endpoint direction
119 *
120 * This function returns an error code
121 */
122 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
123 {
124 hw_ep_flush(ci, num, dir);
125 hw_write(ci, OP_ENDPTCTRL + num,
126 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
127 return 0;
128 }
129
130 /**
131 * hw_ep_enable: enables endpoint (execute without interruption)
132 * @num: endpoint number
133 * @dir: endpoint direction
134 * @type: endpoint type
135 *
136 * This function returns an error code
137 */
138 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
139 {
140 u32 mask, data;
141
142 if (dir) {
143 mask = ENDPTCTRL_TXT; /* type */
144 data = type << __ffs(mask);
145
146 mask |= ENDPTCTRL_TXS; /* unstall */
147 mask |= ENDPTCTRL_TXR; /* reset data toggle */
148 data |= ENDPTCTRL_TXR;
149 mask |= ENDPTCTRL_TXE; /* enable */
150 data |= ENDPTCTRL_TXE;
151 } else {
152 mask = ENDPTCTRL_RXT; /* type */
153 data = type << __ffs(mask);
154
155 mask |= ENDPTCTRL_RXS; /* unstall */
156 mask |= ENDPTCTRL_RXR; /* reset data toggle */
157 data |= ENDPTCTRL_RXR;
158 mask |= ENDPTCTRL_RXE; /* enable */
159 data |= ENDPTCTRL_RXE;
160 }
161 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
162 return 0;
163 }
164
165 /**
166 * hw_ep_get_halt: return endpoint halt status
167 * @num: endpoint number
168 * @dir: endpoint direction
169 *
170 * This function returns 1 if endpoint halted
171 */
172 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
173 {
174 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
175
176 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
177 }
178
179 /**
180 * hw_ep_prime: primes endpoint (execute without interruption)
181 * @num: endpoint number
182 * @dir: endpoint direction
183 * @is_ctrl: true if control endpoint
184 *
185 * This function returns an error code
186 */
187 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
188 {
189 int n = hw_ep_bit(num, dir);
190
191 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
192 return -EAGAIN;
193
194 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
195
196 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
197 cpu_relax();
198 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
199 return -EAGAIN;
200
201 /* status shoult be tested according with manual but it doesn't work */
202 return 0;
203 }
204
205 /**
206 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
207 * without interruption)
208 * @num: endpoint number
209 * @dir: endpoint direction
210 * @value: true => stall, false => unstall
211 *
212 * This function returns an error code
213 */
214 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
215 {
216 if (value != 0 && value != 1)
217 return -EINVAL;
218
219 do {
220 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
221 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
222 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
223
224 /* data toggle - reserved for EP0 but it's in ESS */
225 hw_write(ci, reg, mask_xs|mask_xr,
226 value ? mask_xs : mask_xr);
227 } while (value != hw_ep_get_halt(ci, num, dir));
228
229 return 0;
230 }
231
232 /**
233 * hw_is_port_high_speed: test if port is high speed
234 *
235 * This function returns true if high speed port
236 */
237 static int hw_port_is_high_speed(struct ci_hdrc *ci)
238 {
239 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
240 hw_read(ci, OP_PORTSC, PORTSC_HSP);
241 }
242
243 /**
244 * hw_test_and_clear_complete: test & clear complete status (execute without
245 * interruption)
246 * @n: endpoint number
247 *
248 * This function returns complete status
249 */
250 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
251 {
252 n = ep_to_bit(ci, n);
253 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
254 }
255
256 /**
257 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
258 * without interruption)
259 *
260 * This function returns active interrutps
261 */
262 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
263 {
264 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
265
266 hw_write(ci, OP_USBSTS, ~0, reg);
267 return reg;
268 }
269
270 /**
271 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
272 * interruption)
273 *
274 * This function returns guard value
275 */
276 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
277 {
278 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
279 }
280
281 /**
282 * hw_test_and_set_setup_guard: test & set setup guard (execute without
283 * interruption)
284 *
285 * This function returns guard value
286 */
287 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
288 {
289 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
290 }
291
292 /**
293 * hw_usb_set_address: configures USB address (execute without interruption)
294 * @value: new USB address
295 *
296 * This function explicitly sets the address, without the "USBADRA" (advance)
297 * feature, which is not supported by older versions of the controller.
298 */
299 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
300 {
301 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
302 value << __ffs(DEVICEADDR_USBADR));
303 }
304
305 /**
306 * hw_usb_reset: restart device after a bus reset (execute without
307 * interruption)
308 *
309 * This function returns an error code
310 */
311 static int hw_usb_reset(struct ci_hdrc *ci)
312 {
313 hw_usb_set_address(ci, 0);
314
315 /* ESS flushes only at end?!? */
316 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
317
318 /* clear setup token semaphores */
319 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
320
321 /* clear complete status */
322 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
323
324 /* wait until all bits cleared */
325 while (hw_read(ci, OP_ENDPTPRIME, ~0))
326 udelay(10); /* not RTOS friendly */
327
328 /* reset all endpoints ? */
329
330 /* reset internal status and wait for further instructions
331 no need to verify the port reset status (ESS does it) */
332
333 return 0;
334 }
335
336 /******************************************************************************
337 * UTIL block
338 *****************************************************************************/
339
340 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
341 unsigned length)
342 {
343 int i;
344 u32 temp;
345 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
346 GFP_ATOMIC);
347
348 if (node == NULL)
349 return -ENOMEM;
350
351 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC,
352 &node->dma);
353 if (node->ptr == NULL) {
354 kfree(node);
355 return -ENOMEM;
356 }
357
358 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
359 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
360 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
361 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
362 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
363
364 if (hwreq->req.length == 0
365 || hwreq->req.length % hwep->ep.maxpacket)
366 mul++;
367 node->ptr->token |= mul << __ffs(TD_MULTO);
368 }
369
370 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
371 if (length) {
372 node->ptr->page[0] = cpu_to_le32(temp);
373 for (i = 1; i < TD_PAGE_COUNT; i++) {
374 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
375 page &= ~TD_RESERVED_MASK;
376 node->ptr->page[i] = cpu_to_le32(page);
377 }
378 }
379
380 hwreq->req.actual += length;
381
382 if (!list_empty(&hwreq->tds)) {
383 /* get the last entry */
384 lastnode = list_entry(hwreq->tds.prev,
385 struct td_node, td);
386 lastnode->ptr->next = cpu_to_le32(node->dma);
387 }
388
389 INIT_LIST_HEAD(&node->td);
390 list_add_tail(&node->td, &hwreq->tds);
391
392 return 0;
393 }
394
395 /**
396 * _usb_addr: calculates endpoint address from direction & number
397 * @ep: endpoint
398 */
399 static inline u8 _usb_addr(struct ci_hw_ep *ep)
400 {
401 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
402 }
403
404 /**
405 * _hardware_enqueue: configures a request at hardware level
406 * @hwep: endpoint
407 * @hwreq: request
408 *
409 * This function returns an error code
410 */
411 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
412 {
413 struct ci_hdrc *ci = hwep->ci;
414 int ret = 0;
415 unsigned rest = hwreq->req.length;
416 int pages = TD_PAGE_COUNT;
417 struct td_node *firstnode, *lastnode;
418
419 /* don't queue twice */
420 if (hwreq->req.status == -EALREADY)
421 return -EALREADY;
422
423 hwreq->req.status = -EALREADY;
424
425 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
426 if (ret)
427 return ret;
428
429 /*
430 * The first buffer could be not page aligned.
431 * In that case we have to span into one extra td.
432 */
433 if (hwreq->req.dma % PAGE_SIZE)
434 pages--;
435
436 if (rest == 0) {
437 ret = add_td_to_list(hwep, hwreq, 0);
438 if (ret < 0)
439 goto done;
440 }
441
442 while (rest > 0) {
443 unsigned count = min(hwreq->req.length - hwreq->req.actual,
444 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
445 ret = add_td_to_list(hwep, hwreq, count);
446 if (ret < 0)
447 goto done;
448
449 rest -= count;
450 }
451
452 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
453 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
454 ret = add_td_to_list(hwep, hwreq, 0);
455 if (ret < 0)
456 goto done;
457 }
458
459 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
460
461 lastnode = list_entry(hwreq->tds.prev,
462 struct td_node, td);
463
464 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
465 if (!hwreq->req.no_interrupt)
466 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
467 wmb();
468
469 hwreq->req.actual = 0;
470 if (!list_empty(&hwep->qh.queue)) {
471 struct ci_hw_req *hwreqprev;
472 int n = hw_ep_bit(hwep->num, hwep->dir);
473 int tmp_stat;
474 struct td_node *prevlastnode;
475 u32 next = firstnode->dma & TD_ADDR_MASK;
476
477 hwreqprev = list_entry(hwep->qh.queue.prev,
478 struct ci_hw_req, queue);
479 prevlastnode = list_entry(hwreqprev->tds.prev,
480 struct td_node, td);
481
482 prevlastnode->ptr->next = cpu_to_le32(next);
483 wmb();
484 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
485 goto done;
486 do {
487 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
488 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
489 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
490 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
491 if (tmp_stat)
492 goto done;
493 }
494
495 /* QH configuration */
496 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
497 hwep->qh.ptr->td.token &=
498 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
499
500 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
501 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
502
503 if (hwreq->req.length == 0
504 || hwreq->req.length % hwep->ep.maxpacket)
505 mul++;
506 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
507 }
508
509 wmb(); /* synchronize before ep prime */
510
511 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
512 hwep->type == USB_ENDPOINT_XFER_CONTROL);
513 done:
514 return ret;
515 }
516
517 /*
518 * free_pending_td: remove a pending request for the endpoint
519 * @hwep: endpoint
520 */
521 static void free_pending_td(struct ci_hw_ep *hwep)
522 {
523 struct td_node *pending = hwep->pending_td;
524
525 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
526 hwep->pending_td = NULL;
527 kfree(pending);
528 }
529
530 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
531 struct td_node *node)
532 {
533 hwep->qh.ptr->td.next = node->dma;
534 hwep->qh.ptr->td.token &=
535 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
536
537 /* Synchronize before ep prime */
538 wmb();
539
540 return hw_ep_prime(ci, hwep->num, hwep->dir,
541 hwep->type == USB_ENDPOINT_XFER_CONTROL);
542 }
543
544 /**
545 * _hardware_dequeue: handles a request at hardware level
546 * @gadget: gadget
547 * @hwep: endpoint
548 *
549 * This function returns an error code
550 */
551 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
552 {
553 u32 tmptoken;
554 struct td_node *node, *tmpnode;
555 unsigned remaining_length;
556 unsigned actual = hwreq->req.length;
557 struct ci_hdrc *ci = hwep->ci;
558
559 if (hwreq->req.status != -EALREADY)
560 return -EINVAL;
561
562 hwreq->req.status = 0;
563
564 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
565 tmptoken = le32_to_cpu(node->ptr->token);
566 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
567 int n = hw_ep_bit(hwep->num, hwep->dir);
568
569 if (ci->rev == CI_REVISION_24)
570 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
571 reprime_dtd(ci, hwep, node);
572 hwreq->req.status = -EALREADY;
573 return -EBUSY;
574 }
575
576 remaining_length = (tmptoken & TD_TOTAL_BYTES);
577 remaining_length >>= __ffs(TD_TOTAL_BYTES);
578 actual -= remaining_length;
579
580 hwreq->req.status = tmptoken & TD_STATUS;
581 if ((TD_STATUS_HALTED & hwreq->req.status)) {
582 hwreq->req.status = -EPIPE;
583 break;
584 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
585 hwreq->req.status = -EPROTO;
586 break;
587 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
588 hwreq->req.status = -EILSEQ;
589 break;
590 }
591
592 if (remaining_length) {
593 if (hwep->dir) {
594 hwreq->req.status = -EPROTO;
595 break;
596 }
597 }
598 /*
599 * As the hardware could still address the freed td
600 * which will run the udc unusable, the cleanup of the
601 * td has to be delayed by one.
602 */
603 if (hwep->pending_td)
604 free_pending_td(hwep);
605
606 hwep->pending_td = node;
607 list_del_init(&node->td);
608 }
609
610 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
611
612 hwreq->req.actual += actual;
613
614 if (hwreq->req.status)
615 return hwreq->req.status;
616
617 return hwreq->req.actual;
618 }
619
620 /**
621 * _ep_nuke: dequeues all endpoint requests
622 * @hwep: endpoint
623 *
624 * This function returns an error code
625 * Caller must hold lock
626 */
627 static int _ep_nuke(struct ci_hw_ep *hwep)
628 __releases(hwep->lock)
629 __acquires(hwep->lock)
630 {
631 struct td_node *node, *tmpnode;
632 if (hwep == NULL)
633 return -EINVAL;
634
635 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
636
637 while (!list_empty(&hwep->qh.queue)) {
638
639 /* pop oldest request */
640 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
641 struct ci_hw_req, queue);
642
643 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
644 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
645 list_del_init(&node->td);
646 node->ptr = NULL;
647 kfree(node);
648 }
649
650 list_del_init(&hwreq->queue);
651 hwreq->req.status = -ESHUTDOWN;
652
653 if (hwreq->req.complete != NULL) {
654 spin_unlock(hwep->lock);
655 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
656 spin_lock(hwep->lock);
657 }
658 }
659
660 if (hwep->pending_td)
661 free_pending_td(hwep);
662
663 return 0;
664 }
665
666 static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
667 {
668 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
669 int direction, retval = 0;
670 unsigned long flags;
671
672 if (ep == NULL || hwep->ep.desc == NULL)
673 return -EINVAL;
674
675 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
676 return -EOPNOTSUPP;
677
678 spin_lock_irqsave(hwep->lock, flags);
679
680 if (value && hwep->dir == TX && check_transfer &&
681 !list_empty(&hwep->qh.queue) &&
682 !usb_endpoint_xfer_control(hwep->ep.desc)) {
683 spin_unlock_irqrestore(hwep->lock, flags);
684 return -EAGAIN;
685 }
686
687 direction = hwep->dir;
688 do {
689 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
690
691 if (!value)
692 hwep->wedge = 0;
693
694 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
695 hwep->dir = (hwep->dir == TX) ? RX : TX;
696
697 } while (hwep->dir != direction);
698
699 spin_unlock_irqrestore(hwep->lock, flags);
700 return retval;
701 }
702
703
704 /**
705 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
706 * @gadget: gadget
707 *
708 * This function returns an error code
709 */
710 static int _gadget_stop_activity(struct usb_gadget *gadget)
711 {
712 struct usb_ep *ep;
713 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
714 unsigned long flags;
715
716 spin_lock_irqsave(&ci->lock, flags);
717 ci->gadget.speed = USB_SPEED_UNKNOWN;
718 ci->remote_wakeup = 0;
719 ci->suspended = 0;
720 spin_unlock_irqrestore(&ci->lock, flags);
721
722 /* flush all endpoints */
723 gadget_for_each_ep(ep, gadget) {
724 usb_ep_fifo_flush(ep);
725 }
726 usb_ep_fifo_flush(&ci->ep0out->ep);
727 usb_ep_fifo_flush(&ci->ep0in->ep);
728
729 /* make sure to disable all endpoints */
730 gadget_for_each_ep(ep, gadget) {
731 usb_ep_disable(ep);
732 }
733
734 if (ci->status != NULL) {
735 usb_ep_free_request(&ci->ep0in->ep, ci->status);
736 ci->status = NULL;
737 }
738
739 return 0;
740 }
741
742 /******************************************************************************
743 * ISR block
744 *****************************************************************************/
745 /**
746 * isr_reset_handler: USB reset interrupt handler
747 * @ci: UDC device
748 *
749 * This function resets USB engine after a bus reset occurred
750 */
751 static void isr_reset_handler(struct ci_hdrc *ci)
752 __releases(ci->lock)
753 __acquires(ci->lock)
754 {
755 int retval;
756
757 spin_unlock(&ci->lock);
758 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
759 usb_gadget_udc_reset(&ci->gadget, ci->driver);
760
761 retval = _gadget_stop_activity(&ci->gadget);
762 if (retval)
763 goto done;
764
765 retval = hw_usb_reset(ci);
766 if (retval)
767 goto done;
768
769 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
770 if (ci->status == NULL)
771 retval = -ENOMEM;
772
773 done:
774 spin_lock(&ci->lock);
775
776 if (retval)
777 dev_err(ci->dev, "error: %i\n", retval);
778 }
779
780 /**
781 * isr_get_status_complete: get_status request complete function
782 * @ep: endpoint
783 * @req: request handled
784 *
785 * Caller must release lock
786 */
787 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
788 {
789 if (ep == NULL || req == NULL)
790 return;
791
792 kfree(req->buf);
793 usb_ep_free_request(ep, req);
794 }
795
796 /**
797 * _ep_queue: queues (submits) an I/O request to an endpoint
798 * @ep: endpoint
799 * @req: request
800 * @gfp_flags: GFP flags (not used)
801 *
802 * Caller must hold lock
803 * This function returns an error code
804 */
805 static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
806 gfp_t __maybe_unused gfp_flags)
807 {
808 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
809 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
810 struct ci_hdrc *ci = hwep->ci;
811 int retval = 0;
812
813 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
814 return -EINVAL;
815
816 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
817 if (req->length)
818 hwep = (ci->ep0_dir == RX) ?
819 ci->ep0out : ci->ep0in;
820 if (!list_empty(&hwep->qh.queue)) {
821 _ep_nuke(hwep);
822 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
823 _usb_addr(hwep));
824 }
825 }
826
827 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
828 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
829 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
830 return -EMSGSIZE;
831 }
832
833 /* first nuke then test link, e.g. previous status has not sent */
834 if (!list_empty(&hwreq->queue)) {
835 dev_err(hwep->ci->dev, "request already in queue\n");
836 return -EBUSY;
837 }
838
839 /* push request */
840 hwreq->req.status = -EINPROGRESS;
841 hwreq->req.actual = 0;
842
843 retval = _hardware_enqueue(hwep, hwreq);
844
845 if (retval == -EALREADY)
846 retval = 0;
847 if (!retval)
848 list_add_tail(&hwreq->queue, &hwep->qh.queue);
849
850 return retval;
851 }
852
853 /**
854 * isr_get_status_response: get_status request response
855 * @ci: ci struct
856 * @setup: setup request packet
857 *
858 * This function returns an error code
859 */
860 static int isr_get_status_response(struct ci_hdrc *ci,
861 struct usb_ctrlrequest *setup)
862 __releases(hwep->lock)
863 __acquires(hwep->lock)
864 {
865 struct ci_hw_ep *hwep = ci->ep0in;
866 struct usb_request *req = NULL;
867 gfp_t gfp_flags = GFP_ATOMIC;
868 int dir, num, retval;
869
870 if (hwep == NULL || setup == NULL)
871 return -EINVAL;
872
873 spin_unlock(hwep->lock);
874 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
875 spin_lock(hwep->lock);
876 if (req == NULL)
877 return -ENOMEM;
878
879 req->complete = isr_get_status_complete;
880 req->length = 2;
881 req->buf = kzalloc(req->length, gfp_flags);
882 if (req->buf == NULL) {
883 retval = -ENOMEM;
884 goto err_free_req;
885 }
886
887 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
888 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
889 ci->gadget.is_selfpowered;
890 } else if ((setup->bRequestType & USB_RECIP_MASK) \
891 == USB_RECIP_ENDPOINT) {
892 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
893 TX : RX;
894 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
895 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
896 }
897 /* else do nothing; reserved for future use */
898
899 retval = _ep_queue(&hwep->ep, req, gfp_flags);
900 if (retval)
901 goto err_free_buf;
902
903 return 0;
904
905 err_free_buf:
906 kfree(req->buf);
907 err_free_req:
908 spin_unlock(hwep->lock);
909 usb_ep_free_request(&hwep->ep, req);
910 spin_lock(hwep->lock);
911 return retval;
912 }
913
914 /**
915 * isr_setup_status_complete: setup_status request complete function
916 * @ep: endpoint
917 * @req: request handled
918 *
919 * Caller must release lock. Put the port in test mode if test mode
920 * feature is selected.
921 */
922 static void
923 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
924 {
925 struct ci_hdrc *ci = req->context;
926 unsigned long flags;
927
928 if (ci->setaddr) {
929 hw_usb_set_address(ci, ci->address);
930 ci->setaddr = false;
931 if (ci->address)
932 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
933 }
934
935 spin_lock_irqsave(&ci->lock, flags);
936 if (ci->test_mode)
937 hw_port_test_set(ci, ci->test_mode);
938 spin_unlock_irqrestore(&ci->lock, flags);
939 }
940
941 /**
942 * isr_setup_status_phase: queues the status phase of a setup transation
943 * @ci: ci struct
944 *
945 * This function returns an error code
946 */
947 static int isr_setup_status_phase(struct ci_hdrc *ci)
948 {
949 int retval;
950 struct ci_hw_ep *hwep;
951
952 /*
953 * Unexpected USB controller behavior, caused by bad signal integrity
954 * or ground reference problems, can lead to isr_setup_status_phase
955 * being called with ci->status equal to NULL.
956 * If this situation occurs, you should review your USB hardware design.
957 */
958 if (WARN_ON_ONCE(!ci->status))
959 return -EPIPE;
960
961 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
962 ci->status->context = ci;
963 ci->status->complete = isr_setup_status_complete;
964
965 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
966
967 return retval;
968 }
969
970 /**
971 * isr_tr_complete_low: transaction complete low level handler
972 * @hwep: endpoint
973 *
974 * This function returns an error code
975 * Caller must hold lock
976 */
977 static int isr_tr_complete_low(struct ci_hw_ep *hwep)
978 __releases(hwep->lock)
979 __acquires(hwep->lock)
980 {
981 struct ci_hw_req *hwreq, *hwreqtemp;
982 struct ci_hw_ep *hweptemp = hwep;
983 int retval = 0;
984
985 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
986 queue) {
987 retval = _hardware_dequeue(hwep, hwreq);
988 if (retval < 0)
989 break;
990 list_del_init(&hwreq->queue);
991 if (hwreq->req.complete != NULL) {
992 spin_unlock(hwep->lock);
993 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
994 hwreq->req.length)
995 hweptemp = hwep->ci->ep0in;
996 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
997 spin_lock(hwep->lock);
998 }
999 }
1000
1001 if (retval == -EBUSY)
1002 retval = 0;
1003
1004 return retval;
1005 }
1006
1007 static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1008 {
1009 dev_warn(&ci->gadget.dev,
1010 "connect the device to an alternate port if you want HNP\n");
1011 return isr_setup_status_phase(ci);
1012 }
1013
1014 /**
1015 * isr_setup_packet_handler: setup packet handler
1016 * @ci: UDC descriptor
1017 *
1018 * This function handles setup packet
1019 */
1020 static void isr_setup_packet_handler(struct ci_hdrc *ci)
1021 __releases(ci->lock)
1022 __acquires(ci->lock)
1023 {
1024 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1025 struct usb_ctrlrequest req;
1026 int type, num, dir, err = -EINVAL;
1027 u8 tmode = 0;
1028
1029 /*
1030 * Flush data and handshake transactions of previous
1031 * setup packet.
1032 */
1033 _ep_nuke(ci->ep0out);
1034 _ep_nuke(ci->ep0in);
1035
1036 /* read_setup_packet */
1037 do {
1038 hw_test_and_set_setup_guard(ci);
1039 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1040 } while (!hw_test_and_clear_setup_guard(ci));
1041
1042 type = req.bRequestType;
1043
1044 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1045
1046 switch (req.bRequest) {
1047 case USB_REQ_CLEAR_FEATURE:
1048 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1049 le16_to_cpu(req.wValue) ==
1050 USB_ENDPOINT_HALT) {
1051 if (req.wLength != 0)
1052 break;
1053 num = le16_to_cpu(req.wIndex);
1054 dir = num & USB_ENDPOINT_DIR_MASK;
1055 num &= USB_ENDPOINT_NUMBER_MASK;
1056 if (dir) /* TX */
1057 num += ci->hw_ep_max / 2;
1058 if (!ci->ci_hw_ep[num].wedge) {
1059 spin_unlock(&ci->lock);
1060 err = usb_ep_clear_halt(
1061 &ci->ci_hw_ep[num].ep);
1062 spin_lock(&ci->lock);
1063 if (err)
1064 break;
1065 }
1066 err = isr_setup_status_phase(ci);
1067 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1068 le16_to_cpu(req.wValue) ==
1069 USB_DEVICE_REMOTE_WAKEUP) {
1070 if (req.wLength != 0)
1071 break;
1072 ci->remote_wakeup = 0;
1073 err = isr_setup_status_phase(ci);
1074 } else {
1075 goto delegate;
1076 }
1077 break;
1078 case USB_REQ_GET_STATUS:
1079 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1080 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1081 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1082 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1083 goto delegate;
1084 if (le16_to_cpu(req.wLength) != 2 ||
1085 le16_to_cpu(req.wValue) != 0)
1086 break;
1087 err = isr_get_status_response(ci, &req);
1088 break;
1089 case USB_REQ_SET_ADDRESS:
1090 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1091 goto delegate;
1092 if (le16_to_cpu(req.wLength) != 0 ||
1093 le16_to_cpu(req.wIndex) != 0)
1094 break;
1095 ci->address = (u8)le16_to_cpu(req.wValue);
1096 ci->setaddr = true;
1097 err = isr_setup_status_phase(ci);
1098 break;
1099 case USB_REQ_SET_FEATURE:
1100 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1101 le16_to_cpu(req.wValue) ==
1102 USB_ENDPOINT_HALT) {
1103 if (req.wLength != 0)
1104 break;
1105 num = le16_to_cpu(req.wIndex);
1106 dir = num & USB_ENDPOINT_DIR_MASK;
1107 num &= USB_ENDPOINT_NUMBER_MASK;
1108 if (dir) /* TX */
1109 num += ci->hw_ep_max / 2;
1110
1111 spin_unlock(&ci->lock);
1112 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1113 spin_lock(&ci->lock);
1114 if (!err)
1115 isr_setup_status_phase(ci);
1116 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1117 if (req.wLength != 0)
1118 break;
1119 switch (le16_to_cpu(req.wValue)) {
1120 case USB_DEVICE_REMOTE_WAKEUP:
1121 ci->remote_wakeup = 1;
1122 err = isr_setup_status_phase(ci);
1123 break;
1124 case USB_DEVICE_TEST_MODE:
1125 tmode = le16_to_cpu(req.wIndex) >> 8;
1126 switch (tmode) {
1127 case TEST_J:
1128 case TEST_K:
1129 case TEST_SE0_NAK:
1130 case TEST_PACKET:
1131 case TEST_FORCE_EN:
1132 ci->test_mode = tmode;
1133 err = isr_setup_status_phase(
1134 ci);
1135 break;
1136 default:
1137 break;
1138 }
1139 break;
1140 case USB_DEVICE_B_HNP_ENABLE:
1141 if (ci_otg_is_fsm_mode(ci)) {
1142 ci->gadget.b_hnp_enable = 1;
1143 err = isr_setup_status_phase(
1144 ci);
1145 }
1146 break;
1147 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1148 if (ci_otg_is_fsm_mode(ci))
1149 err = otg_a_alt_hnp_support(ci);
1150 break;
1151 case USB_DEVICE_A_HNP_SUPPORT:
1152 if (ci_otg_is_fsm_mode(ci)) {
1153 ci->gadget.a_hnp_support = 1;
1154 err = isr_setup_status_phase(
1155 ci);
1156 }
1157 break;
1158 default:
1159 goto delegate;
1160 }
1161 } else {
1162 goto delegate;
1163 }
1164 break;
1165 default:
1166 delegate:
1167 if (req.wLength == 0) /* no data phase */
1168 ci->ep0_dir = TX;
1169
1170 spin_unlock(&ci->lock);
1171 err = ci->driver->setup(&ci->gadget, &req);
1172 spin_lock(&ci->lock);
1173 break;
1174 }
1175
1176 if (err < 0) {
1177 spin_unlock(&ci->lock);
1178 if (_ep_set_halt(&hwep->ep, 1, false))
1179 dev_err(ci->dev, "error: _ep_set_halt\n");
1180 spin_lock(&ci->lock);
1181 }
1182 }
1183
1184 /**
1185 * isr_tr_complete_handler: transaction complete interrupt handler
1186 * @ci: UDC descriptor
1187 *
1188 * This function handles traffic events
1189 */
1190 static void isr_tr_complete_handler(struct ci_hdrc *ci)
1191 __releases(ci->lock)
1192 __acquires(ci->lock)
1193 {
1194 unsigned i;
1195 int err;
1196
1197 for (i = 0; i < ci->hw_ep_max; i++) {
1198 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1199
1200 if (hwep->ep.desc == NULL)
1201 continue; /* not configured */
1202
1203 if (hw_test_and_clear_complete(ci, i)) {
1204 err = isr_tr_complete_low(hwep);
1205 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1206 if (err > 0) /* needs status phase */
1207 err = isr_setup_status_phase(ci);
1208 if (err < 0) {
1209 spin_unlock(&ci->lock);
1210 if (_ep_set_halt(&hwep->ep, 1, false))
1211 dev_err(ci->dev,
1212 "error: _ep_set_halt\n");
1213 spin_lock(&ci->lock);
1214 }
1215 }
1216 }
1217
1218 /* Only handle setup packet below */
1219 if (i == 0 &&
1220 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1221 isr_setup_packet_handler(ci);
1222 }
1223 }
1224
1225 /******************************************************************************
1226 * ENDPT block
1227 *****************************************************************************/
1228 /**
1229 * ep_enable: configure endpoint, making it usable
1230 *
1231 * Check usb_ep_enable() at "usb_gadget.h" for details
1232 */
1233 static int ep_enable(struct usb_ep *ep,
1234 const struct usb_endpoint_descriptor *desc)
1235 {
1236 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1237 int retval = 0;
1238 unsigned long flags;
1239 u32 cap = 0;
1240
1241 if (ep == NULL || desc == NULL)
1242 return -EINVAL;
1243
1244 spin_lock_irqsave(hwep->lock, flags);
1245
1246 /* only internal SW should enable ctrl endpts */
1247
1248 if (!list_empty(&hwep->qh.queue)) {
1249 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1250 spin_unlock_irqrestore(hwep->lock, flags);
1251 return -EBUSY;
1252 }
1253
1254 hwep->ep.desc = desc;
1255
1256 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1257 hwep->num = usb_endpoint_num(desc);
1258 hwep->type = usb_endpoint_type(desc);
1259
1260 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1261 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
1262
1263 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1264 cap |= QH_IOS;
1265
1266 cap |= QH_ZLT;
1267 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1268 /*
1269 * For ISO-TX, we set mult at QH as the largest value, and use
1270 * MultO at TD as real mult value.
1271 */
1272 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1273 cap |= 3 << __ffs(QH_MULT);
1274
1275 hwep->qh.ptr->cap = cpu_to_le32(cap);
1276
1277 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1278
1279 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1280 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1281 retval = -EINVAL;
1282 }
1283
1284 /*
1285 * Enable endpoints in the HW other than ep0 as ep0
1286 * is always enabled
1287 */
1288 if (hwep->num)
1289 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1290 hwep->type);
1291
1292 spin_unlock_irqrestore(hwep->lock, flags);
1293 return retval;
1294 }
1295
1296 /**
1297 * ep_disable: endpoint is no longer usable
1298 *
1299 * Check usb_ep_disable() at "usb_gadget.h" for details
1300 */
1301 static int ep_disable(struct usb_ep *ep)
1302 {
1303 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1304 int direction, retval = 0;
1305 unsigned long flags;
1306
1307 if (ep == NULL)
1308 return -EINVAL;
1309 else if (hwep->ep.desc == NULL)
1310 return -EBUSY;
1311
1312 spin_lock_irqsave(hwep->lock, flags);
1313
1314 /* only internal SW should disable ctrl endpts */
1315
1316 direction = hwep->dir;
1317 do {
1318 retval |= _ep_nuke(hwep);
1319 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1320
1321 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1322 hwep->dir = (hwep->dir == TX) ? RX : TX;
1323
1324 } while (hwep->dir != direction);
1325
1326 hwep->ep.desc = NULL;
1327
1328 spin_unlock_irqrestore(hwep->lock, flags);
1329 return retval;
1330 }
1331
1332 /**
1333 * ep_alloc_request: allocate a request object to use with this endpoint
1334 *
1335 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1336 */
1337 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1338 {
1339 struct ci_hw_req *hwreq = NULL;
1340
1341 if (ep == NULL)
1342 return NULL;
1343
1344 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1345 if (hwreq != NULL) {
1346 INIT_LIST_HEAD(&hwreq->queue);
1347 INIT_LIST_HEAD(&hwreq->tds);
1348 }
1349
1350 return (hwreq == NULL) ? NULL : &hwreq->req;
1351 }
1352
1353 /**
1354 * ep_free_request: frees a request object
1355 *
1356 * Check usb_ep_free_request() at "usb_gadget.h" for details
1357 */
1358 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1359 {
1360 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1361 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1362 struct td_node *node, *tmpnode;
1363 unsigned long flags;
1364
1365 if (ep == NULL || req == NULL) {
1366 return;
1367 } else if (!list_empty(&hwreq->queue)) {
1368 dev_err(hwep->ci->dev, "freeing queued request\n");
1369 return;
1370 }
1371
1372 spin_lock_irqsave(hwep->lock, flags);
1373
1374 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1375 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1376 list_del_init(&node->td);
1377 node->ptr = NULL;
1378 kfree(node);
1379 }
1380
1381 kfree(hwreq);
1382
1383 spin_unlock_irqrestore(hwep->lock, flags);
1384 }
1385
1386 /**
1387 * ep_queue: queues (submits) an I/O request to an endpoint
1388 *
1389 * Check usb_ep_queue()* at usb_gadget.h" for details
1390 */
1391 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1392 gfp_t __maybe_unused gfp_flags)
1393 {
1394 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1395 int retval = 0;
1396 unsigned long flags;
1397
1398 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1399 return -EINVAL;
1400
1401 spin_lock_irqsave(hwep->lock, flags);
1402 retval = _ep_queue(ep, req, gfp_flags);
1403 spin_unlock_irqrestore(hwep->lock, flags);
1404 return retval;
1405 }
1406
1407 /**
1408 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1409 *
1410 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1411 */
1412 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1413 {
1414 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1415 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1416 unsigned long flags;
1417 struct td_node *node, *tmpnode;
1418
1419 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1420 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1421 list_empty(&hwep->qh.queue))
1422 return -EINVAL;
1423
1424 spin_lock_irqsave(hwep->lock, flags);
1425
1426 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1427
1428 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1429 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1430 list_del(&node->td);
1431 kfree(node);
1432 }
1433
1434 /* pop request */
1435 list_del_init(&hwreq->queue);
1436
1437 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1438
1439 req->status = -ECONNRESET;
1440
1441 if (hwreq->req.complete != NULL) {
1442 spin_unlock(hwep->lock);
1443 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1444 spin_lock(hwep->lock);
1445 }
1446
1447 spin_unlock_irqrestore(hwep->lock, flags);
1448 return 0;
1449 }
1450
1451 /**
1452 * ep_set_halt: sets the endpoint halt feature
1453 *
1454 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1455 */
1456 static int ep_set_halt(struct usb_ep *ep, int value)
1457 {
1458 return _ep_set_halt(ep, value, true);
1459 }
1460
1461 /**
1462 * ep_set_wedge: sets the halt feature and ignores clear requests
1463 *
1464 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1465 */
1466 static int ep_set_wedge(struct usb_ep *ep)
1467 {
1468 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1469 unsigned long flags;
1470
1471 if (ep == NULL || hwep->ep.desc == NULL)
1472 return -EINVAL;
1473
1474 spin_lock_irqsave(hwep->lock, flags);
1475 hwep->wedge = 1;
1476 spin_unlock_irqrestore(hwep->lock, flags);
1477
1478 return usb_ep_set_halt(ep);
1479 }
1480
1481 /**
1482 * ep_fifo_flush: flushes contents of a fifo
1483 *
1484 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1485 */
1486 static void ep_fifo_flush(struct usb_ep *ep)
1487 {
1488 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1489 unsigned long flags;
1490
1491 if (ep == NULL) {
1492 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1493 return;
1494 }
1495
1496 spin_lock_irqsave(hwep->lock, flags);
1497
1498 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1499
1500 spin_unlock_irqrestore(hwep->lock, flags);
1501 }
1502
1503 /**
1504 * Endpoint-specific part of the API to the USB controller hardware
1505 * Check "usb_gadget.h" for details
1506 */
1507 static const struct usb_ep_ops usb_ep_ops = {
1508 .enable = ep_enable,
1509 .disable = ep_disable,
1510 .alloc_request = ep_alloc_request,
1511 .free_request = ep_free_request,
1512 .queue = ep_queue,
1513 .dequeue = ep_dequeue,
1514 .set_halt = ep_set_halt,
1515 .set_wedge = ep_set_wedge,
1516 .fifo_flush = ep_fifo_flush,
1517 };
1518
1519 /******************************************************************************
1520 * GADGET block
1521 *****************************************************************************/
1522 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1523 {
1524 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1525 unsigned long flags;
1526 int gadget_ready = 0;
1527
1528 spin_lock_irqsave(&ci->lock, flags);
1529 ci->vbus_active = is_active;
1530 if (ci->driver)
1531 gadget_ready = 1;
1532 spin_unlock_irqrestore(&ci->lock, flags);
1533
1534 if (gadget_ready) {
1535 if (is_active) {
1536 pm_runtime_get_sync(&_gadget->dev);
1537 hw_device_reset(ci);
1538 hw_device_state(ci, ci->ep0out->qh.dma);
1539 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1540 usb_udc_vbus_handler(_gadget, true);
1541 } else {
1542 usb_udc_vbus_handler(_gadget, false);
1543 if (ci->driver)
1544 ci->driver->disconnect(&ci->gadget);
1545 hw_device_state(ci, 0);
1546 if (ci->platdata->notify_event)
1547 ci->platdata->notify_event(ci,
1548 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1549 _gadget_stop_activity(&ci->gadget);
1550 pm_runtime_put_sync(&_gadget->dev);
1551 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1552 }
1553 }
1554
1555 return 0;
1556 }
1557
1558 static int ci_udc_wakeup(struct usb_gadget *_gadget)
1559 {
1560 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1561 unsigned long flags;
1562 int ret = 0;
1563
1564 spin_lock_irqsave(&ci->lock, flags);
1565 if (!ci->remote_wakeup) {
1566 ret = -EOPNOTSUPP;
1567 goto out;
1568 }
1569 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1570 ret = -EINVAL;
1571 goto out;
1572 }
1573 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1574 out:
1575 spin_unlock_irqrestore(&ci->lock, flags);
1576 return ret;
1577 }
1578
1579 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1580 {
1581 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1582
1583 if (ci->usb_phy)
1584 return usb_phy_set_power(ci->usb_phy, ma);
1585 return -ENOTSUPP;
1586 }
1587
1588 static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1589 {
1590 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1591 struct ci_hw_ep *hwep = ci->ep0in;
1592 unsigned long flags;
1593
1594 spin_lock_irqsave(hwep->lock, flags);
1595 _gadget->is_selfpowered = (is_on != 0);
1596 spin_unlock_irqrestore(hwep->lock, flags);
1597
1598 return 0;
1599 }
1600
1601 /* Change Data+ pullup status
1602 * this func is used by usb_gadget_connect/disconnet
1603 */
1604 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1605 {
1606 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1607
1608 /*
1609 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1610 * and don't touch Data+ in host mode for dual role config.
1611 */
1612 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1613 return 0;
1614
1615 pm_runtime_get_sync(&ci->gadget.dev);
1616 if (is_on)
1617 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1618 else
1619 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1620 pm_runtime_put_sync(&ci->gadget.dev);
1621
1622 return 0;
1623 }
1624
1625 static int ci_udc_start(struct usb_gadget *gadget,
1626 struct usb_gadget_driver *driver);
1627 static int ci_udc_stop(struct usb_gadget *gadget);
1628 /**
1629 * Device operations part of the API to the USB controller hardware,
1630 * which don't involve endpoints (or i/o)
1631 * Check "usb_gadget.h" for details
1632 */
1633 static const struct usb_gadget_ops usb_gadget_ops = {
1634 .vbus_session = ci_udc_vbus_session,
1635 .wakeup = ci_udc_wakeup,
1636 .set_selfpowered = ci_udc_selfpowered,
1637 .pullup = ci_udc_pullup,
1638 .vbus_draw = ci_udc_vbus_draw,
1639 .udc_start = ci_udc_start,
1640 .udc_stop = ci_udc_stop,
1641 };
1642
1643 static int init_eps(struct ci_hdrc *ci)
1644 {
1645 int retval = 0, i, j;
1646
1647 for (i = 0; i < ci->hw_ep_max/2; i++)
1648 for (j = RX; j <= TX; j++) {
1649 int k = i + j * ci->hw_ep_max/2;
1650 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1651
1652 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1653 (j == TX) ? "in" : "out");
1654
1655 hwep->ci = ci;
1656 hwep->lock = &ci->lock;
1657 hwep->td_pool = ci->td_pool;
1658
1659 hwep->ep.name = hwep->name;
1660 hwep->ep.ops = &usb_ep_ops;
1661
1662 if (i == 0) {
1663 hwep->ep.caps.type_control = true;
1664 } else {
1665 hwep->ep.caps.type_iso = true;
1666 hwep->ep.caps.type_bulk = true;
1667 hwep->ep.caps.type_int = true;
1668 }
1669
1670 if (j == TX)
1671 hwep->ep.caps.dir_in = true;
1672 else
1673 hwep->ep.caps.dir_out = true;
1674
1675 /*
1676 * for ep0: maxP defined in desc, for other
1677 * eps, maxP is set by epautoconfig() called
1678 * by gadget layer
1679 */
1680 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1681
1682 INIT_LIST_HEAD(&hwep->qh.queue);
1683 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1684 &hwep->qh.dma);
1685 if (hwep->qh.ptr == NULL)
1686 retval = -ENOMEM;
1687 else
1688 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
1689
1690 /*
1691 * set up shorthands for ep0 out and in endpoints,
1692 * don't add to gadget's ep_list
1693 */
1694 if (i == 0) {
1695 if (j == RX)
1696 ci->ep0out = hwep;
1697 else
1698 ci->ep0in = hwep;
1699
1700 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1701 continue;
1702 }
1703
1704 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1705 }
1706
1707 return retval;
1708 }
1709
1710 static void destroy_eps(struct ci_hdrc *ci)
1711 {
1712 int i;
1713
1714 for (i = 0; i < ci->hw_ep_max; i++) {
1715 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1716
1717 if (hwep->pending_td)
1718 free_pending_td(hwep);
1719 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1720 }
1721 }
1722
1723 /**
1724 * ci_udc_start: register a gadget driver
1725 * @gadget: our gadget
1726 * @driver: the driver being registered
1727 *
1728 * Interrupts are enabled here.
1729 */
1730 static int ci_udc_start(struct usb_gadget *gadget,
1731 struct usb_gadget_driver *driver)
1732 {
1733 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1734 unsigned long flags;
1735 int retval = -ENOMEM;
1736
1737 if (driver->disconnect == NULL)
1738 return -EINVAL;
1739
1740
1741 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1742 retval = usb_ep_enable(&ci->ep0out->ep);
1743 if (retval)
1744 return retval;
1745
1746 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1747 retval = usb_ep_enable(&ci->ep0in->ep);
1748 if (retval)
1749 return retval;
1750
1751 ci->driver = driver;
1752
1753 /* Start otg fsm for B-device */
1754 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1755 ci_hdrc_otg_fsm_start(ci);
1756 return retval;
1757 }
1758
1759 pm_runtime_get_sync(&ci->gadget.dev);
1760 if (ci->vbus_active) {
1761 spin_lock_irqsave(&ci->lock, flags);
1762 hw_device_reset(ci);
1763 } else {
1764 usb_udc_vbus_handler(&ci->gadget, false);
1765 pm_runtime_put_sync(&ci->gadget.dev);
1766 return retval;
1767 }
1768
1769 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1770 spin_unlock_irqrestore(&ci->lock, flags);
1771 if (retval)
1772 pm_runtime_put_sync(&ci->gadget.dev);
1773
1774 return retval;
1775 }
1776
1777 static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1778 {
1779 if (!ci_otg_is_fsm_mode(ci))
1780 return;
1781
1782 mutex_lock(&ci->fsm.lock);
1783 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1784 ci->fsm.a_bidl_adis_tmout = 1;
1785 ci_hdrc_otg_fsm_start(ci);
1786 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1787 ci->fsm.protocol = PROTO_UNDEF;
1788 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1789 }
1790 mutex_unlock(&ci->fsm.lock);
1791 }
1792
1793 /**
1794 * ci_udc_stop: unregister a gadget driver
1795 */
1796 static int ci_udc_stop(struct usb_gadget *gadget)
1797 {
1798 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1799 unsigned long flags;
1800
1801 spin_lock_irqsave(&ci->lock, flags);
1802
1803 if (ci->vbus_active) {
1804 hw_device_state(ci, 0);
1805 if (ci->platdata->notify_event)
1806 ci->platdata->notify_event(ci,
1807 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1808 spin_unlock_irqrestore(&ci->lock, flags);
1809 _gadget_stop_activity(&ci->gadget);
1810 spin_lock_irqsave(&ci->lock, flags);
1811 pm_runtime_put(&ci->gadget.dev);
1812 }
1813
1814 ci->driver = NULL;
1815 spin_unlock_irqrestore(&ci->lock, flags);
1816
1817 ci_udc_stop_for_otg_fsm(ci);
1818 return 0;
1819 }
1820
1821 /******************************************************************************
1822 * BUS block
1823 *****************************************************************************/
1824 /**
1825 * udc_irq: ci interrupt handler
1826 *
1827 * This function returns IRQ_HANDLED if the IRQ has been handled
1828 * It locks access to registers
1829 */
1830 static irqreturn_t udc_irq(struct ci_hdrc *ci)
1831 {
1832 irqreturn_t retval;
1833 u32 intr;
1834
1835 if (ci == NULL)
1836 return IRQ_HANDLED;
1837
1838 spin_lock(&ci->lock);
1839
1840 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1841 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1842 USBMODE_CM_DC) {
1843 spin_unlock(&ci->lock);
1844 return IRQ_NONE;
1845 }
1846 }
1847 intr = hw_test_and_clear_intr_active(ci);
1848
1849 if (intr) {
1850 /* order defines priority - do NOT change it */
1851 if (USBi_URI & intr)
1852 isr_reset_handler(ci);
1853
1854 if (USBi_PCI & intr) {
1855 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1856 USB_SPEED_HIGH : USB_SPEED_FULL;
1857 if (ci->suspended && ci->driver->resume) {
1858 spin_unlock(&ci->lock);
1859 ci->driver->resume(&ci->gadget);
1860 spin_lock(&ci->lock);
1861 ci->suspended = 0;
1862 }
1863 }
1864
1865 if (USBi_UI & intr)
1866 isr_tr_complete_handler(ci);
1867
1868 if (USBi_SLI & intr) {
1869 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1870 ci->driver->suspend) {
1871 ci->suspended = 1;
1872 spin_unlock(&ci->lock);
1873 ci->driver->suspend(&ci->gadget);
1874 usb_gadget_set_state(&ci->gadget,
1875 USB_STATE_SUSPENDED);
1876 spin_lock(&ci->lock);
1877 }
1878 }
1879 retval = IRQ_HANDLED;
1880 } else {
1881 retval = IRQ_NONE;
1882 }
1883 spin_unlock(&ci->lock);
1884
1885 return retval;
1886 }
1887
1888 /**
1889 * udc_start: initialize gadget role
1890 * @ci: chipidea controller
1891 */
1892 static int udc_start(struct ci_hdrc *ci)
1893 {
1894 struct device *dev = ci->dev;
1895 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1896 int retval = 0;
1897
1898 spin_lock_init(&ci->lock);
1899
1900 ci->gadget.ops = &usb_gadget_ops;
1901 ci->gadget.speed = USB_SPEED_UNKNOWN;
1902 ci->gadget.max_speed = USB_SPEED_HIGH;
1903 ci->gadget.name = ci->platdata->name;
1904 ci->gadget.otg_caps = otg_caps;
1905
1906 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1907 otg_caps->adp_support))
1908 ci->gadget.is_otg = 1;
1909
1910 INIT_LIST_HEAD(&ci->gadget.ep_list);
1911
1912 /* alloc resources */
1913 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1914 sizeof(struct ci_hw_qh),
1915 64, CI_HDRC_PAGE_SIZE);
1916 if (ci->qh_pool == NULL)
1917 return -ENOMEM;
1918
1919 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1920 sizeof(struct ci_hw_td),
1921 64, CI_HDRC_PAGE_SIZE);
1922 if (ci->td_pool == NULL) {
1923 retval = -ENOMEM;
1924 goto free_qh_pool;
1925 }
1926
1927 retval = init_eps(ci);
1928 if (retval)
1929 goto free_pools;
1930
1931 ci->gadget.ep0 = &ci->ep0in->ep;
1932
1933 retval = usb_add_gadget_udc(dev, &ci->gadget);
1934 if (retval)
1935 goto destroy_eps;
1936
1937 pm_runtime_no_callbacks(&ci->gadget.dev);
1938 pm_runtime_enable(&ci->gadget.dev);
1939
1940 return retval;
1941
1942 destroy_eps:
1943 destroy_eps(ci);
1944 free_pools:
1945 dma_pool_destroy(ci->td_pool);
1946 free_qh_pool:
1947 dma_pool_destroy(ci->qh_pool);
1948 return retval;
1949 }
1950
1951 /**
1952 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1953 *
1954 * No interrupts active, the IRQ has been released
1955 */
1956 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1957 {
1958 if (!ci->roles[CI_ROLE_GADGET])
1959 return;
1960
1961 usb_del_gadget_udc(&ci->gadget);
1962
1963 destroy_eps(ci);
1964
1965 dma_pool_destroy(ci->td_pool);
1966 dma_pool_destroy(ci->qh_pool);
1967 }
1968
1969 static int udc_id_switch_for_device(struct ci_hdrc *ci)
1970 {
1971 if (ci->is_otg)
1972 /* Clear and enable BSV irq */
1973 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1974 OTGSC_BSVIS | OTGSC_BSVIE);
1975
1976 return 0;
1977 }
1978
1979 static void udc_id_switch_for_host(struct ci_hdrc *ci)
1980 {
1981 /*
1982 * host doesn't care B_SESSION_VALID event
1983 * so clear and disbale BSV irq
1984 */
1985 if (ci->is_otg)
1986 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
1987 }
1988
1989 /**
1990 * ci_hdrc_gadget_init - initialize device related bits
1991 * ci: the controller
1992 *
1993 * This function initializes the gadget, if the device is "device capable".
1994 */
1995 int ci_hdrc_gadget_init(struct ci_hdrc *ci)
1996 {
1997 struct ci_role_driver *rdrv;
1998
1999 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2000 return -ENXIO;
2001
2002 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
2003 if (!rdrv)
2004 return -ENOMEM;
2005
2006 rdrv->start = udc_id_switch_for_device;
2007 rdrv->stop = udc_id_switch_for_host;
2008 rdrv->irq = udc_irq;
2009 rdrv->name = "gadget";
2010 ci->roles[CI_ROLE_GADGET] = rdrv;
2011
2012 return udc_start(ci);
2013 }