2 * dwc3-pci.c - PCI Specific glue layer
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 of
11 * the License as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/slab.h>
22 #include <linux/pci.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/platform_device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/acpi.h>
27 #include <linux/delay.h>
29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
32 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
33 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
34 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
35 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
36 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
37 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
38 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
39 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
40 #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
41 #define PCI_DEVICE_ID_INTEL_GLK 0x31aa
43 #define PCI_INTEL_BXT_DSM_UUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
44 #define PCI_INTEL_BXT_FUNC_PMU_PWR 4
45 #define PCI_INTEL_BXT_STATE_D0 0
46 #define PCI_INTEL_BXT_STATE_D3 3
49 * struct dwc3_pci - Driver private structure
50 * @dwc3: child dwc3 platform_device
51 * @pci: our link to PCI bus
53 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
56 struct platform_device
*dwc3
;
61 unsigned int has_dsm_for_pm
:1;
64 static const struct acpi_gpio_params reset_gpios
= { 0, 0, false };
65 static const struct acpi_gpio_params cs_gpios
= { 1, 0, false };
67 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios
[] = {
68 { "reset-gpios", &reset_gpios
, 1 },
69 { "cs-gpios", &cs_gpios
, 1 },
73 static int dwc3_pci_quirks(struct dwc3_pci
*dwc
)
75 struct platform_device
*dwc3
= dwc
->dwc3
;
76 struct pci_dev
*pdev
= dwc
->pci
;
78 if (pdev
->vendor
== PCI_VENDOR_ID_AMD
&&
79 pdev
->device
== PCI_DEVICE_ID_AMD_NL_USB
) {
80 struct property_entry properties
[] = {
81 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
82 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
83 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
84 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
85 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
86 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
87 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
88 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
89 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
90 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
91 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
93 * FIXME these quirks should be removed when AMD NL
96 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
97 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
98 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
99 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
103 return platform_device_add_properties(dwc3
, properties
);
106 if (pdev
->vendor
== PCI_VENDOR_ID_INTEL
) {
109 struct property_entry properties
[] = {
110 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
111 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
115 ret
= platform_device_add_properties(dwc3
, properties
);
119 if (pdev
->device
== PCI_DEVICE_ID_INTEL_BXT
||
120 pdev
->device
== PCI_DEVICE_ID_INTEL_BXT_M
) {
121 acpi_str_to_uuid(PCI_INTEL_BXT_DSM_UUID
, dwc
->uuid
);
122 dwc
->has_dsm_for_pm
= true;
125 if (pdev
->device
== PCI_DEVICE_ID_INTEL_BYT
) {
126 struct gpio_desc
*gpio
;
128 acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev
->dev
),
129 acpi_dwc3_byt_gpios
);
132 * These GPIOs will turn on the USB2 PHY. Note that we have to
133 * put the gpio descriptors again here because the phy driver
134 * might want to grab them, too.
136 gpio
= gpiod_get_optional(&pdev
->dev
, "cs", GPIOD_OUT_LOW
);
138 return PTR_ERR(gpio
);
140 gpiod_set_value_cansleep(gpio
, 1);
143 gpio
= gpiod_get_optional(&pdev
->dev
, "reset", GPIOD_OUT_LOW
);
145 return PTR_ERR(gpio
);
148 gpiod_set_value_cansleep(gpio
, 1);
150 usleep_range(10000, 11000);
155 if (pdev
->vendor
== PCI_VENDOR_ID_SYNOPSYS
&&
156 (pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3
||
157 pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI
||
158 pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31
)) {
159 struct property_entry properties
[] = {
160 PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
161 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
162 PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
163 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
167 return platform_device_add_properties(dwc3
, properties
);
173 static int dwc3_pci_probe(struct pci_dev
*pci
,
174 const struct pci_device_id
*id
)
176 struct dwc3_pci
*dwc
;
177 struct resource res
[2];
179 struct device
*dev
= &pci
->dev
;
181 ret
= pcim_enable_device(pci
);
183 dev_err(dev
, "failed to enable pci device\n");
189 dwc
= devm_kzalloc(dev
, sizeof(*dwc
), GFP_KERNEL
);
193 dwc
->dwc3
= platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO
);
197 memset(res
, 0x00, sizeof(struct resource
) * ARRAY_SIZE(res
));
199 res
[0].start
= pci_resource_start(pci
, 0);
200 res
[0].end
= pci_resource_end(pci
, 0);
201 res
[0].name
= "dwc_usb3";
202 res
[0].flags
= IORESOURCE_MEM
;
204 res
[1].start
= pci
->irq
;
205 res
[1].name
= "dwc_usb3";
206 res
[1].flags
= IORESOURCE_IRQ
;
208 ret
= platform_device_add_resources(dwc
->dwc3
, res
, ARRAY_SIZE(res
));
210 dev_err(dev
, "couldn't add resources to dwc3 device\n");
215 dwc
->dwc3
->dev
.parent
= dev
;
216 ACPI_COMPANION_SET(&dwc
->dwc3
->dev
, ACPI_COMPANION(dev
));
218 ret
= dwc3_pci_quirks(dwc
);
222 ret
= platform_device_add(dwc
->dwc3
);
224 dev_err(dev
, "failed to register dwc3 device\n");
228 device_init_wakeup(dev
, true);
229 device_set_run_wake(dev
, true);
230 pci_set_drvdata(pci
, dwc
);
235 platform_device_put(dwc
->dwc3
);
239 static void dwc3_pci_remove(struct pci_dev
*pci
)
241 struct dwc3_pci
*dwc
= pci_get_drvdata(pci
);
243 device_init_wakeup(&pci
->dev
, false);
244 pm_runtime_get(&pci
->dev
);
245 acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci
->dev
));
246 platform_device_unregister(dwc
->dwc3
);
249 static const struct pci_device_id dwc3_pci_id_table
[] = {
251 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
252 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3
),
255 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
256 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI
),
259 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
260 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31
),
262 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BSW
), },
263 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BYT
), },
264 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_MRFLD
), },
265 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_SPTLP
), },
266 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_SPTH
), },
267 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BXT
), },
268 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BXT_M
), },
269 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_APL
), },
270 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_KBP
), },
271 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_GLK
), },
272 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_NL_USB
), },
273 { } /* Terminating Entry */
275 MODULE_DEVICE_TABLE(pci
, dwc3_pci_id_table
);
277 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
278 static int dwc3_pci_dsm(struct dwc3_pci
*dwc
, int param
)
280 union acpi_object
*obj
;
281 union acpi_object tmp
;
282 union acpi_object argv4
= ACPI_INIT_DSM_ARGV4(1, &tmp
);
284 if (!dwc
->has_dsm_for_pm
)
287 tmp
.type
= ACPI_TYPE_INTEGER
;
288 tmp
.integer
.value
= param
;
290 obj
= acpi_evaluate_dsm(ACPI_HANDLE(&dwc
->pci
->dev
), dwc
->uuid
,
291 1, PCI_INTEL_BXT_FUNC_PMU_PWR
, &argv4
);
293 dev_err(&dwc
->pci
->dev
, "failed to evaluate _DSM\n");
301 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
304 static int dwc3_pci_runtime_suspend(struct device
*dev
)
306 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
308 if (device_run_wake(dev
))
309 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D3
);
314 static int dwc3_pci_runtime_resume(struct device
*dev
)
316 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
317 struct platform_device
*dwc3
= dwc
->dwc3
;
320 ret
= dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D0
);
324 return pm_runtime_get(&dwc3
->dev
);
326 #endif /* CONFIG_PM */
328 #ifdef CONFIG_PM_SLEEP
329 static int dwc3_pci_suspend(struct device
*dev
)
331 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
333 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D3
);
336 static int dwc3_pci_resume(struct device
*dev
)
338 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
340 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D0
);
342 #endif /* CONFIG_PM_SLEEP */
344 static struct dev_pm_ops dwc3_pci_dev_pm_ops
= {
345 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend
, dwc3_pci_resume
)
346 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend
, dwc3_pci_runtime_resume
,
350 static struct pci_driver dwc3_pci_driver
= {
352 .id_table
= dwc3_pci_id_table
,
353 .probe
= dwc3_pci_probe
,
354 .remove
= dwc3_pci_remove
,
356 .pm
= &dwc3_pci_dev_pm_ops
,
360 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
361 MODULE_LICENSE("GPL v2");
362 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
364 module_pci_driver(dwc3_pci_driver
);