2 * linux/drivers/usb/gadget/pxa2xx_udc.c
3 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
5 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
6 * Copyright (C) 2003 Robert Schwebel, Pengutronix
7 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
8 * Copyright (C) 2003 David Brownell
9 * Copyright (C) 2003 Joshua Wise
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 // #define VERBOSE DBG_VERBOSE
29 #include <linux/device.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/ioport.h>
33 #include <linux/types.h>
34 #include <linux/errno.h>
35 #include <linux/delay.h>
36 #include <linux/slab.h>
37 #include <linux/init.h>
38 #include <linux/timer.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/proc_fs.h>
43 #include <linux/platform_device.h>
44 #include <linux/dma-mapping.h>
45 #include <linux/irq.h>
47 #include <asm/byteorder.h>
51 #include <asm/system.h>
52 #include <asm/mach-types.h>
53 #include <asm/unaligned.h>
54 #include <asm/hardware.h>
56 #include <linux/usb/ch9.h>
57 #include <linux/usb_gadget.h>
59 #include <asm/mach/udc_pxa2xx.h>
63 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
64 * series processors. The UDC for the IXP 4xx series is very similar.
65 * There are fifteen endpoints, in addition to ep0.
67 * Such controller drivers work with a gadget driver. The gadget driver
68 * returns descriptors, implements configuration and data protocols used
69 * by the host to interact with this device, and allocates endpoints to
70 * the different protocol interfaces. The controller driver virtualizes
71 * usb hardware so that the gadget drivers will be more portable.
73 * This UDC hardware wants to implement a bit too much USB protocol, so
74 * it constrains the sorts of USB configuration change events that work.
75 * The errata for these chips are misleading; some "fixed" bugs from
76 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
78 * Note that the UDC hardware supports DMA (except on IXP) but that's
79 * not used here. IN-DMA (to host) is simple enough, when the data is
80 * suitably aligned (16 bytes) ... the network stack doesn't do that,
81 * other software can. OUT-DMA is buggy in most chip versions, as well
82 * as poorly designed (data toggle not automatic). So this driver won't
83 * bother using DMA. (Mostly-working IN-DMA support was available in
84 * kernels before 2.6.23, but was never enabled or well tested.)
87 #define DRIVER_VERSION "30-June-2007"
88 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
91 static const char driver_name
[] = "pxa2xx_udc";
93 static const char ep0name
[] = "ep0";
96 #ifdef CONFIG_ARCH_IXP4XX
98 /* cpu-specific register addresses are compiled in to this code */
99 #ifdef CONFIG_ARCH_PXA
100 #error "Can't configure both IXP and PXA"
105 #include "pxa2xx_udc.h"
108 #ifdef CONFIG_USB_PXA2XX_SMALL
109 #define SIZE_STR " (small)"
114 /* ---------------------------------------------------------------------------
115 * endpoint related parts of the api to the usb controller hardware,
116 * used by gadget driver; and the inner talker-to-hardware core.
117 * ---------------------------------------------------------------------------
120 static void pxa2xx_ep_fifo_flush (struct usb_ep
*ep
);
121 static void nuke (struct pxa2xx_ep
*, int status
);
123 /* one GPIO should be used to detect VBUS from the host */
124 static int is_vbus_present(void)
126 struct pxa2xx_udc_mach_info
*mach
= the_controller
->mach
;
129 return gpio_get_value(mach
->gpio_vbus
);
130 if (mach
->udc_is_connected
)
131 return mach
->udc_is_connected();
135 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
136 static void pullup_off(void)
138 struct pxa2xx_udc_mach_info
*mach
= the_controller
->mach
;
140 if (mach
->gpio_pullup
)
141 gpio_set_value(mach
->gpio_pullup
, 0);
142 else if (mach
->udc_command
)
143 mach
->udc_command(PXA2XX_UDC_CMD_DISCONNECT
);
146 static void pullup_on(void)
148 struct pxa2xx_udc_mach_info
*mach
= the_controller
->mach
;
150 if (mach
->gpio_pullup
)
151 gpio_set_value(mach
->gpio_pullup
, 1);
152 else if (mach
->udc_command
)
153 mach
->udc_command(PXA2XX_UDC_CMD_CONNECT
);
156 static void pio_irq_enable(int bEndpointAddress
)
158 bEndpointAddress
&= 0xf;
159 if (bEndpointAddress
< 8)
160 UICR0
&= ~(1 << bEndpointAddress
);
162 bEndpointAddress
-= 8;
163 UICR1
&= ~(1 << bEndpointAddress
);
167 static void pio_irq_disable(int bEndpointAddress
)
169 bEndpointAddress
&= 0xf;
170 if (bEndpointAddress
< 8)
171 UICR0
|= 1 << bEndpointAddress
;
173 bEndpointAddress
-= 8;
174 UICR1
|= 1 << bEndpointAddress
;
178 /* The UDCCR reg contains mask and interrupt status bits,
179 * so using '|=' isn't safe as it may ack an interrupt.
181 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
183 static inline void udc_set_mask_UDCCR(int mask
)
185 UDCCR
= (UDCCR
& UDCCR_MASK_BITS
) | (mask
& UDCCR_MASK_BITS
);
188 static inline void udc_clear_mask_UDCCR(int mask
)
190 UDCCR
= (UDCCR
& UDCCR_MASK_BITS
) & ~(mask
& UDCCR_MASK_BITS
);
193 static inline void udc_ack_int_UDCCR(int mask
)
195 /* udccr contains the bits we dont want to change */
196 __u32 udccr
= UDCCR
& UDCCR_MASK_BITS
;
198 UDCCR
= udccr
| (mask
& ~UDCCR_MASK_BITS
);
202 * endpoint enable/disable
204 * we need to verify the descriptors used to enable endpoints. since pxa2xx
205 * endpoint configurations are fixed, and are pretty much always enabled,
206 * there's not a lot to manage here.
208 * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints,
209 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
210 * for a single interface (with only the default altsetting) and for gadget
211 * drivers that don't halt endpoints (not reset by set_interface). that also
212 * means that if you use ISO, you must violate the USB spec rule that all
213 * iso endpoints must be in non-default altsettings.
215 static int pxa2xx_ep_enable (struct usb_ep
*_ep
,
216 const struct usb_endpoint_descriptor
*desc
)
218 struct pxa2xx_ep
*ep
;
219 struct pxa2xx_udc
*dev
;
221 ep
= container_of (_ep
, struct pxa2xx_ep
, ep
);
222 if (!_ep
|| !desc
|| ep
->desc
|| _ep
->name
== ep0name
223 || desc
->bDescriptorType
!= USB_DT_ENDPOINT
224 || ep
->bEndpointAddress
!= desc
->bEndpointAddress
225 || ep
->fifo_size
< le16_to_cpu
226 (desc
->wMaxPacketSize
)) {
227 DMSG("%s, bad ep or descriptor\n", __FUNCTION__
);
231 /* xfer types must match, except that interrupt ~= bulk */
232 if (ep
->bmAttributes
!= desc
->bmAttributes
233 && ep
->bmAttributes
!= USB_ENDPOINT_XFER_BULK
234 && desc
->bmAttributes
!= USB_ENDPOINT_XFER_INT
) {
235 DMSG("%s, %s type mismatch\n", __FUNCTION__
, _ep
->name
);
239 /* hardware _could_ do smaller, but driver doesn't */
240 if ((desc
->bmAttributes
== USB_ENDPOINT_XFER_BULK
241 && le16_to_cpu (desc
->wMaxPacketSize
)
243 || !desc
->wMaxPacketSize
) {
244 DMSG("%s, bad %s maxpacket\n", __FUNCTION__
, _ep
->name
);
249 if (!dev
->driver
|| dev
->gadget
.speed
== USB_SPEED_UNKNOWN
) {
250 DMSG("%s, bogus device state\n", __FUNCTION__
);
257 ep
->ep
.maxpacket
= le16_to_cpu (desc
->wMaxPacketSize
);
259 /* flush fifo (mostly for OUT buffers) */
260 pxa2xx_ep_fifo_flush (_ep
);
262 /* ... reset halt state too, if we could ... */
264 DBG(DBG_VERBOSE
, "enabled %s\n", _ep
->name
);
268 static int pxa2xx_ep_disable (struct usb_ep
*_ep
)
270 struct pxa2xx_ep
*ep
;
273 ep
= container_of (_ep
, struct pxa2xx_ep
, ep
);
274 if (!_ep
|| !ep
->desc
) {
275 DMSG("%s, %s not enabled\n", __FUNCTION__
,
276 _ep
? ep
->ep
.name
: NULL
);
279 local_irq_save(flags
);
281 nuke (ep
, -ESHUTDOWN
);
283 /* flush fifo (mostly for IN buffers) */
284 pxa2xx_ep_fifo_flush (_ep
);
289 local_irq_restore(flags
);
290 DBG(DBG_VERBOSE
, "%s disabled\n", _ep
->name
);
294 /*-------------------------------------------------------------------------*/
296 /* for the pxa2xx, these can just wrap kmalloc/kfree. gadget drivers
297 * must still pass correctly initialized endpoints, since other controller
298 * drivers may care about how it's currently set up (dma issues etc).
302 * pxa2xx_ep_alloc_request - allocate a request data structure
304 static struct usb_request
*
305 pxa2xx_ep_alloc_request (struct usb_ep
*_ep
, gfp_t gfp_flags
)
307 struct pxa2xx_request
*req
;
309 req
= kzalloc(sizeof(*req
), gfp_flags
);
313 INIT_LIST_HEAD (&req
->queue
);
319 * pxa2xx_ep_free_request - deallocate a request data structure
322 pxa2xx_ep_free_request (struct usb_ep
*_ep
, struct usb_request
*_req
)
324 struct pxa2xx_request
*req
;
326 req
= container_of (_req
, struct pxa2xx_request
, req
);
327 WARN_ON (!list_empty (&req
->queue
));
331 /*-------------------------------------------------------------------------*/
334 * done - retire a request; caller blocked irqs
336 static void done(struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
, int status
)
338 unsigned stopped
= ep
->stopped
;
340 list_del_init(&req
->queue
);
342 if (likely (req
->req
.status
== -EINPROGRESS
))
343 req
->req
.status
= status
;
345 status
= req
->req
.status
;
347 if (status
&& status
!= -ESHUTDOWN
)
348 DBG(DBG_VERBOSE
, "complete %s req %p stat %d len %u/%u\n",
349 ep
->ep
.name
, &req
->req
, status
,
350 req
->req
.actual
, req
->req
.length
);
352 /* don't modify queue heads during completion callback */
354 req
->req
.complete(&ep
->ep
, &req
->req
);
355 ep
->stopped
= stopped
;
359 static inline void ep0_idle (struct pxa2xx_udc
*dev
)
361 dev
->ep0state
= EP0_IDLE
;
365 write_packet(volatile u32
*uddr
, struct pxa2xx_request
*req
, unsigned max
)
368 unsigned length
, count
;
370 buf
= req
->req
.buf
+ req
->req
.actual
;
373 /* how big will this packet be? */
374 length
= min(req
->req
.length
- req
->req
.actual
, max
);
375 req
->req
.actual
+= length
;
378 while (likely(count
--))
385 * write to an IN endpoint fifo, as many packets as possible.
386 * irqs will use this to write the rest later.
387 * caller guarantees at least one packet buffer is ready (or a zlp).
390 write_fifo (struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
)
394 max
= le16_to_cpu(ep
->desc
->wMaxPacketSize
);
397 int is_last
, is_short
;
399 count
= write_packet(ep
->reg_uddr
, req
, max
);
401 /* last packet is usually short (or a zlp) */
402 if (unlikely (count
!= max
))
403 is_last
= is_short
= 1;
405 if (likely(req
->req
.length
!= req
->req
.actual
)
410 /* interrupt/iso maxpacket may not fill the fifo */
411 is_short
= unlikely (max
< ep
->fifo_size
);
414 DBG(DBG_VERY_NOISY
, "wrote %s %d bytes%s%s %d left %p\n",
416 is_last
? "/L" : "", is_short
? "/S" : "",
417 req
->req
.length
- req
->req
.actual
, req
);
419 /* let loose that packet. maybe try writing another one,
420 * double buffering might work. TSP, TPC, and TFS
421 * bit values are the same for all normal IN endpoints.
423 *ep
->reg_udccs
= UDCCS_BI_TPC
;
425 *ep
->reg_udccs
= UDCCS_BI_TSP
;
427 /* requests complete when all IN data is in the FIFO */
430 if (list_empty(&ep
->queue
))
431 pio_irq_disable (ep
->bEndpointAddress
);
435 // TODO experiment: how robust can fifo mode tweaking be?
436 // double buffering is off in the default fifo mode, which
437 // prevents TFS from being set here.
439 } while (*ep
->reg_udccs
& UDCCS_BI_TFS
);
443 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
444 * ep0 data stage. these chips want very simple state transitions.
447 void ep0start(struct pxa2xx_udc
*dev
, u32 flags
, const char *tag
)
449 UDCCS0
= flags
|UDCCS0_SA
|UDCCS0_OPR
;
451 dev
->req_pending
= 0;
452 DBG(DBG_VERY_NOISY
, "%s %s, %02x/%02x\n",
453 __FUNCTION__
, tag
, UDCCS0
, flags
);
457 write_ep0_fifo (struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
)
462 count
= write_packet(&UDDR0
, req
, EP0_FIFO_SIZE
);
463 ep
->dev
->stats
.write
.bytes
+= count
;
465 /* last packet "must be" short (or a zlp) */
466 is_short
= (count
!= EP0_FIFO_SIZE
);
468 DBG(DBG_VERY_NOISY
, "ep0in %d bytes %d left %p\n", count
,
469 req
->req
.length
- req
->req
.actual
, req
);
471 if (unlikely (is_short
)) {
472 if (ep
->dev
->req_pending
)
473 ep0start(ep
->dev
, UDCCS0_IPR
, "short IN");
477 count
= req
->req
.length
;
480 #ifndef CONFIG_ARCH_IXP4XX
482 /* This seems to get rid of lost status irqs in some cases:
483 * host responds quickly, or next request involves config
484 * change automagic, or should have been hidden, or ...
486 * FIXME get rid of all udelays possible...
488 if (count
>= EP0_FIFO_SIZE
) {
491 if ((UDCCS0
& UDCCS0_OPR
) != 0) {
492 /* clear OPR, generate ack */
502 } else if (ep
->dev
->req_pending
)
503 ep0start(ep
->dev
, 0, "IN");
509 * read_fifo - unload packet(s) from the fifo we use for usb OUT
510 * transfers and put them into the request. caller should have made
511 * sure there's at least one packet ready.
513 * returns true if the request completed because of short packet or the
514 * request buffer having filled (and maybe overran till end-of-packet).
517 read_fifo (struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
)
522 unsigned bufferspace
, count
, is_short
;
524 /* make sure there's a packet in the FIFO.
525 * UDCCS_{BO,IO}_RPC are all the same bit value.
526 * UDCCS_{BO,IO}_RNE are all the same bit value.
528 udccs
= *ep
->reg_udccs
;
529 if (unlikely ((udccs
& UDCCS_BO_RPC
) == 0))
531 buf
= req
->req
.buf
+ req
->req
.actual
;
533 bufferspace
= req
->req
.length
- req
->req
.actual
;
535 /* read all bytes from this packet */
536 if (likely (udccs
& UDCCS_BO_RNE
)) {
537 count
= 1 + (0x0ff & *ep
->reg_ubcr
);
538 req
->req
.actual
+= min (count
, bufferspace
);
541 is_short
= (count
< ep
->ep
.maxpacket
);
542 DBG(DBG_VERY_NOISY
, "read %s %02x, %d bytes%s req %p %d/%d\n",
543 ep
->ep
.name
, udccs
, count
,
544 is_short
? "/S" : "",
545 req
, req
->req
.actual
, req
->req
.length
);
546 while (likely (count
-- != 0)) {
547 u8 byte
= (u8
) *ep
->reg_uddr
;
549 if (unlikely (bufferspace
== 0)) {
550 /* this happens when the driver's buffer
551 * is smaller than what the host sent.
552 * discard the extra data.
554 if (req
->req
.status
!= -EOVERFLOW
)
555 DMSG("%s overflow %d\n",
557 req
->req
.status
= -EOVERFLOW
;
563 *ep
->reg_udccs
= UDCCS_BO_RPC
;
564 /* RPC/RSP/RNE could now reflect the other packet buffer */
566 /* iso is one request per packet */
567 if (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
) {
568 if (udccs
& UDCCS_IO_ROF
)
569 req
->req
.status
= -EHOSTUNREACH
;
570 /* more like "is_done" */
575 if (is_short
|| req
->req
.actual
== req
->req
.length
) {
577 if (list_empty(&ep
->queue
))
578 pio_irq_disable (ep
->bEndpointAddress
);
582 /* finished that packet. the next one may be waiting... */
588 * special ep0 version of the above. no UBCR0 or double buffering; status
589 * handshaking is magic. most device protocols don't need control-OUT.
590 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
591 * protocols do use them.
594 read_ep0_fifo (struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
)
597 unsigned bufferspace
;
599 buf
= req
->req
.buf
+ req
->req
.actual
;
600 bufferspace
= req
->req
.length
- req
->req
.actual
;
602 while (UDCCS0
& UDCCS0_RNE
) {
605 if (unlikely (bufferspace
== 0)) {
606 /* this happens when the driver's buffer
607 * is smaller than what the host sent.
608 * discard the extra data.
610 if (req
->req
.status
!= -EOVERFLOW
)
611 DMSG("%s overflow\n", ep
->ep
.name
);
612 req
->req
.status
= -EOVERFLOW
;
620 UDCCS0
= UDCCS0_OPR
| UDCCS0_IPR
;
623 if (req
->req
.actual
>= req
->req
.length
)
626 /* finished that packet. the next one may be waiting... */
630 /*-------------------------------------------------------------------------*/
633 pxa2xx_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
, gfp_t gfp_flags
)
635 struct pxa2xx_request
*req
;
636 struct pxa2xx_ep
*ep
;
637 struct pxa2xx_udc
*dev
;
640 req
= container_of(_req
, struct pxa2xx_request
, req
);
641 if (unlikely (!_req
|| !_req
->complete
|| !_req
->buf
642 || !list_empty(&req
->queue
))) {
643 DMSG("%s, bad params\n", __FUNCTION__
);
647 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
648 if (unlikely (!_ep
|| (!ep
->desc
&& ep
->ep
.name
!= ep0name
))) {
649 DMSG("%s, bad ep\n", __FUNCTION__
);
654 if (unlikely (!dev
->driver
655 || dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)) {
656 DMSG("%s, bogus device state\n", __FUNCTION__
);
660 /* iso is always one packet per request, that's the only way
661 * we can report per-packet status. that also helps with dma.
663 if (unlikely (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
664 && req
->req
.length
> le16_to_cpu
665 (ep
->desc
->wMaxPacketSize
)))
668 DBG(DBG_NOISY
, "%s queue req %p, len %d buf %p\n",
669 _ep
->name
, _req
, _req
->length
, _req
->buf
);
671 local_irq_save(flags
);
673 _req
->status
= -EINPROGRESS
;
676 /* kickstart this i/o queue? */
677 if (list_empty(&ep
->queue
) && !ep
->stopped
) {
678 if (ep
->desc
== 0 /* ep0 */) {
679 unsigned length
= _req
->length
;
681 switch (dev
->ep0state
) {
682 case EP0_IN_DATA_PHASE
:
683 dev
->stats
.write
.ops
++;
684 if (write_ep0_fifo(ep
, req
))
688 case EP0_OUT_DATA_PHASE
:
689 dev
->stats
.read
.ops
++;
691 if (dev
->req_config
) {
692 DBG(DBG_VERBOSE
, "ep0 config ack%s\n",
693 dev
->has_cfr
? "" : " raced");
695 UDCCFR
= UDCCFR_AREN
|UDCCFR_ACM
698 dev
->ep0state
= EP0_END_XFER
;
699 local_irq_restore (flags
);
702 if (dev
->req_pending
)
703 ep0start(dev
, UDCCS0_IPR
, "OUT");
704 if (length
== 0 || ((UDCCS0
& UDCCS0_RNE
) != 0
705 && read_ep0_fifo(ep
, req
))) {
713 DMSG("ep0 i/o, odd state %d\n", dev
->ep0state
);
714 local_irq_restore (flags
);
717 /* can the FIFO can satisfy the request immediately? */
718 } else if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0) {
719 if ((*ep
->reg_udccs
& UDCCS_BI_TFS
) != 0
720 && write_fifo(ep
, req
))
722 } else if ((*ep
->reg_udccs
& UDCCS_BO_RFS
) != 0
723 && read_fifo(ep
, req
)) {
727 if (likely (req
&& ep
->desc
))
728 pio_irq_enable(ep
->bEndpointAddress
);
731 /* pio or dma irq handler advances the queue. */
732 if (likely (req
!= 0))
733 list_add_tail(&req
->queue
, &ep
->queue
);
734 local_irq_restore(flags
);
741 * nuke - dequeue ALL requests
743 static void nuke(struct pxa2xx_ep
*ep
, int status
)
745 struct pxa2xx_request
*req
;
747 /* called with irqs blocked */
748 while (!list_empty(&ep
->queue
)) {
749 req
= list_entry(ep
->queue
.next
,
750 struct pxa2xx_request
,
752 done(ep
, req
, status
);
755 pio_irq_disable (ep
->bEndpointAddress
);
759 /* dequeue JUST ONE request */
760 static int pxa2xx_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
762 struct pxa2xx_ep
*ep
;
763 struct pxa2xx_request
*req
;
766 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
767 if (!_ep
|| ep
->ep
.name
== ep0name
)
770 local_irq_save(flags
);
772 /* make sure it's actually queued on this endpoint */
773 list_for_each_entry (req
, &ep
->queue
, queue
) {
774 if (&req
->req
== _req
)
777 if (&req
->req
!= _req
) {
778 local_irq_restore(flags
);
782 done(ep
, req
, -ECONNRESET
);
784 local_irq_restore(flags
);
788 /*-------------------------------------------------------------------------*/
790 static int pxa2xx_ep_set_halt(struct usb_ep
*_ep
, int value
)
792 struct pxa2xx_ep
*ep
;
795 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
797 || (!ep
->desc
&& ep
->ep
.name
!= ep0name
))
798 || ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
) {
799 DMSG("%s, bad ep\n", __FUNCTION__
);
803 /* this path (reset toggle+halt) is needed to implement
804 * SET_INTERFACE on normal hardware. but it can't be
805 * done from software on the PXA UDC, and the hardware
806 * forgets to do it as part of SET_INTERFACE automagic.
808 DMSG("only host can clear %s halt\n", _ep
->name
);
812 local_irq_save(flags
);
814 if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0
815 && ((*ep
->reg_udccs
& UDCCS_BI_TFS
) == 0
816 || !list_empty(&ep
->queue
))) {
817 local_irq_restore(flags
);
821 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
822 *ep
->reg_udccs
= UDCCS_BI_FST
|UDCCS_BI_FTF
;
824 /* ep0 needs special care */
826 start_watchdog(ep
->dev
);
827 ep
->dev
->req_pending
= 0;
828 ep
->dev
->ep0state
= EP0_STALL
;
830 /* and bulk/intr endpoints like dropping stalls too */
833 for (i
= 0; i
< 1000; i
+= 20) {
834 if (*ep
->reg_udccs
& UDCCS_BI_SST
)
839 local_irq_restore(flags
);
841 DBG(DBG_VERBOSE
, "%s halt\n", _ep
->name
);
845 static int pxa2xx_ep_fifo_status(struct usb_ep
*_ep
)
847 struct pxa2xx_ep
*ep
;
849 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
851 DMSG("%s, bad ep\n", __FUNCTION__
);
854 /* pxa can't report unclaimed bytes from IN fifos */
855 if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0)
857 if (ep
->dev
->gadget
.speed
== USB_SPEED_UNKNOWN
858 || (*ep
->reg_udccs
& UDCCS_BO_RFS
) == 0)
861 return (*ep
->reg_ubcr
& 0xfff) + 1;
864 static void pxa2xx_ep_fifo_flush(struct usb_ep
*_ep
)
866 struct pxa2xx_ep
*ep
;
868 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
869 if (!_ep
|| ep
->ep
.name
== ep0name
|| !list_empty(&ep
->queue
)) {
870 DMSG("%s, bad ep\n", __FUNCTION__
);
874 /* toggle and halt bits stay unchanged */
876 /* for OUT, just read and discard the FIFO contents. */
877 if ((ep
->bEndpointAddress
& USB_DIR_IN
) == 0) {
878 while (((*ep
->reg_udccs
) & UDCCS_BO_RNE
) != 0)
879 (void) *ep
->reg_uddr
;
883 /* most IN status is the same, but ISO can't stall */
884 *ep
->reg_udccs
= UDCCS_BI_TPC
|UDCCS_BI_FTF
|UDCCS_BI_TUR
885 | (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
)
890 static struct usb_ep_ops pxa2xx_ep_ops
= {
891 .enable
= pxa2xx_ep_enable
,
892 .disable
= pxa2xx_ep_disable
,
894 .alloc_request
= pxa2xx_ep_alloc_request
,
895 .free_request
= pxa2xx_ep_free_request
,
897 .queue
= pxa2xx_ep_queue
,
898 .dequeue
= pxa2xx_ep_dequeue
,
900 .set_halt
= pxa2xx_ep_set_halt
,
901 .fifo_status
= pxa2xx_ep_fifo_status
,
902 .fifo_flush
= pxa2xx_ep_fifo_flush
,
906 /* ---------------------------------------------------------------------------
907 * device-scoped parts of the api to the usb controller hardware
908 * ---------------------------------------------------------------------------
911 static int pxa2xx_udc_get_frame(struct usb_gadget
*_gadget
)
913 return ((UFNRH
& 0x07) << 8) | (UFNRL
& 0xff);
916 static int pxa2xx_udc_wakeup(struct usb_gadget
*_gadget
)
918 /* host may not have enabled remote wakeup */
919 if ((UDCCS0
& UDCCS0_DRWF
) == 0)
920 return -EHOSTUNREACH
;
921 udc_set_mask_UDCCR(UDCCR_RSM
);
925 static void stop_activity(struct pxa2xx_udc
*, struct usb_gadget_driver
*);
926 static void udc_enable (struct pxa2xx_udc
*);
927 static void udc_disable(struct pxa2xx_udc
*);
929 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
932 static int pullup(struct pxa2xx_udc
*udc
, int is_active
)
934 is_active
= is_active
&& udc
->vbus
&& udc
->pullup
;
935 DMSG("%s\n", is_active
? "active" : "inactive");
939 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
) {
940 DMSG("disconnect %s\n", udc
->driver
941 ? udc
->driver
->driver
.name
943 stop_activity(udc
, udc
->driver
);
950 /* VBUS reporting logically comes from a transceiver */
951 static int pxa2xx_udc_vbus_session(struct usb_gadget
*_gadget
, int is_active
)
953 struct pxa2xx_udc
*udc
;
955 udc
= container_of(_gadget
, struct pxa2xx_udc
, gadget
);
956 udc
->vbus
= is_active
= (is_active
!= 0);
957 DMSG("vbus %s\n", is_active
? "supplied" : "inactive");
958 pullup(udc
, is_active
);
962 /* drivers may have software control over D+ pullup */
963 static int pxa2xx_udc_pullup(struct usb_gadget
*_gadget
, int is_active
)
965 struct pxa2xx_udc
*udc
;
967 udc
= container_of(_gadget
, struct pxa2xx_udc
, gadget
);
969 /* not all boards support pullup control */
970 if (!udc
->mach
->gpio_pullup
&& !udc
->mach
->udc_command
)
973 is_active
= (is_active
!= 0);
974 udc
->pullup
= is_active
;
975 pullup(udc
, is_active
);
979 static const struct usb_gadget_ops pxa2xx_udc_ops
= {
980 .get_frame
= pxa2xx_udc_get_frame
,
981 .wakeup
= pxa2xx_udc_wakeup
,
982 .vbus_session
= pxa2xx_udc_vbus_session
,
983 .pullup
= pxa2xx_udc_pullup
,
985 // .vbus_draw ... boards may consume current from VBUS, up to
986 // 100-500mA based on config. the 500uA suspend ceiling means
987 // that exclusively vbus-powered PXA designs violate USB specs.
990 /*-------------------------------------------------------------------------*/
992 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
994 static const char proc_node_name
[] = "driver/udc";
997 udc_proc_read(char *page
, char **start
, off_t off
, int count
,
998 int *eof
, void *_dev
)
1001 struct pxa2xx_udc
*dev
= _dev
;
1003 unsigned size
= count
;
1004 unsigned long flags
;
1011 local_irq_save(flags
);
1013 /* basic device status */
1014 t
= scnprintf(next
, size
, DRIVER_DESC
"\n"
1015 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1016 driver_name
, DRIVER_VERSION SIZE_STR
"(pio)",
1017 dev
->driver
? dev
->driver
->driver
.name
: "(none)",
1018 is_vbus_present() ? "full speed" : "disconnected");
1022 /* registers for device and ep0 */
1023 t
= scnprintf(next
, size
,
1024 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1025 UICR1
, UICR0
, USIR1
, USIR0
, UFNRH
, UFNRL
);
1030 t
= scnprintf(next
, size
,
1031 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp
,
1032 (tmp
& UDCCR_REM
) ? " rem" : "",
1033 (tmp
& UDCCR_RSTIR
) ? " rstir" : "",
1034 (tmp
& UDCCR_SRM
) ? " srm" : "",
1035 (tmp
& UDCCR_SUSIR
) ? " susir" : "",
1036 (tmp
& UDCCR_RESIR
) ? " resir" : "",
1037 (tmp
& UDCCR_RSM
) ? " rsm" : "",
1038 (tmp
& UDCCR_UDA
) ? " uda" : "",
1039 (tmp
& UDCCR_UDE
) ? " ude" : "");
1044 t
= scnprintf(next
, size
,
1045 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp
,
1046 (tmp
& UDCCS0_SA
) ? " sa" : "",
1047 (tmp
& UDCCS0_RNE
) ? " rne" : "",
1048 (tmp
& UDCCS0_FST
) ? " fst" : "",
1049 (tmp
& UDCCS0_SST
) ? " sst" : "",
1050 (tmp
& UDCCS0_DRWF
) ? " dwrf" : "",
1051 (tmp
& UDCCS0_FTF
) ? " ftf" : "",
1052 (tmp
& UDCCS0_IPR
) ? " ipr" : "",
1053 (tmp
& UDCCS0_OPR
) ? " opr" : "");
1059 t
= scnprintf(next
, size
,
1060 "udccfr %02X =%s%s\n", tmp
,
1061 (tmp
& UDCCFR_AREN
) ? " aren" : "",
1062 (tmp
& UDCCFR_ACM
) ? " acm" : "");
1067 if (!is_vbus_present() || !dev
->driver
)
1070 t
= scnprintf(next
, size
, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1071 dev
->stats
.write
.bytes
, dev
->stats
.write
.ops
,
1072 dev
->stats
.read
.bytes
, dev
->stats
.read
.ops
,
1077 /* dump endpoint queues */
1078 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1079 struct pxa2xx_ep
*ep
= &dev
->ep
[i
];
1080 struct pxa2xx_request
*req
;
1083 const struct usb_endpoint_descriptor
*d
;
1088 tmp
= *dev
->ep
[i
].reg_udccs
;
1089 t
= scnprintf(next
, size
,
1090 "%s max %d %s udccs %02x irqs %lu\n",
1091 ep
->ep
.name
, le16_to_cpu (d
->wMaxPacketSize
),
1092 "pio", tmp
, ep
->pio_irqs
);
1093 /* TODO translate all five groups of udccs bits! */
1095 } else /* ep0 should only have one transfer queued */
1096 t
= scnprintf(next
, size
, "ep0 max 16 pio irqs %lu\n",
1098 if (t
<= 0 || t
> size
)
1103 if (list_empty(&ep
->queue
)) {
1104 t
= scnprintf(next
, size
, "\t(nothing queued)\n");
1105 if (t
<= 0 || t
> size
)
1111 list_for_each_entry(req
, &ep
->queue
, queue
) {
1112 t
= scnprintf(next
, size
,
1113 "\treq %p len %d/%d buf %p\n",
1114 &req
->req
, req
->req
.actual
,
1115 req
->req
.length
, req
->req
.buf
);
1116 if (t
<= 0 || t
> size
)
1124 local_irq_restore(flags
);
1126 return count
- size
;
1129 #define create_proc_files() \
1130 create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
1131 #define remove_proc_files() \
1132 remove_proc_entry(proc_node_name, NULL)
1134 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1136 #define create_proc_files() do {} while (0)
1137 #define remove_proc_files() do {} while (0)
1139 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1141 /*-------------------------------------------------------------------------*/
1144 * udc_disable - disable USB device controller
1146 static void udc_disable(struct pxa2xx_udc
*dev
)
1148 /* block all irqs */
1149 udc_set_mask_UDCCR(UDCCR_SRM
|UDCCR_REM
);
1150 UICR0
= UICR1
= 0xff;
1153 /* if hardware supports it, disconnect from usb */
1156 udc_clear_mask_UDCCR(UDCCR_UDE
);
1158 #ifdef CONFIG_ARCH_PXA
1159 /* Disable clock for USB device */
1160 pxa_set_cken(CKEN_USB
, 0);
1164 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1169 * udc_reinit - initialize software state
1171 static void udc_reinit(struct pxa2xx_udc
*dev
)
1175 /* device/ep0 records init */
1176 INIT_LIST_HEAD (&dev
->gadget
.ep_list
);
1177 INIT_LIST_HEAD (&dev
->gadget
.ep0
->ep_list
);
1178 dev
->ep0state
= EP0_IDLE
;
1180 /* basic endpoint records init */
1181 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1182 struct pxa2xx_ep
*ep
= &dev
->ep
[i
];
1185 list_add_tail (&ep
->ep
.ep_list
, &dev
->gadget
.ep_list
);
1189 INIT_LIST_HEAD (&ep
->queue
);
1193 /* the rest was statically initialized, and is read-only */
1196 /* until it's enabled, this UDC should be completely invisible
1199 static void udc_enable (struct pxa2xx_udc
*dev
)
1201 udc_clear_mask_UDCCR(UDCCR_UDE
);
1203 #ifdef CONFIG_ARCH_PXA
1204 /* Enable clock for USB device */
1205 pxa_set_cken(CKEN_USB
, 1);
1209 /* try to clear these bits before we enable the udc */
1210 udc_ack_int_UDCCR(UDCCR_SUSIR
|/*UDCCR_RSTIR|*/UDCCR_RESIR
);
1213 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1214 dev
->stats
.irqs
= 0;
1217 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1219 * - if RESET is already in progress, ack interrupt
1220 * - unmask reset interrupt
1222 udc_set_mask_UDCCR(UDCCR_UDE
);
1223 if (!(UDCCR
& UDCCR_UDA
))
1224 udc_ack_int_UDCCR(UDCCR_RSTIR
);
1226 if (dev
->has_cfr
/* UDC_RES2 is defined */) {
1227 /* pxa255 (a0+) can avoid a set_config race that could
1228 * prevent gadget drivers from configuring correctly
1230 UDCCFR
= UDCCFR_ACM
| UDCCFR_MB1
;
1232 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1233 * which could result in missing packets and interrupts.
1234 * supposedly one bit per endpoint, controlling whether it
1235 * double buffers or not; ACM/AREN bits fit into the holes.
1236 * zero bits (like USIR0_IRx) disable double buffering.
1242 /* enable suspend/resume and reset irqs */
1243 udc_clear_mask_UDCCR(UDCCR_SRM
| UDCCR_REM
);
1245 /* enable ep0 irqs */
1246 UICR0
&= ~UICR0_IM0
;
1248 /* if hardware supports it, pullup D+ and wait for reset */
1253 /* when a driver is successfully registered, it will receive
1254 * control requests including set_configuration(), which enables
1255 * non-control requests. then usb traffic follows until a
1256 * disconnect is reported. then a host may connect again, or
1257 * the driver might get unbound.
1259 int usb_gadget_register_driver(struct usb_gadget_driver
*driver
)
1261 struct pxa2xx_udc
*dev
= the_controller
;
1265 || driver
->speed
< USB_SPEED_FULL
1267 || !driver
->disconnect
1275 /* first hook up the driver ... */
1276 dev
->driver
= driver
;
1277 dev
->gadget
.dev
.driver
= &driver
->driver
;
1280 retval
= device_add (&dev
->gadget
.dev
);
1284 dev
->gadget
.dev
.driver
= NULL
;
1287 retval
= driver
->bind(&dev
->gadget
);
1289 DMSG("bind to driver %s --> error %d\n",
1290 driver
->driver
.name
, retval
);
1291 device_del (&dev
->gadget
.dev
);
1295 /* ... then enable host detection and ep0; and we're ready
1296 * for set_configuration as well as eventual disconnect.
1298 DMSG("registered gadget driver '%s'\n", driver
->driver
.name
);
1303 EXPORT_SYMBOL(usb_gadget_register_driver
);
1306 stop_activity(struct pxa2xx_udc
*dev
, struct usb_gadget_driver
*driver
)
1310 /* don't disconnect drivers more than once */
1311 if (dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)
1313 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1315 /* prevent new request submissions, kill any outstanding requests */
1316 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1317 struct pxa2xx_ep
*ep
= &dev
->ep
[i
];
1320 nuke(ep
, -ESHUTDOWN
);
1322 del_timer_sync(&dev
->timer
);
1324 /* report disconnect; the driver is already quiesced */
1326 driver
->disconnect(&dev
->gadget
);
1328 /* re-init driver-visible data structures */
1332 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
1334 struct pxa2xx_udc
*dev
= the_controller
;
1338 if (!driver
|| driver
!= dev
->driver
|| !driver
->unbind
)
1341 local_irq_disable();
1343 stop_activity(dev
, driver
);
1346 driver
->unbind(&dev
->gadget
);
1349 device_del (&dev
->gadget
.dev
);
1351 DMSG("unregistered gadget driver '%s'\n", driver
->driver
.name
);
1355 EXPORT_SYMBOL(usb_gadget_unregister_driver
);
1358 /*-------------------------------------------------------------------------*/
1360 #ifdef CONFIG_ARCH_LUBBOCK
1362 /* Lubbock has separate connect and disconnect irqs. More typical designs
1363 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1367 lubbock_vbus_irq(int irq
, void *_dev
)
1369 struct pxa2xx_udc
*dev
= _dev
;
1374 case LUBBOCK_USB_IRQ
:
1376 disable_irq(LUBBOCK_USB_IRQ
);
1377 enable_irq(LUBBOCK_USB_DISC_IRQ
);
1379 case LUBBOCK_USB_DISC_IRQ
:
1381 disable_irq(LUBBOCK_USB_DISC_IRQ
);
1382 enable_irq(LUBBOCK_USB_IRQ
);
1388 pxa2xx_udc_vbus_session(&dev
->gadget
, vbus
);
1394 static irqreturn_t
udc_vbus_irq(int irq
, void *_dev
)
1396 struct pxa2xx_udc
*dev
= _dev
;
1397 int vbus
= gpio_get_value(dev
->mach
->gpio_vbus
);
1399 pxa2xx_udc_vbus_session(&dev
->gadget
, vbus
);
1404 /*-------------------------------------------------------------------------*/
1406 static inline void clear_ep_state (struct pxa2xx_udc
*dev
)
1410 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1411 * fifos, and pending transactions mustn't be continued in any case.
1413 for (i
= 1; i
< PXA_UDC_NUM_ENDPOINTS
; i
++)
1414 nuke(&dev
->ep
[i
], -ECONNABORTED
);
1417 static void udc_watchdog(unsigned long _dev
)
1419 struct pxa2xx_udc
*dev
= (void *)_dev
;
1421 local_irq_disable();
1422 if (dev
->ep0state
== EP0_STALL
1423 && (UDCCS0
& UDCCS0_FST
) == 0
1424 && (UDCCS0
& UDCCS0_SST
) == 0) {
1425 UDCCS0
= UDCCS0_FST
|UDCCS0_FTF
;
1426 DBG(DBG_VERBOSE
, "ep0 re-stall\n");
1427 start_watchdog(dev
);
1432 static void handle_ep0 (struct pxa2xx_udc
*dev
)
1434 u32 udccs0
= UDCCS0
;
1435 struct pxa2xx_ep
*ep
= &dev
->ep
[0];
1436 struct pxa2xx_request
*req
;
1438 struct usb_ctrlrequest r
;
1443 if (list_empty(&ep
->queue
))
1446 req
= list_entry(ep
->queue
.next
, struct pxa2xx_request
, queue
);
1448 /* clear stall status */
1449 if (udccs0
& UDCCS0_SST
) {
1451 UDCCS0
= UDCCS0_SST
;
1452 del_timer(&dev
->timer
);
1456 /* previous request unfinished? non-error iff back-to-back ... */
1457 if ((udccs0
& UDCCS0_SA
) != 0 && dev
->ep0state
!= EP0_IDLE
) {
1459 del_timer(&dev
->timer
);
1463 switch (dev
->ep0state
) {
1465 /* late-breaking status? */
1468 /* start control request? */
1469 if (likely((udccs0
& (UDCCS0_OPR
|UDCCS0_SA
|UDCCS0_RNE
))
1470 == (UDCCS0_OPR
|UDCCS0_SA
|UDCCS0_RNE
))) {
1475 /* read SETUP packet */
1476 for (i
= 0; i
< 8; i
++) {
1477 if (unlikely(!(UDCCS0
& UDCCS0_RNE
))) {
1479 DMSG("SETUP %d!\n", i
);
1482 u
.raw
[i
] = (u8
) UDDR0
;
1484 if (unlikely((UDCCS0
& UDCCS0_RNE
) != 0))
1488 DBG(DBG_VERBOSE
, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1489 u
.r
.bRequestType
, u
.r
.bRequest
,
1490 le16_to_cpu(u
.r
.wValue
),
1491 le16_to_cpu(u
.r
.wIndex
),
1492 le16_to_cpu(u
.r
.wLength
));
1494 /* cope with automagic for some standard requests. */
1495 dev
->req_std
= (u
.r
.bRequestType
& USB_TYPE_MASK
)
1496 == USB_TYPE_STANDARD
;
1497 dev
->req_config
= 0;
1498 dev
->req_pending
= 1;
1499 switch (u
.r
.bRequest
) {
1500 /* hardware restricts gadget drivers here! */
1501 case USB_REQ_SET_CONFIGURATION
:
1502 if (u
.r
.bRequestType
== USB_RECIP_DEVICE
) {
1503 /* reflect hardware's automagic
1504 * up to the gadget driver.
1507 dev
->req_config
= 1;
1508 clear_ep_state(dev
);
1509 /* if !has_cfr, there's no synch
1510 * else use AREN (later) not SA|OPR
1511 * USIR0_IR0 acts edge sensitive
1515 /* ... and here, even more ... */
1516 case USB_REQ_SET_INTERFACE
:
1517 if (u
.r
.bRequestType
== USB_RECIP_INTERFACE
) {
1518 /* udc hardware is broken by design:
1519 * - altsetting may only be zero;
1520 * - hw resets all interfaces' eps;
1521 * - ep reset doesn't include halt(?).
1523 DMSG("broken set_interface (%d/%d)\n",
1524 le16_to_cpu(u
.r
.wIndex
),
1525 le16_to_cpu(u
.r
.wValue
));
1529 /* hardware was supposed to hide this */
1530 case USB_REQ_SET_ADDRESS
:
1531 if (u
.r
.bRequestType
== USB_RECIP_DEVICE
) {
1532 ep0start(dev
, 0, "address");
1538 if (u
.r
.bRequestType
& USB_DIR_IN
)
1539 dev
->ep0state
= EP0_IN_DATA_PHASE
;
1541 dev
->ep0state
= EP0_OUT_DATA_PHASE
;
1543 i
= dev
->driver
->setup(&dev
->gadget
, &u
.r
);
1545 /* hardware automagic preventing STALL... */
1546 if (dev
->req_config
) {
1547 /* hardware sometimes neglects to tell
1548 * tell us about config change events,
1549 * so later ones may fail...
1551 WARN("config change %02x fail %d?\n",
1554 /* TODO experiment: if has_cfr,
1555 * hardware didn't ACK; maybe we
1556 * could actually STALL!
1559 DBG(DBG_VERBOSE
, "protocol STALL, "
1560 "%02x err %d\n", UDCCS0
, i
);
1562 /* the watchdog timer helps deal with cases
1563 * where udc seems to clear FST wrongly, and
1564 * then NAKs instead of STALLing.
1566 ep0start(dev
, UDCCS0_FST
|UDCCS0_FTF
, "stall");
1567 start_watchdog(dev
);
1568 dev
->ep0state
= EP0_STALL
;
1570 /* deferred i/o == no response yet */
1571 } else if (dev
->req_pending
) {
1572 if (likely(dev
->ep0state
== EP0_IN_DATA_PHASE
1573 || dev
->req_std
|| u
.r
.wLength
))
1574 ep0start(dev
, 0, "defer");
1576 ep0start(dev
, UDCCS0_IPR
, "defer/IPR");
1579 /* expect at least one data or status stage irq */
1582 } else if (likely((udccs0
& (UDCCS0_OPR
|UDCCS0_SA
))
1583 == (UDCCS0_OPR
|UDCCS0_SA
))) {
1586 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1587 * still observed on a pxa255 a0.
1589 DBG(DBG_VERBOSE
, "e131\n");
1592 /* read SETUP data, but don't trust it too much */
1593 for (i
= 0; i
< 8; i
++)
1594 u
.raw
[i
] = (u8
) UDDR0
;
1595 if ((u
.r
.bRequestType
& USB_RECIP_MASK
)
1598 if (u
.word
[0] == 0 && u
.word
[1] == 0)
1602 /* some random early IRQ:
1605 * - OPR got set, without SA (likely status stage)
1607 UDCCS0
= udccs0
& (UDCCS0_SA
|UDCCS0_OPR
);
1610 case EP0_IN_DATA_PHASE
: /* GET_DESCRIPTOR etc */
1611 if (udccs0
& UDCCS0_OPR
) {
1612 UDCCS0
= UDCCS0_OPR
|UDCCS0_FTF
;
1613 DBG(DBG_VERBOSE
, "ep0in premature status\n");
1617 } else /* irq was IPR clearing */ {
1619 /* this IN packet might finish the request */
1620 (void) write_ep0_fifo(ep
, req
);
1621 } /* else IN token before response was written */
1624 case EP0_OUT_DATA_PHASE
: /* SET_DESCRIPTOR etc */
1625 if (udccs0
& UDCCS0_OPR
) {
1627 /* this OUT packet might finish the request */
1628 if (read_ep0_fifo(ep
, req
))
1630 /* else more OUT packets expected */
1631 } /* else OUT token before read was issued */
1632 } else /* irq was IPR clearing */ {
1633 DBG(DBG_VERBOSE
, "ep0out premature status\n");
1642 /* ack control-IN status (maybe in-zlp was skipped)
1643 * also appears after some config change events.
1645 if (udccs0
& UDCCS0_OPR
)
1646 UDCCS0
= UDCCS0_OPR
;
1650 UDCCS0
= UDCCS0_FST
;
1656 static void handle_ep(struct pxa2xx_ep
*ep
)
1658 struct pxa2xx_request
*req
;
1659 int is_in
= ep
->bEndpointAddress
& USB_DIR_IN
;
1665 if (likely (!list_empty(&ep
->queue
)))
1666 req
= list_entry(ep
->queue
.next
,
1667 struct pxa2xx_request
, queue
);
1671 // TODO check FST handling
1673 udccs
= *ep
->reg_udccs
;
1674 if (unlikely(is_in
)) { /* irq from TPC, SST, or (ISO) TUR */
1676 if (likely(ep
->bmAttributes
== USB_ENDPOINT_XFER_BULK
))
1677 tmp
|= UDCCS_BI_SST
;
1680 *ep
->reg_udccs
= tmp
;
1681 if (req
&& likely ((udccs
& UDCCS_BI_TFS
) != 0))
1682 completed
= write_fifo(ep
, req
);
1684 } else { /* irq from RPC (or for ISO, ROF) */
1685 if (likely(ep
->bmAttributes
== USB_ENDPOINT_XFER_BULK
))
1686 tmp
= UDCCS_BO_SST
| UDCCS_BO_DME
;
1688 tmp
= UDCCS_IO_ROF
| UDCCS_IO_DME
;
1691 *ep
->reg_udccs
= tmp
;
1693 /* fifos can hold packets, ready for reading... */
1695 completed
= read_fifo(ep
, req
);
1697 pio_irq_disable (ep
->bEndpointAddress
);
1700 } while (completed
);
1704 * pxa2xx_udc_irq - interrupt handler
1706 * avoid delays in ep0 processing. the control handshaking isn't always
1707 * under software control (pxa250c0 and the pxa255 are better), and delays
1708 * could cause usb protocol errors.
1711 pxa2xx_udc_irq(int irq
, void *_dev
)
1713 struct pxa2xx_udc
*dev
= _dev
;
1722 /* SUSpend Interrupt Request */
1723 if (unlikely(udccr
& UDCCR_SUSIR
)) {
1724 udc_ack_int_UDCCR(UDCCR_SUSIR
);
1726 DBG(DBG_VERBOSE
, "USB suspend%s\n", is_vbus_present()
1727 ? "" : "+disconnect");
1729 if (!is_vbus_present())
1730 stop_activity(dev
, dev
->driver
);
1731 else if (dev
->gadget
.speed
!= USB_SPEED_UNKNOWN
1733 && dev
->driver
->suspend
)
1734 dev
->driver
->suspend(&dev
->gadget
);
1738 /* RESume Interrupt Request */
1739 if (unlikely(udccr
& UDCCR_RESIR
)) {
1740 udc_ack_int_UDCCR(UDCCR_RESIR
);
1742 DBG(DBG_VERBOSE
, "USB resume\n");
1744 if (dev
->gadget
.speed
!= USB_SPEED_UNKNOWN
1746 && dev
->driver
->resume
1747 && is_vbus_present())
1748 dev
->driver
->resume(&dev
->gadget
);
1751 /* ReSeT Interrupt Request - USB reset */
1752 if (unlikely(udccr
& UDCCR_RSTIR
)) {
1753 udc_ack_int_UDCCR(UDCCR_RSTIR
);
1756 if ((UDCCR
& UDCCR_UDA
) == 0) {
1757 DBG(DBG_VERBOSE
, "USB reset start\n");
1759 /* reset driver and endpoints,
1760 * in case that's not yet done
1762 stop_activity (dev
, dev
->driver
);
1765 DBG(DBG_VERBOSE
, "USB reset end\n");
1766 dev
->gadget
.speed
= USB_SPEED_FULL
;
1767 memset(&dev
->stats
, 0, sizeof dev
->stats
);
1768 /* driver and endpoints are still reset */
1772 u32 usir0
= USIR0
& ~UICR0
;
1773 u32 usir1
= USIR1
& ~UICR1
;
1776 if (unlikely (!usir0
&& !usir1
))
1779 DBG(DBG_VERY_NOISY
, "irq %02x.%02x\n", usir1
, usir0
);
1781 /* control traffic */
1782 if (usir0
& USIR0_IR0
) {
1783 dev
->ep
[0].pio_irqs
++;
1788 /* endpoint data transfers */
1789 for (i
= 0; i
< 8; i
++) {
1792 if (i
&& (usir0
& tmp
)) {
1793 handle_ep(&dev
->ep
[i
]);
1798 handle_ep(&dev
->ep
[i
+8]);
1805 /* we could also ask for 1 msec SOF (SIR) interrupts */
1811 /*-------------------------------------------------------------------------*/
1813 static void nop_release (struct device
*dev
)
1815 DMSG("%s %s\n", __FUNCTION__
, dev
->bus_id
);
1818 /* this uses load-time allocation and initialization (instead of
1819 * doing it at run-time) to save code, eliminate fault paths, and
1820 * be more obviously correct.
1822 static struct pxa2xx_udc memory
= {
1824 .ops
= &pxa2xx_udc_ops
,
1825 .ep0
= &memory
.ep
[0].ep
,
1826 .name
= driver_name
,
1829 .release
= nop_release
,
1833 /* control endpoint */
1837 .ops
= &pxa2xx_ep_ops
,
1838 .maxpacket
= EP0_FIFO_SIZE
,
1841 .reg_udccs
= &UDCCS0
,
1845 /* first group of endpoints */
1848 .name
= "ep1in-bulk",
1849 .ops
= &pxa2xx_ep_ops
,
1850 .maxpacket
= BULK_FIFO_SIZE
,
1853 .fifo_size
= BULK_FIFO_SIZE
,
1854 .bEndpointAddress
= USB_DIR_IN
| 1,
1855 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1856 .reg_udccs
= &UDCCS1
,
1861 .name
= "ep2out-bulk",
1862 .ops
= &pxa2xx_ep_ops
,
1863 .maxpacket
= BULK_FIFO_SIZE
,
1866 .fifo_size
= BULK_FIFO_SIZE
,
1867 .bEndpointAddress
= 2,
1868 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1869 .reg_udccs
= &UDCCS2
,
1873 #ifndef CONFIG_USB_PXA2XX_SMALL
1876 .name
= "ep3in-iso",
1877 .ops
= &pxa2xx_ep_ops
,
1878 .maxpacket
= ISO_FIFO_SIZE
,
1881 .fifo_size
= ISO_FIFO_SIZE
,
1882 .bEndpointAddress
= USB_DIR_IN
| 3,
1883 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1884 .reg_udccs
= &UDCCS3
,
1889 .name
= "ep4out-iso",
1890 .ops
= &pxa2xx_ep_ops
,
1891 .maxpacket
= ISO_FIFO_SIZE
,
1894 .fifo_size
= ISO_FIFO_SIZE
,
1895 .bEndpointAddress
= 4,
1896 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1897 .reg_udccs
= &UDCCS4
,
1903 .name
= "ep5in-int",
1904 .ops
= &pxa2xx_ep_ops
,
1905 .maxpacket
= INT_FIFO_SIZE
,
1908 .fifo_size
= INT_FIFO_SIZE
,
1909 .bEndpointAddress
= USB_DIR_IN
| 5,
1910 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
1911 .reg_udccs
= &UDCCS5
,
1915 /* second group of endpoints */
1918 .name
= "ep6in-bulk",
1919 .ops
= &pxa2xx_ep_ops
,
1920 .maxpacket
= BULK_FIFO_SIZE
,
1923 .fifo_size
= BULK_FIFO_SIZE
,
1924 .bEndpointAddress
= USB_DIR_IN
| 6,
1925 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1926 .reg_udccs
= &UDCCS6
,
1931 .name
= "ep7out-bulk",
1932 .ops
= &pxa2xx_ep_ops
,
1933 .maxpacket
= BULK_FIFO_SIZE
,
1936 .fifo_size
= BULK_FIFO_SIZE
,
1937 .bEndpointAddress
= 7,
1938 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1939 .reg_udccs
= &UDCCS7
,
1945 .name
= "ep8in-iso",
1946 .ops
= &pxa2xx_ep_ops
,
1947 .maxpacket
= ISO_FIFO_SIZE
,
1950 .fifo_size
= ISO_FIFO_SIZE
,
1951 .bEndpointAddress
= USB_DIR_IN
| 8,
1952 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1953 .reg_udccs
= &UDCCS8
,
1958 .name
= "ep9out-iso",
1959 .ops
= &pxa2xx_ep_ops
,
1960 .maxpacket
= ISO_FIFO_SIZE
,
1963 .fifo_size
= ISO_FIFO_SIZE
,
1964 .bEndpointAddress
= 9,
1965 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1966 .reg_udccs
= &UDCCS9
,
1972 .name
= "ep10in-int",
1973 .ops
= &pxa2xx_ep_ops
,
1974 .maxpacket
= INT_FIFO_SIZE
,
1977 .fifo_size
= INT_FIFO_SIZE
,
1978 .bEndpointAddress
= USB_DIR_IN
| 10,
1979 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
1980 .reg_udccs
= &UDCCS10
,
1981 .reg_uddr
= &UDDR10
,
1984 /* third group of endpoints */
1987 .name
= "ep11in-bulk",
1988 .ops
= &pxa2xx_ep_ops
,
1989 .maxpacket
= BULK_FIFO_SIZE
,
1992 .fifo_size
= BULK_FIFO_SIZE
,
1993 .bEndpointAddress
= USB_DIR_IN
| 11,
1994 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1995 .reg_udccs
= &UDCCS11
,
1996 .reg_uddr
= &UDDR11
,
2000 .name
= "ep12out-bulk",
2001 .ops
= &pxa2xx_ep_ops
,
2002 .maxpacket
= BULK_FIFO_SIZE
,
2005 .fifo_size
= BULK_FIFO_SIZE
,
2006 .bEndpointAddress
= 12,
2007 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
2008 .reg_udccs
= &UDCCS12
,
2009 .reg_ubcr
= &UBCR12
,
2010 .reg_uddr
= &UDDR12
,
2014 .name
= "ep13in-iso",
2015 .ops
= &pxa2xx_ep_ops
,
2016 .maxpacket
= ISO_FIFO_SIZE
,
2019 .fifo_size
= ISO_FIFO_SIZE
,
2020 .bEndpointAddress
= USB_DIR_IN
| 13,
2021 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
2022 .reg_udccs
= &UDCCS13
,
2023 .reg_uddr
= &UDDR13
,
2027 .name
= "ep14out-iso",
2028 .ops
= &pxa2xx_ep_ops
,
2029 .maxpacket
= ISO_FIFO_SIZE
,
2032 .fifo_size
= ISO_FIFO_SIZE
,
2033 .bEndpointAddress
= 14,
2034 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
2035 .reg_udccs
= &UDCCS14
,
2036 .reg_ubcr
= &UBCR14
,
2037 .reg_uddr
= &UDDR14
,
2041 .name
= "ep15in-int",
2042 .ops
= &pxa2xx_ep_ops
,
2043 .maxpacket
= INT_FIFO_SIZE
,
2046 .fifo_size
= INT_FIFO_SIZE
,
2047 .bEndpointAddress
= USB_DIR_IN
| 15,
2048 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
2049 .reg_udccs
= &UDCCS15
,
2050 .reg_uddr
= &UDDR15
,
2052 #endif /* !CONFIG_USB_PXA2XX_SMALL */
2055 #define CP15R0_VENDOR_MASK 0xffffe000
2057 #if defined(CONFIG_ARCH_PXA)
2058 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2060 #elif defined(CONFIG_ARCH_IXP4XX)
2061 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2065 #define CP15R0_PROD_MASK 0x000003f0
2066 #define PXA25x 0x00000100 /* and PXA26x */
2067 #define PXA210 0x00000120
2069 #define CP15R0_REV_MASK 0x0000000f
2071 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2073 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2074 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2075 #define PXA250_B2 0x00000104
2076 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2077 #define PXA250_B0 0x00000102
2078 #define PXA250_A1 0x00000101
2079 #define PXA250_A0 0x00000100
2081 #define PXA210_C0 0x00000125
2082 #define PXA210_B2 0x00000124
2083 #define PXA210_B1 0x00000123
2084 #define PXA210_B0 0x00000122
2085 #define IXP425_A0 0x000001c1
2086 #define IXP425_B0 0x000001f1
2087 #define IXP465_AD 0x00000200
2090 * probe - binds to the platform device
2092 static int __init
pxa2xx_udc_probe(struct platform_device
*pdev
)
2094 struct pxa2xx_udc
*dev
= &memory
;
2095 int retval
, vbus_irq
, irq
;
2098 /* insist on Intel/ARM/XScale */
2099 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev
));
2100 if ((chiprev
& CP15R0_VENDOR_MASK
) != CP15R0_XSCALE_VALUE
) {
2101 printk(KERN_ERR
"%s: not XScale!\n", driver_name
);
2105 /* trigger chiprev-specific logic */
2106 switch (chiprev
& CP15R0_PRODREV_MASK
) {
2107 #if defined(CONFIG_ARCH_PXA)
2113 /* A0/A1 "not released"; ep 13, 15 unusable */
2115 case PXA250_B2
: case PXA210_B2
:
2116 case PXA250_B1
: case PXA210_B1
:
2117 case PXA250_B0
: case PXA210_B0
:
2118 /* OUT-DMA is broken ... */
2120 case PXA250_C0
: case PXA210_C0
:
2122 #elif defined(CONFIG_ARCH_IXP4XX)
2130 printk(KERN_ERR
"%s: unrecognized processor: %08x\n",
2131 driver_name
, chiprev
);
2132 /* iop3xx, ixp4xx, ... */
2136 irq
= platform_get_irq(pdev
, 0);
2140 pr_debug("%s: IRQ %d%s%s\n", driver_name
, irq
,
2141 dev
->has_cfr
? "" : " (!cfr)",
2145 /* other non-static parts of init */
2146 dev
->dev
= &pdev
->dev
;
2147 dev
->mach
= pdev
->dev
.platform_data
;
2149 if (dev
->mach
->gpio_vbus
) {
2150 if ((retval
= gpio_request(dev
->mach
->gpio_vbus
,
2151 "pxa2xx_udc GPIO VBUS"))) {
2153 "can't get vbus gpio %d, err: %d\n",
2154 dev
->mach
->gpio_vbus
, retval
);
2157 gpio_direction_input(dev
->mach
->gpio_vbus
);
2158 vbus_irq
= gpio_to_irq(dev
->mach
->gpio_vbus
);
2159 set_irq_type(vbus_irq
, IRQT_BOTHEDGE
);
2163 if (dev
->mach
->gpio_pullup
) {
2164 if ((retval
= gpio_request(dev
->mach
->gpio_pullup
,
2165 "pca2xx_udc GPIO PULLUP"))) {
2167 "can't get pullup gpio %d, err: %d\n",
2168 dev
->mach
->gpio_pullup
, retval
);
2169 if (dev
->mach
->gpio_vbus
)
2170 gpio_free(dev
->mach
->gpio_vbus
);
2173 gpio_direction_output(dev
->mach
->gpio_pullup
, 0);
2176 init_timer(&dev
->timer
);
2177 dev
->timer
.function
= udc_watchdog
;
2178 dev
->timer
.data
= (unsigned long) dev
;
2180 device_initialize(&dev
->gadget
.dev
);
2181 dev
->gadget
.dev
.parent
= &pdev
->dev
;
2182 dev
->gadget
.dev
.dma_mask
= pdev
->dev
.dma_mask
;
2184 the_controller
= dev
;
2185 platform_set_drvdata(pdev
, dev
);
2190 dev
->vbus
= is_vbus_present();
2192 /* irq setup after old hardware state is cleaned up */
2193 retval
= request_irq(irq
, pxa2xx_udc_irq
,
2194 IRQF_DISABLED
, driver_name
, dev
);
2196 printk(KERN_ERR
"%s: can't get irq %d, err %d\n",
2197 driver_name
, irq
, retval
);
2198 if (dev
->mach
->gpio_pullup
)
2199 gpio_free(dev
->mach
->gpio_pullup
);
2200 if (dev
->mach
->gpio_vbus
)
2201 gpio_free(dev
->mach
->gpio_vbus
);
2206 #ifdef CONFIG_ARCH_LUBBOCK
2207 if (machine_is_lubbock()) {
2208 retval
= request_irq(LUBBOCK_USB_DISC_IRQ
,
2210 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
,
2213 printk(KERN_ERR
"%s: can't get irq %i, err %d\n",
2214 driver_name
, LUBBOCK_USB_DISC_IRQ
, retval
);
2217 if (dev
->mach
->gpio_pullup
)
2218 gpio_free(dev
->mach
->gpio_pullup
);
2219 if (dev
->mach
->gpio_vbus
)
2220 gpio_free(dev
->mach
->gpio_vbus
);
2223 retval
= request_irq(LUBBOCK_USB_IRQ
,
2225 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
,
2228 printk(KERN_ERR
"%s: can't get irq %i, err %d\n",
2229 driver_name
, LUBBOCK_USB_IRQ
, retval
);
2230 free_irq(LUBBOCK_USB_DISC_IRQ
, dev
);
2236 retval
= request_irq(vbus_irq
, udc_vbus_irq
,
2237 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
,
2240 printk(KERN_ERR
"%s: can't get irq %i, err %d\n",
2241 driver_name
, vbus_irq
, retval
);
2243 if (dev
->mach
->gpio_pullup
)
2244 gpio_free(dev
->mach
->gpio_pullup
);
2245 if (dev
->mach
->gpio_vbus
)
2246 gpio_free(dev
->mach
->gpio_vbus
);
2250 create_proc_files();
2255 static void pxa2xx_udc_shutdown(struct platform_device
*_dev
)
2260 static int __exit
pxa2xx_udc_remove(struct platform_device
*pdev
)
2262 struct pxa2xx_udc
*dev
= platform_get_drvdata(pdev
);
2268 remove_proc_files();
2271 free_irq(platform_get_irq(pdev
, 0), dev
);
2274 #ifdef CONFIG_ARCH_LUBBOCK
2275 if (machine_is_lubbock()) {
2276 free_irq(LUBBOCK_USB_DISC_IRQ
, dev
);
2277 free_irq(LUBBOCK_USB_IRQ
, dev
);
2280 if (dev
->mach
->gpio_vbus
) {
2281 free_irq(gpio_to_irq(dev
->mach
->gpio_vbus
), dev
);
2282 gpio_free(dev
->mach
->gpio_vbus
);
2284 if (dev
->mach
->gpio_pullup
)
2285 gpio_free(dev
->mach
->gpio_pullup
);
2287 platform_set_drvdata(pdev
, NULL
);
2288 the_controller
= NULL
;
2292 /*-------------------------------------------------------------------------*/
2296 /* USB suspend (controlled by the host) and system suspend (controlled
2297 * by the PXA) don't necessarily work well together. If USB is active,
2298 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2299 * mode, or any deeper PM saving state.
2301 * For now, we punt and forcibly disconnect from the USB host when PXA
2302 * enters any suspend state. While we're disconnected, we always disable
2303 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2304 * Boards without software pullup control shouldn't use those states.
2305 * VBUS IRQs should probably be ignored so that the PXA device just acts
2306 * "dead" to USB hosts until system resume.
2308 static int pxa2xx_udc_suspend(struct platform_device
*dev
, pm_message_t state
)
2310 struct pxa2xx_udc
*udc
= platform_get_drvdata(dev
);
2312 if (!udc
->mach
->gpio_pullup
&& !udc
->mach
->udc_command
)
2313 WARN("USB host won't detect disconnect!\n");
2319 static int pxa2xx_udc_resume(struct platform_device
*dev
)
2321 struct pxa2xx_udc
*udc
= platform_get_drvdata(dev
);
2329 #define pxa2xx_udc_suspend NULL
2330 #define pxa2xx_udc_resume NULL
2333 /*-------------------------------------------------------------------------*/
2335 static struct platform_driver udc_driver
= {
2336 .shutdown
= pxa2xx_udc_shutdown
,
2337 .remove
= __exit_p(pxa2xx_udc_remove
),
2338 .suspend
= pxa2xx_udc_suspend
,
2339 .resume
= pxa2xx_udc_resume
,
2341 .owner
= THIS_MODULE
,
2342 .name
= "pxa2xx-udc",
2346 static int __init
udc_init(void)
2348 printk(KERN_INFO
"%s: version %s\n", driver_name
, DRIVER_VERSION
);
2349 return platform_driver_probe(&udc_driver
, pxa2xx_udc_probe
);
2351 module_init(udc_init
);
2353 static void __exit
udc_exit(void)
2355 platform_driver_unregister(&udc_driver
);
2357 module_exit(udc_exit
);
2359 MODULE_DESCRIPTION(DRIVER_DESC
);
2360 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2361 MODULE_LICENSE("GPL");