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1 /*
2 * Copyright (c) 2000-2004 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/timer.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/reboot.h>
34 #include <linux/usb.h>
35 #include <linux/moduleparam.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/debugfs.h>
38
39 #include "../core/hcd.h"
40
41 #include <asm/byteorder.h>
42 #include <asm/io.h>
43 #include <asm/irq.h>
44 #include <asm/system.h>
45 #include <asm/unaligned.h>
46
47 /*-------------------------------------------------------------------------*/
48
49 /*
50 * EHCI hc_driver implementation ... experimental, incomplete.
51 * Based on the final 1.0 register interface specification.
52 *
53 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
54 * First was PCMCIA, like ISA; then CardBus, which is PCI.
55 * Next comes "CardBay", using USB 2.0 signals.
56 *
57 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
58 * Special thanks to Intel and VIA for providing host controllers to
59 * test this driver on, and Cypress (including In-System Design) for
60 * providing early devices for those host controllers to talk to!
61 */
62
63 #define DRIVER_AUTHOR "David Brownell"
64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
65
66 static const char hcd_name [] = "ehci_hcd";
67
68
69 #undef VERBOSE_DEBUG
70 #undef EHCI_URB_TRACE
71
72 #ifdef DEBUG
73 #define EHCI_STATS
74 #endif
75
76 /* magic numbers that can affect system performance */
77 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
78 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
79 #define EHCI_TUNE_RL_TT 0
80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
81 #define EHCI_TUNE_MULT_TT 1
82 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
83
84 #define EHCI_IAA_MSECS 10 /* arbitrary */
85 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
86 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
87 #define EHCI_SHRINK_FRAMES 5 /* async qh unlink delay */
88
89 /* Initial IRQ latency: faster than hw default */
90 static int log2_irq_thresh = 0; // 0 to 6
91 module_param (log2_irq_thresh, int, S_IRUGO);
92 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
93
94 /* initial park setting: slower than hw default */
95 static unsigned park = 0;
96 module_param (park, uint, S_IRUGO);
97 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
98
99 /* for flakey hardware, ignore overcurrent indicators */
100 static int ignore_oc = 0;
101 module_param (ignore_oc, bool, S_IRUGO);
102 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
103
104 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
105
106 /*-------------------------------------------------------------------------*/
107
108 #include "ehci.h"
109 #include "ehci-dbg.c"
110
111 /*-------------------------------------------------------------------------*/
112
113 static void
114 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
115 {
116 /* Don't override timeouts which shrink or (later) disable
117 * the async ring; just the I/O watchdog. Note that if a
118 * SHRINK were pending, OFF would never be requested.
119 */
120 if (timer_pending(&ehci->watchdog)
121 && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
122 & ehci->actions))
123 return;
124
125 if (!test_and_set_bit(action, &ehci->actions)) {
126 unsigned long t;
127
128 switch (action) {
129 case TIMER_IO_WATCHDOG:
130 t = EHCI_IO_JIFFIES;
131 break;
132 case TIMER_ASYNC_OFF:
133 t = EHCI_ASYNC_JIFFIES;
134 break;
135 /* case TIMER_ASYNC_SHRINK: */
136 default:
137 /* add a jiffie since we synch against the
138 * 8 KHz uframe counter.
139 */
140 t = DIV_ROUND_UP(EHCI_SHRINK_FRAMES * HZ, 1000) + 1;
141 break;
142 }
143 mod_timer(&ehci->watchdog, t + jiffies);
144 }
145 }
146
147 /*-------------------------------------------------------------------------*/
148
149 /*
150 * handshake - spin reading hc until handshake completes or fails
151 * @ptr: address of hc register to be read
152 * @mask: bits to look at in result of read
153 * @done: value of those bits when handshake succeeds
154 * @usec: timeout in microseconds
155 *
156 * Returns negative errno, or zero on success
157 *
158 * Success happens when the "mask" bits have the specified value (hardware
159 * handshake done). There are two failure modes: "usec" have passed (major
160 * hardware flakeout), or the register reads as all-ones (hardware removed).
161 *
162 * That last failure should_only happen in cases like physical cardbus eject
163 * before driver shutdown. But it also seems to be caused by bugs in cardbus
164 * bridge shutdown: shutting down the bridge before the devices using it.
165 */
166 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
167 u32 mask, u32 done, int usec)
168 {
169 u32 result;
170
171 do {
172 result = ehci_readl(ehci, ptr);
173 if (result == ~(u32)0) /* card removed */
174 return -ENODEV;
175 result &= mask;
176 if (result == done)
177 return 0;
178 udelay (1);
179 usec--;
180 } while (usec > 0);
181 return -ETIMEDOUT;
182 }
183
184 /* force HC to halt state from unknown (EHCI spec section 2.3) */
185 static int ehci_halt (struct ehci_hcd *ehci)
186 {
187 u32 temp = ehci_readl(ehci, &ehci->regs->status);
188
189 /* disable any irqs left enabled by previous code */
190 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
191
192 if ((temp & STS_HALT) != 0)
193 return 0;
194
195 temp = ehci_readl(ehci, &ehci->regs->command);
196 temp &= ~CMD_RUN;
197 ehci_writel(ehci, temp, &ehci->regs->command);
198 return handshake (ehci, &ehci->regs->status,
199 STS_HALT, STS_HALT, 16 * 125);
200 }
201
202 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
203 u32 mask, u32 done, int usec)
204 {
205 int error;
206
207 error = handshake(ehci, ptr, mask, done, usec);
208 if (error) {
209 ehci_halt(ehci);
210 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
211 ehci_err(ehci, "force halt; handhake %p %08x %08x -> %d\n",
212 ptr, mask, done, error);
213 }
214
215 return error;
216 }
217
218 /* put TDI/ARC silicon into EHCI mode */
219 static void tdi_reset (struct ehci_hcd *ehci)
220 {
221 u32 __iomem *reg_ptr;
222 u32 tmp;
223
224 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
225 tmp = ehci_readl(ehci, reg_ptr);
226 tmp |= USBMODE_CM_HC;
227 /* The default byte access to MMR space is LE after
228 * controller reset. Set the required endian mode
229 * for transfer buffers to match the host microprocessor
230 */
231 if (ehci_big_endian_mmio(ehci))
232 tmp |= USBMODE_BE;
233 ehci_writel(ehci, tmp, reg_ptr);
234 }
235
236 /* reset a non-running (STS_HALT == 1) controller */
237 static int ehci_reset (struct ehci_hcd *ehci)
238 {
239 int retval;
240 u32 command = ehci_readl(ehci, &ehci->regs->command);
241
242 command |= CMD_RESET;
243 dbg_cmd (ehci, "reset", command);
244 ehci_writel(ehci, command, &ehci->regs->command);
245 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
246 ehci->next_statechange = jiffies;
247 retval = handshake (ehci, &ehci->regs->command,
248 CMD_RESET, 0, 250 * 1000);
249
250 if (retval)
251 return retval;
252
253 if (ehci_is_TDI(ehci))
254 tdi_reset (ehci);
255
256 return retval;
257 }
258
259 /* idle the controller (from running) */
260 static void ehci_quiesce (struct ehci_hcd *ehci)
261 {
262 u32 temp;
263
264 #ifdef DEBUG
265 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
266 BUG ();
267 #endif
268
269 /* wait for any schedule enables/disables to take effect */
270 temp = ehci_readl(ehci, &ehci->regs->command) << 10;
271 temp &= STS_ASS | STS_PSS;
272 if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
273 STS_ASS | STS_PSS, temp, 16 * 125))
274 return;
275
276 /* then disable anything that's still active */
277 temp = ehci_readl(ehci, &ehci->regs->command);
278 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
279 ehci_writel(ehci, temp, &ehci->regs->command);
280
281 /* hardware can take 16 microframes to turn off ... */
282 handshake_on_error_set_halt(ehci, &ehci->regs->status,
283 STS_ASS | STS_PSS, 0, 16 * 125);
284 }
285
286 /*-------------------------------------------------------------------------*/
287
288 static void end_unlink_async(struct ehci_hcd *ehci);
289 static void ehci_work(struct ehci_hcd *ehci);
290
291 #include "ehci-hub.c"
292 #include "ehci-mem.c"
293 #include "ehci-q.c"
294 #include "ehci-sched.c"
295
296 /*-------------------------------------------------------------------------*/
297
298 static void ehci_iaa_watchdog(unsigned long param)
299 {
300 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
301 unsigned long flags;
302
303 spin_lock_irqsave (&ehci->lock, flags);
304
305 /* Lost IAA irqs wedge things badly; seen first with a vt8235.
306 * So we need this watchdog, but must protect it against both
307 * (a) SMP races against real IAA firing and retriggering, and
308 * (b) clean HC shutdown, when IAA watchdog was pending.
309 */
310 if (ehci->reclaim
311 && !timer_pending(&ehci->iaa_watchdog)
312 && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
313 u32 cmd, status;
314
315 /* If we get here, IAA is *REALLY* late. It's barely
316 * conceivable that the system is so busy that CMD_IAAD
317 * is still legitimately set, so let's be sure it's
318 * clear before we read STS_IAA. (The HC should clear
319 * CMD_IAAD when it sets STS_IAA.)
320 */
321 cmd = ehci_readl(ehci, &ehci->regs->command);
322 if (cmd & CMD_IAAD)
323 ehci_writel(ehci, cmd & ~CMD_IAAD,
324 &ehci->regs->command);
325
326 /* If IAA is set here it either legitimately triggered
327 * before we cleared IAAD above (but _way_ late, so we'll
328 * still count it as lost) ... or a silicon erratum:
329 * - VIA seems to set IAA without triggering the IRQ;
330 * - IAAD potentially cleared without setting IAA.
331 */
332 status = ehci_readl(ehci, &ehci->regs->status);
333 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
334 COUNT (ehci->stats.lost_iaa);
335 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
336 }
337
338 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
339 status, cmd);
340 end_unlink_async(ehci);
341 }
342
343 spin_unlock_irqrestore(&ehci->lock, flags);
344 }
345
346 static void ehci_watchdog(unsigned long param)
347 {
348 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
349 unsigned long flags;
350
351 spin_lock_irqsave(&ehci->lock, flags);
352
353 /* stop async processing after it's idled a bit */
354 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
355 start_unlink_async (ehci, ehci->async);
356
357 /* ehci could run by timer, without IRQs ... */
358 ehci_work (ehci);
359
360 spin_unlock_irqrestore (&ehci->lock, flags);
361 }
362
363 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
364 * The firmware seems to think that powering off is a wakeup event!
365 * This routine turns off remote wakeup and everything else, on all ports.
366 */
367 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
368 {
369 int port = HCS_N_PORTS(ehci->hcs_params);
370
371 while (port--)
372 ehci_writel(ehci, PORT_RWC_BITS,
373 &ehci->regs->port_status[port]);
374 }
375
376 /*
377 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
378 * Should be called with ehci->lock held.
379 */
380 static void ehci_silence_controller(struct ehci_hcd *ehci)
381 {
382 ehci_halt(ehci);
383 ehci_turn_off_all_ports(ehci);
384
385 /* make BIOS/etc use companion controller during reboot */
386 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
387
388 /* unblock posted writes */
389 ehci_readl(ehci, &ehci->regs->configured_flag);
390 }
391
392 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
393 * This forcibly disables dma and IRQs, helping kexec and other cases
394 * where the next system software may expect clean state.
395 */
396 static void ehci_shutdown(struct usb_hcd *hcd)
397 {
398 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
399
400 del_timer_sync(&ehci->watchdog);
401 del_timer_sync(&ehci->iaa_watchdog);
402
403 spin_lock_irq(&ehci->lock);
404 ehci_silence_controller(ehci);
405 spin_unlock_irq(&ehci->lock);
406 }
407
408 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
409 {
410 unsigned port;
411
412 if (!HCS_PPC (ehci->hcs_params))
413 return;
414
415 ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
416 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
417 (void) ehci_hub_control(ehci_to_hcd(ehci),
418 is_on ? SetPortFeature : ClearPortFeature,
419 USB_PORT_FEAT_POWER,
420 port--, NULL, 0);
421 /* Flush those writes */
422 ehci_readl(ehci, &ehci->regs->command);
423 msleep(20);
424 }
425
426 /*-------------------------------------------------------------------------*/
427
428 /*
429 * ehci_work is called from some interrupts, timers, and so on.
430 * it calls driver completion functions, after dropping ehci->lock.
431 */
432 static void ehci_work (struct ehci_hcd *ehci)
433 {
434 timer_action_done (ehci, TIMER_IO_WATCHDOG);
435
436 /* another CPU may drop ehci->lock during a schedule scan while
437 * it reports urb completions. this flag guards against bogus
438 * attempts at re-entrant schedule scanning.
439 */
440 if (ehci->scanning)
441 return;
442 ehci->scanning = 1;
443 scan_async (ehci);
444 if (ehci->next_uframe != -1)
445 scan_periodic (ehci);
446 ehci->scanning = 0;
447
448 /* the IO watchdog guards against hardware or driver bugs that
449 * misplace IRQs, and should let us run completely without IRQs.
450 * such lossage has been observed on both VT6202 and VT8235.
451 */
452 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
453 (ehci->async->qh_next.ptr != NULL ||
454 ehci->periodic_sched != 0))
455 timer_action (ehci, TIMER_IO_WATCHDOG);
456 }
457
458 /*
459 * Called when the ehci_hcd module is removed.
460 */
461 static void ehci_stop (struct usb_hcd *hcd)
462 {
463 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
464
465 ehci_dbg (ehci, "stop\n");
466
467 /* no more interrupts ... */
468 del_timer_sync (&ehci->watchdog);
469 del_timer_sync(&ehci->iaa_watchdog);
470
471 spin_lock_irq(&ehci->lock);
472 if (HC_IS_RUNNING (hcd->state))
473 ehci_quiesce (ehci);
474
475 ehci_silence_controller(ehci);
476 ehci_reset (ehci);
477 spin_unlock_irq(&ehci->lock);
478
479 remove_companion_file(ehci);
480 remove_debug_files (ehci);
481
482 /* root hub is shut down separately (first, when possible) */
483 spin_lock_irq (&ehci->lock);
484 if (ehci->async)
485 ehci_work (ehci);
486 spin_unlock_irq (&ehci->lock);
487 ehci_mem_cleanup (ehci);
488
489 #ifdef EHCI_STATS
490 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
491 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
492 ehci->stats.lost_iaa);
493 ehci_dbg (ehci, "complete %ld unlink %ld\n",
494 ehci->stats.complete, ehci->stats.unlink);
495 #endif
496
497 dbg_status (ehci, "ehci_stop completed",
498 ehci_readl(ehci, &ehci->regs->status));
499 }
500
501 /* one-time init, only for memory state */
502 static int ehci_init(struct usb_hcd *hcd)
503 {
504 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
505 u32 temp;
506 int retval;
507 u32 hcc_params;
508
509 spin_lock_init(&ehci->lock);
510
511 init_timer(&ehci->watchdog);
512 ehci->watchdog.function = ehci_watchdog;
513 ehci->watchdog.data = (unsigned long) ehci;
514
515 init_timer(&ehci->iaa_watchdog);
516 ehci->iaa_watchdog.function = ehci_iaa_watchdog;
517 ehci->iaa_watchdog.data = (unsigned long) ehci;
518
519 /*
520 * hw default: 1K periodic list heads, one per frame.
521 * periodic_size can shrink by USBCMD update if hcc_params allows.
522 */
523 ehci->periodic_size = DEFAULT_I_TDPS;
524 INIT_LIST_HEAD(&ehci->cached_itd_list);
525 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
526 return retval;
527
528 /* controllers may cache some of the periodic schedule ... */
529 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
530 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
531 ehci->i_thresh = 8;
532 else // N microframes cached
533 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
534
535 ehci->reclaim = NULL;
536 ehci->next_uframe = -1;
537 ehci->clock_frame = -1;
538
539 /*
540 * dedicate a qh for the async ring head, since we couldn't unlink
541 * a 'real' qh without stopping the async schedule [4.8]. use it
542 * as the 'reclamation list head' too.
543 * its dummy is used in hw_alt_next of many tds, to prevent the qh
544 * from automatically advancing to the next td after short reads.
545 */
546 ehci->async->qh_next.qh = NULL;
547 ehci->async->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
548 ehci->async->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
549 ehci->async->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
550 ehci->async->hw_qtd_next = EHCI_LIST_END(ehci);
551 ehci->async->qh_state = QH_STATE_LINKED;
552 ehci->async->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
553
554 /* clear interrupt enables, set irq latency */
555 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
556 log2_irq_thresh = 0;
557 temp = 1 << (16 + log2_irq_thresh);
558 if (HCC_CANPARK(hcc_params)) {
559 /* HW default park == 3, on hardware that supports it (like
560 * NVidia and ALI silicon), maximizes throughput on the async
561 * schedule by avoiding QH fetches between transfers.
562 *
563 * With fast usb storage devices and NForce2, "park" seems to
564 * make problems: throughput reduction (!), data errors...
565 */
566 if (park) {
567 park = min(park, (unsigned) 3);
568 temp |= CMD_PARK;
569 temp |= park << 8;
570 }
571 ehci_dbg(ehci, "park %d\n", park);
572 }
573 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
574 /* periodic schedule size can be smaller than default */
575 temp &= ~(3 << 2);
576 temp |= (EHCI_TUNE_FLS << 2);
577 switch (EHCI_TUNE_FLS) {
578 case 0: ehci->periodic_size = 1024; break;
579 case 1: ehci->periodic_size = 512; break;
580 case 2: ehci->periodic_size = 256; break;
581 default: BUG();
582 }
583 }
584 ehci->command = temp;
585
586 return 0;
587 }
588
589 /* start HC running; it's halted, ehci_init() has been run (once) */
590 static int ehci_run (struct usb_hcd *hcd)
591 {
592 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
593 int retval;
594 u32 temp;
595 u32 hcc_params;
596
597 hcd->uses_new_polling = 1;
598 hcd->poll_rh = 0;
599
600 /* EHCI spec section 4.1 */
601 if ((retval = ehci_reset(ehci)) != 0) {
602 ehci_mem_cleanup(ehci);
603 return retval;
604 }
605 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
606 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
607
608 /*
609 * hcc_params controls whether ehci->regs->segment must (!!!)
610 * be used; it constrains QH/ITD/SITD and QTD locations.
611 * pci_pool consistent memory always uses segment zero.
612 * streaming mappings for I/O buffers, like pci_map_single(),
613 * can return segments above 4GB, if the device allows.
614 *
615 * NOTE: the dma mask is visible through dma_supported(), so
616 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
617 * Scsi_Host.highmem_io, and so forth. It's readonly to all
618 * host side drivers though.
619 */
620 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
621 if (HCC_64BIT_ADDR(hcc_params)) {
622 ehci_writel(ehci, 0, &ehci->regs->segment);
623 #if 0
624 // this is deeply broken on almost all architectures
625 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
626 ehci_info(ehci, "enabled 64bit DMA\n");
627 #endif
628 }
629
630
631 // Philips, Intel, and maybe others need CMD_RUN before the
632 // root hub will detect new devices (why?); NEC doesn't
633 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
634 ehci->command |= CMD_RUN;
635 ehci_writel(ehci, ehci->command, &ehci->regs->command);
636 dbg_cmd (ehci, "init", ehci->command);
637
638 /*
639 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
640 * are explicitly handed to companion controller(s), so no TT is
641 * involved with the root hub. (Except where one is integrated,
642 * and there's no companion controller unless maybe for USB OTG.)
643 *
644 * Turning on the CF flag will transfer ownership of all ports
645 * from the companions to the EHCI controller. If any of the
646 * companions are in the middle of a port reset at the time, it
647 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
648 * guarantees that no resets are in progress. After we set CF,
649 * a short delay lets the hardware catch up; new resets shouldn't
650 * be started before the port switching actions could complete.
651 */
652 down_write(&ehci_cf_port_reset_rwsem);
653 hcd->state = HC_STATE_RUNNING;
654 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
655 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
656 msleep(5);
657 up_write(&ehci_cf_port_reset_rwsem);
658
659 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
660 ehci_info (ehci,
661 "USB %x.%x started, EHCI %x.%02x%s\n",
662 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
663 temp >> 8, temp & 0xff,
664 ignore_oc ? ", overcurrent ignored" : "");
665
666 ehci_writel(ehci, INTR_MASK,
667 &ehci->regs->intr_enable); /* Turn On Interrupts */
668
669 /* GRR this is run-once init(), being done every time the HC starts.
670 * So long as they're part of class devices, we can't do it init()
671 * since the class device isn't created that early.
672 */
673 create_debug_files(ehci);
674 create_companion_file(ehci);
675
676 return 0;
677 }
678
679 /*-------------------------------------------------------------------------*/
680
681 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
682 {
683 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
684 u32 status, masked_status, pcd_status = 0, cmd;
685 int bh;
686
687 spin_lock (&ehci->lock);
688
689 status = ehci_readl(ehci, &ehci->regs->status);
690
691 /* e.g. cardbus physical eject */
692 if (status == ~(u32) 0) {
693 ehci_dbg (ehci, "device removed\n");
694 goto dead;
695 }
696
697 masked_status = status & INTR_MASK;
698 if (!masked_status) { /* irq sharing? */
699 spin_unlock(&ehci->lock);
700 return IRQ_NONE;
701 }
702
703 /* clear (just) interrupts */
704 ehci_writel(ehci, masked_status, &ehci->regs->status);
705 cmd = ehci_readl(ehci, &ehci->regs->command);
706 bh = 0;
707
708 #ifdef VERBOSE_DEBUG
709 /* unrequested/ignored: Frame List Rollover */
710 dbg_status (ehci, "irq", status);
711 #endif
712
713 /* INT, ERR, and IAA interrupt rates can be throttled */
714
715 /* normal [4.15.1.2] or error [4.15.1.1] completion */
716 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
717 if (likely ((status & STS_ERR) == 0))
718 COUNT (ehci->stats.normal);
719 else
720 COUNT (ehci->stats.error);
721 bh = 1;
722 }
723
724 /* complete the unlinking of some qh [4.15.2.3] */
725 if (status & STS_IAA) {
726 /* guard against (alleged) silicon errata */
727 if (cmd & CMD_IAAD) {
728 ehci_writel(ehci, cmd & ~CMD_IAAD,
729 &ehci->regs->command);
730 ehci_dbg(ehci, "IAA with IAAD still set?\n");
731 }
732 if (ehci->reclaim) {
733 COUNT(ehci->stats.reclaim);
734 end_unlink_async(ehci);
735 } else
736 ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
737 }
738
739 /* remote wakeup [4.3.1] */
740 if (status & STS_PCD) {
741 unsigned i = HCS_N_PORTS (ehci->hcs_params);
742
743 /* kick root hub later */
744 pcd_status = status;
745
746 /* resume root hub? */
747 if (!(cmd & CMD_RUN))
748 usb_hcd_resume_root_hub(hcd);
749
750 while (i--) {
751 int pstatus = ehci_readl(ehci,
752 &ehci->regs->port_status [i]);
753
754 if (pstatus & PORT_OWNER)
755 continue;
756 if (!(test_bit(i, &ehci->suspended_ports) &&
757 ((pstatus & PORT_RESUME) ||
758 !(pstatus & PORT_SUSPEND)) &&
759 (pstatus & PORT_PE) &&
760 ehci->reset_done[i] == 0))
761 continue;
762
763 /* start 20 msec resume signaling from this port,
764 * and make khubd collect PORT_STAT_C_SUSPEND to
765 * stop that signaling.
766 */
767 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
768 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
769 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
770 }
771 }
772
773 /* PCI errors [4.15.2.4] */
774 if (unlikely ((status & STS_FATAL) != 0)) {
775 ehci_err(ehci, "fatal error\n");
776 dbg_cmd(ehci, "fatal", cmd);
777 dbg_status(ehci, "fatal", status);
778 ehci_halt(ehci);
779 dead:
780 ehci_reset(ehci);
781 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
782 /* generic layer kills/unlinks all urbs, then
783 * uses ehci_stop to clean up the rest
784 */
785 bh = 1;
786 }
787
788 if (bh)
789 ehci_work (ehci);
790 spin_unlock (&ehci->lock);
791 if (pcd_status)
792 usb_hcd_poll_rh_status(hcd);
793 return IRQ_HANDLED;
794 }
795
796 /*-------------------------------------------------------------------------*/
797
798 /*
799 * non-error returns are a promise to giveback() the urb later
800 * we drop ownership so next owner (or urb unlink) can get it
801 *
802 * urb + dev is in hcd.self.controller.urb_list
803 * we're queueing TDs onto software and hardware lists
804 *
805 * hcd-specific init for hcpriv hasn't been done yet
806 *
807 * NOTE: control, bulk, and interrupt share the same code to append TDs
808 * to a (possibly active) QH, and the same QH scanning code.
809 */
810 static int ehci_urb_enqueue (
811 struct usb_hcd *hcd,
812 struct urb *urb,
813 gfp_t mem_flags
814 ) {
815 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
816 struct list_head qtd_list;
817
818 INIT_LIST_HEAD (&qtd_list);
819
820 switch (usb_pipetype (urb->pipe)) {
821 case PIPE_CONTROL:
822 /* qh_completions() code doesn't handle all the fault cases
823 * in multi-TD control transfers. Even 1KB is rare anyway.
824 */
825 if (urb->transfer_buffer_length > (16 * 1024))
826 return -EMSGSIZE;
827 /* FALLTHROUGH */
828 /* case PIPE_BULK: */
829 default:
830 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
831 return -ENOMEM;
832 return submit_async(ehci, urb, &qtd_list, mem_flags);
833
834 case PIPE_INTERRUPT:
835 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
836 return -ENOMEM;
837 return intr_submit(ehci, urb, &qtd_list, mem_flags);
838
839 case PIPE_ISOCHRONOUS:
840 if (urb->dev->speed == USB_SPEED_HIGH)
841 return itd_submit (ehci, urb, mem_flags);
842 else
843 return sitd_submit (ehci, urb, mem_flags);
844 }
845 }
846
847 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
848 {
849 /* failfast */
850 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
851 end_unlink_async(ehci);
852
853 /* if it's not linked then there's nothing to do */
854 if (qh->qh_state != QH_STATE_LINKED)
855 ;
856
857 /* defer till later if busy */
858 else if (ehci->reclaim) {
859 struct ehci_qh *last;
860
861 for (last = ehci->reclaim;
862 last->reclaim;
863 last = last->reclaim)
864 continue;
865 qh->qh_state = QH_STATE_UNLINK_WAIT;
866 last->reclaim = qh;
867
868 /* start IAA cycle */
869 } else
870 start_unlink_async (ehci, qh);
871 }
872
873 /* remove from hardware lists
874 * completions normally happen asynchronously
875 */
876
877 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
878 {
879 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
880 struct ehci_qh *qh;
881 unsigned long flags;
882 int rc;
883
884 spin_lock_irqsave (&ehci->lock, flags);
885 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
886 if (rc)
887 goto done;
888
889 switch (usb_pipetype (urb->pipe)) {
890 // case PIPE_CONTROL:
891 // case PIPE_BULK:
892 default:
893 qh = (struct ehci_qh *) urb->hcpriv;
894 if (!qh)
895 break;
896 switch (qh->qh_state) {
897 case QH_STATE_LINKED:
898 case QH_STATE_COMPLETING:
899 unlink_async(ehci, qh);
900 break;
901 case QH_STATE_UNLINK:
902 case QH_STATE_UNLINK_WAIT:
903 /* already started */
904 break;
905 case QH_STATE_IDLE:
906 WARN_ON(1);
907 break;
908 }
909 break;
910
911 case PIPE_INTERRUPT:
912 qh = (struct ehci_qh *) urb->hcpriv;
913 if (!qh)
914 break;
915 switch (qh->qh_state) {
916 case QH_STATE_LINKED:
917 intr_deschedule (ehci, qh);
918 /* FALL THROUGH */
919 case QH_STATE_IDLE:
920 qh_completions (ehci, qh);
921 break;
922 default:
923 ehci_dbg (ehci, "bogus qh %p state %d\n",
924 qh, qh->qh_state);
925 goto done;
926 }
927
928 /* reschedule QH iff another request is queued */
929 if (!list_empty (&qh->qtd_list)
930 && HC_IS_RUNNING (hcd->state)) {
931 rc = qh_schedule(ehci, qh);
932
933 /* An error here likely indicates handshake failure
934 * or no space left in the schedule. Neither fault
935 * should happen often ...
936 *
937 * FIXME kill the now-dysfunctional queued urbs
938 */
939 if (rc != 0)
940 ehci_err(ehci,
941 "can't reschedule qh %p, err %d",
942 qh, rc);
943 }
944 break;
945
946 case PIPE_ISOCHRONOUS:
947 // itd or sitd ...
948
949 // wait till next completion, do it then.
950 // completion irqs can wait up to 1024 msec,
951 break;
952 }
953 done:
954 spin_unlock_irqrestore (&ehci->lock, flags);
955 return rc;
956 }
957
958 /*-------------------------------------------------------------------------*/
959
960 // bulk qh holds the data toggle
961
962 static void
963 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
964 {
965 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
966 unsigned long flags;
967 struct ehci_qh *qh, *tmp;
968
969 /* ASSERT: any requests/urbs are being unlinked */
970 /* ASSERT: nobody can be submitting urbs for this any more */
971
972 rescan:
973 spin_lock_irqsave (&ehci->lock, flags);
974 qh = ep->hcpriv;
975 if (!qh)
976 goto done;
977
978 /* endpoints can be iso streams. for now, we don't
979 * accelerate iso completions ... so spin a while.
980 */
981 if (qh->hw_info1 == 0) {
982 ehci_vdbg (ehci, "iso delay\n");
983 goto idle_timeout;
984 }
985
986 if (!HC_IS_RUNNING (hcd->state))
987 qh->qh_state = QH_STATE_IDLE;
988 switch (qh->qh_state) {
989 case QH_STATE_LINKED:
990 for (tmp = ehci->async->qh_next.qh;
991 tmp && tmp != qh;
992 tmp = tmp->qh_next.qh)
993 continue;
994 /* periodic qh self-unlinks on empty */
995 if (!tmp)
996 goto nogood;
997 unlink_async (ehci, qh);
998 /* FALL THROUGH */
999 case QH_STATE_UNLINK: /* wait for hw to finish? */
1000 case QH_STATE_UNLINK_WAIT:
1001 idle_timeout:
1002 spin_unlock_irqrestore (&ehci->lock, flags);
1003 schedule_timeout_uninterruptible(1);
1004 goto rescan;
1005 case QH_STATE_IDLE: /* fully unlinked */
1006 if (list_empty (&qh->qtd_list)) {
1007 qh_put (qh);
1008 break;
1009 }
1010 /* else FALL THROUGH */
1011 default:
1012 nogood:
1013 /* caller was supposed to have unlinked any requests;
1014 * that's not our job. just leak this memory.
1015 */
1016 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1017 qh, ep->desc.bEndpointAddress, qh->qh_state,
1018 list_empty (&qh->qtd_list) ? "" : "(has tds)");
1019 break;
1020 }
1021 ep->hcpriv = NULL;
1022 done:
1023 spin_unlock_irqrestore (&ehci->lock, flags);
1024 return;
1025 }
1026
1027 static void
1028 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1029 {
1030 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1031 struct ehci_qh *qh;
1032 int eptype = usb_endpoint_type(&ep->desc);
1033
1034 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1035 return;
1036
1037 rescan:
1038 spin_lock_irq(&ehci->lock);
1039 qh = ep->hcpriv;
1040
1041 /* For Bulk and Interrupt endpoints we maintain the toggle state
1042 * in the hardware; the toggle bits in udev aren't used at all.
1043 * When an endpoint is reset by usb_clear_halt() we must reset
1044 * the toggle bit in the QH.
1045 */
1046 if (qh) {
1047 if (!list_empty(&qh->qtd_list)) {
1048 WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1049 } else if (qh->qh_state == QH_STATE_IDLE) {
1050 qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
1051 } else {
1052 /* It's not safe to write into the overlay area
1053 * while the QH is active. Unlink it first and
1054 * wait for the unlink to complete.
1055 */
1056 if (qh->qh_state == QH_STATE_LINKED) {
1057 if (eptype == USB_ENDPOINT_XFER_BULK) {
1058 unlink_async(ehci, qh);
1059 } else {
1060 intr_deschedule(ehci, qh);
1061 (void) qh_schedule(ehci, qh);
1062 }
1063 }
1064 spin_unlock_irq(&ehci->lock);
1065 schedule_timeout_uninterruptible(1);
1066 goto rescan;
1067 }
1068 }
1069 spin_unlock_irq(&ehci->lock);
1070 }
1071
1072 static int ehci_get_frame (struct usb_hcd *hcd)
1073 {
1074 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1075 return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
1076 ehci->periodic_size;
1077 }
1078
1079 /*-------------------------------------------------------------------------*/
1080
1081 MODULE_DESCRIPTION(DRIVER_DESC);
1082 MODULE_AUTHOR (DRIVER_AUTHOR);
1083 MODULE_LICENSE ("GPL");
1084
1085 #ifdef CONFIG_PCI
1086 #include "ehci-pci.c"
1087 #define PCI_DRIVER ehci_pci_driver
1088 #endif
1089
1090 #ifdef CONFIG_USB_EHCI_FSL
1091 #include "ehci-fsl.c"
1092 #define PLATFORM_DRIVER ehci_fsl_driver
1093 #endif
1094
1095 #ifdef CONFIG_SOC_AU1200
1096 #include "ehci-au1xxx.c"
1097 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
1098 #endif
1099
1100 #ifdef CONFIG_PPC_PS3
1101 #include "ehci-ps3.c"
1102 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1103 #endif
1104
1105 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1106 #include "ehci-ppc-of.c"
1107 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1108 #endif
1109
1110 #ifdef CONFIG_PLAT_ORION
1111 #include "ehci-orion.c"
1112 #define PLATFORM_DRIVER ehci_orion_driver
1113 #endif
1114
1115 #ifdef CONFIG_ARCH_IXP4XX
1116 #include "ehci-ixp4xx.c"
1117 #define PLATFORM_DRIVER ixp4xx_ehci_driver
1118 #endif
1119
1120 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1121 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1122 #error "missing bus glue for ehci-hcd"
1123 #endif
1124
1125 static int __init ehci_hcd_init(void)
1126 {
1127 int retval = 0;
1128
1129 if (usb_disabled())
1130 return -ENODEV;
1131
1132 printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1133 set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1134 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1135 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1136 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1137 " before uhci_hcd and ohci_hcd, not after\n");
1138
1139 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1140 hcd_name,
1141 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1142 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1143
1144 #ifdef DEBUG
1145 ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1146 if (!ehci_debug_root) {
1147 retval = -ENOENT;
1148 goto err_debug;
1149 }
1150 #endif
1151
1152 #ifdef PLATFORM_DRIVER
1153 retval = platform_driver_register(&PLATFORM_DRIVER);
1154 if (retval < 0)
1155 goto clean0;
1156 #endif
1157
1158 #ifdef PCI_DRIVER
1159 retval = pci_register_driver(&PCI_DRIVER);
1160 if (retval < 0)
1161 goto clean1;
1162 #endif
1163
1164 #ifdef PS3_SYSTEM_BUS_DRIVER
1165 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1166 if (retval < 0)
1167 goto clean2;
1168 #endif
1169
1170 #ifdef OF_PLATFORM_DRIVER
1171 retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1172 if (retval < 0)
1173 goto clean3;
1174 #endif
1175 return retval;
1176
1177 #ifdef OF_PLATFORM_DRIVER
1178 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1179 clean3:
1180 #endif
1181 #ifdef PS3_SYSTEM_BUS_DRIVER
1182 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1183 clean2:
1184 #endif
1185 #ifdef PCI_DRIVER
1186 pci_unregister_driver(&PCI_DRIVER);
1187 clean1:
1188 #endif
1189 #ifdef PLATFORM_DRIVER
1190 platform_driver_unregister(&PLATFORM_DRIVER);
1191 clean0:
1192 #endif
1193 #ifdef DEBUG
1194 debugfs_remove(ehci_debug_root);
1195 ehci_debug_root = NULL;
1196 err_debug:
1197 #endif
1198 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1199 return retval;
1200 }
1201 module_init(ehci_hcd_init);
1202
1203 static void __exit ehci_hcd_cleanup(void)
1204 {
1205 #ifdef OF_PLATFORM_DRIVER
1206 of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1207 #endif
1208 #ifdef PLATFORM_DRIVER
1209 platform_driver_unregister(&PLATFORM_DRIVER);
1210 #endif
1211 #ifdef PCI_DRIVER
1212 pci_unregister_driver(&PCI_DRIVER);
1213 #endif
1214 #ifdef PS3_SYSTEM_BUS_DRIVER
1215 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1216 #endif
1217 #ifdef DEBUG
1218 debugfs_remove(ehci_debug_root);
1219 #endif
1220 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1221 }
1222 module_exit(ehci_hcd_cleanup);
1223