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1 /*
2 * Copyright (C) 2001-2004 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 /* this file is part of ehci-hcd.c */
20
21 /*-------------------------------------------------------------------------*/
22
23 /*
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
25 *
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
30 *
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
34 *
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
39 */
40
41 /*-------------------------------------------------------------------------*/
42
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
44
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
48 {
49 int i, count;
50 u64 addr = buf;
51
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
61
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
73 }
74
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
78 }
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 qtd->length = count;
81
82 return count;
83 }
84
85 /*-------------------------------------------------------------------------*/
86
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
89 {
90 struct ehci_qh_hw *hw = qh->hw;
91
92 /* writes to an active overlay are unsafe */
93 BUG_ON(qh->qh_state != QH_STATE_IDLE);
94
95 hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
96 hw->hw_alt_next = EHCI_LIST_END(ehci);
97
98 /* Except for control endpoints, we make hardware maintain data
99 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
100 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
101 * ever clear it.
102 */
103 if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
104 unsigned is_out, epnum;
105
106 is_out = qh->is_out;
107 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
108 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
109 hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
110 usb_settoggle (qh->dev, epnum, is_out, 1);
111 }
112 }
113
114 hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
115 }
116
117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
120 */
121 static void
122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
123 {
124 struct ehci_qtd *qtd;
125
126 if (list_empty (&qh->qtd_list))
127 qtd = qh->dummy;
128 else {
129 qtd = list_entry (qh->qtd_list.next,
130 struct ehci_qtd, qtd_list);
131 /*
132 * first qtd may already be partially processed.
133 * If we come here during unlink, the QH overlay region
134 * might have reference to the just unlinked qtd. The
135 * qtd is updated in qh_completions(). Update the QH
136 * overlay here.
137 */
138 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current) {
139 qh->hw->hw_qtd_next = qtd->hw_next;
140 qtd = NULL;
141 }
142 }
143
144 if (qtd)
145 qh_update (ehci, qh, qtd);
146 }
147
148 /*-------------------------------------------------------------------------*/
149
150 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
151
152 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
153 struct usb_host_endpoint *ep)
154 {
155 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
156 struct ehci_qh *qh = ep->hcpriv;
157 unsigned long flags;
158
159 spin_lock_irqsave(&ehci->lock, flags);
160 qh->clearing_tt = 0;
161 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
162 && ehci->rh_state == EHCI_RH_RUNNING)
163 qh_link_async(ehci, qh);
164 spin_unlock_irqrestore(&ehci->lock, flags);
165 }
166
167 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
168 struct urb *urb, u32 token)
169 {
170
171 /* If an async split transaction gets an error or is unlinked,
172 * the TT buffer may be left in an indeterminate state. We
173 * have to clear the TT buffer.
174 *
175 * Note: this routine is never called for Isochronous transfers.
176 */
177 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
178 #ifdef DEBUG
179 struct usb_device *tt = urb->dev->tt->hub;
180 dev_dbg(&tt->dev,
181 "clear tt buffer port %d, a%d ep%d t%08x\n",
182 urb->dev->ttport, urb->dev->devnum,
183 usb_pipeendpoint(urb->pipe), token);
184 #endif /* DEBUG */
185 if (!ehci_is_TDI(ehci)
186 || urb->dev->tt->hub !=
187 ehci_to_hcd(ehci)->self.root_hub) {
188 if (usb_hub_clear_tt_buffer(urb) == 0)
189 qh->clearing_tt = 1;
190 } else {
191
192 /* REVISIT ARC-derived cores don't clear the root
193 * hub TT buffer in this way...
194 */
195 }
196 }
197 }
198
199 static int qtd_copy_status (
200 struct ehci_hcd *ehci,
201 struct urb *urb,
202 size_t length,
203 u32 token
204 )
205 {
206 int status = -EINPROGRESS;
207
208 /* count IN/OUT bytes, not SETUP (even short packets) */
209 if (likely (QTD_PID (token) != 2))
210 urb->actual_length += length - QTD_LENGTH (token);
211
212 /* don't modify error codes */
213 if (unlikely(urb->unlinked))
214 return status;
215
216 /* force cleanup after short read; not always an error */
217 if (unlikely (IS_SHORT_READ (token)))
218 status = -EREMOTEIO;
219
220 /* serious "can't proceed" faults reported by the hardware */
221 if (token & QTD_STS_HALT) {
222 if (token & QTD_STS_BABBLE) {
223 /* FIXME "must" disable babbling device's port too */
224 status = -EOVERFLOW;
225 /* CERR nonzero + halt --> stall */
226 } else if (QTD_CERR(token)) {
227 status = -EPIPE;
228
229 /* In theory, more than one of the following bits can be set
230 * since they are sticky and the transaction is retried.
231 * Which to test first is rather arbitrary.
232 */
233 } else if (token & QTD_STS_MMF) {
234 /* fs/ls interrupt xfer missed the complete-split */
235 status = -EPROTO;
236 } else if (token & QTD_STS_DBE) {
237 status = (QTD_PID (token) == 1) /* IN ? */
238 ? -ENOSR /* hc couldn't read data */
239 : -ECOMM; /* hc couldn't write data */
240 } else if (token & QTD_STS_XACT) {
241 /* timeout, bad CRC, wrong PID, etc */
242 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
243 urb->dev->devpath,
244 usb_pipeendpoint(urb->pipe),
245 usb_pipein(urb->pipe) ? "in" : "out");
246 status = -EPROTO;
247 } else { /* unknown */
248 status = -EPROTO;
249 }
250
251 ehci_vdbg (ehci,
252 "dev%d ep%d%s qtd token %08x --> status %d\n",
253 usb_pipedevice (urb->pipe),
254 usb_pipeendpoint (urb->pipe),
255 usb_pipein (urb->pipe) ? "in" : "out",
256 token, status);
257 }
258
259 return status;
260 }
261
262 static void
263 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
264 __releases(ehci->lock)
265 __acquires(ehci->lock)
266 {
267 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
268 /* ... update hc-wide periodic stats */
269 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
270 }
271
272 if (unlikely(urb->unlinked)) {
273 COUNT(ehci->stats.unlink);
274 } else {
275 /* report non-error and short read status as zero */
276 if (status == -EINPROGRESS || status == -EREMOTEIO)
277 status = 0;
278 COUNT(ehci->stats.complete);
279 }
280
281 #ifdef EHCI_URB_TRACE
282 ehci_dbg (ehci,
283 "%s %s urb %p ep%d%s status %d len %d/%d\n",
284 __func__, urb->dev->devpath, urb,
285 usb_pipeendpoint (urb->pipe),
286 usb_pipein (urb->pipe) ? "in" : "out",
287 status,
288 urb->actual_length, urb->transfer_buffer_length);
289 #endif
290
291 /* complete() can reenter this HCD */
292 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
293 spin_unlock (&ehci->lock);
294 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
295 spin_lock (&ehci->lock);
296 }
297
298 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
299
300 /*
301 * Process and free completed qtds for a qh, returning URBs to drivers.
302 * Chases up to qh->hw_current. Returns number of completions called,
303 * indicating how much "real" work we did.
304 */
305 static unsigned
306 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
307 {
308 struct ehci_qtd *last, *end = qh->dummy;
309 struct list_head *entry, *tmp;
310 int last_status;
311 int stopped;
312 unsigned count = 0;
313 u8 state;
314 struct ehci_qh_hw *hw = qh->hw;
315
316 if (unlikely (list_empty (&qh->qtd_list)))
317 return count;
318
319 /* completions (or tasks on other cpus) must never clobber HALT
320 * till we've gone through and cleaned everything up, even when
321 * they add urbs to this qh's queue or mark them for unlinking.
322 *
323 * NOTE: unlinking expects to be done in queue order.
324 *
325 * It's a bug for qh->qh_state to be anything other than
326 * QH_STATE_IDLE, unless our caller is scan_async() or
327 * scan_intr().
328 */
329 state = qh->qh_state;
330 qh->qh_state = QH_STATE_COMPLETING;
331 stopped = (state == QH_STATE_IDLE);
332
333 rescan:
334 last = NULL;
335 last_status = -EINPROGRESS;
336 qh->needs_rescan = 0;
337
338 /* remove de-activated QTDs from front of queue.
339 * after faults (including short reads), cleanup this urb
340 * then let the queue advance.
341 * if queue is stopped, handles unlinks.
342 */
343 list_for_each_safe (entry, tmp, &qh->qtd_list) {
344 struct ehci_qtd *qtd;
345 struct urb *urb;
346 u32 token = 0;
347
348 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
349 urb = qtd->urb;
350
351 /* clean up any state from previous QTD ...*/
352 if (last) {
353 if (likely (last->urb != urb)) {
354 ehci_urb_done(ehci, last->urb, last_status);
355 count++;
356 last_status = -EINPROGRESS;
357 }
358 ehci_qtd_free (ehci, last);
359 last = NULL;
360 }
361
362 /* ignore urbs submitted during completions we reported */
363 if (qtd == end)
364 break;
365
366 /* hardware copies qtd out of qh overlay */
367 rmb ();
368 token = hc32_to_cpu(ehci, qtd->hw_token);
369
370 /* always clean up qtds the hc de-activated */
371 retry_xacterr:
372 if ((token & QTD_STS_ACTIVE) == 0) {
373
374 /* Report Data Buffer Error: non-fatal but useful */
375 if (token & QTD_STS_DBE)
376 ehci_dbg(ehci,
377 "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
378 urb,
379 usb_endpoint_num(&urb->ep->desc),
380 usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
381 urb->transfer_buffer_length,
382 qtd,
383 qh);
384
385 /* on STALL, error, and short reads this urb must
386 * complete and all its qtds must be recycled.
387 */
388 if ((token & QTD_STS_HALT) != 0) {
389
390 /* retry transaction errors until we
391 * reach the software xacterr limit
392 */
393 if ((token & QTD_STS_XACT) &&
394 QTD_CERR(token) == 0 &&
395 ++qh->xacterrs < QH_XACTERR_MAX &&
396 !urb->unlinked) {
397 ehci_dbg(ehci,
398 "detected XactErr len %zu/%zu retry %d\n",
399 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
400
401 /* reset the token in the qtd and the
402 * qh overlay (which still contains
403 * the qtd) so that we pick up from
404 * where we left off
405 */
406 token &= ~QTD_STS_HALT;
407 token |= QTD_STS_ACTIVE |
408 (EHCI_TUNE_CERR << 10);
409 qtd->hw_token = cpu_to_hc32(ehci,
410 token);
411 wmb();
412 hw->hw_token = cpu_to_hc32(ehci,
413 token);
414 goto retry_xacterr;
415 }
416 stopped = 1;
417
418 /* magic dummy for some short reads; qh won't advance.
419 * that silicon quirk can kick in with this dummy too.
420 *
421 * other short reads won't stop the queue, including
422 * control transfers (status stage handles that) or
423 * most other single-qtd reads ... the queue stops if
424 * URB_SHORT_NOT_OK was set so the driver submitting
425 * the urbs could clean it up.
426 */
427 } else if (IS_SHORT_READ (token)
428 && !(qtd->hw_alt_next
429 & EHCI_LIST_END(ehci))) {
430 stopped = 1;
431 }
432
433 /* stop scanning when we reach qtds the hc is using */
434 } else if (likely (!stopped
435 && ehci->rh_state >= EHCI_RH_RUNNING)) {
436 break;
437
438 /* scan the whole queue for unlinks whenever it stops */
439 } else {
440 stopped = 1;
441
442 /* cancel everything if we halt, suspend, etc */
443 if (ehci->rh_state < EHCI_RH_RUNNING)
444 last_status = -ESHUTDOWN;
445
446 /* this qtd is active; skip it unless a previous qtd
447 * for its urb faulted, or its urb was canceled.
448 */
449 else if (last_status == -EINPROGRESS && !urb->unlinked)
450 continue;
451
452 /* qh unlinked; token in overlay may be most current */
453 if (state == QH_STATE_IDLE
454 && cpu_to_hc32(ehci, qtd->qtd_dma)
455 == hw->hw_current) {
456 token = hc32_to_cpu(ehci, hw->hw_token);
457
458 /* An unlink may leave an incomplete
459 * async transaction in the TT buffer.
460 * We have to clear it.
461 */
462 ehci_clear_tt_buffer(ehci, qh, urb, token);
463 }
464 }
465
466 /* unless we already know the urb's status, collect qtd status
467 * and update count of bytes transferred. in common short read
468 * cases with only one data qtd (including control transfers),
469 * queue processing won't halt. but with two or more qtds (for
470 * example, with a 32 KB transfer), when the first qtd gets a
471 * short read the second must be removed by hand.
472 */
473 if (last_status == -EINPROGRESS) {
474 last_status = qtd_copy_status(ehci, urb,
475 qtd->length, token);
476 if (last_status == -EREMOTEIO
477 && (qtd->hw_alt_next
478 & EHCI_LIST_END(ehci)))
479 last_status = -EINPROGRESS;
480
481 /* As part of low/full-speed endpoint-halt processing
482 * we must clear the TT buffer (11.17.5).
483 */
484 if (unlikely(last_status != -EINPROGRESS &&
485 last_status != -EREMOTEIO)) {
486 /* The TT's in some hubs malfunction when they
487 * receive this request following a STALL (they
488 * stop sending isochronous packets). Since a
489 * STALL can't leave the TT buffer in a busy
490 * state (if you believe Figures 11-48 - 11-51
491 * in the USB 2.0 spec), we won't clear the TT
492 * buffer in this case. Strictly speaking this
493 * is a violation of the spec.
494 */
495 if (last_status != -EPIPE)
496 ehci_clear_tt_buffer(ehci, qh, urb,
497 token);
498 }
499 }
500
501 /* if we're removing something not at the queue head,
502 * patch the hardware queue pointer.
503 */
504 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
505 last = list_entry (qtd->qtd_list.prev,
506 struct ehci_qtd, qtd_list);
507 last->hw_next = qtd->hw_next;
508 }
509
510 /* remove qtd; it's recycled after possible urb completion */
511 list_del (&qtd->qtd_list);
512 last = qtd;
513
514 /* reinit the xacterr counter for the next qtd */
515 qh->xacterrs = 0;
516 }
517
518 /* last urb's completion might still need calling */
519 if (likely (last != NULL)) {
520 ehci_urb_done(ehci, last->urb, last_status);
521 count++;
522 ehci_qtd_free (ehci, last);
523 }
524
525 /* Do we need to rescan for URBs dequeued during a giveback? */
526 if (unlikely(qh->needs_rescan)) {
527 /* If the QH is already unlinked, do the rescan now. */
528 if (state == QH_STATE_IDLE)
529 goto rescan;
530
531 /* Otherwise we have to wait until the QH is fully unlinked.
532 * Our caller will start an unlink if qh->needs_rescan is
533 * set. But if an unlink has already started, nothing needs
534 * to be done.
535 */
536 if (state != QH_STATE_LINKED)
537 qh->needs_rescan = 0;
538 }
539
540 /* restore original state; caller must unlink or relink */
541 qh->qh_state = state;
542
543 /* be sure the hardware's done with the qh before refreshing
544 * it after fault cleanup, or recovering from silicon wrongly
545 * overlaying the dummy qtd (which reduces DMA chatter).
546 */
547 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
548 switch (state) {
549 case QH_STATE_IDLE:
550 qh_refresh(ehci, qh);
551 break;
552 case QH_STATE_LINKED:
553 /* We won't refresh a QH that's linked (after the HC
554 * stopped the queue). That avoids a race:
555 * - HC reads first part of QH;
556 * - CPU updates that first part and the token;
557 * - HC reads rest of that QH, including token
558 * Result: HC gets an inconsistent image, and then
559 * DMAs to/from the wrong memory (corrupting it).
560 *
561 * That should be rare for interrupt transfers,
562 * except maybe high bandwidth ...
563 */
564
565 /* Tell the caller to start an unlink */
566 qh->needs_rescan = 1;
567 break;
568 /* otherwise, unlink already started */
569 }
570 }
571
572 return count;
573 }
574
575 /*-------------------------------------------------------------------------*/
576
577 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
578 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
579 // ... and packet size, for any kind of endpoint descriptor
580 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
581
582 /*
583 * reverse of qh_urb_transaction: free a list of TDs.
584 * used for cleanup after errors, before HC sees an URB's TDs.
585 */
586 static void qtd_list_free (
587 struct ehci_hcd *ehci,
588 struct urb *urb,
589 struct list_head *qtd_list
590 ) {
591 struct list_head *entry, *temp;
592
593 list_for_each_safe (entry, temp, qtd_list) {
594 struct ehci_qtd *qtd;
595
596 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
597 list_del (&qtd->qtd_list);
598 ehci_qtd_free (ehci, qtd);
599 }
600 }
601
602 /*
603 * create a list of filled qtds for this URB; won't link into qh.
604 */
605 static struct list_head *
606 qh_urb_transaction (
607 struct ehci_hcd *ehci,
608 struct urb *urb,
609 struct list_head *head,
610 gfp_t flags
611 ) {
612 struct ehci_qtd *qtd, *qtd_prev;
613 dma_addr_t buf;
614 int len, this_sg_len, maxpacket;
615 int is_input;
616 u32 token;
617 int i;
618 struct scatterlist *sg;
619
620 /*
621 * URBs map to sequences of QTDs: one logical transaction
622 */
623 qtd = ehci_qtd_alloc (ehci, flags);
624 if (unlikely (!qtd))
625 return NULL;
626 list_add_tail (&qtd->qtd_list, head);
627 qtd->urb = urb;
628
629 token = QTD_STS_ACTIVE;
630 token |= (EHCI_TUNE_CERR << 10);
631 /* for split transactions, SplitXState initialized to zero */
632
633 len = urb->transfer_buffer_length;
634 is_input = usb_pipein (urb->pipe);
635 if (usb_pipecontrol (urb->pipe)) {
636 /* SETUP pid */
637 qtd_fill(ehci, qtd, urb->setup_dma,
638 sizeof (struct usb_ctrlrequest),
639 token | (2 /* "setup" */ << 8), 8);
640
641 /* ... and always at least one more pid */
642 token ^= QTD_TOGGLE;
643 qtd_prev = qtd;
644 qtd = ehci_qtd_alloc (ehci, flags);
645 if (unlikely (!qtd))
646 goto cleanup;
647 qtd->urb = urb;
648 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
649 list_add_tail (&qtd->qtd_list, head);
650
651 /* for zero length DATA stages, STATUS is always IN */
652 if (len == 0)
653 token |= (1 /* "in" */ << 8);
654 }
655
656 /*
657 * data transfer stage: buffer setup
658 */
659 i = urb->num_mapped_sgs;
660 if (len > 0 && i > 0) {
661 sg = urb->sg;
662 buf = sg_dma_address(sg);
663
664 /* urb->transfer_buffer_length may be smaller than the
665 * size of the scatterlist (or vice versa)
666 */
667 this_sg_len = min_t(int, sg_dma_len(sg), len);
668 } else {
669 sg = NULL;
670 buf = urb->transfer_dma;
671 this_sg_len = len;
672 }
673
674 if (is_input)
675 token |= (1 /* "in" */ << 8);
676 /* else it's already initted to "out" pid (0 << 8) */
677
678 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
679
680 /*
681 * buffer gets wrapped in one or more qtds;
682 * last one may be "short" (including zero len)
683 * and may serve as a control status ack
684 */
685 for (;;) {
686 int this_qtd_len;
687
688 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
689 maxpacket);
690 this_sg_len -= this_qtd_len;
691 len -= this_qtd_len;
692 buf += this_qtd_len;
693
694 /*
695 * short reads advance to a "magic" dummy instead of the next
696 * qtd ... that forces the queue to stop, for manual cleanup.
697 * (this will usually be overridden later.)
698 */
699 if (is_input)
700 qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
701
702 /* qh makes control packets use qtd toggle; maybe switch it */
703 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
704 token ^= QTD_TOGGLE;
705
706 if (likely(this_sg_len <= 0)) {
707 if (--i <= 0 || len <= 0)
708 break;
709 sg = sg_next(sg);
710 buf = sg_dma_address(sg);
711 this_sg_len = min_t(int, sg_dma_len(sg), len);
712 }
713
714 qtd_prev = qtd;
715 qtd = ehci_qtd_alloc (ehci, flags);
716 if (unlikely (!qtd))
717 goto cleanup;
718 qtd->urb = urb;
719 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
720 list_add_tail (&qtd->qtd_list, head);
721 }
722
723 /*
724 * unless the caller requires manual cleanup after short reads,
725 * have the alt_next mechanism keep the queue running after the
726 * last data qtd (the only one, for control and most other cases).
727 */
728 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
729 || usb_pipecontrol (urb->pipe)))
730 qtd->hw_alt_next = EHCI_LIST_END(ehci);
731
732 /*
733 * control requests may need a terminating data "status" ack;
734 * other OUT ones may need a terminating short packet
735 * (zero length).
736 */
737 if (likely (urb->transfer_buffer_length != 0)) {
738 int one_more = 0;
739
740 if (usb_pipecontrol (urb->pipe)) {
741 one_more = 1;
742 token ^= 0x0100; /* "in" <--> "out" */
743 token |= QTD_TOGGLE; /* force DATA1 */
744 } else if (usb_pipeout(urb->pipe)
745 && (urb->transfer_flags & URB_ZERO_PACKET)
746 && !(urb->transfer_buffer_length % maxpacket)) {
747 one_more = 1;
748 }
749 if (one_more) {
750 qtd_prev = qtd;
751 qtd = ehci_qtd_alloc (ehci, flags);
752 if (unlikely (!qtd))
753 goto cleanup;
754 qtd->urb = urb;
755 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
756 list_add_tail (&qtd->qtd_list, head);
757
758 /* never any data in such packets */
759 qtd_fill(ehci, qtd, 0, 0, token, 0);
760 }
761 }
762
763 /* by default, enable interrupt on urb completion */
764 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
765 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
766 return head;
767
768 cleanup:
769 qtd_list_free (ehci, urb, head);
770 return NULL;
771 }
772
773 /*-------------------------------------------------------------------------*/
774
775 // Would be best to create all qh's from config descriptors,
776 // when each interface/altsetting is established. Unlink
777 // any previous qh and cancel its urbs first; endpoints are
778 // implicitly reset then (data toggle too).
779 // That'd mean updating how usbcore talks to HCDs. (2.7?)
780
781
782 /*
783 * Each QH holds a qtd list; a QH is used for everything except iso.
784 *
785 * For interrupt urbs, the scheduler must set the microframe scheduling
786 * mask(s) each time the QH gets scheduled. For highspeed, that's
787 * just one microframe in the s-mask. For split interrupt transactions
788 * there are additional complications: c-mask, maybe FSTNs.
789 */
790 static struct ehci_qh *
791 qh_make (
792 struct ehci_hcd *ehci,
793 struct urb *urb,
794 gfp_t flags
795 ) {
796 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
797 u32 info1 = 0, info2 = 0;
798 int is_input, type;
799 int maxp = 0;
800 struct usb_tt *tt = urb->dev->tt;
801 struct ehci_qh_hw *hw;
802
803 if (!qh)
804 return qh;
805
806 /*
807 * init endpoint/device data for this QH
808 */
809 info1 |= usb_pipeendpoint (urb->pipe) << 8;
810 info1 |= usb_pipedevice (urb->pipe) << 0;
811
812 is_input = usb_pipein (urb->pipe);
813 type = usb_pipetype (urb->pipe);
814 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
815
816 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
817 * acts like up to 3KB, but is built from smaller packets.
818 */
819 if (max_packet(maxp) > 1024) {
820 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
821 goto done;
822 }
823
824 /* Compute interrupt scheduling parameters just once, and save.
825 * - allowing for high bandwidth, how many nsec/uframe are used?
826 * - split transactions need a second CSPLIT uframe; same question
827 * - splits also need a schedule gap (for full/low speed I/O)
828 * - qh has a polling interval
829 *
830 * For control/bulk requests, the HC or TT handles these.
831 */
832 if (type == PIPE_INTERRUPT) {
833 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
834 is_input, 0,
835 hb_mult(maxp) * max_packet(maxp)));
836 qh->start = NO_FRAME;
837
838 if (urb->dev->speed == USB_SPEED_HIGH) {
839 qh->c_usecs = 0;
840 qh->gap_uf = 0;
841
842 qh->period = urb->interval >> 3;
843 if (qh->period == 0 && urb->interval != 1) {
844 /* NOTE interval 2 or 4 uframes could work.
845 * But interval 1 scheduling is simpler, and
846 * includes high bandwidth.
847 */
848 urb->interval = 1;
849 } else if (qh->period > ehci->periodic_size) {
850 qh->period = ehci->periodic_size;
851 urb->interval = qh->period << 3;
852 }
853 } else {
854 int think_time;
855
856 /* gap is f(FS/LS transfer times) */
857 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
858 is_input, 0, maxp) / (125 * 1000);
859
860 /* FIXME this just approximates SPLIT/CSPLIT times */
861 if (is_input) { // SPLIT, gap, CSPLIT+DATA
862 qh->c_usecs = qh->usecs + HS_USECS (0);
863 qh->usecs = HS_USECS (1);
864 } else { // SPLIT+DATA, gap, CSPLIT
865 qh->usecs += HS_USECS (1);
866 qh->c_usecs = HS_USECS (0);
867 }
868
869 think_time = tt ? tt->think_time : 0;
870 qh->tt_usecs = NS_TO_US (think_time +
871 usb_calc_bus_time (urb->dev->speed,
872 is_input, 0, max_packet (maxp)));
873 qh->period = urb->interval;
874 if (qh->period > ehci->periodic_size) {
875 qh->period = ehci->periodic_size;
876 urb->interval = qh->period;
877 }
878 }
879 }
880
881 /* support for tt scheduling, and access to toggles */
882 qh->dev = urb->dev;
883
884 /* using TT? */
885 switch (urb->dev->speed) {
886 case USB_SPEED_LOW:
887 info1 |= QH_LOW_SPEED;
888 /* FALL THROUGH */
889
890 case USB_SPEED_FULL:
891 /* EPS 0 means "full" */
892 if (type != PIPE_INTERRUPT)
893 info1 |= (EHCI_TUNE_RL_TT << 28);
894 if (type == PIPE_CONTROL) {
895 info1 |= QH_CONTROL_EP; /* for TT */
896 info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
897 }
898 info1 |= maxp << 16;
899
900 info2 |= (EHCI_TUNE_MULT_TT << 30);
901
902 /* Some Freescale processors have an erratum in which the
903 * port number in the queue head was 0..N-1 instead of 1..N.
904 */
905 if (ehci_has_fsl_portno_bug(ehci))
906 info2 |= (urb->dev->ttport-1) << 23;
907 else
908 info2 |= urb->dev->ttport << 23;
909
910 /* set the address of the TT; for TDI's integrated
911 * root hub tt, leave it zeroed.
912 */
913 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
914 info2 |= tt->hub->devnum << 16;
915
916 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
917
918 break;
919
920 case USB_SPEED_HIGH: /* no TT involved */
921 info1 |= QH_HIGH_SPEED;
922 if (type == PIPE_CONTROL) {
923 info1 |= (EHCI_TUNE_RL_HS << 28);
924 info1 |= 64 << 16; /* usb2 fixed maxpacket */
925 info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
926 info2 |= (EHCI_TUNE_MULT_HS << 30);
927 } else if (type == PIPE_BULK) {
928 info1 |= (EHCI_TUNE_RL_HS << 28);
929 /* The USB spec says that high speed bulk endpoints
930 * always use 512 byte maxpacket. But some device
931 * vendors decided to ignore that, and MSFT is happy
932 * to help them do so. So now people expect to use
933 * such nonconformant devices with Linux too; sigh.
934 */
935 info1 |= max_packet(maxp) << 16;
936 info2 |= (EHCI_TUNE_MULT_HS << 30);
937 } else { /* PIPE_INTERRUPT */
938 info1 |= max_packet (maxp) << 16;
939 info2 |= hb_mult (maxp) << 30;
940 }
941 break;
942 default:
943 ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
944 urb->dev->speed);
945 done:
946 qh_destroy(ehci, qh);
947 return NULL;
948 }
949
950 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
951
952 /* init as live, toggle clear, advance to dummy */
953 qh->qh_state = QH_STATE_IDLE;
954 hw = qh->hw;
955 hw->hw_info1 = cpu_to_hc32(ehci, info1);
956 hw->hw_info2 = cpu_to_hc32(ehci, info2);
957 qh->is_out = !is_input;
958 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
959 qh_refresh (ehci, qh);
960 return qh;
961 }
962
963 /*-------------------------------------------------------------------------*/
964
965 static void enable_async(struct ehci_hcd *ehci)
966 {
967 if (ehci->async_count++)
968 return;
969
970 /* Stop waiting to turn off the async schedule */
971 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
972
973 /* Don't start the schedule until ASS is 0 */
974 ehci_poll_ASS(ehci);
975 turn_on_io_watchdog(ehci);
976 }
977
978 static void disable_async(struct ehci_hcd *ehci)
979 {
980 if (--ehci->async_count)
981 return;
982
983 /* The async schedule and async_unlink list are supposed to be empty */
984 WARN_ON(ehci->async->qh_next.qh || ehci->async_unlink);
985
986 /* Don't turn off the schedule until ASS is 1 */
987 ehci_poll_ASS(ehci);
988 }
989
990 /* move qh (and its qtds) onto async queue; maybe enable queue. */
991
992 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
993 {
994 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
995 struct ehci_qh *head;
996
997 /* Don't link a QH if there's a Clear-TT-Buffer pending */
998 if (unlikely(qh->clearing_tt))
999 return;
1000
1001 WARN_ON(qh->qh_state != QH_STATE_IDLE);
1002
1003 /* clear halt and/or toggle; and maybe recover from silicon quirk */
1004 qh_refresh(ehci, qh);
1005
1006 /* splice right after start */
1007 head = ehci->async;
1008 qh->qh_next = head->qh_next;
1009 qh->hw->hw_next = head->hw->hw_next;
1010 wmb ();
1011
1012 head->qh_next.qh = qh;
1013 head->hw->hw_next = dma;
1014
1015 qh->xacterrs = 0;
1016 qh->qh_state = QH_STATE_LINKED;
1017 /* qtd completions reported later by interrupt */
1018
1019 enable_async(ehci);
1020 }
1021
1022 /*-------------------------------------------------------------------------*/
1023
1024 /*
1025 * For control/bulk/interrupt, return QH with these TDs appended.
1026 * Allocates and initializes the QH if necessary.
1027 * Returns null if it can't allocate a QH it needs to.
1028 * If the QH has TDs (urbs) already, that's great.
1029 */
1030 static struct ehci_qh *qh_append_tds (
1031 struct ehci_hcd *ehci,
1032 struct urb *urb,
1033 struct list_head *qtd_list,
1034 int epnum,
1035 void **ptr
1036 )
1037 {
1038 struct ehci_qh *qh = NULL;
1039 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1040
1041 qh = (struct ehci_qh *) *ptr;
1042 if (unlikely (qh == NULL)) {
1043 /* can't sleep here, we have ehci->lock... */
1044 qh = qh_make (ehci, urb, GFP_ATOMIC);
1045 *ptr = qh;
1046 }
1047 if (likely (qh != NULL)) {
1048 struct ehci_qtd *qtd;
1049
1050 if (unlikely (list_empty (qtd_list)))
1051 qtd = NULL;
1052 else
1053 qtd = list_entry (qtd_list->next, struct ehci_qtd,
1054 qtd_list);
1055
1056 /* control qh may need patching ... */
1057 if (unlikely (epnum == 0)) {
1058
1059 /* usb_reset_device() briefly reverts to address 0 */
1060 if (usb_pipedevice (urb->pipe) == 0)
1061 qh->hw->hw_info1 &= ~qh_addr_mask;
1062 }
1063
1064 /* just one way to queue requests: swap with the dummy qtd.
1065 * only hc or qh_refresh() ever modify the overlay.
1066 */
1067 if (likely (qtd != NULL)) {
1068 struct ehci_qtd *dummy;
1069 dma_addr_t dma;
1070 __hc32 token;
1071
1072 /* to avoid racing the HC, use the dummy td instead of
1073 * the first td of our list (becomes new dummy). both
1074 * tds stay deactivated until we're done, when the
1075 * HC is allowed to fetch the old dummy (4.10.2).
1076 */
1077 token = qtd->hw_token;
1078 qtd->hw_token = HALT_BIT(ehci);
1079
1080 dummy = qh->dummy;
1081
1082 dma = dummy->qtd_dma;
1083 *dummy = *qtd;
1084 dummy->qtd_dma = dma;
1085
1086 list_del (&qtd->qtd_list);
1087 list_add (&dummy->qtd_list, qtd_list);
1088 list_splice_tail(qtd_list, &qh->qtd_list);
1089
1090 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1091 qh->dummy = qtd;
1092
1093 /* hc must see the new dummy at list end */
1094 dma = qtd->qtd_dma;
1095 qtd = list_entry (qh->qtd_list.prev,
1096 struct ehci_qtd, qtd_list);
1097 qtd->hw_next = QTD_NEXT(ehci, dma);
1098
1099 /* let the hc process these next qtds */
1100 wmb ();
1101 dummy->hw_token = token;
1102
1103 urb->hcpriv = qh;
1104 }
1105 }
1106 return qh;
1107 }
1108
1109 /*-------------------------------------------------------------------------*/
1110
1111 static int
1112 submit_async (
1113 struct ehci_hcd *ehci,
1114 struct urb *urb,
1115 struct list_head *qtd_list,
1116 gfp_t mem_flags
1117 ) {
1118 int epnum;
1119 unsigned long flags;
1120 struct ehci_qh *qh = NULL;
1121 int rc;
1122
1123 epnum = urb->ep->desc.bEndpointAddress;
1124
1125 #ifdef EHCI_URB_TRACE
1126 {
1127 struct ehci_qtd *qtd;
1128 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1129 ehci_dbg(ehci,
1130 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1131 __func__, urb->dev->devpath, urb,
1132 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1133 urb->transfer_buffer_length,
1134 qtd, urb->ep->hcpriv);
1135 }
1136 #endif
1137
1138 spin_lock_irqsave (&ehci->lock, flags);
1139 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1140 rc = -ESHUTDOWN;
1141 goto done;
1142 }
1143 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1144 if (unlikely(rc))
1145 goto done;
1146
1147 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1148 if (unlikely(qh == NULL)) {
1149 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1150 rc = -ENOMEM;
1151 goto done;
1152 }
1153
1154 /* Control/bulk operations through TTs don't need scheduling,
1155 * the HC and TT handle it when the TT has a buffer ready.
1156 */
1157 if (likely (qh->qh_state == QH_STATE_IDLE))
1158 qh_link_async(ehci, qh);
1159 done:
1160 spin_unlock_irqrestore (&ehci->lock, flags);
1161 if (unlikely (qh == NULL))
1162 qtd_list_free (ehci, urb, qtd_list);
1163 return rc;
1164 }
1165
1166 /*-------------------------------------------------------------------------*/
1167
1168 static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1169 {
1170 struct ehci_qh *prev;
1171
1172 /* Add to the end of the list of QHs waiting for the next IAAD */
1173 qh->qh_state = QH_STATE_UNLINK;
1174 if (ehci->async_unlink)
1175 ehci->async_unlink_last->unlink_next = qh;
1176 else
1177 ehci->async_unlink = qh;
1178 ehci->async_unlink_last = qh;
1179
1180 /* Unlink it from the schedule */
1181 prev = ehci->async;
1182 while (prev->qh_next.qh != qh)
1183 prev = prev->qh_next.qh;
1184
1185 prev->hw->hw_next = qh->hw->hw_next;
1186 prev->qh_next = qh->qh_next;
1187 if (ehci->qh_scan_next == qh)
1188 ehci->qh_scan_next = qh->qh_next.qh;
1189 }
1190
1191 static void start_iaa_cycle(struct ehci_hcd *ehci, bool nested)
1192 {
1193 /*
1194 * Do nothing if an IAA cycle is already running or
1195 * if one will be started shortly.
1196 */
1197 if (ehci->async_iaa || ehci->async_unlinking)
1198 return;
1199
1200 /* If the controller isn't running, we don't have to wait for it */
1201 if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
1202
1203 /* Do all the waiting QHs */
1204 ehci->async_iaa = ehci->async_unlink;
1205 ehci->async_unlink = NULL;
1206
1207 if (!nested) /* Avoid recursion */
1208 end_unlink_async(ehci);
1209
1210 /* Otherwise start a new IAA cycle */
1211 } else if (likely(ehci->rh_state == EHCI_RH_RUNNING)) {
1212 struct ehci_qh *qh;
1213
1214 /* Do only the first waiting QH (nVidia bug?) */
1215 qh = ehci->async_unlink;
1216 ehci->async_iaa = qh;
1217 ehci->async_unlink = qh->unlink_next;
1218 qh->unlink_next = NULL;
1219
1220 /* Make sure the unlinks are all visible to the hardware */
1221 wmb();
1222
1223 ehci_writel(ehci, ehci->command | CMD_IAAD,
1224 &ehci->regs->command);
1225 ehci_readl(ehci, &ehci->regs->command);
1226 ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
1227 }
1228 }
1229
1230 /* the async qh for the qtds being unlinked are now gone from the HC */
1231
1232 static void end_unlink_async(struct ehci_hcd *ehci)
1233 {
1234 struct ehci_qh *qh;
1235
1236 if (ehci->has_synopsys_hc_bug)
1237 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1238 &ehci->regs->async_next);
1239
1240 /* Process the idle QHs */
1241 restart:
1242 ehci->async_unlinking = true;
1243 while (ehci->async_iaa) {
1244 qh = ehci->async_iaa;
1245 ehci->async_iaa = qh->unlink_next;
1246 qh->unlink_next = NULL;
1247
1248 qh->qh_state = QH_STATE_IDLE;
1249 qh->qh_next.qh = NULL;
1250
1251 qh_completions(ehci, qh);
1252 if (!list_empty(&qh->qtd_list) &&
1253 ehci->rh_state == EHCI_RH_RUNNING)
1254 qh_link_async(ehci, qh);
1255 disable_async(ehci);
1256 }
1257 ehci->async_unlinking = false;
1258
1259 /* Start a new IAA cycle if any QHs are waiting for it */
1260 if (ehci->async_unlink) {
1261 start_iaa_cycle(ehci, true);
1262 if (unlikely(ehci->rh_state < EHCI_RH_RUNNING))
1263 goto restart;
1264 }
1265 }
1266
1267 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
1268
1269 static void unlink_empty_async(struct ehci_hcd *ehci)
1270 {
1271 struct ehci_qh *qh;
1272 struct ehci_qh *qh_to_unlink = NULL;
1273 bool check_unlinks_later = false;
1274 int count = 0;
1275
1276 /* Find the last async QH which has been empty for a timer cycle */
1277 for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
1278 if (list_empty(&qh->qtd_list) &&
1279 qh->qh_state == QH_STATE_LINKED) {
1280 ++count;
1281 if (qh->unlink_cycle == ehci->async_unlink_cycle)
1282 check_unlinks_later = true;
1283 else
1284 qh_to_unlink = qh;
1285 }
1286 }
1287
1288 /* If nothing else is being unlinked, unlink the last empty QH */
1289 if (!ehci->async_iaa && !ehci->async_unlink && qh_to_unlink) {
1290 start_unlink_async(ehci, qh_to_unlink);
1291 --count;
1292 }
1293
1294 /* Other QHs will be handled later */
1295 if (count > 0) {
1296 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1297 ++ehci->async_unlink_cycle;
1298 }
1299 }
1300
1301 /* makes sure the async qh will become idle */
1302 /* caller must own ehci->lock */
1303
1304 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1305 {
1306 /*
1307 * If the QH isn't linked then there's nothing we can do
1308 * unless we were called during a giveback, in which case
1309 * qh_completions() has to deal with it.
1310 */
1311 if (qh->qh_state != QH_STATE_LINKED) {
1312 if (qh->qh_state == QH_STATE_COMPLETING)
1313 qh->needs_rescan = 1;
1314 return;
1315 }
1316
1317 single_unlink_async(ehci, qh);
1318 start_iaa_cycle(ehci, false);
1319 }
1320
1321 /*-------------------------------------------------------------------------*/
1322
1323 static void scan_async (struct ehci_hcd *ehci)
1324 {
1325 struct ehci_qh *qh;
1326 bool check_unlinks_later = false;
1327
1328 ehci->qh_scan_next = ehci->async->qh_next.qh;
1329 while (ehci->qh_scan_next) {
1330 qh = ehci->qh_scan_next;
1331 ehci->qh_scan_next = qh->qh_next.qh;
1332 rescan:
1333 /* clean any finished work for this qh */
1334 if (!list_empty(&qh->qtd_list)) {
1335 int temp;
1336
1337 /*
1338 * Unlinks could happen here; completion reporting
1339 * drops the lock. That's why ehci->qh_scan_next
1340 * always holds the next qh to scan; if the next qh
1341 * gets unlinked then ehci->qh_scan_next is adjusted
1342 * in single_unlink_async().
1343 */
1344 temp = qh_completions(ehci, qh);
1345 if (qh->needs_rescan) {
1346 start_unlink_async(ehci, qh);
1347 } else if (list_empty(&qh->qtd_list)
1348 && qh->qh_state == QH_STATE_LINKED) {
1349 qh->unlink_cycle = ehci->async_unlink_cycle;
1350 check_unlinks_later = true;
1351 } else if (temp != 0)
1352 goto rescan;
1353 }
1354 }
1355
1356 /*
1357 * Unlink empty entries, reducing DMA usage as well
1358 * as HCD schedule-scanning costs. Delay for any qh
1359 * we just scanned, there's a not-unusual case that it
1360 * doesn't stay idle for long.
1361 */
1362 if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
1363 !(ehci->enabled_hrtimer_events &
1364 BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
1365 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1366 ++ehci->async_unlink_cycle;
1367 }
1368 }