]>
git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/usb/host/ohci-hcd.c
2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
18 * This file is licenced under the GPL.
21 #include <linux/module.h>
22 #include <linux/moduleparam.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/ioport.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/timer.h>
32 #include <linux/list.h>
33 #include <linux/usb.h>
34 #include <linux/usb/otg.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/dmapool.h>
37 #include <linux/reboot.h>
38 #include <linux/workqueue.h>
39 #include <linux/debugfs.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
45 #include <asm/byteorder.h>
47 #include "../core/hcd.h"
49 #define DRIVER_VERSION "2006 August 04"
50 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
51 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
53 /*-------------------------------------------------------------------------*/
55 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
57 /* For initializing controller (mask in an HCFS mode too) */
58 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
59 #define OHCI_INTR_INIT \
60 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
61 | OHCI_INTR_RD | OHCI_INTR_WDH)
64 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
68 #ifdef CONFIG_ARCH_OMAP
69 /* OMAP doesn't support IR (no SMM; not needed) */
73 /*-------------------------------------------------------------------------*/
75 static const char hcd_name
[] = "ohci_hcd";
77 #define STATECHANGE_DELAY msecs_to_jiffies(300)
81 static void ohci_dump (struct ohci_hcd
*ohci
, int verbose
);
82 static int ohci_init (struct ohci_hcd
*ohci
);
83 static void ohci_stop (struct usb_hcd
*hcd
);
85 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
86 static int ohci_restart (struct ohci_hcd
*ohci
);
96 * On architectures with edge-triggered interrupts we must never return
99 #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
100 #define IRQ_NOTMINE IRQ_HANDLED
102 #define IRQ_NOTMINE IRQ_NONE
106 /* Some boards misreport power switching/overcurrent */
107 static int distrust_firmware
= 1;
108 module_param (distrust_firmware
, bool, 0);
109 MODULE_PARM_DESC (distrust_firmware
,
110 "true to distrust firmware power/overcurrent setup");
112 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
113 static int no_handshake
= 0;
114 module_param (no_handshake
, bool, 0);
115 MODULE_PARM_DESC (no_handshake
, "true (not default) disables BIOS handshake");
117 /*-------------------------------------------------------------------------*/
120 * queue up an urb for anything except the root hub
122 static int ohci_urb_enqueue (
127 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
129 urb_priv_t
*urb_priv
;
130 unsigned int pipe
= urb
->pipe
;
135 #ifdef OHCI_VERBOSE_DEBUG
136 urb_print(urb
, "SUB", usb_pipein(pipe
), -EINPROGRESS
);
139 /* every endpoint has a ed, locate and maybe (re)initialize it */
140 if (! (ed
= ed_get (ohci
, urb
->ep
, urb
->dev
, pipe
, urb
->interval
)))
143 /* for the private part of the URB we need the number of TDs (size) */
146 /* td_submit_urb() doesn't yet handle these */
147 if (urb
->transfer_buffer_length
> 4096)
150 /* 1 TD for setup, 1 for ACK, plus ... */
153 // case PIPE_INTERRUPT:
156 /* one TD for every 4096 Bytes (can be upto 8K) */
157 size
+= urb
->transfer_buffer_length
/ 4096;
158 /* ... and for any remaining bytes ... */
159 if ((urb
->transfer_buffer_length
% 4096) != 0)
161 /* ... and maybe a zero length packet to wrap it up */
164 else if ((urb
->transfer_flags
& URB_ZERO_PACKET
) != 0
165 && (urb
->transfer_buffer_length
166 % usb_maxpacket (urb
->dev
, pipe
,
167 usb_pipeout (pipe
))) == 0)
170 case PIPE_ISOCHRONOUS
: /* number of packets from URB */
171 size
= urb
->number_of_packets
;
175 /* allocate the private part of the URB */
176 urb_priv
= kzalloc (sizeof (urb_priv_t
) + size
* sizeof (struct td
*),
180 INIT_LIST_HEAD (&urb_priv
->pending
);
181 urb_priv
->length
= size
;
184 /* allocate the TDs (deferring hash chain updates) */
185 for (i
= 0; i
< size
; i
++) {
186 urb_priv
->td
[i
] = td_alloc (ohci
, mem_flags
);
187 if (!urb_priv
->td
[i
]) {
188 urb_priv
->length
= i
;
189 urb_free_priv (ohci
, urb_priv
);
194 spin_lock_irqsave (&ohci
->lock
, flags
);
196 /* don't submit to a dead HC */
197 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
)) {
201 if (!HC_IS_RUNNING(hcd
->state
)) {
205 retval
= usb_hcd_link_urb_to_ep(hcd
, urb
);
209 /* schedule the ed if needed */
210 if (ed
->state
== ED_IDLE
) {
211 retval
= ed_schedule (ohci
, ed
);
213 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
216 if (ed
->type
== PIPE_ISOCHRONOUS
) {
217 u16 frame
= ohci_frame_no(ohci
);
219 /* delay a few frames before the first TD */
220 frame
+= max_t (u16
, 8, ed
->interval
);
221 frame
&= ~(ed
->interval
- 1);
223 urb
->start_frame
= frame
;
225 /* yes, only URB_ISO_ASAP is supported, and
226 * urb->start_frame is never used as input.
229 } else if (ed
->type
== PIPE_ISOCHRONOUS
)
230 urb
->start_frame
= ed
->last_iso
+ ed
->interval
;
232 /* fill the TDs and link them to the ed; and
233 * enable that part of the schedule, if needed
234 * and update count of queued periodic urbs
236 urb
->hcpriv
= urb_priv
;
237 td_submit_urb (ohci
, urb
);
241 urb_free_priv (ohci
, urb_priv
);
242 spin_unlock_irqrestore (&ohci
->lock
, flags
);
247 * decouple the URB from the HC queues (TDs, urb_priv).
248 * reporting is always done
249 * asynchronously, and we might be dealing with an urb that's
250 * partially transferred, or an ED with other urbs being unlinked.
252 static int ohci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
254 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
258 #ifdef OHCI_VERBOSE_DEBUG
259 urb_print(urb
, "UNLINK", 1, status
);
262 spin_lock_irqsave (&ohci
->lock
, flags
);
263 rc
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
266 } else if (HC_IS_RUNNING(hcd
->state
)) {
267 urb_priv_t
*urb_priv
;
269 /* Unless an IRQ completed the unlink while it was being
270 * handed to us, flag it for unlink and giveback, and force
271 * some upcoming INTR_SF to call finish_unlinks()
273 urb_priv
= urb
->hcpriv
;
275 if (urb_priv
->ed
->state
== ED_OPER
)
276 start_ed_unlink (ohci
, urb_priv
->ed
);
280 * with HC dead, we won't respect hc queue pointers
281 * any more ... just clean up every urb's memory.
284 finish_urb(ohci
, urb
, status
);
286 spin_unlock_irqrestore (&ohci
->lock
, flags
);
290 /*-------------------------------------------------------------------------*/
292 /* frees config/altsetting state for endpoints,
293 * including ED memory, dummy TD, and bulk/intr data toggle
297 ohci_endpoint_disable (struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
299 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
301 struct ed
*ed
= ep
->hcpriv
;
302 unsigned limit
= 1000;
304 /* ASSERT: any requests/urbs are being unlinked */
305 /* ASSERT: nobody can be submitting urbs for this any more */
311 spin_lock_irqsave (&ohci
->lock
, flags
);
313 if (!HC_IS_RUNNING (hcd
->state
)) {
316 if (quirk_zfmicro(ohci
) && ed
->type
== PIPE_INTERRUPT
)
317 ohci
->eds_scheduled
--;
318 finish_unlinks (ohci
, 0);
322 case ED_UNLINK
: /* wait for hw to finish? */
323 /* major IRQ delivery trouble loses INTR_SF too... */
325 ohci_warn(ohci
, "ED unlink timeout\n");
326 if (quirk_zfmicro(ohci
)) {
327 ohci_warn(ohci
, "Attempting ZF TD recovery\n");
328 ohci
->ed_to_check
= ed
;
333 spin_unlock_irqrestore (&ohci
->lock
, flags
);
334 schedule_timeout_uninterruptible(1);
336 case ED_IDLE
: /* fully unlinked */
337 if (list_empty (&ed
->td_list
)) {
338 td_free (ohci
, ed
->dummy
);
342 /* else FALL THROUGH */
344 /* caller was supposed to have unlinked any requests;
345 * that's not our job. can't recover; must leak ed.
347 ohci_err (ohci
, "leak ed %p (#%02x) state %d%s\n",
348 ed
, ep
->desc
.bEndpointAddress
, ed
->state
,
349 list_empty (&ed
->td_list
) ? "" : " (has tds)");
350 td_free (ohci
, ed
->dummy
);
354 spin_unlock_irqrestore (&ohci
->lock
, flags
);
358 static int ohci_get_frame (struct usb_hcd
*hcd
)
360 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
362 return ohci_frame_no(ohci
);
365 static void ohci_usb_reset (struct ohci_hcd
*ohci
)
367 ohci
->hc_control
= ohci_readl (ohci
, &ohci
->regs
->control
);
368 ohci
->hc_control
&= OHCI_CTRL_RWC
;
369 ohci_writel (ohci
, ohci
->hc_control
, &ohci
->regs
->control
);
372 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
373 * other cases where the next software may expect clean state from the
374 * "firmware". this is bus-neutral, unlike shutdown() methods.
377 ohci_shutdown (struct usb_hcd
*hcd
)
379 struct ohci_hcd
*ohci
;
381 ohci
= hcd_to_ohci (hcd
);
382 ohci_writel (ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
383 ohci_usb_reset (ohci
);
384 /* flush the writes */
385 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
388 static int check_ed(struct ohci_hcd
*ohci
, struct ed
*ed
)
390 return (hc32_to_cpu(ohci
, ed
->hwINFO
) & ED_IN
) != 0
391 && (hc32_to_cpu(ohci
, ed
->hwHeadP
) & TD_MASK
)
392 == (hc32_to_cpu(ohci
, ed
->hwTailP
) & TD_MASK
)
393 && !list_empty(&ed
->td_list
);
396 /* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
397 * an interrupt TD but neglects to add it to the donelist. On systems with
398 * this chipset, we need to periodically check the state of the queues to look
399 * for such "lost" TDs.
401 static void unlink_watchdog_func(unsigned long _ohci
)
405 unsigned seen_count
= 0;
407 struct ed
**seen
= NULL
;
408 struct ohci_hcd
*ohci
= (struct ohci_hcd
*) _ohci
;
410 spin_lock_irqsave(&ohci
->lock
, flags
);
411 max
= ohci
->eds_scheduled
;
415 if (ohci
->ed_to_check
)
418 seen
= kcalloc(max
, sizeof *seen
, GFP_ATOMIC
);
422 for (i
= 0; i
< NUM_INTS
; i
++) {
423 struct ed
*ed
= ohci
->periodic
[i
];
428 /* scan this branch of the periodic schedule tree */
429 for (temp
= 0; temp
< seen_count
; temp
++) {
430 if (seen
[temp
] == ed
) {
431 /* we've checked it and what's after */
438 seen
[seen_count
++] = ed
;
439 if (!check_ed(ohci
, ed
)) {
444 /* HC's TD list is empty, but HCD sees at least one
445 * TD that's not been sent through the donelist.
447 ohci
->ed_to_check
= ed
;
450 /* The HC may wait until the next frame to report the
451 * TD as done through the donelist and INTR_WDH. (We
452 * just *assume* it's not a multi-TD interrupt URB;
453 * those could defer the IRQ more than one frame, using
454 * DI...) Check again after the next INTR_SF.
456 ohci_writel(ohci
, OHCI_INTR_SF
,
457 &ohci
->regs
->intrstatus
);
458 ohci_writel(ohci
, OHCI_INTR_SF
,
459 &ohci
->regs
->intrenable
);
461 /* flush those writes */
462 (void) ohci_readl(ohci
, &ohci
->regs
->control
);
469 if (ohci
->eds_scheduled
)
470 mod_timer(&ohci
->unlink_watchdog
, round_jiffies(jiffies
+ HZ
));
472 spin_unlock_irqrestore(&ohci
->lock
, flags
);
475 /*-------------------------------------------------------------------------*
477 *-------------------------------------------------------------------------*/
479 /* init memory, and kick BIOS/SMM off */
481 static int ohci_init (struct ohci_hcd
*ohci
)
484 struct usb_hcd
*hcd
= ohci_to_hcd(ohci
);
487 ohci
->regs
= hcd
->regs
;
489 /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
490 * was never needed for most non-PCI systems ... remove the code?
494 /* SMM owns the HC? not for long! */
495 if (!no_handshake
&& ohci_readl (ohci
,
496 &ohci
->regs
->control
) & OHCI_CTRL_IR
) {
499 ohci_dbg (ohci
, "USB HC TakeOver from BIOS/SMM\n");
501 /* this timeout is arbitrary. we make it long, so systems
502 * depending on usb keyboards may be usable even if the
503 * BIOS/SMM code seems pretty broken.
505 temp
= 500; /* arbitrary: five seconds */
507 ohci_writel (ohci
, OHCI_INTR_OC
, &ohci
->regs
->intrenable
);
508 ohci_writel (ohci
, OHCI_OCR
, &ohci
->regs
->cmdstatus
);
509 while (ohci_readl (ohci
, &ohci
->regs
->control
) & OHCI_CTRL_IR
) {
512 ohci_err (ohci
, "USB HC takeover failed!"
513 " (BIOS/SMM bug)\n");
517 ohci_usb_reset (ohci
);
521 /* Disable HC interrupts */
522 ohci_writel (ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
524 /* flush the writes, and save key bits like RWC */
525 if (ohci_readl (ohci
, &ohci
->regs
->control
) & OHCI_CTRL_RWC
)
526 ohci
->hc_control
|= OHCI_CTRL_RWC
;
528 /* Read the number of ports unless overridden */
529 if (ohci
->num_ports
== 0)
530 ohci
->num_ports
= roothub_a(ohci
) & RH_A_NDP
;
535 ohci
->hcca
= dma_alloc_coherent (hcd
->self
.controller
,
536 sizeof *ohci
->hcca
, &ohci
->hcca_dma
, 0);
540 if ((ret
= ohci_mem_init (ohci
)) < 0)
543 create_debug_files (ohci
);
549 /*-------------------------------------------------------------------------*/
551 /* Start an OHCI controller, set the BUS operational
552 * resets USB and controller
555 static int ohci_run (struct ohci_hcd
*ohci
)
558 int first
= ohci
->fminterval
== 0;
559 struct usb_hcd
*hcd
= ohci_to_hcd(ohci
);
563 /* boot firmware should have set this up (5.1.1.3.1) */
566 temp
= ohci_readl (ohci
, &ohci
->regs
->fminterval
);
567 ohci
->fminterval
= temp
& 0x3fff;
568 if (ohci
->fminterval
!= FI
)
569 ohci_dbg (ohci
, "fminterval delta %d\n",
570 ohci
->fminterval
- FI
);
571 ohci
->fminterval
|= FSMP (ohci
->fminterval
) << 16;
572 /* also: power/overcurrent flags in roothub.a */
575 /* Reset USB nearly "by the book". RemoteWakeupConnected was
576 * saved if boot firmware (BIOS/SMM/...) told us it's connected,
577 * or if bus glue did the same (e.g. for PCI add-in cards with
580 if ((ohci
->hc_control
& OHCI_CTRL_RWC
) != 0
581 && !device_may_wakeup(hcd
->self
.controller
))
582 device_init_wakeup(hcd
->self
.controller
, 1);
584 switch (ohci
->hc_control
& OHCI_CTRL_HCFS
) {
588 case OHCI_USB_SUSPEND
:
589 case OHCI_USB_RESUME
:
590 ohci
->hc_control
&= OHCI_CTRL_RWC
;
591 ohci
->hc_control
|= OHCI_USB_RESUME
;
592 temp
= 10 /* msec wait */;
594 // case OHCI_USB_RESET:
596 ohci
->hc_control
&= OHCI_CTRL_RWC
;
597 ohci
->hc_control
|= OHCI_USB_RESET
;
598 temp
= 50 /* msec wait */;
601 ohci_writel (ohci
, ohci
->hc_control
, &ohci
->regs
->control
);
603 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
606 memset (ohci
->hcca
, 0, sizeof (struct ohci_hcca
));
608 /* 2msec timelimit here means no irqs/preempt */
609 spin_lock_irq (&ohci
->lock
);
612 /* HC Reset requires max 10 us delay */
613 ohci_writel (ohci
, OHCI_HCR
, &ohci
->regs
->cmdstatus
);
614 temp
= 30; /* ... allow extra time */
615 while ((ohci_readl (ohci
, &ohci
->regs
->cmdstatus
) & OHCI_HCR
) != 0) {
617 spin_unlock_irq (&ohci
->lock
);
618 ohci_err (ohci
, "USB HC reset timed out!\n");
624 /* now we're in the SUSPEND state ... must go OPERATIONAL
625 * within 2msec else HC enters RESUME
627 * ... but some hardware won't init fmInterval "by the book"
628 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
629 * this if we write fmInterval after we're OPERATIONAL.
630 * Unclear about ALi, ServerWorks, and others ... this could
631 * easily be a longstanding bug in chip init on Linux.
633 if (ohci
->flags
& OHCI_QUIRK_INITRESET
) {
634 ohci_writel (ohci
, ohci
->hc_control
, &ohci
->regs
->control
);
635 // flush those writes
636 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
639 /* Tell the controller where the control and bulk lists are
640 * The lists are empty now. */
641 ohci_writel (ohci
, 0, &ohci
->regs
->ed_controlhead
);
642 ohci_writel (ohci
, 0, &ohci
->regs
->ed_bulkhead
);
644 /* a reset clears this */
645 ohci_writel (ohci
, (u32
) ohci
->hcca_dma
, &ohci
->regs
->hcca
);
647 periodic_reinit (ohci
);
649 /* some OHCI implementations are finicky about how they init.
650 * bogus values here mean not even enumeration could work.
652 if ((ohci_readl (ohci
, &ohci
->regs
->fminterval
) & 0x3fff0000) == 0
653 || !ohci_readl (ohci
, &ohci
->regs
->periodicstart
)) {
654 if (!(ohci
->flags
& OHCI_QUIRK_INITRESET
)) {
655 ohci
->flags
|= OHCI_QUIRK_INITRESET
;
656 ohci_dbg (ohci
, "enabling initreset quirk\n");
659 spin_unlock_irq (&ohci
->lock
);
660 ohci_err (ohci
, "init err (%08x %04x)\n",
661 ohci_readl (ohci
, &ohci
->regs
->fminterval
),
662 ohci_readl (ohci
, &ohci
->regs
->periodicstart
));
666 /* use rhsc irqs after khubd is fully initialized */
668 hcd
->uses_new_polling
= 1;
670 /* start controller operations */
671 ohci
->hc_control
&= OHCI_CTRL_RWC
;
672 ohci
->hc_control
|= OHCI_CONTROL_INIT
| OHCI_USB_OPER
;
673 ohci_writel (ohci
, ohci
->hc_control
, &ohci
->regs
->control
);
674 hcd
->state
= HC_STATE_RUNNING
;
676 /* wake on ConnectStatusChange, matching external hubs */
677 ohci_writel (ohci
, RH_HS_DRWE
, &ohci
->regs
->roothub
.status
);
679 /* Choose the interrupts we care about now, others later on demand */
680 mask
= OHCI_INTR_INIT
;
681 ohci_writel (ohci
, ~0, &ohci
->regs
->intrstatus
);
682 ohci_writel (ohci
, mask
, &ohci
->regs
->intrenable
);
684 /* handle root hub init quirks ... */
685 temp
= roothub_a (ohci
);
686 temp
&= ~(RH_A_PSM
| RH_A_OCPM
);
687 if (ohci
->flags
& OHCI_QUIRK_SUPERIO
) {
688 /* NSC 87560 and maybe others */
690 temp
&= ~(RH_A_POTPGT
| RH_A_NPS
);
691 ohci_writel (ohci
, temp
, &ohci
->regs
->roothub
.a
);
692 } else if ((ohci
->flags
& OHCI_QUIRK_AMD756
) || distrust_firmware
) {
693 /* hub power always on; required for AMD-756 and some
694 * Mac platforms. ganged overcurrent reporting, if any.
697 ohci_writel (ohci
, temp
, &ohci
->regs
->roothub
.a
);
699 ohci_writel (ohci
, RH_HS_LPSC
, &ohci
->regs
->roothub
.status
);
700 ohci_writel (ohci
, (temp
& RH_A_NPS
) ? 0 : RH_B_PPCM
,
701 &ohci
->regs
->roothub
.b
);
702 // flush those writes
703 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
705 ohci
->next_statechange
= jiffies
+ STATECHANGE_DELAY
;
706 spin_unlock_irq (&ohci
->lock
);
708 // POTPGT delay is bits 24-31, in 2 ms units.
709 mdelay ((temp
>> 23) & 0x1fe);
710 hcd
->state
= HC_STATE_RUNNING
;
712 if (quirk_zfmicro(ohci
)) {
713 /* Create timer to watch for bad queue state on ZF Micro */
714 setup_timer(&ohci
->unlink_watchdog
, unlink_watchdog_func
,
715 (unsigned long) ohci
);
717 ohci
->eds_scheduled
= 0;
718 ohci
->ed_to_check
= NULL
;
726 /*-------------------------------------------------------------------------*/
728 /* an interrupt happens */
730 static irqreturn_t
ohci_irq (struct usb_hcd
*hcd
)
732 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
733 struct ohci_regs __iomem
*regs
= ohci
->regs
;
736 /* Read interrupt status (and flush pending writes). We ignore the
737 * optimization of checking the LSB of hcca->done_head; it doesn't
738 * work on all systems (edge triggering for OHCI can be a factor).
740 ints
= ohci_readl(ohci
, ®s
->intrstatus
);
742 /* Check for an all 1's result which is a typical consequence
743 * of dead, unclocked, or unplugged (CardBus...) devices
745 if (ints
== ~(u32
)0) {
747 ohci_dbg (ohci
, "device removed!\n");
751 /* We only care about interrupts that are enabled */
752 ints
&= ohci_readl(ohci
, ®s
->intrenable
);
754 /* interrupt for some other device? */
758 if (ints
& OHCI_INTR_UE
) {
759 // e.g. due to PCI Master/Target Abort
760 if (quirk_nec(ohci
)) {
761 /* Workaround for a silicon bug in some NEC chips used
762 * in Apple's PowerBooks. Adapted from Darwin code.
764 ohci_err (ohci
, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
766 ohci_writel (ohci
, OHCI_INTR_UE
, ®s
->intrdisable
);
768 schedule_work (&ohci
->nec_work
);
771 ohci_err (ohci
, "OHCI Unrecoverable Error, disabled\n");
775 ohci_usb_reset (ohci
);
778 if (ints
& OHCI_INTR_RHSC
) {
779 ohci_vdbg(ohci
, "rhsc\n");
780 ohci
->next_statechange
= jiffies
+ STATECHANGE_DELAY
;
781 ohci_writel(ohci
, OHCI_INTR_RD
| OHCI_INTR_RHSC
,
784 /* NOTE: Vendors didn't always make the same implementation
785 * choices for RHSC. Many followed the spec; RHSC triggers
786 * on an edge, like setting and maybe clearing a port status
787 * change bit. With others it's level-triggered, active
788 * until khubd clears all the port status change bits. We'll
789 * always disable it here and rely on polling until khubd
792 ohci_writel(ohci
, OHCI_INTR_RHSC
, ®s
->intrdisable
);
793 usb_hcd_poll_rh_status(hcd
);
796 /* For connect and disconnect events, we expect the controller
797 * to turn on RHSC along with RD. But for remote wakeup events
798 * this might not happen.
800 else if (ints
& OHCI_INTR_RD
) {
801 ohci_vdbg(ohci
, "resume detect\n");
802 ohci_writel(ohci
, OHCI_INTR_RD
, ®s
->intrstatus
);
804 if (ohci
->autostop
) {
805 spin_lock (&ohci
->lock
);
806 ohci_rh_resume (ohci
);
807 spin_unlock (&ohci
->lock
);
809 usb_hcd_resume_root_hub(hcd
);
812 if (ints
& OHCI_INTR_WDH
) {
813 spin_lock (&ohci
->lock
);
815 spin_unlock (&ohci
->lock
);
818 if (quirk_zfmicro(ohci
) && (ints
& OHCI_INTR_SF
)) {
819 spin_lock(&ohci
->lock
);
820 if (ohci
->ed_to_check
) {
821 struct ed
*ed
= ohci
->ed_to_check
;
823 if (check_ed(ohci
, ed
)) {
824 /* HC thinks the TD list is empty; HCD knows
825 * at least one TD is outstanding
827 if (--ohci
->zf_delay
== 0) {
828 struct td
*td
= list_entry(
832 "Reclaiming orphan TD %p\n",
834 takeback_td(ohci
, td
);
835 ohci
->ed_to_check
= NULL
;
838 ohci
->ed_to_check
= NULL
;
840 spin_unlock(&ohci
->lock
);
843 /* could track INTR_SO to reduce available PCI/... bandwidth */
845 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
846 * when there's still unlinking to be done (next frame).
848 spin_lock (&ohci
->lock
);
849 if (ohci
->ed_rm_list
)
850 finish_unlinks (ohci
, ohci_frame_no(ohci
));
851 if ((ints
& OHCI_INTR_SF
) != 0
853 && !ohci
->ed_to_check
854 && HC_IS_RUNNING(hcd
->state
))
855 ohci_writel (ohci
, OHCI_INTR_SF
, ®s
->intrdisable
);
856 spin_unlock (&ohci
->lock
);
858 if (HC_IS_RUNNING(hcd
->state
)) {
859 ohci_writel (ohci
, ints
, ®s
->intrstatus
);
860 ohci_writel (ohci
, OHCI_INTR_MIE
, ®s
->intrenable
);
861 // flush those writes
862 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
868 /*-------------------------------------------------------------------------*/
870 static void ohci_stop (struct usb_hcd
*hcd
)
872 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
876 flush_scheduled_work();
878 ohci_usb_reset (ohci
);
879 ohci_writel (ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
880 free_irq(hcd
->irq
, hcd
);
883 if (quirk_zfmicro(ohci
))
884 del_timer(&ohci
->unlink_watchdog
);
886 remove_debug_files (ohci
);
887 ohci_mem_cleanup (ohci
);
889 dma_free_coherent (hcd
->self
.controller
,
891 ohci
->hcca
, ohci
->hcca_dma
);
897 /*-------------------------------------------------------------------------*/
899 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
901 /* must not be called from interrupt context */
902 static int ohci_restart (struct ohci_hcd
*ohci
)
906 struct urb_priv
*priv
;
908 spin_lock_irq(&ohci
->lock
);
911 /* Recycle any "live" eds/tds (and urbs). */
912 if (!list_empty (&ohci
->pending
))
913 ohci_dbg(ohci
, "abort schedule...\n");
914 list_for_each_entry (priv
, &ohci
->pending
, pending
) {
915 struct urb
*urb
= priv
->td
[0]->urb
;
916 struct ed
*ed
= priv
->ed
;
920 ed
->state
= ED_UNLINK
;
921 ed
->hwINFO
|= cpu_to_hc32(ohci
, ED_DEQUEUE
);
922 ed_deschedule (ohci
, ed
);
924 ed
->ed_next
= ohci
->ed_rm_list
;
926 ohci
->ed_rm_list
= ed
;
931 ohci_dbg(ohci
, "bogus ed %p state %d\n",
936 urb
->unlinked
= -ESHUTDOWN
;
938 finish_unlinks (ohci
, 0);
939 spin_unlock_irq(&ohci
->lock
);
941 /* paranoia, in case that didn't work: */
943 /* empty the interrupt branches */
944 for (i
= 0; i
< NUM_INTS
; i
++) ohci
->load
[i
] = 0;
945 for (i
= 0; i
< NUM_INTS
; i
++) ohci
->hcca
->int_table
[i
] = 0;
947 /* no EDs to remove */
948 ohci
->ed_rm_list
= NULL
;
950 /* empty control and bulk lists */
951 ohci
->ed_controltail
= NULL
;
952 ohci
->ed_bulktail
= NULL
;
954 if ((temp
= ohci_run (ohci
)) < 0) {
955 ohci_err (ohci
, "can't restart, %d\n", temp
);
958 ohci_dbg(ohci
, "restart complete\n");
964 /*-------------------------------------------------------------------------*/
966 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
968 MODULE_AUTHOR (DRIVER_AUTHOR
);
969 MODULE_DESCRIPTION (DRIVER_INFO
);
970 MODULE_LICENSE ("GPL");
973 #include "ohci-pci.c"
974 #define PCI_DRIVER ohci_pci_driver
978 #include "ohci-sa1111.c"
979 #define SA1111_DRIVER ohci_hcd_sa1111_driver
982 #ifdef CONFIG_ARCH_S3C2410
983 #include "ohci-s3c2410.c"
984 #define PLATFORM_DRIVER ohci_hcd_s3c2410_driver
987 #ifdef CONFIG_ARCH_OMAP
988 #include "ohci-omap.c"
989 #define PLATFORM_DRIVER ohci_hcd_omap_driver
992 #ifdef CONFIG_ARCH_LH7A404
993 #include "ohci-lh7a404.c"
994 #define PLATFORM_DRIVER ohci_hcd_lh7a404_driver
997 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
998 #include "ohci-pxa27x.c"
999 #define PLATFORM_DRIVER ohci_hcd_pxa27x_driver
1002 #ifdef CONFIG_ARCH_EP93XX
1003 #include "ohci-ep93xx.c"
1004 #define PLATFORM_DRIVER ohci_hcd_ep93xx_driver
1007 #ifdef CONFIG_SOC_AU1X00
1008 #include "ohci-au1xxx.c"
1009 #define PLATFORM_DRIVER ohci_hcd_au1xxx_driver
1012 #ifdef CONFIG_PNX8550
1013 #include "ohci-pnx8550.c"
1014 #define PLATFORM_DRIVER ohci_hcd_pnx8550_driver
1017 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
1018 #include "ohci-ppc-soc.c"
1019 #define PLATFORM_DRIVER ohci_hcd_ppc_soc_driver
1022 #ifdef CONFIG_ARCH_AT91
1023 #include "ohci-at91.c"
1024 #define PLATFORM_DRIVER ohci_hcd_at91_driver
1027 #ifdef CONFIG_ARCH_PNX4008
1028 #include "ohci-pnx4008.c"
1029 #define PLATFORM_DRIVER usb_hcd_pnx4008_driver
1032 #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
1033 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
1034 defined(CONFIG_CPU_SUBTYPE_SH7763)
1035 #include "ohci-sh.c"
1036 #define PLATFORM_DRIVER ohci_hcd_sh_driver
1040 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1041 #include "ohci-ppc-of.c"
1042 #define OF_PLATFORM_DRIVER ohci_hcd_ppc_of_driver
1045 #ifdef CONFIG_PPC_PS3
1046 #include "ohci-ps3.c"
1047 #define PS3_SYSTEM_BUS_DRIVER ps3_ohci_driver
1050 #ifdef CONFIG_USB_OHCI_HCD_SSB
1051 #include "ohci-ssb.c"
1052 #define SSB_OHCI_DRIVER ssb_ohci_driver
1055 #ifdef CONFIG_MFD_SM501
1056 #include "ohci-sm501.c"
1057 #define PLATFORM_DRIVER ohci_hcd_sm501_driver
1060 #if !defined(PCI_DRIVER) && \
1061 !defined(PLATFORM_DRIVER) && \
1062 !defined(OF_PLATFORM_DRIVER) && \
1063 !defined(SA1111_DRIVER) && \
1064 !defined(PS3_SYSTEM_BUS_DRIVER) && \
1065 !defined(SSB_OHCI_DRIVER)
1066 #error "missing bus glue for ohci-hcd"
1069 static int __init
ohci_hcd_mod_init(void)
1076 printk (KERN_DEBUG
"%s: " DRIVER_INFO
"\n", hcd_name
);
1077 pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name
,
1078 sizeof (struct ed
), sizeof (struct td
));
1081 ohci_debug_root
= debugfs_create_dir("ohci", NULL
);
1082 if (!ohci_debug_root
) {
1088 #ifdef PS3_SYSTEM_BUS_DRIVER
1089 retval
= ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER
);
1094 #ifdef PLATFORM_DRIVER
1095 retval
= platform_driver_register(&PLATFORM_DRIVER
);
1097 goto error_platform
;
1100 #ifdef OF_PLATFORM_DRIVER
1101 retval
= of_register_platform_driver(&OF_PLATFORM_DRIVER
);
1103 goto error_of_platform
;
1106 #ifdef SA1111_DRIVER
1107 retval
= sa1111_driver_register(&SA1111_DRIVER
);
1113 retval
= pci_register_driver(&PCI_DRIVER
);
1118 #ifdef SSB_OHCI_DRIVER
1119 retval
= ssb_driver_register(&SSB_OHCI_DRIVER
);
1127 #ifdef SSB_OHCI_DRIVER
1131 pci_unregister_driver(&PCI_DRIVER
);
1134 #ifdef SA1111_DRIVER
1135 sa1111_driver_unregister(&SA1111_DRIVER
);
1138 #ifdef OF_PLATFORM_DRIVER
1139 of_unregister_platform_driver(&OF_PLATFORM_DRIVER
);
1142 #ifdef PLATFORM_DRIVER
1143 platform_driver_unregister(&PLATFORM_DRIVER
);
1146 #ifdef PS3_SYSTEM_BUS_DRIVER
1147 ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1151 debugfs_remove(ohci_debug_root
);
1152 ohci_debug_root
= NULL
;
1158 module_init(ohci_hcd_mod_init
);
1160 static void __exit
ohci_hcd_mod_exit(void)
1162 #ifdef SSB_OHCI_DRIVER
1163 ssb_driver_unregister(&SSB_OHCI_DRIVER
);
1166 pci_unregister_driver(&PCI_DRIVER
);
1168 #ifdef SA1111_DRIVER
1169 sa1111_driver_unregister(&SA1111_DRIVER
);
1171 #ifdef OF_PLATFORM_DRIVER
1172 of_unregister_platform_driver(&OF_PLATFORM_DRIVER
);
1174 #ifdef PLATFORM_DRIVER
1175 platform_driver_unregister(&PLATFORM_DRIVER
);
1177 #ifdef PS3_SYSTEM_BUS_DRIVER
1178 ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1181 debugfs_remove(ohci_debug_root
);
1184 module_exit(ohci_hcd_mod_exit
);