]>
git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/usb/host/ohci-hcd.c
2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
18 * This file is licenced under the GPL.
21 #include <linux/module.h>
22 #include <linux/moduleparam.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/ioport.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/timer.h>
32 #include <linux/list.h>
33 #include <linux/usb.h>
34 #include <linux/usb/otg.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/dmapool.h>
37 #include <linux/reboot.h>
38 #include <linux/workqueue.h>
42 #include <asm/system.h>
43 #include <asm/unaligned.h>
44 #include <asm/byteorder.h>
46 #include "../core/hcd.h"
48 #define DRIVER_VERSION "2006 August 04"
49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
52 /*-------------------------------------------------------------------------*/
54 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
56 /* For initializing controller (mask in an HCFS mode too) */
57 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
58 #define OHCI_INTR_INIT \
59 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
60 | OHCI_INTR_RD | OHCI_INTR_WDH)
63 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
67 #ifdef CONFIG_ARCH_OMAP
68 /* OMAP doesn't support IR (no SMM; not needed) */
72 /*-------------------------------------------------------------------------*/
74 static const char hcd_name
[] = "ohci_hcd";
76 #define STATECHANGE_DELAY msecs_to_jiffies(300)
80 static void ohci_dump (struct ohci_hcd
*ohci
, int verbose
);
81 static int ohci_init (struct ohci_hcd
*ohci
);
82 static void ohci_stop (struct usb_hcd
*hcd
);
84 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
85 static int ohci_restart (struct ohci_hcd
*ohci
);
95 * On architectures with edge-triggered interrupts we must never return
98 #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
99 #define IRQ_NOTMINE IRQ_HANDLED
101 #define IRQ_NOTMINE IRQ_NONE
105 /* Some boards misreport power switching/overcurrent */
106 static int distrust_firmware
= 1;
107 module_param (distrust_firmware
, bool, 0);
108 MODULE_PARM_DESC (distrust_firmware
,
109 "true to distrust firmware power/overcurrent setup");
111 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
112 static int no_handshake
= 0;
113 module_param (no_handshake
, bool, 0);
114 MODULE_PARM_DESC (no_handshake
, "true (not default) disables BIOS handshake");
116 /*-------------------------------------------------------------------------*/
119 * queue up an urb for anything except the root hub
121 static int ohci_urb_enqueue (
126 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
128 urb_priv_t
*urb_priv
;
129 unsigned int pipe
= urb
->pipe
;
134 #ifdef OHCI_VERBOSE_DEBUG
135 urb_print(urb
, "SUB", usb_pipein(pipe
), -EINPROGRESS
);
138 /* every endpoint has a ed, locate and maybe (re)initialize it */
139 if (! (ed
= ed_get (ohci
, urb
->ep
, urb
->dev
, pipe
, urb
->interval
)))
142 /* for the private part of the URB we need the number of TDs (size) */
145 /* td_submit_urb() doesn't yet handle these */
146 if (urb
->transfer_buffer_length
> 4096)
149 /* 1 TD for setup, 1 for ACK, plus ... */
152 // case PIPE_INTERRUPT:
155 /* one TD for every 4096 Bytes (can be upto 8K) */
156 size
+= urb
->transfer_buffer_length
/ 4096;
157 /* ... and for any remaining bytes ... */
158 if ((urb
->transfer_buffer_length
% 4096) != 0)
160 /* ... and maybe a zero length packet to wrap it up */
163 else if ((urb
->transfer_flags
& URB_ZERO_PACKET
) != 0
164 && (urb
->transfer_buffer_length
165 % usb_maxpacket (urb
->dev
, pipe
,
166 usb_pipeout (pipe
))) == 0)
169 case PIPE_ISOCHRONOUS
: /* number of packets from URB */
170 size
= urb
->number_of_packets
;
174 /* allocate the private part of the URB */
175 urb_priv
= kzalloc (sizeof (urb_priv_t
) + size
* sizeof (struct td
*),
179 INIT_LIST_HEAD (&urb_priv
->pending
);
180 urb_priv
->length
= size
;
183 /* allocate the TDs (deferring hash chain updates) */
184 for (i
= 0; i
< size
; i
++) {
185 urb_priv
->td
[i
] = td_alloc (ohci
, mem_flags
);
186 if (!urb_priv
->td
[i
]) {
187 urb_priv
->length
= i
;
188 urb_free_priv (ohci
, urb_priv
);
193 spin_lock_irqsave (&ohci
->lock
, flags
);
195 /* don't submit to a dead HC */
196 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
)) {
200 if (!HC_IS_RUNNING(hcd
->state
)) {
204 retval
= usb_hcd_link_urb_to_ep(hcd
, urb
);
208 /* schedule the ed if needed */
209 if (ed
->state
== ED_IDLE
) {
210 retval
= ed_schedule (ohci
, ed
);
212 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
215 if (ed
->type
== PIPE_ISOCHRONOUS
) {
216 u16 frame
= ohci_frame_no(ohci
);
218 /* delay a few frames before the first TD */
219 frame
+= max_t (u16
, 8, ed
->interval
);
220 frame
&= ~(ed
->interval
- 1);
222 urb
->start_frame
= frame
;
224 /* yes, only URB_ISO_ASAP is supported, and
225 * urb->start_frame is never used as input.
228 } else if (ed
->type
== PIPE_ISOCHRONOUS
)
229 urb
->start_frame
= ed
->last_iso
+ ed
->interval
;
231 /* fill the TDs and link them to the ed; and
232 * enable that part of the schedule, if needed
233 * and update count of queued periodic urbs
235 urb
->hcpriv
= urb_priv
;
236 td_submit_urb (ohci
, urb
);
240 urb_free_priv (ohci
, urb_priv
);
241 spin_unlock_irqrestore (&ohci
->lock
, flags
);
246 * decouple the URB from the HC queues (TDs, urb_priv).
247 * reporting is always done
248 * asynchronously, and we might be dealing with an urb that's
249 * partially transferred, or an ED with other urbs being unlinked.
251 static int ohci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
253 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
257 #ifdef OHCI_VERBOSE_DEBUG
258 urb_print(urb
, "UNLINK", 1, status
);
261 spin_lock_irqsave (&ohci
->lock
, flags
);
262 rc
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
265 } else if (HC_IS_RUNNING(hcd
->state
)) {
266 urb_priv_t
*urb_priv
;
268 /* Unless an IRQ completed the unlink while it was being
269 * handed to us, flag it for unlink and giveback, and force
270 * some upcoming INTR_SF to call finish_unlinks()
272 urb_priv
= urb
->hcpriv
;
274 if (urb_priv
->ed
->state
== ED_OPER
)
275 start_ed_unlink (ohci
, urb_priv
->ed
);
279 * with HC dead, we won't respect hc queue pointers
280 * any more ... just clean up every urb's memory.
283 finish_urb(ohci
, urb
, status
);
285 spin_unlock_irqrestore (&ohci
->lock
, flags
);
289 /*-------------------------------------------------------------------------*/
291 /* frees config/altsetting state for endpoints,
292 * including ED memory, dummy TD, and bulk/intr data toggle
296 ohci_endpoint_disable (struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
298 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
300 struct ed
*ed
= ep
->hcpriv
;
301 unsigned limit
= 1000;
303 /* ASSERT: any requests/urbs are being unlinked */
304 /* ASSERT: nobody can be submitting urbs for this any more */
310 spin_lock_irqsave (&ohci
->lock
, flags
);
312 if (!HC_IS_RUNNING (hcd
->state
)) {
315 if (quirk_zfmicro(ohci
) && ed
->type
== PIPE_INTERRUPT
)
316 ohci
->eds_scheduled
--;
317 finish_unlinks (ohci
, 0);
321 case ED_UNLINK
: /* wait for hw to finish? */
322 /* major IRQ delivery trouble loses INTR_SF too... */
324 ohci_warn(ohci
, "ED unlink timeout\n");
325 if (quirk_zfmicro(ohci
)) {
326 ohci_warn(ohci
, "Attempting ZF TD recovery\n");
327 ohci
->ed_to_check
= ed
;
332 spin_unlock_irqrestore (&ohci
->lock
, flags
);
333 schedule_timeout_uninterruptible(1);
335 case ED_IDLE
: /* fully unlinked */
336 if (list_empty (&ed
->td_list
)) {
337 td_free (ohci
, ed
->dummy
);
341 /* else FALL THROUGH */
343 /* caller was supposed to have unlinked any requests;
344 * that's not our job. can't recover; must leak ed.
346 ohci_err (ohci
, "leak ed %p (#%02x) state %d%s\n",
347 ed
, ep
->desc
.bEndpointAddress
, ed
->state
,
348 list_empty (&ed
->td_list
) ? "" : " (has tds)");
349 td_free (ohci
, ed
->dummy
);
353 spin_unlock_irqrestore (&ohci
->lock
, flags
);
357 static int ohci_get_frame (struct usb_hcd
*hcd
)
359 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
361 return ohci_frame_no(ohci
);
364 static void ohci_usb_reset (struct ohci_hcd
*ohci
)
366 ohci
->hc_control
= ohci_readl (ohci
, &ohci
->regs
->control
);
367 ohci
->hc_control
&= OHCI_CTRL_RWC
;
368 ohci_writel (ohci
, ohci
->hc_control
, &ohci
->regs
->control
);
371 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
372 * other cases where the next software may expect clean state from the
373 * "firmware". this is bus-neutral, unlike shutdown() methods.
376 ohci_shutdown (struct usb_hcd
*hcd
)
378 struct ohci_hcd
*ohci
;
380 ohci
= hcd_to_ohci (hcd
);
381 ohci_writel (ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
382 ohci_usb_reset (ohci
);
383 /* flush the writes */
384 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
387 static int check_ed(struct ohci_hcd
*ohci
, struct ed
*ed
)
389 return (hc32_to_cpu(ohci
, ed
->hwINFO
) & ED_IN
) != 0
390 && (hc32_to_cpu(ohci
, ed
->hwHeadP
) & TD_MASK
)
391 == (hc32_to_cpu(ohci
, ed
->hwTailP
) & TD_MASK
)
392 && !list_empty(&ed
->td_list
);
395 /* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
396 * an interrupt TD but neglects to add it to the donelist. On systems with
397 * this chipset, we need to periodically check the state of the queues to look
398 * for such "lost" TDs.
400 static void unlink_watchdog_func(unsigned long _ohci
)
404 unsigned seen_count
= 0;
406 struct ed
**seen
= NULL
;
407 struct ohci_hcd
*ohci
= (struct ohci_hcd
*) _ohci
;
409 spin_lock_irqsave(&ohci
->lock
, flags
);
410 max
= ohci
->eds_scheduled
;
414 if (ohci
->ed_to_check
)
417 seen
= kcalloc(max
, sizeof *seen
, GFP_ATOMIC
);
421 for (i
= 0; i
< NUM_INTS
; i
++) {
422 struct ed
*ed
= ohci
->periodic
[i
];
427 /* scan this branch of the periodic schedule tree */
428 for (temp
= 0; temp
< seen_count
; temp
++) {
429 if (seen
[temp
] == ed
) {
430 /* we've checked it and what's after */
437 seen
[seen_count
++] = ed
;
438 if (!check_ed(ohci
, ed
)) {
443 /* HC's TD list is empty, but HCD sees at least one
444 * TD that's not been sent through the donelist.
446 ohci
->ed_to_check
= ed
;
449 /* The HC may wait until the next frame to report the
450 * TD as done through the donelist and INTR_WDH. (We
451 * just *assume* it's not a multi-TD interrupt URB;
452 * those could defer the IRQ more than one frame, using
453 * DI...) Check again after the next INTR_SF.
455 ohci_writel(ohci
, OHCI_INTR_SF
,
456 &ohci
->regs
->intrstatus
);
457 ohci_writel(ohci
, OHCI_INTR_SF
,
458 &ohci
->regs
->intrenable
);
460 /* flush those writes */
461 (void) ohci_readl(ohci
, &ohci
->regs
->control
);
468 if (ohci
->eds_scheduled
)
469 mod_timer(&ohci
->unlink_watchdog
, round_jiffies_relative(HZ
));
471 spin_unlock_irqrestore(&ohci
->lock
, flags
);
474 /*-------------------------------------------------------------------------*
476 *-------------------------------------------------------------------------*/
478 /* init memory, and kick BIOS/SMM off */
480 static int ohci_init (struct ohci_hcd
*ohci
)
483 struct usb_hcd
*hcd
= ohci_to_hcd(ohci
);
486 ohci
->regs
= hcd
->regs
;
488 /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
489 * was never needed for most non-PCI systems ... remove the code?
493 /* SMM owns the HC? not for long! */
494 if (!no_handshake
&& ohci_readl (ohci
,
495 &ohci
->regs
->control
) & OHCI_CTRL_IR
) {
498 ohci_dbg (ohci
, "USB HC TakeOver from BIOS/SMM\n");
500 /* this timeout is arbitrary. we make it long, so systems
501 * depending on usb keyboards may be usable even if the
502 * BIOS/SMM code seems pretty broken.
504 temp
= 500; /* arbitrary: five seconds */
506 ohci_writel (ohci
, OHCI_INTR_OC
, &ohci
->regs
->intrenable
);
507 ohci_writel (ohci
, OHCI_OCR
, &ohci
->regs
->cmdstatus
);
508 while (ohci_readl (ohci
, &ohci
->regs
->control
) & OHCI_CTRL_IR
) {
511 ohci_err (ohci
, "USB HC takeover failed!"
512 " (BIOS/SMM bug)\n");
516 ohci_usb_reset (ohci
);
520 /* Disable HC interrupts */
521 ohci_writel (ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
523 /* flush the writes, and save key bits like RWC */
524 if (ohci_readl (ohci
, &ohci
->regs
->control
) & OHCI_CTRL_RWC
)
525 ohci
->hc_control
|= OHCI_CTRL_RWC
;
527 /* Read the number of ports unless overridden */
528 if (ohci
->num_ports
== 0)
529 ohci
->num_ports
= roothub_a(ohci
) & RH_A_NDP
;
534 ohci
->hcca
= dma_alloc_coherent (hcd
->self
.controller
,
535 sizeof *ohci
->hcca
, &ohci
->hcca_dma
, 0);
539 if ((ret
= ohci_mem_init (ohci
)) < 0)
542 create_debug_files (ohci
);
548 /*-------------------------------------------------------------------------*/
550 /* Start an OHCI controller, set the BUS operational
551 * resets USB and controller
554 static int ohci_run (struct ohci_hcd
*ohci
)
557 int first
= ohci
->fminterval
== 0;
558 struct usb_hcd
*hcd
= ohci_to_hcd(ohci
);
562 /* boot firmware should have set this up (5.1.1.3.1) */
565 temp
= ohci_readl (ohci
, &ohci
->regs
->fminterval
);
566 ohci
->fminterval
= temp
& 0x3fff;
567 if (ohci
->fminterval
!= FI
)
568 ohci_dbg (ohci
, "fminterval delta %d\n",
569 ohci
->fminterval
- FI
);
570 ohci
->fminterval
|= FSMP (ohci
->fminterval
) << 16;
571 /* also: power/overcurrent flags in roothub.a */
574 /* Reset USB nearly "by the book". RemoteWakeupConnected was
575 * saved if boot firmware (BIOS/SMM/...) told us it's connected,
576 * or if bus glue did the same (e.g. for PCI add-in cards with
579 if ((ohci
->hc_control
& OHCI_CTRL_RWC
) != 0
580 && !device_may_wakeup(hcd
->self
.controller
))
581 device_init_wakeup(hcd
->self
.controller
, 1);
583 switch (ohci
->hc_control
& OHCI_CTRL_HCFS
) {
587 case OHCI_USB_SUSPEND
:
588 case OHCI_USB_RESUME
:
589 ohci
->hc_control
&= OHCI_CTRL_RWC
;
590 ohci
->hc_control
|= OHCI_USB_RESUME
;
591 temp
= 10 /* msec wait */;
593 // case OHCI_USB_RESET:
595 ohci
->hc_control
&= OHCI_CTRL_RWC
;
596 ohci
->hc_control
|= OHCI_USB_RESET
;
597 temp
= 50 /* msec wait */;
600 ohci_writel (ohci
, ohci
->hc_control
, &ohci
->regs
->control
);
602 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
605 memset (ohci
->hcca
, 0, sizeof (struct ohci_hcca
));
607 /* 2msec timelimit here means no irqs/preempt */
608 spin_lock_irq (&ohci
->lock
);
611 /* HC Reset requires max 10 us delay */
612 ohci_writel (ohci
, OHCI_HCR
, &ohci
->regs
->cmdstatus
);
613 temp
= 30; /* ... allow extra time */
614 while ((ohci_readl (ohci
, &ohci
->regs
->cmdstatus
) & OHCI_HCR
) != 0) {
616 spin_unlock_irq (&ohci
->lock
);
617 ohci_err (ohci
, "USB HC reset timed out!\n");
623 /* now we're in the SUSPEND state ... must go OPERATIONAL
624 * within 2msec else HC enters RESUME
626 * ... but some hardware won't init fmInterval "by the book"
627 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
628 * this if we write fmInterval after we're OPERATIONAL.
629 * Unclear about ALi, ServerWorks, and others ... this could
630 * easily be a longstanding bug in chip init on Linux.
632 if (ohci
->flags
& OHCI_QUIRK_INITRESET
) {
633 ohci_writel (ohci
, ohci
->hc_control
, &ohci
->regs
->control
);
634 // flush those writes
635 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
638 /* Tell the controller where the control and bulk lists are
639 * The lists are empty now. */
640 ohci_writel (ohci
, 0, &ohci
->regs
->ed_controlhead
);
641 ohci_writel (ohci
, 0, &ohci
->regs
->ed_bulkhead
);
643 /* a reset clears this */
644 ohci_writel (ohci
, (u32
) ohci
->hcca_dma
, &ohci
->regs
->hcca
);
646 periodic_reinit (ohci
);
648 /* some OHCI implementations are finicky about how they init.
649 * bogus values here mean not even enumeration could work.
651 if ((ohci_readl (ohci
, &ohci
->regs
->fminterval
) & 0x3fff0000) == 0
652 || !ohci_readl (ohci
, &ohci
->regs
->periodicstart
)) {
653 if (!(ohci
->flags
& OHCI_QUIRK_INITRESET
)) {
654 ohci
->flags
|= OHCI_QUIRK_INITRESET
;
655 ohci_dbg (ohci
, "enabling initreset quirk\n");
658 spin_unlock_irq (&ohci
->lock
);
659 ohci_err (ohci
, "init err (%08x %04x)\n",
660 ohci_readl (ohci
, &ohci
->regs
->fminterval
),
661 ohci_readl (ohci
, &ohci
->regs
->periodicstart
));
665 /* use rhsc irqs after khubd is fully initialized */
667 hcd
->uses_new_polling
= 1;
669 /* start controller operations */
670 ohci
->hc_control
&= OHCI_CTRL_RWC
;
671 ohci
->hc_control
|= OHCI_CONTROL_INIT
| OHCI_USB_OPER
;
672 ohci_writel (ohci
, ohci
->hc_control
, &ohci
->regs
->control
);
673 hcd
->state
= HC_STATE_RUNNING
;
675 /* wake on ConnectStatusChange, matching external hubs */
676 ohci_writel (ohci
, RH_HS_DRWE
, &ohci
->regs
->roothub
.status
);
678 /* Choose the interrupts we care about now, others later on demand */
679 mask
= OHCI_INTR_INIT
;
680 ohci_writel (ohci
, ~0, &ohci
->regs
->intrstatus
);
681 ohci_writel (ohci
, mask
, &ohci
->regs
->intrenable
);
683 /* handle root hub init quirks ... */
684 temp
= roothub_a (ohci
);
685 temp
&= ~(RH_A_PSM
| RH_A_OCPM
);
686 if (ohci
->flags
& OHCI_QUIRK_SUPERIO
) {
687 /* NSC 87560 and maybe others */
689 temp
&= ~(RH_A_POTPGT
| RH_A_NPS
);
690 ohci_writel (ohci
, temp
, &ohci
->regs
->roothub
.a
);
691 } else if ((ohci
->flags
& OHCI_QUIRK_AMD756
) || distrust_firmware
) {
692 /* hub power always on; required for AMD-756 and some
693 * Mac platforms. ganged overcurrent reporting, if any.
696 ohci_writel (ohci
, temp
, &ohci
->regs
->roothub
.a
);
698 ohci_writel (ohci
, RH_HS_LPSC
, &ohci
->regs
->roothub
.status
);
699 ohci_writel (ohci
, (temp
& RH_A_NPS
) ? 0 : RH_B_PPCM
,
700 &ohci
->regs
->roothub
.b
);
701 // flush those writes
702 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
704 ohci
->next_statechange
= jiffies
+ STATECHANGE_DELAY
;
705 spin_unlock_irq (&ohci
->lock
);
707 // POTPGT delay is bits 24-31, in 2 ms units.
708 mdelay ((temp
>> 23) & 0x1fe);
709 hcd
->state
= HC_STATE_RUNNING
;
711 if (quirk_zfmicro(ohci
)) {
712 /* Create timer to watch for bad queue state on ZF Micro */
713 setup_timer(&ohci
->unlink_watchdog
, unlink_watchdog_func
,
714 (unsigned long) ohci
);
716 ohci
->eds_scheduled
= 0;
717 ohci
->ed_to_check
= NULL
;
725 /*-------------------------------------------------------------------------*/
727 /* an interrupt happens */
729 static irqreturn_t
ohci_irq (struct usb_hcd
*hcd
)
731 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
732 struct ohci_regs __iomem
*regs
= ohci
->regs
;
735 /* Read interrupt status (and flush pending writes). We ignore the
736 * optimization of checking the LSB of hcca->done_head; it doesn't
737 * work on all systems (edge triggering for OHCI can be a factor).
739 ints
= ohci_readl(ohci
, ®s
->intrstatus
);
741 /* Check for an all 1's result which is a typical consequence
742 * of dead, unclocked, or unplugged (CardBus...) devices
744 if (ints
== ~(u32
)0) {
746 ohci_dbg (ohci
, "device removed!\n");
750 /* We only care about interrupts that are enabled */
751 ints
&= ohci_readl(ohci
, ®s
->intrenable
);
753 /* interrupt for some other device? */
757 if (ints
& OHCI_INTR_UE
) {
758 // e.g. due to PCI Master/Target Abort
759 if (quirk_nec(ohci
)) {
760 /* Workaround for a silicon bug in some NEC chips used
761 * in Apple's PowerBooks. Adapted from Darwin code.
763 ohci_err (ohci
, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
765 ohci_writel (ohci
, OHCI_INTR_UE
, ®s
->intrdisable
);
767 schedule_work (&ohci
->nec_work
);
770 ohci_err (ohci
, "OHCI Unrecoverable Error, disabled\n");
774 ohci_usb_reset (ohci
);
777 if (ints
& OHCI_INTR_RHSC
) {
778 ohci_vdbg(ohci
, "rhsc\n");
779 ohci
->next_statechange
= jiffies
+ STATECHANGE_DELAY
;
780 ohci_writel(ohci
, OHCI_INTR_RD
| OHCI_INTR_RHSC
,
783 /* NOTE: Vendors didn't always make the same implementation
784 * choices for RHSC. Many followed the spec; RHSC triggers
785 * on an edge, like setting and maybe clearing a port status
786 * change bit. With others it's level-triggered, active
787 * until khubd clears all the port status change bits. We'll
788 * always disable it here and rely on polling until khubd
791 ohci_writel(ohci
, OHCI_INTR_RHSC
, ®s
->intrdisable
);
792 usb_hcd_poll_rh_status(hcd
);
795 /* For connect and disconnect events, we expect the controller
796 * to turn on RHSC along with RD. But for remote wakeup events
797 * this might not happen.
799 else if (ints
& OHCI_INTR_RD
) {
800 ohci_vdbg(ohci
, "resume detect\n");
801 ohci_writel(ohci
, OHCI_INTR_RD
, ®s
->intrstatus
);
803 if (ohci
->autostop
) {
804 spin_lock (&ohci
->lock
);
805 ohci_rh_resume (ohci
);
806 spin_unlock (&ohci
->lock
);
808 usb_hcd_resume_root_hub(hcd
);
811 if (ints
& OHCI_INTR_WDH
) {
812 if (HC_IS_RUNNING(hcd
->state
))
813 ohci_writel (ohci
, OHCI_INTR_WDH
, ®s
->intrdisable
);
814 spin_lock (&ohci
->lock
);
816 spin_unlock (&ohci
->lock
);
817 if (HC_IS_RUNNING(hcd
->state
))
818 ohci_writel (ohci
, OHCI_INTR_WDH
, ®s
->intrenable
);
821 if (quirk_zfmicro(ohci
) && (ints
& OHCI_INTR_SF
)) {
822 spin_lock(&ohci
->lock
);
823 if (ohci
->ed_to_check
) {
824 struct ed
*ed
= ohci
->ed_to_check
;
826 if (check_ed(ohci
, ed
)) {
827 /* HC thinks the TD list is empty; HCD knows
828 * at least one TD is outstanding
830 if (--ohci
->zf_delay
== 0) {
831 struct td
*td
= list_entry(
835 "Reclaiming orphan TD %p\n",
837 takeback_td(ohci
, td
);
838 ohci
->ed_to_check
= NULL
;
841 ohci
->ed_to_check
= NULL
;
843 spin_unlock(&ohci
->lock
);
846 /* could track INTR_SO to reduce available PCI/... bandwidth */
848 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
849 * when there's still unlinking to be done (next frame).
851 spin_lock (&ohci
->lock
);
852 if (ohci
->ed_rm_list
)
853 finish_unlinks (ohci
, ohci_frame_no(ohci
));
854 if ((ints
& OHCI_INTR_SF
) != 0
856 && !ohci
->ed_to_check
857 && HC_IS_RUNNING(hcd
->state
))
858 ohci_writel (ohci
, OHCI_INTR_SF
, ®s
->intrdisable
);
859 spin_unlock (&ohci
->lock
);
861 if (HC_IS_RUNNING(hcd
->state
)) {
862 ohci_writel (ohci
, ints
, ®s
->intrstatus
);
863 ohci_writel (ohci
, OHCI_INTR_MIE
, ®s
->intrenable
);
864 // flush those writes
865 (void) ohci_readl (ohci
, &ohci
->regs
->control
);
871 /*-------------------------------------------------------------------------*/
873 static void ohci_stop (struct usb_hcd
*hcd
)
875 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
879 flush_scheduled_work();
881 ohci_usb_reset (ohci
);
882 ohci_writel (ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
883 free_irq(hcd
->irq
, hcd
);
886 if (quirk_zfmicro(ohci
))
887 del_timer(&ohci
->unlink_watchdog
);
889 remove_debug_files (ohci
);
890 ohci_mem_cleanup (ohci
);
892 dma_free_coherent (hcd
->self
.controller
,
894 ohci
->hcca
, ohci
->hcca_dma
);
900 /*-------------------------------------------------------------------------*/
902 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
904 /* must not be called from interrupt context */
905 static int ohci_restart (struct ohci_hcd
*ohci
)
909 struct urb_priv
*priv
;
911 spin_lock_irq(&ohci
->lock
);
914 /* Recycle any "live" eds/tds (and urbs). */
915 if (!list_empty (&ohci
->pending
))
916 ohci_dbg(ohci
, "abort schedule...\n");
917 list_for_each_entry (priv
, &ohci
->pending
, pending
) {
918 struct urb
*urb
= priv
->td
[0]->urb
;
919 struct ed
*ed
= priv
->ed
;
923 ed
->state
= ED_UNLINK
;
924 ed
->hwINFO
|= cpu_to_hc32(ohci
, ED_DEQUEUE
);
925 ed_deschedule (ohci
, ed
);
927 ed
->ed_next
= ohci
->ed_rm_list
;
929 ohci
->ed_rm_list
= ed
;
934 ohci_dbg(ohci
, "bogus ed %p state %d\n",
939 urb
->unlinked
= -ESHUTDOWN
;
941 finish_unlinks (ohci
, 0);
942 spin_unlock_irq(&ohci
->lock
);
944 /* paranoia, in case that didn't work: */
946 /* empty the interrupt branches */
947 for (i
= 0; i
< NUM_INTS
; i
++) ohci
->load
[i
] = 0;
948 for (i
= 0; i
< NUM_INTS
; i
++) ohci
->hcca
->int_table
[i
] = 0;
950 /* no EDs to remove */
951 ohci
->ed_rm_list
= NULL
;
953 /* empty control and bulk lists */
954 ohci
->ed_controltail
= NULL
;
955 ohci
->ed_bulktail
= NULL
;
957 if ((temp
= ohci_run (ohci
)) < 0) {
958 ohci_err (ohci
, "can't restart, %d\n", temp
);
961 ohci_dbg(ohci
, "restart complete\n");
967 /*-------------------------------------------------------------------------*/
969 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
971 MODULE_AUTHOR (DRIVER_AUTHOR
);
972 MODULE_DESCRIPTION (DRIVER_INFO
);
973 MODULE_LICENSE ("GPL");
976 #include "ohci-pci.c"
977 #define PCI_DRIVER ohci_pci_driver
981 #include "ohci-sa1111.c"
982 #define SA1111_DRIVER ohci_hcd_sa1111_driver
985 #ifdef CONFIG_ARCH_S3C2410
986 #include "ohci-s3c2410.c"
987 #define PLATFORM_DRIVER ohci_hcd_s3c2410_driver
990 #ifdef CONFIG_ARCH_OMAP
991 #include "ohci-omap.c"
992 #define PLATFORM_DRIVER ohci_hcd_omap_driver
995 #ifdef CONFIG_ARCH_LH7A404
996 #include "ohci-lh7a404.c"
997 #define PLATFORM_DRIVER ohci_hcd_lh7a404_driver
1000 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
1001 #include "ohci-pxa27x.c"
1002 #define PLATFORM_DRIVER ohci_hcd_pxa27x_driver
1005 #ifdef CONFIG_ARCH_EP93XX
1006 #include "ohci-ep93xx.c"
1007 #define PLATFORM_DRIVER ohci_hcd_ep93xx_driver
1010 #ifdef CONFIG_SOC_AU1X00
1011 #include "ohci-au1xxx.c"
1012 #define PLATFORM_DRIVER ohci_hcd_au1xxx_driver
1015 #ifdef CONFIG_PNX8550
1016 #include "ohci-pnx8550.c"
1017 #define PLATFORM_DRIVER ohci_hcd_pnx8550_driver
1020 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
1021 #include "ohci-ppc-soc.c"
1022 #define PLATFORM_DRIVER ohci_hcd_ppc_soc_driver
1025 #ifdef CONFIG_ARCH_AT91
1026 #include "ohci-at91.c"
1027 #define PLATFORM_DRIVER ohci_hcd_at91_driver
1030 #ifdef CONFIG_ARCH_PNX4008
1031 #include "ohci-pnx4008.c"
1032 #define PLATFORM_DRIVER usb_hcd_pnx4008_driver
1036 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1037 #include "ohci-ppc-of.c"
1038 #define OF_PLATFORM_DRIVER ohci_hcd_ppc_of_driver
1041 #ifdef CONFIG_PPC_PS3
1042 #include "ohci-ps3.c"
1043 #define PS3_SYSTEM_BUS_DRIVER ps3_ohci_driver
1046 #ifdef CONFIG_USB_OHCI_HCD_SSB
1047 #include "ohci-ssb.c"
1048 #define SSB_OHCI_DRIVER ssb_ohci_driver
1051 #if !defined(PCI_DRIVER) && \
1052 !defined(PLATFORM_DRIVER) && \
1053 !defined(OF_PLATFORM_DRIVER) && \
1054 !defined(SA1111_DRIVER) && \
1055 !defined(PS3_SYSTEM_BUS_DRIVER) && \
1056 !defined(SSB_OHCI_DRIVER)
1057 #error "missing bus glue for ohci-hcd"
1060 static int __init
ohci_hcd_mod_init(void)
1067 printk (KERN_DEBUG
"%s: " DRIVER_INFO
"\n", hcd_name
);
1068 pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name
,
1069 sizeof (struct ed
), sizeof (struct td
));
1071 #ifdef PS3_SYSTEM_BUS_DRIVER
1072 retval
= ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER
);
1077 #ifdef PLATFORM_DRIVER
1078 retval
= platform_driver_register(&PLATFORM_DRIVER
);
1080 goto error_platform
;
1083 #ifdef OF_PLATFORM_DRIVER
1084 retval
= of_register_platform_driver(&OF_PLATFORM_DRIVER
);
1086 goto error_of_platform
;
1089 #ifdef SA1111_DRIVER
1090 retval
= sa1111_driver_register(&SA1111_DRIVER
);
1096 retval
= pci_register_driver(&PCI_DRIVER
);
1101 #ifdef SSB_OHCI_DRIVER
1102 retval
= ssb_driver_register(&SSB_OHCI_DRIVER
);
1110 #ifdef SSB_OHCI_DRIVER
1114 pci_unregister_driver(&PCI_DRIVER
);
1117 #ifdef SA1111_DRIVER
1118 sa1111_driver_unregister(&SA1111_DRIVER
);
1121 #ifdef OF_PLATFORM_DRIVER
1122 of_unregister_platform_driver(&OF_PLATFORM_DRIVER
);
1125 #ifdef PLATFORM_DRIVER
1126 platform_driver_unregister(&PLATFORM_DRIVER
);
1129 #ifdef PS3_SYSTEM_BUS_DRIVER
1130 ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1135 module_init(ohci_hcd_mod_init
);
1137 static void __exit
ohci_hcd_mod_exit(void)
1139 #ifdef SSB_OHCI_DRIVER
1140 ssb_driver_unregister(&SSB_OHCI_DRIVER
);
1143 pci_unregister_driver(&PCI_DRIVER
);
1145 #ifdef SA1111_DRIVER
1146 sa1111_driver_unregister(&SA1111_DRIVER
);
1148 #ifdef OF_PLATFORM_DRIVER
1149 of_unregister_platform_driver(&OF_PLATFORM_DRIVER
);
1151 #ifdef PLATFORM_DRIVER
1152 platform_driver_unregister(&PLATFORM_DRIVER
);
1154 #ifdef PS3_SYSTEM_BUS_DRIVER
1155 ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1158 module_exit(ohci_hcd_mod_exit
);