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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
4 * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
5 *
6 * This code is *strongly* based on EHCI-HCD code by David Brownell since
7 * the chip is a quasi-EHCI compatible.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software Foundation,
21 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/dmapool.h>
27 #include <linux/kernel.h>
28 #include <linux/delay.h>
29 #include <linux/ioport.h>
30 #include <linux/sched.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/timer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/usb/hcd.h>
38 #include <linux/moduleparam.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/io.h>
41
42 #include <asm/irq.h>
43 #include <asm/unaligned.h>
44
45 #include <linux/irq.h>
46 #include <linux/platform_device.h>
47
48 #include "oxu210hp.h"
49
50 #define DRIVER_VERSION "0.0.50"
51
52 /*
53 * Main defines
54 */
55
56 #define oxu_dbg(oxu, fmt, args...) \
57 dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
58 #define oxu_err(oxu, fmt, args...) \
59 dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
60 #define oxu_info(oxu, fmt, args...) \
61 dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
62
63 #ifdef CONFIG_DYNAMIC_DEBUG
64 #define DEBUG
65 #endif
66
67 static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
68 {
69 return container_of((void *) oxu, struct usb_hcd, hcd_priv);
70 }
71
72 static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
73 {
74 return (struct oxu_hcd *) (hcd->hcd_priv);
75 }
76
77 /*
78 * Debug stuff
79 */
80
81 #undef OXU_URB_TRACE
82 #undef OXU_VERBOSE_DEBUG
83
84 #ifdef OXU_VERBOSE_DEBUG
85 #define oxu_vdbg oxu_dbg
86 #else
87 #define oxu_vdbg(oxu, fmt, args...) /* Nop */
88 #endif
89
90 #ifdef DEBUG
91
92 static int __attribute__((__unused__))
93 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
94 {
95 return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
96 label, label[0] ? " " : "", status,
97 (status & STS_ASS) ? " Async" : "",
98 (status & STS_PSS) ? " Periodic" : "",
99 (status & STS_RECL) ? " Recl" : "",
100 (status & STS_HALT) ? " Halt" : "",
101 (status & STS_IAA) ? " IAA" : "",
102 (status & STS_FATAL) ? " FATAL" : "",
103 (status & STS_FLR) ? " FLR" : "",
104 (status & STS_PCD) ? " PCD" : "",
105 (status & STS_ERR) ? " ERR" : "",
106 (status & STS_INT) ? " INT" : ""
107 );
108 }
109
110 static int __attribute__((__unused__))
111 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
112 {
113 return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
114 label, label[0] ? " " : "", enable,
115 (enable & STS_IAA) ? " IAA" : "",
116 (enable & STS_FATAL) ? " FATAL" : "",
117 (enable & STS_FLR) ? " FLR" : "",
118 (enable & STS_PCD) ? " PCD" : "",
119 (enable & STS_ERR) ? " ERR" : "",
120 (enable & STS_INT) ? " INT" : ""
121 );
122 }
123
124 static const char *const fls_strings[] =
125 { "1024", "512", "256", "??" };
126
127 static int dbg_command_buf(char *buf, unsigned len,
128 const char *label, u32 command)
129 {
130 return scnprintf(buf, len,
131 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
132 label, label[0] ? " " : "", command,
133 (command & CMD_PARK) ? "park" : "(park)",
134 CMD_PARK_CNT(command),
135 (command >> 16) & 0x3f,
136 (command & CMD_LRESET) ? " LReset" : "",
137 (command & CMD_IAAD) ? " IAAD" : "",
138 (command & CMD_ASE) ? " Async" : "",
139 (command & CMD_PSE) ? " Periodic" : "",
140 fls_strings[(command >> 2) & 0x3],
141 (command & CMD_RESET) ? " Reset" : "",
142 (command & CMD_RUN) ? "RUN" : "HALT"
143 );
144 }
145
146 static int dbg_port_buf(char *buf, unsigned len, const char *label,
147 int port, u32 status)
148 {
149 char *sig;
150
151 /* signaling state */
152 switch (status & (3 << 10)) {
153 case 0 << 10:
154 sig = "se0";
155 break;
156 case 1 << 10:
157 sig = "k"; /* low speed */
158 break;
159 case 2 << 10:
160 sig = "j";
161 break;
162 default:
163 sig = "?";
164 break;
165 }
166
167 return scnprintf(buf, len,
168 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
169 label, label[0] ? " " : "", port, status,
170 (status & PORT_POWER) ? " POWER" : "",
171 (status & PORT_OWNER) ? " OWNER" : "",
172 sig,
173 (status & PORT_RESET) ? " RESET" : "",
174 (status & PORT_SUSPEND) ? " SUSPEND" : "",
175 (status & PORT_RESUME) ? " RESUME" : "",
176 (status & PORT_OCC) ? " OCC" : "",
177 (status & PORT_OC) ? " OC" : "",
178 (status & PORT_PEC) ? " PEC" : "",
179 (status & PORT_PE) ? " PE" : "",
180 (status & PORT_CSC) ? " CSC" : "",
181 (status & PORT_CONNECT) ? " CONNECT" : ""
182 );
183 }
184
185 #else
186
187 static inline int __attribute__((__unused__))
188 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
189 { return 0; }
190
191 static inline int __attribute__((__unused__))
192 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
193 { return 0; }
194
195 static inline int __attribute__((__unused__))
196 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
197 { return 0; }
198
199 static inline int __attribute__((__unused__))
200 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
201 { return 0; }
202
203 #endif /* DEBUG */
204
205 /* functions have the "wrong" filename when they're output... */
206 #define dbg_status(oxu, label, status) { \
207 char _buf[80]; \
208 dbg_status_buf(_buf, sizeof _buf, label, status); \
209 oxu_dbg(oxu, "%s\n", _buf); \
210 }
211
212 #define dbg_cmd(oxu, label, command) { \
213 char _buf[80]; \
214 dbg_command_buf(_buf, sizeof _buf, label, command); \
215 oxu_dbg(oxu, "%s\n", _buf); \
216 }
217
218 #define dbg_port(oxu, label, port, status) { \
219 char _buf[80]; \
220 dbg_port_buf(_buf, sizeof _buf, label, port, status); \
221 oxu_dbg(oxu, "%s\n", _buf); \
222 }
223
224 /*
225 * Module parameters
226 */
227
228 /* Initial IRQ latency: faster than hw default */
229 static int log2_irq_thresh; /* 0 to 6 */
230 module_param(log2_irq_thresh, int, S_IRUGO);
231 MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
232
233 /* Initial park setting: slower than hw default */
234 static unsigned park;
235 module_param(park, uint, S_IRUGO);
236 MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
237
238 /* For flakey hardware, ignore overcurrent indicators */
239 static bool ignore_oc;
240 module_param(ignore_oc, bool, S_IRUGO);
241 MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
242
243
244 static void ehci_work(struct oxu_hcd *oxu);
245 static int oxu_hub_control(struct usb_hcd *hcd,
246 u16 typeReq, u16 wValue, u16 wIndex,
247 char *buf, u16 wLength);
248
249 /*
250 * Local functions
251 */
252
253 /* Low level read/write registers functions */
254 static inline u32 oxu_readl(void *base, u32 reg)
255 {
256 return readl(base + reg);
257 }
258
259 static inline void oxu_writel(void *base, u32 reg, u32 val)
260 {
261 writel(val, base + reg);
262 }
263
264 static inline void timer_action_done(struct oxu_hcd *oxu,
265 enum ehci_timer_action action)
266 {
267 clear_bit(action, &oxu->actions);
268 }
269
270 static inline void timer_action(struct oxu_hcd *oxu,
271 enum ehci_timer_action action)
272 {
273 if (!test_and_set_bit(action, &oxu->actions)) {
274 unsigned long t;
275
276 switch (action) {
277 case TIMER_IAA_WATCHDOG:
278 t = EHCI_IAA_JIFFIES;
279 break;
280 case TIMER_IO_WATCHDOG:
281 t = EHCI_IO_JIFFIES;
282 break;
283 case TIMER_ASYNC_OFF:
284 t = EHCI_ASYNC_JIFFIES;
285 break;
286 case TIMER_ASYNC_SHRINK:
287 default:
288 t = EHCI_SHRINK_JIFFIES;
289 break;
290 }
291 t += jiffies;
292 /* all timings except IAA watchdog can be overridden.
293 * async queue SHRINK often precedes IAA. while it's ready
294 * to go OFF neither can matter, and afterwards the IO
295 * watchdog stops unless there's still periodic traffic.
296 */
297 if (action != TIMER_IAA_WATCHDOG
298 && t > oxu->watchdog.expires
299 && timer_pending(&oxu->watchdog))
300 return;
301 mod_timer(&oxu->watchdog, t);
302 }
303 }
304
305 /*
306 * handshake - spin reading hc until handshake completes or fails
307 * @ptr: address of hc register to be read
308 * @mask: bits to look at in result of read
309 * @done: value of those bits when handshake succeeds
310 * @usec: timeout in microseconds
311 *
312 * Returns negative errno, or zero on success
313 *
314 * Success happens when the "mask" bits have the specified value (hardware
315 * handshake done). There are two failure modes: "usec" have passed (major
316 * hardware flakeout), or the register reads as all-ones (hardware removed).
317 *
318 * That last failure should_only happen in cases like physical cardbus eject
319 * before driver shutdown. But it also seems to be caused by bugs in cardbus
320 * bridge shutdown: shutting down the bridge before the devices using it.
321 */
322 static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
323 u32 mask, u32 done, int usec)
324 {
325 u32 result;
326
327 do {
328 result = readl(ptr);
329 if (result == ~(u32)0) /* card removed */
330 return -ENODEV;
331 result &= mask;
332 if (result == done)
333 return 0;
334 udelay(1);
335 usec--;
336 } while (usec > 0);
337 return -ETIMEDOUT;
338 }
339
340 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
341 static int ehci_halt(struct oxu_hcd *oxu)
342 {
343 u32 temp = readl(&oxu->regs->status);
344
345 /* disable any irqs left enabled by previous code */
346 writel(0, &oxu->regs->intr_enable);
347
348 if ((temp & STS_HALT) != 0)
349 return 0;
350
351 temp = readl(&oxu->regs->command);
352 temp &= ~CMD_RUN;
353 writel(temp, &oxu->regs->command);
354 return handshake(oxu, &oxu->regs->status,
355 STS_HALT, STS_HALT, 16 * 125);
356 }
357
358 /* Put TDI/ARC silicon into EHCI mode */
359 static void tdi_reset(struct oxu_hcd *oxu)
360 {
361 u32 __iomem *reg_ptr;
362 u32 tmp;
363
364 reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
365 tmp = readl(reg_ptr);
366 tmp |= 0x3;
367 writel(tmp, reg_ptr);
368 }
369
370 /* Reset a non-running (STS_HALT == 1) controller */
371 static int ehci_reset(struct oxu_hcd *oxu)
372 {
373 int retval;
374 u32 command = readl(&oxu->regs->command);
375
376 command |= CMD_RESET;
377 dbg_cmd(oxu, "reset", command);
378 writel(command, &oxu->regs->command);
379 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
380 oxu->next_statechange = jiffies;
381 retval = handshake(oxu, &oxu->regs->command,
382 CMD_RESET, 0, 250 * 1000);
383
384 if (retval)
385 return retval;
386
387 tdi_reset(oxu);
388
389 return retval;
390 }
391
392 /* Idle the controller (from running) */
393 static void ehci_quiesce(struct oxu_hcd *oxu)
394 {
395 u32 temp;
396
397 #ifdef DEBUG
398 BUG_ON(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state));
399 #endif
400
401 /* wait for any schedule enables/disables to take effect */
402 temp = readl(&oxu->regs->command) << 10;
403 temp &= STS_ASS | STS_PSS;
404 if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
405 temp, 16 * 125) != 0) {
406 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
407 return;
408 }
409
410 /* then disable anything that's still active */
411 temp = readl(&oxu->regs->command);
412 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
413 writel(temp, &oxu->regs->command);
414
415 /* hardware can take 16 microframes to turn off ... */
416 if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
417 0, 16 * 125) != 0) {
418 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
419 return;
420 }
421 }
422
423 static int check_reset_complete(struct oxu_hcd *oxu, int index,
424 u32 __iomem *status_reg, int port_status)
425 {
426 if (!(port_status & PORT_CONNECT)) {
427 oxu->reset_done[index] = 0;
428 return port_status;
429 }
430
431 /* if reset finished and it's still not enabled -- handoff */
432 if (!(port_status & PORT_PE)) {
433 oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
434 index+1);
435 return port_status;
436 } else
437 oxu_dbg(oxu, "port %d high speed\n", index + 1);
438
439 return port_status;
440 }
441
442 static void ehci_hub_descriptor(struct oxu_hcd *oxu,
443 struct usb_hub_descriptor *desc)
444 {
445 int ports = HCS_N_PORTS(oxu->hcs_params);
446 u16 temp;
447
448 desc->bDescriptorType = USB_DT_HUB;
449 desc->bPwrOn2PwrGood = 10; /* oxu 1.0, 2.3.9 says 20ms max */
450 desc->bHubContrCurrent = 0;
451
452 desc->bNbrPorts = ports;
453 temp = 1 + (ports / 8);
454 desc->bDescLength = 7 + 2 * temp;
455
456 /* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
457 memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
458 memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
459
460 temp = HUB_CHAR_INDV_PORT_OCPM; /* per-port overcurrent reporting */
461 if (HCS_PPC(oxu->hcs_params))
462 temp |= HUB_CHAR_INDV_PORT_LPSM; /* per-port power control */
463 else
464 temp |= HUB_CHAR_NO_LPSM; /* no power switching */
465 desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
466 }
467
468
469 /* Allocate an OXU210HP on-chip memory data buffer
470 *
471 * An on-chip memory data buffer is required for each OXU210HP USB transfer.
472 * Each transfer descriptor has one or more on-chip memory data buffers.
473 *
474 * Data buffers are allocated from a fix sized pool of data blocks.
475 * To minimise fragmentation and give reasonable memory utlisation,
476 * data buffers are allocated with sizes the power of 2 multiples of
477 * the block size, starting on an address a multiple of the allocated size.
478 *
479 * FIXME: callers of this function require a buffer to be allocated for
480 * len=0. This is a waste of on-chip memory and should be fix. Then this
481 * function should be changed to not allocate a buffer for len=0.
482 */
483 static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
484 {
485 int n_blocks; /* minium blocks needed to hold len */
486 int a_blocks; /* blocks allocated */
487 int i, j;
488
489 /* Don't allocte bigger than supported */
490 if (len > BUFFER_SIZE * BUFFER_NUM) {
491 oxu_err(oxu, "buffer too big (%d)\n", len);
492 return -ENOMEM;
493 }
494
495 spin_lock(&oxu->mem_lock);
496
497 /* Number of blocks needed to hold len */
498 n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
499
500 /* Round the number of blocks up to the power of 2 */
501 for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
502 ;
503
504 /* Find a suitable available data buffer */
505 for (i = 0; i < BUFFER_NUM;
506 i += max(a_blocks, (int)oxu->db_used[i])) {
507
508 /* Check all the required blocks are available */
509 for (j = 0; j < a_blocks; j++)
510 if (oxu->db_used[i + j])
511 break;
512
513 if (j != a_blocks)
514 continue;
515
516 /* Allocate blocks found! */
517 qtd->buffer = (void *) &oxu->mem->db_pool[i];
518 qtd->buffer_dma = virt_to_phys(qtd->buffer);
519
520 qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
521 oxu->db_used[i] = a_blocks;
522
523 spin_unlock(&oxu->mem_lock);
524
525 return 0;
526 }
527
528 /* Failed */
529
530 spin_unlock(&oxu->mem_lock);
531
532 return -ENOMEM;
533 }
534
535 static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
536 {
537 int index;
538
539 spin_lock(&oxu->mem_lock);
540
541 index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
542 / BUFFER_SIZE;
543 oxu->db_used[index] = 0;
544 qtd->qtd_buffer_len = 0;
545 qtd->buffer_dma = 0;
546 qtd->buffer = NULL;
547
548 spin_unlock(&oxu->mem_lock);
549 }
550
551 static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
552 {
553 memset(qtd, 0, sizeof *qtd);
554 qtd->qtd_dma = dma;
555 qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
556 qtd->hw_next = EHCI_LIST_END;
557 qtd->hw_alt_next = EHCI_LIST_END;
558 INIT_LIST_HEAD(&qtd->qtd_list);
559 }
560
561 static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
562 {
563 int index;
564
565 if (qtd->buffer)
566 oxu_buf_free(oxu, qtd);
567
568 spin_lock(&oxu->mem_lock);
569
570 index = qtd - &oxu->mem->qtd_pool[0];
571 oxu->qtd_used[index] = 0;
572
573 spin_unlock(&oxu->mem_lock);
574 }
575
576 static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
577 {
578 int i;
579 struct ehci_qtd *qtd = NULL;
580
581 spin_lock(&oxu->mem_lock);
582
583 for (i = 0; i < QTD_NUM; i++)
584 if (!oxu->qtd_used[i])
585 break;
586
587 if (i < QTD_NUM) {
588 qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
589 memset(qtd, 0, sizeof *qtd);
590
591 qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
592 qtd->hw_next = EHCI_LIST_END;
593 qtd->hw_alt_next = EHCI_LIST_END;
594 INIT_LIST_HEAD(&qtd->qtd_list);
595
596 qtd->qtd_dma = virt_to_phys(qtd);
597
598 oxu->qtd_used[i] = 1;
599 }
600
601 spin_unlock(&oxu->mem_lock);
602
603 return qtd;
604 }
605
606 static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
607 {
608 int index;
609
610 spin_lock(&oxu->mem_lock);
611
612 index = qh - &oxu->mem->qh_pool[0];
613 oxu->qh_used[index] = 0;
614
615 spin_unlock(&oxu->mem_lock);
616 }
617
618 static void qh_destroy(struct kref *kref)
619 {
620 struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
621 struct oxu_hcd *oxu = qh->oxu;
622
623 /* clean qtds first, and know this is not linked */
624 if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
625 oxu_dbg(oxu, "unused qh not empty!\n");
626 BUG();
627 }
628 if (qh->dummy)
629 oxu_qtd_free(oxu, qh->dummy);
630 oxu_qh_free(oxu, qh);
631 }
632
633 static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
634 {
635 int i;
636 struct ehci_qh *qh = NULL;
637
638 spin_lock(&oxu->mem_lock);
639
640 for (i = 0; i < QHEAD_NUM; i++)
641 if (!oxu->qh_used[i])
642 break;
643
644 if (i < QHEAD_NUM) {
645 qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
646 memset(qh, 0, sizeof *qh);
647
648 kref_init(&qh->kref);
649 qh->oxu = oxu;
650 qh->qh_dma = virt_to_phys(qh);
651 INIT_LIST_HEAD(&qh->qtd_list);
652
653 /* dummy td enables safe urb queuing */
654 qh->dummy = ehci_qtd_alloc(oxu);
655 if (qh->dummy == NULL) {
656 oxu_dbg(oxu, "no dummy td\n");
657 oxu->qh_used[i] = 0;
658 qh = NULL;
659 goto unlock;
660 }
661
662 oxu->qh_used[i] = 1;
663 }
664 unlock:
665 spin_unlock(&oxu->mem_lock);
666
667 return qh;
668 }
669
670 /* to share a qh (cpu threads, or hc) */
671 static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
672 {
673 kref_get(&qh->kref);
674 return qh;
675 }
676
677 static inline void qh_put(struct ehci_qh *qh)
678 {
679 kref_put(&qh->kref, qh_destroy);
680 }
681
682 static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
683 {
684 int index;
685
686 spin_lock(&oxu->mem_lock);
687
688 index = murb - &oxu->murb_pool[0];
689 oxu->murb_used[index] = 0;
690
691 spin_unlock(&oxu->mem_lock);
692 }
693
694 static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
695
696 {
697 int i;
698 struct oxu_murb *murb = NULL;
699
700 spin_lock(&oxu->mem_lock);
701
702 for (i = 0; i < MURB_NUM; i++)
703 if (!oxu->murb_used[i])
704 break;
705
706 if (i < MURB_NUM) {
707 murb = &(oxu->murb_pool)[i];
708
709 oxu->murb_used[i] = 1;
710 }
711
712 spin_unlock(&oxu->mem_lock);
713
714 return murb;
715 }
716
717 /* The queue heads and transfer descriptors are managed from pools tied
718 * to each of the "per device" structures.
719 * This is the initialisation and cleanup code.
720 */
721 static void ehci_mem_cleanup(struct oxu_hcd *oxu)
722 {
723 kfree(oxu->murb_pool);
724 oxu->murb_pool = NULL;
725
726 if (oxu->async)
727 qh_put(oxu->async);
728 oxu->async = NULL;
729
730 del_timer(&oxu->urb_timer);
731
732 oxu->periodic = NULL;
733
734 /* shadow periodic table */
735 kfree(oxu->pshadow);
736 oxu->pshadow = NULL;
737 }
738
739 /* Remember to add cleanup code (above) if you add anything here.
740 */
741 static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
742 {
743 int i;
744
745 for (i = 0; i < oxu->periodic_size; i++)
746 oxu->mem->frame_list[i] = EHCI_LIST_END;
747 for (i = 0; i < QHEAD_NUM; i++)
748 oxu->qh_used[i] = 0;
749 for (i = 0; i < QTD_NUM; i++)
750 oxu->qtd_used[i] = 0;
751
752 oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
753 if (!oxu->murb_pool)
754 goto fail;
755
756 for (i = 0; i < MURB_NUM; i++)
757 oxu->murb_used[i] = 0;
758
759 oxu->async = oxu_qh_alloc(oxu);
760 if (!oxu->async)
761 goto fail;
762
763 oxu->periodic = (__le32 *) &oxu->mem->frame_list;
764 oxu->periodic_dma = virt_to_phys(oxu->periodic);
765
766 for (i = 0; i < oxu->periodic_size; i++)
767 oxu->periodic[i] = EHCI_LIST_END;
768
769 /* software shadow of hardware table */
770 oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
771 if (oxu->pshadow != NULL)
772 return 0;
773
774 fail:
775 oxu_dbg(oxu, "couldn't init memory\n");
776 ehci_mem_cleanup(oxu);
777 return -ENOMEM;
778 }
779
780 /* Fill a qtd, returning how much of the buffer we were able to queue up.
781 */
782 static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
783 int token, int maxpacket)
784 {
785 int i, count;
786 u64 addr = buf;
787
788 /* one buffer entry per 4K ... first might be short or unaligned */
789 qtd->hw_buf[0] = cpu_to_le32((u32)addr);
790 qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
791 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
792 if (likely(len < count)) /* ... iff needed */
793 count = len;
794 else {
795 buf += 0x1000;
796 buf &= ~0x0fff;
797
798 /* per-qtd limit: from 16K to 20K (best alignment) */
799 for (i = 1; count < len && i < 5; i++) {
800 addr = buf;
801 qtd->hw_buf[i] = cpu_to_le32((u32)addr);
802 qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
803 buf += 0x1000;
804 if ((count + 0x1000) < len)
805 count += 0x1000;
806 else
807 count = len;
808 }
809
810 /* short packets may only terminate transfers */
811 if (count != len)
812 count -= (count % maxpacket);
813 }
814 qtd->hw_token = cpu_to_le32((count << 16) | token);
815 qtd->length = count;
816
817 return count;
818 }
819
820 static inline void qh_update(struct oxu_hcd *oxu,
821 struct ehci_qh *qh, struct ehci_qtd *qtd)
822 {
823 /* writes to an active overlay are unsafe */
824 BUG_ON(qh->qh_state != QH_STATE_IDLE);
825
826 qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
827 qh->hw_alt_next = EHCI_LIST_END;
828
829 /* Except for control endpoints, we make hardware maintain data
830 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
831 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
832 * ever clear it.
833 */
834 if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
835 unsigned is_out, epnum;
836
837 is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
838 epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
839 if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
840 qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
841 usb_settoggle(qh->dev, epnum, is_out, 1);
842 }
843 }
844
845 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
846 wmb();
847 qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
848 }
849
850 /* If it weren't for a common silicon quirk (writing the dummy into the qh
851 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
852 * recovery (including urb dequeue) would need software changes to a QH...
853 */
854 static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
855 {
856 struct ehci_qtd *qtd;
857
858 if (list_empty(&qh->qtd_list))
859 qtd = qh->dummy;
860 else {
861 qtd = list_entry(qh->qtd_list.next,
862 struct ehci_qtd, qtd_list);
863 /* first qtd may already be partially processed */
864 if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
865 qtd = NULL;
866 }
867
868 if (qtd)
869 qh_update(oxu, qh, qtd);
870 }
871
872 static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
873 size_t length, u32 token)
874 {
875 /* count IN/OUT bytes, not SETUP (even short packets) */
876 if (likely(QTD_PID(token) != 2))
877 urb->actual_length += length - QTD_LENGTH(token);
878
879 /* don't modify error codes */
880 if (unlikely(urb->status != -EINPROGRESS))
881 return;
882
883 /* force cleanup after short read; not always an error */
884 if (unlikely(IS_SHORT_READ(token)))
885 urb->status = -EREMOTEIO;
886
887 /* serious "can't proceed" faults reported by the hardware */
888 if (token & QTD_STS_HALT) {
889 if (token & QTD_STS_BABBLE) {
890 /* FIXME "must" disable babbling device's port too */
891 urb->status = -EOVERFLOW;
892 } else if (token & QTD_STS_MMF) {
893 /* fs/ls interrupt xfer missed the complete-split */
894 urb->status = -EPROTO;
895 } else if (token & QTD_STS_DBE) {
896 urb->status = (QTD_PID(token) == 1) /* IN ? */
897 ? -ENOSR /* hc couldn't read data */
898 : -ECOMM; /* hc couldn't write data */
899 } else if (token & QTD_STS_XACT) {
900 /* timeout, bad crc, wrong PID, etc; retried */
901 if (QTD_CERR(token))
902 urb->status = -EPIPE;
903 else {
904 oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
905 urb->dev->devpath,
906 usb_pipeendpoint(urb->pipe),
907 usb_pipein(urb->pipe) ? "in" : "out");
908 urb->status = -EPROTO;
909 }
910 /* CERR nonzero + no errors + halt --> stall */
911 } else if (QTD_CERR(token))
912 urb->status = -EPIPE;
913 else /* unknown */
914 urb->status = -EPROTO;
915
916 oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
917 usb_pipedevice(urb->pipe),
918 usb_pipeendpoint(urb->pipe),
919 usb_pipein(urb->pipe) ? "in" : "out",
920 token, urb->status);
921 }
922 }
923
924 static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
925 __releases(oxu->lock)
926 __acquires(oxu->lock)
927 {
928 if (likely(urb->hcpriv != NULL)) {
929 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
930
931 /* S-mask in a QH means it's an interrupt urb */
932 if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
933
934 /* ... update hc-wide periodic stats (for usbfs) */
935 oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
936 }
937 qh_put(qh);
938 }
939
940 urb->hcpriv = NULL;
941 switch (urb->status) {
942 case -EINPROGRESS: /* success */
943 urb->status = 0;
944 default: /* fault */
945 break;
946 case -EREMOTEIO: /* fault or normal */
947 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
948 urb->status = 0;
949 break;
950 case -ECONNRESET: /* canceled */
951 case -ENOENT:
952 break;
953 }
954
955 #ifdef OXU_URB_TRACE
956 oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
957 __func__, urb->dev->devpath, urb,
958 usb_pipeendpoint(urb->pipe),
959 usb_pipein(urb->pipe) ? "in" : "out",
960 urb->status,
961 urb->actual_length, urb->transfer_buffer_length);
962 #endif
963
964 /* complete() can reenter this HCD */
965 spin_unlock(&oxu->lock);
966 usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
967 spin_lock(&oxu->lock);
968 }
969
970 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
971 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
972
973 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
974 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
975
976 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
977
978 /* Process and free completed qtds for a qh, returning URBs to drivers.
979 * Chases up to qh->hw_current. Returns number of completions called,
980 * indicating how much "real" work we did.
981 */
982 static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
983 {
984 struct ehci_qtd *last = NULL, *end = qh->dummy;
985 struct ehci_qtd *qtd, *tmp;
986 int stopped;
987 unsigned count = 0;
988 int do_status = 0;
989 u8 state;
990 struct oxu_murb *murb = NULL;
991
992 if (unlikely(list_empty(&qh->qtd_list)))
993 return count;
994
995 /* completions (or tasks on other cpus) must never clobber HALT
996 * till we've gone through and cleaned everything up, even when
997 * they add urbs to this qh's queue or mark them for unlinking.
998 *
999 * NOTE: unlinking expects to be done in queue order.
1000 */
1001 state = qh->qh_state;
1002 qh->qh_state = QH_STATE_COMPLETING;
1003 stopped = (state == QH_STATE_IDLE);
1004
1005 /* remove de-activated QTDs from front of queue.
1006 * after faults (including short reads), cleanup this urb
1007 * then let the queue advance.
1008 * if queue is stopped, handles unlinks.
1009 */
1010 list_for_each_entry_safe(qtd, tmp, &qh->qtd_list, qtd_list) {
1011 struct urb *urb;
1012 u32 token = 0;
1013
1014 urb = qtd->urb;
1015
1016 /* Clean up any state from previous QTD ...*/
1017 if (last) {
1018 if (likely(last->urb != urb)) {
1019 if (last->urb->complete == NULL) {
1020 murb = (struct oxu_murb *) last->urb;
1021 last->urb = murb->main;
1022 if (murb->last) {
1023 ehci_urb_done(oxu, last->urb);
1024 count++;
1025 }
1026 oxu_murb_free(oxu, murb);
1027 } else {
1028 ehci_urb_done(oxu, last->urb);
1029 count++;
1030 }
1031 }
1032 oxu_qtd_free(oxu, last);
1033 last = NULL;
1034 }
1035
1036 /* ignore urbs submitted during completions we reported */
1037 if (qtd == end)
1038 break;
1039
1040 /* hardware copies qtd out of qh overlay */
1041 rmb();
1042 token = le32_to_cpu(qtd->hw_token);
1043
1044 /* always clean up qtds the hc de-activated */
1045 if ((token & QTD_STS_ACTIVE) == 0) {
1046
1047 if ((token & QTD_STS_HALT) != 0) {
1048 stopped = 1;
1049
1050 /* magic dummy for some short reads; qh won't advance.
1051 * that silicon quirk can kick in with this dummy too.
1052 */
1053 } else if (IS_SHORT_READ(token) &&
1054 !(qtd->hw_alt_next & EHCI_LIST_END)) {
1055 stopped = 1;
1056 goto halt;
1057 }
1058
1059 /* stop scanning when we reach qtds the hc is using */
1060 } else if (likely(!stopped &&
1061 HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1062 break;
1063
1064 } else {
1065 stopped = 1;
1066
1067 if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1068 urb->status = -ESHUTDOWN;
1069
1070 /* ignore active urbs unless some previous qtd
1071 * for the urb faulted (including short read) or
1072 * its urb was canceled. we may patch qh or qtds.
1073 */
1074 if (likely(urb->status == -EINPROGRESS))
1075 continue;
1076
1077 /* issue status after short control reads */
1078 if (unlikely(do_status != 0)
1079 && QTD_PID(token) == 0 /* OUT */) {
1080 do_status = 0;
1081 continue;
1082 }
1083
1084 /* token in overlay may be most current */
1085 if (state == QH_STATE_IDLE
1086 && cpu_to_le32(qtd->qtd_dma)
1087 == qh->hw_current)
1088 token = le32_to_cpu(qh->hw_token);
1089
1090 /* force halt for unlinked or blocked qh, so we'll
1091 * patch the qh later and so that completions can't
1092 * activate it while we "know" it's stopped.
1093 */
1094 if ((HALT_BIT & qh->hw_token) == 0) {
1095 halt:
1096 qh->hw_token |= HALT_BIT;
1097 wmb();
1098 }
1099 }
1100
1101 /* Remove it from the queue */
1102 qtd_copy_status(oxu, urb->complete ?
1103 urb : ((struct oxu_murb *) urb)->main,
1104 qtd->length, token);
1105 if ((usb_pipein(qtd->urb->pipe)) &&
1106 (NULL != qtd->transfer_buffer))
1107 memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1108 do_status = (urb->status == -EREMOTEIO)
1109 && usb_pipecontrol(urb->pipe);
1110
1111 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1112 last = list_entry(qtd->qtd_list.prev,
1113 struct ehci_qtd, qtd_list);
1114 last->hw_next = qtd->hw_next;
1115 }
1116 list_del(&qtd->qtd_list);
1117 last = qtd;
1118 }
1119
1120 /* last urb's completion might still need calling */
1121 if (likely(last != NULL)) {
1122 if (last->urb->complete == NULL) {
1123 murb = (struct oxu_murb *) last->urb;
1124 last->urb = murb->main;
1125 if (murb->last) {
1126 ehci_urb_done(oxu, last->urb);
1127 count++;
1128 }
1129 oxu_murb_free(oxu, murb);
1130 } else {
1131 ehci_urb_done(oxu, last->urb);
1132 count++;
1133 }
1134 oxu_qtd_free(oxu, last);
1135 }
1136
1137 /* restore original state; caller must unlink or relink */
1138 qh->qh_state = state;
1139
1140 /* be sure the hardware's done with the qh before refreshing
1141 * it after fault cleanup, or recovering from silicon wrongly
1142 * overlaying the dummy qtd (which reduces DMA chatter).
1143 */
1144 if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1145 switch (state) {
1146 case QH_STATE_IDLE:
1147 qh_refresh(oxu, qh);
1148 break;
1149 case QH_STATE_LINKED:
1150 /* should be rare for periodic transfers,
1151 * except maybe high bandwidth ...
1152 */
1153 if ((cpu_to_le32(QH_SMASK)
1154 & qh->hw_info2) != 0) {
1155 intr_deschedule(oxu, qh);
1156 (void) qh_schedule(oxu, qh);
1157 } else
1158 unlink_async(oxu, qh);
1159 break;
1160 /* otherwise, unlink already started */
1161 }
1162 }
1163
1164 return count;
1165 }
1166
1167 /* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1168 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
1169 /* ... and packet size, for any kind of endpoint descriptor */
1170 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1171
1172 /* Reverse of qh_urb_transaction: free a list of TDs.
1173 * used for cleanup after errors, before HC sees an URB's TDs.
1174 */
1175 static void qtd_list_free(struct oxu_hcd *oxu,
1176 struct urb *urb, struct list_head *head)
1177 {
1178 struct ehci_qtd *qtd, *temp;
1179
1180 list_for_each_entry_safe(qtd, temp, head, qtd_list) {
1181 list_del(&qtd->qtd_list);
1182 oxu_qtd_free(oxu, qtd);
1183 }
1184 }
1185
1186 /* Create a list of filled qtds for this URB; won't link into qh.
1187 */
1188 static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1189 struct urb *urb,
1190 struct list_head *head,
1191 gfp_t flags)
1192 {
1193 struct ehci_qtd *qtd, *qtd_prev;
1194 dma_addr_t buf;
1195 int len, maxpacket;
1196 int is_input;
1197 u32 token;
1198 void *transfer_buf = NULL;
1199 int ret;
1200
1201 /*
1202 * URBs map to sequences of QTDs: one logical transaction
1203 */
1204 qtd = ehci_qtd_alloc(oxu);
1205 if (unlikely(!qtd))
1206 return NULL;
1207 list_add_tail(&qtd->qtd_list, head);
1208 qtd->urb = urb;
1209
1210 token = QTD_STS_ACTIVE;
1211 token |= (EHCI_TUNE_CERR << 10);
1212 /* for split transactions, SplitXState initialized to zero */
1213
1214 len = urb->transfer_buffer_length;
1215 is_input = usb_pipein(urb->pipe);
1216 if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1217 urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1218
1219 if (usb_pipecontrol(urb->pipe)) {
1220 /* SETUP pid */
1221 ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1222 if (ret)
1223 goto cleanup;
1224
1225 qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1226 token | (2 /* "setup" */ << 8), 8);
1227 memcpy(qtd->buffer, qtd->urb->setup_packet,
1228 sizeof(struct usb_ctrlrequest));
1229
1230 /* ... and always at least one more pid */
1231 token ^= QTD_TOGGLE;
1232 qtd_prev = qtd;
1233 qtd = ehci_qtd_alloc(oxu);
1234 if (unlikely(!qtd))
1235 goto cleanup;
1236 qtd->urb = urb;
1237 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1238 list_add_tail(&qtd->qtd_list, head);
1239
1240 /* for zero length DATA stages, STATUS is always IN */
1241 if (len == 0)
1242 token |= (1 /* "in" */ << 8);
1243 }
1244
1245 /*
1246 * Data transfer stage: buffer setup
1247 */
1248
1249 ret = oxu_buf_alloc(oxu, qtd, len);
1250 if (ret)
1251 goto cleanup;
1252
1253 buf = qtd->buffer_dma;
1254 transfer_buf = urb->transfer_buffer;
1255
1256 if (!is_input)
1257 memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1258
1259 if (is_input)
1260 token |= (1 /* "in" */ << 8);
1261 /* else it's already initted to "out" pid (0 << 8) */
1262
1263 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1264
1265 /*
1266 * buffer gets wrapped in one or more qtds;
1267 * last one may be "short" (including zero len)
1268 * and may serve as a control status ack
1269 */
1270 for (;;) {
1271 int this_qtd_len;
1272
1273 this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1274 qtd->transfer_buffer = transfer_buf;
1275 len -= this_qtd_len;
1276 buf += this_qtd_len;
1277 transfer_buf += this_qtd_len;
1278 if (is_input)
1279 qtd->hw_alt_next = oxu->async->hw_alt_next;
1280
1281 /* qh makes control packets use qtd toggle; maybe switch it */
1282 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1283 token ^= QTD_TOGGLE;
1284
1285 if (likely(len <= 0))
1286 break;
1287
1288 qtd_prev = qtd;
1289 qtd = ehci_qtd_alloc(oxu);
1290 if (unlikely(!qtd))
1291 goto cleanup;
1292 if (likely(len > 0)) {
1293 ret = oxu_buf_alloc(oxu, qtd, len);
1294 if (ret)
1295 goto cleanup;
1296 }
1297 qtd->urb = urb;
1298 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1299 list_add_tail(&qtd->qtd_list, head);
1300 }
1301
1302 /* unless the bulk/interrupt caller wants a chance to clean
1303 * up after short reads, hc should advance qh past this urb
1304 */
1305 if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1306 || usb_pipecontrol(urb->pipe)))
1307 qtd->hw_alt_next = EHCI_LIST_END;
1308
1309 /*
1310 * control requests may need a terminating data "status" ack;
1311 * bulk ones may need a terminating short packet (zero length).
1312 */
1313 if (likely(urb->transfer_buffer_length != 0)) {
1314 int one_more = 0;
1315
1316 if (usb_pipecontrol(urb->pipe)) {
1317 one_more = 1;
1318 token ^= 0x0100; /* "in" <--> "out" */
1319 token |= QTD_TOGGLE; /* force DATA1 */
1320 } else if (usb_pipebulk(urb->pipe)
1321 && (urb->transfer_flags & URB_ZERO_PACKET)
1322 && !(urb->transfer_buffer_length % maxpacket)) {
1323 one_more = 1;
1324 }
1325 if (one_more) {
1326 qtd_prev = qtd;
1327 qtd = ehci_qtd_alloc(oxu);
1328 if (unlikely(!qtd))
1329 goto cleanup;
1330 qtd->urb = urb;
1331 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1332 list_add_tail(&qtd->qtd_list, head);
1333
1334 /* never any data in such packets */
1335 qtd_fill(qtd, 0, 0, token, 0);
1336 }
1337 }
1338
1339 /* by default, enable interrupt on urb completion */
1340 qtd->hw_token |= cpu_to_le32(QTD_IOC);
1341 return head;
1342
1343 cleanup:
1344 qtd_list_free(oxu, urb, head);
1345 return NULL;
1346 }
1347
1348 /* Each QH holds a qtd list; a QH is used for everything except iso.
1349 *
1350 * For interrupt urbs, the scheduler must set the microframe scheduling
1351 * mask(s) each time the QH gets scheduled. For highspeed, that's
1352 * just one microframe in the s-mask. For split interrupt transactions
1353 * there are additional complications: c-mask, maybe FSTNs.
1354 */
1355 static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1356 struct urb *urb, gfp_t flags)
1357 {
1358 struct ehci_qh *qh = oxu_qh_alloc(oxu);
1359 u32 info1 = 0, info2 = 0;
1360 int is_input, type;
1361 int maxp = 0;
1362
1363 if (!qh)
1364 return qh;
1365
1366 /*
1367 * init endpoint/device data for this QH
1368 */
1369 info1 |= usb_pipeendpoint(urb->pipe) << 8;
1370 info1 |= usb_pipedevice(urb->pipe) << 0;
1371
1372 is_input = usb_pipein(urb->pipe);
1373 type = usb_pipetype(urb->pipe);
1374 maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input);
1375
1376 /* Compute interrupt scheduling parameters just once, and save.
1377 * - allowing for high bandwidth, how many nsec/uframe are used?
1378 * - split transactions need a second CSPLIT uframe; same question
1379 * - splits also need a schedule gap (for full/low speed I/O)
1380 * - qh has a polling interval
1381 *
1382 * For control/bulk requests, the HC or TT handles these.
1383 */
1384 if (type == PIPE_INTERRUPT) {
1385 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1386 is_input, 0,
1387 hb_mult(maxp) * max_packet(maxp)));
1388 qh->start = NO_FRAME;
1389
1390 if (urb->dev->speed == USB_SPEED_HIGH) {
1391 qh->c_usecs = 0;
1392 qh->gap_uf = 0;
1393
1394 qh->period = urb->interval >> 3;
1395 if (qh->period == 0 && urb->interval != 1) {
1396 /* NOTE interval 2 or 4 uframes could work.
1397 * But interval 1 scheduling is simpler, and
1398 * includes high bandwidth.
1399 */
1400 oxu_dbg(oxu, "intr period %d uframes, NYET!\n",
1401 urb->interval);
1402 goto done;
1403 }
1404 } else {
1405 struct usb_tt *tt = urb->dev->tt;
1406 int think_time;
1407
1408 /* gap is f(FS/LS transfer times) */
1409 qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1410 is_input, 0, maxp) / (125 * 1000);
1411
1412 /* FIXME this just approximates SPLIT/CSPLIT times */
1413 if (is_input) { /* SPLIT, gap, CSPLIT+DATA */
1414 qh->c_usecs = qh->usecs + HS_USECS(0);
1415 qh->usecs = HS_USECS(1);
1416 } else { /* SPLIT+DATA, gap, CSPLIT */
1417 qh->usecs += HS_USECS(1);
1418 qh->c_usecs = HS_USECS(0);
1419 }
1420
1421 think_time = tt ? tt->think_time : 0;
1422 qh->tt_usecs = NS_TO_US(think_time +
1423 usb_calc_bus_time(urb->dev->speed,
1424 is_input, 0, max_packet(maxp)));
1425 qh->period = urb->interval;
1426 }
1427 }
1428
1429 /* support for tt scheduling, and access to toggles */
1430 qh->dev = urb->dev;
1431
1432 /* using TT? */
1433 switch (urb->dev->speed) {
1434 case USB_SPEED_LOW:
1435 info1 |= (1 << 12); /* EPS "low" */
1436 /* FALL THROUGH */
1437
1438 case USB_SPEED_FULL:
1439 /* EPS 0 means "full" */
1440 if (type != PIPE_INTERRUPT)
1441 info1 |= (EHCI_TUNE_RL_TT << 28);
1442 if (type == PIPE_CONTROL) {
1443 info1 |= (1 << 27); /* for TT */
1444 info1 |= 1 << 14; /* toggle from qtd */
1445 }
1446 info1 |= maxp << 16;
1447
1448 info2 |= (EHCI_TUNE_MULT_TT << 30);
1449 info2 |= urb->dev->ttport << 23;
1450
1451 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1452
1453 break;
1454
1455 case USB_SPEED_HIGH: /* no TT involved */
1456 info1 |= (2 << 12); /* EPS "high" */
1457 if (type == PIPE_CONTROL) {
1458 info1 |= (EHCI_TUNE_RL_HS << 28);
1459 info1 |= 64 << 16; /* usb2 fixed maxpacket */
1460 info1 |= 1 << 14; /* toggle from qtd */
1461 info2 |= (EHCI_TUNE_MULT_HS << 30);
1462 } else if (type == PIPE_BULK) {
1463 info1 |= (EHCI_TUNE_RL_HS << 28);
1464 info1 |= 512 << 16; /* usb2 fixed maxpacket */
1465 info2 |= (EHCI_TUNE_MULT_HS << 30);
1466 } else { /* PIPE_INTERRUPT */
1467 info1 |= max_packet(maxp) << 16;
1468 info2 |= hb_mult(maxp) << 30;
1469 }
1470 break;
1471 default:
1472 oxu_dbg(oxu, "bogus dev %p speed %d\n", urb->dev, urb->dev->speed);
1473 done:
1474 qh_put(qh);
1475 return NULL;
1476 }
1477
1478 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1479
1480 /* init as live, toggle clear, advance to dummy */
1481 qh->qh_state = QH_STATE_IDLE;
1482 qh->hw_info1 = cpu_to_le32(info1);
1483 qh->hw_info2 = cpu_to_le32(info2);
1484 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1485 qh_refresh(oxu, qh);
1486 return qh;
1487 }
1488
1489 /* Move qh (and its qtds) onto async queue; maybe enable queue.
1490 */
1491 static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1492 {
1493 __le32 dma = QH_NEXT(qh->qh_dma);
1494 struct ehci_qh *head;
1495
1496 /* (re)start the async schedule? */
1497 head = oxu->async;
1498 timer_action_done(oxu, TIMER_ASYNC_OFF);
1499 if (!head->qh_next.qh) {
1500 u32 cmd = readl(&oxu->regs->command);
1501
1502 if (!(cmd & CMD_ASE)) {
1503 /* in case a clear of CMD_ASE didn't take yet */
1504 (void)handshake(oxu, &oxu->regs->status,
1505 STS_ASS, 0, 150);
1506 cmd |= CMD_ASE | CMD_RUN;
1507 writel(cmd, &oxu->regs->command);
1508 oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1509 /* posted write need not be known to HC yet ... */
1510 }
1511 }
1512
1513 /* clear halt and/or toggle; and maybe recover from silicon quirk */
1514 if (qh->qh_state == QH_STATE_IDLE)
1515 qh_refresh(oxu, qh);
1516
1517 /* splice right after start */
1518 qh->qh_next = head->qh_next;
1519 qh->hw_next = head->hw_next;
1520 wmb();
1521
1522 head->qh_next.qh = qh;
1523 head->hw_next = dma;
1524
1525 qh->qh_state = QH_STATE_LINKED;
1526 /* qtd completions reported later by interrupt */
1527 }
1528
1529 #define QH_ADDR_MASK cpu_to_le32(0x7f)
1530
1531 /*
1532 * For control/bulk/interrupt, return QH with these TDs appended.
1533 * Allocates and initializes the QH if necessary.
1534 * Returns null if it can't allocate a QH it needs to.
1535 * If the QH has TDs (urbs) already, that's great.
1536 */
1537 static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1538 struct urb *urb, struct list_head *qtd_list,
1539 int epnum, void **ptr)
1540 {
1541 struct ehci_qh *qh = NULL;
1542
1543 qh = (struct ehci_qh *) *ptr;
1544 if (unlikely(qh == NULL)) {
1545 /* can't sleep here, we have oxu->lock... */
1546 qh = qh_make(oxu, urb, GFP_ATOMIC);
1547 *ptr = qh;
1548 }
1549 if (likely(qh != NULL)) {
1550 struct ehci_qtd *qtd;
1551
1552 if (unlikely(list_empty(qtd_list)))
1553 qtd = NULL;
1554 else
1555 qtd = list_entry(qtd_list->next, struct ehci_qtd,
1556 qtd_list);
1557
1558 /* control qh may need patching ... */
1559 if (unlikely(epnum == 0)) {
1560
1561 /* usb_reset_device() briefly reverts to address 0 */
1562 if (usb_pipedevice(urb->pipe) == 0)
1563 qh->hw_info1 &= ~QH_ADDR_MASK;
1564 }
1565
1566 /* just one way to queue requests: swap with the dummy qtd.
1567 * only hc or qh_refresh() ever modify the overlay.
1568 */
1569 if (likely(qtd != NULL)) {
1570 struct ehci_qtd *dummy;
1571 dma_addr_t dma;
1572 __le32 token;
1573
1574 /* to avoid racing the HC, use the dummy td instead of
1575 * the first td of our list (becomes new dummy). both
1576 * tds stay deactivated until we're done, when the
1577 * HC is allowed to fetch the old dummy (4.10.2).
1578 */
1579 token = qtd->hw_token;
1580 qtd->hw_token = HALT_BIT;
1581 wmb();
1582 dummy = qh->dummy;
1583
1584 dma = dummy->qtd_dma;
1585 *dummy = *qtd;
1586 dummy->qtd_dma = dma;
1587
1588 list_del(&qtd->qtd_list);
1589 list_add(&dummy->qtd_list, qtd_list);
1590 list_splice(qtd_list, qh->qtd_list.prev);
1591
1592 ehci_qtd_init(qtd, qtd->qtd_dma);
1593 qh->dummy = qtd;
1594
1595 /* hc must see the new dummy at list end */
1596 dma = qtd->qtd_dma;
1597 qtd = list_entry(qh->qtd_list.prev,
1598 struct ehci_qtd, qtd_list);
1599 qtd->hw_next = QTD_NEXT(dma);
1600
1601 /* let the hc process these next qtds */
1602 dummy->hw_token = (token & ~(0x80));
1603 wmb();
1604 dummy->hw_token = token;
1605
1606 urb->hcpriv = qh_get(qh);
1607 }
1608 }
1609 return qh;
1610 }
1611
1612 static int submit_async(struct oxu_hcd *oxu, struct urb *urb,
1613 struct list_head *qtd_list, gfp_t mem_flags)
1614 {
1615 struct ehci_qtd *qtd;
1616 int epnum;
1617 unsigned long flags;
1618 struct ehci_qh *qh = NULL;
1619 int rc = 0;
1620
1621 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1622 epnum = urb->ep->desc.bEndpointAddress;
1623
1624 #ifdef OXU_URB_TRACE
1625 oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1626 __func__, urb->dev->devpath, urb,
1627 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1628 urb->transfer_buffer_length,
1629 qtd, urb->ep->hcpriv);
1630 #endif
1631
1632 spin_lock_irqsave(&oxu->lock, flags);
1633 if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
1634 rc = -ESHUTDOWN;
1635 goto done;
1636 }
1637
1638 qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
1639 if (unlikely(qh == NULL)) {
1640 rc = -ENOMEM;
1641 goto done;
1642 }
1643
1644 /* Control/bulk operations through TTs don't need scheduling,
1645 * the HC and TT handle it when the TT has a buffer ready.
1646 */
1647 if (likely(qh->qh_state == QH_STATE_IDLE))
1648 qh_link_async(oxu, qh_get(qh));
1649 done:
1650 spin_unlock_irqrestore(&oxu->lock, flags);
1651 if (unlikely(qh == NULL))
1652 qtd_list_free(oxu, urb, qtd_list);
1653 return rc;
1654 }
1655
1656 /* The async qh for the qtds being reclaimed are now unlinked from the HC */
1657
1658 static void end_unlink_async(struct oxu_hcd *oxu)
1659 {
1660 struct ehci_qh *qh = oxu->reclaim;
1661 struct ehci_qh *next;
1662
1663 timer_action_done(oxu, TIMER_IAA_WATCHDOG);
1664
1665 qh->qh_state = QH_STATE_IDLE;
1666 qh->qh_next.qh = NULL;
1667 qh_put(qh); /* refcount from reclaim */
1668
1669 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1670 next = qh->reclaim;
1671 oxu->reclaim = next;
1672 oxu->reclaim_ready = 0;
1673 qh->reclaim = NULL;
1674
1675 qh_completions(oxu, qh);
1676
1677 if (!list_empty(&qh->qtd_list)
1678 && HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
1679 qh_link_async(oxu, qh);
1680 else {
1681 qh_put(qh); /* refcount from async list */
1682
1683 /* it's not free to turn the async schedule on/off; leave it
1684 * active but idle for a while once it empties.
1685 */
1686 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
1687 && oxu->async->qh_next.qh == NULL)
1688 timer_action(oxu, TIMER_ASYNC_OFF);
1689 }
1690
1691 if (next) {
1692 oxu->reclaim = NULL;
1693 start_unlink_async(oxu, next);
1694 }
1695 }
1696
1697 /* makes sure the async qh will become idle */
1698 /* caller must own oxu->lock */
1699
1700 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1701 {
1702 int cmd = readl(&oxu->regs->command);
1703 struct ehci_qh *prev;
1704
1705 #ifdef DEBUG
1706 assert_spin_locked(&oxu->lock);
1707 BUG_ON(oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
1708 && qh->qh_state != QH_STATE_UNLINK_WAIT));
1709 #endif
1710
1711 /* stop async schedule right now? */
1712 if (unlikely(qh == oxu->async)) {
1713 /* can't get here without STS_ASS set */
1714 if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
1715 && !oxu->reclaim) {
1716 /* ... and CMD_IAAD clear */
1717 writel(cmd & ~CMD_ASE, &oxu->regs->command);
1718 wmb();
1719 /* handshake later, if we need to */
1720 timer_action_done(oxu, TIMER_ASYNC_OFF);
1721 }
1722 return;
1723 }
1724
1725 qh->qh_state = QH_STATE_UNLINK;
1726 oxu->reclaim = qh = qh_get(qh);
1727
1728 prev = oxu->async;
1729 while (prev->qh_next.qh != qh)
1730 prev = prev->qh_next.qh;
1731
1732 prev->hw_next = qh->hw_next;
1733 prev->qh_next = qh->qh_next;
1734 wmb();
1735
1736 if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
1737 /* if (unlikely(qh->reclaim != 0))
1738 * this will recurse, probably not much
1739 */
1740 end_unlink_async(oxu);
1741 return;
1742 }
1743
1744 oxu->reclaim_ready = 0;
1745 cmd |= CMD_IAAD;
1746 writel(cmd, &oxu->regs->command);
1747 (void) readl(&oxu->regs->command);
1748 timer_action(oxu, TIMER_IAA_WATCHDOG);
1749 }
1750
1751 static void scan_async(struct oxu_hcd *oxu)
1752 {
1753 struct ehci_qh *qh;
1754 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1755
1756 if (!++(oxu->stamp))
1757 oxu->stamp++;
1758 timer_action_done(oxu, TIMER_ASYNC_SHRINK);
1759 rescan:
1760 qh = oxu->async->qh_next.qh;
1761 if (likely(qh != NULL)) {
1762 do {
1763 /* clean any finished work for this qh */
1764 if (!list_empty(&qh->qtd_list)
1765 && qh->stamp != oxu->stamp) {
1766 int temp;
1767
1768 /* unlinks could happen here; completion
1769 * reporting drops the lock. rescan using
1770 * the latest schedule, but don't rescan
1771 * qhs we already finished (no looping).
1772 */
1773 qh = qh_get(qh);
1774 qh->stamp = oxu->stamp;
1775 temp = qh_completions(oxu, qh);
1776 qh_put(qh);
1777 if (temp != 0)
1778 goto rescan;
1779 }
1780
1781 /* unlink idle entries, reducing HC PCI usage as well
1782 * as HCD schedule-scanning costs. delay for any qh
1783 * we just scanned, there's a not-unusual case that it
1784 * doesn't stay idle for long.
1785 * (plus, avoids some kind of re-activation race.)
1786 */
1787 if (list_empty(&qh->qtd_list)) {
1788 if (qh->stamp == oxu->stamp)
1789 action = TIMER_ASYNC_SHRINK;
1790 else if (!oxu->reclaim
1791 && qh->qh_state == QH_STATE_LINKED)
1792 start_unlink_async(oxu, qh);
1793 }
1794
1795 qh = qh->qh_next.qh;
1796 } while (qh);
1797 }
1798 if (action == TIMER_ASYNC_SHRINK)
1799 timer_action(oxu, TIMER_ASYNC_SHRINK);
1800 }
1801
1802 /*
1803 * periodic_next_shadow - return "next" pointer on shadow list
1804 * @periodic: host pointer to qh/itd/sitd
1805 * @tag: hardware tag for type of this record
1806 */
1807 static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
1808 __le32 tag)
1809 {
1810 switch (tag) {
1811 default:
1812 case Q_TYPE_QH:
1813 return &periodic->qh->qh_next;
1814 }
1815 }
1816
1817 /* caller must hold oxu->lock */
1818 static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
1819 {
1820 union ehci_shadow *prev_p = &oxu->pshadow[frame];
1821 __le32 *hw_p = &oxu->periodic[frame];
1822 union ehci_shadow here = *prev_p;
1823
1824 /* find predecessor of "ptr"; hw and shadow lists are in sync */
1825 while (here.ptr && here.ptr != ptr) {
1826 prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
1827 hw_p = here.hw_next;
1828 here = *prev_p;
1829 }
1830 /* an interrupt entry (at list end) could have been shared */
1831 if (!here.ptr)
1832 return;
1833
1834 /* update shadow and hardware lists ... the old "next" pointers
1835 * from ptr may still be in use, the caller updates them.
1836 */
1837 *prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
1838 *hw_p = *here.hw_next;
1839 }
1840
1841 /* how many of the uframe's 125 usecs are allocated? */
1842 static unsigned short periodic_usecs(struct oxu_hcd *oxu,
1843 unsigned frame, unsigned uframe)
1844 {
1845 __le32 *hw_p = &oxu->periodic[frame];
1846 union ehci_shadow *q = &oxu->pshadow[frame];
1847 unsigned usecs = 0;
1848
1849 while (q->ptr) {
1850 switch (Q_NEXT_TYPE(*hw_p)) {
1851 case Q_TYPE_QH:
1852 default:
1853 /* is it in the S-mask? */
1854 if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
1855 usecs += q->qh->usecs;
1856 /* ... or C-mask? */
1857 if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
1858 usecs += q->qh->c_usecs;
1859 hw_p = &q->qh->hw_next;
1860 q = &q->qh->qh_next;
1861 break;
1862 }
1863 }
1864 #ifdef DEBUG
1865 if (usecs > 100)
1866 oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
1867 frame * 8 + uframe, usecs);
1868 #endif
1869 return usecs;
1870 }
1871
1872 static int enable_periodic(struct oxu_hcd *oxu)
1873 {
1874 u32 cmd;
1875 int status;
1876
1877 /* did clearing PSE did take effect yet?
1878 * takes effect only at frame boundaries...
1879 */
1880 status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
1881 if (status != 0) {
1882 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1883 usb_hc_died(oxu_to_hcd(oxu));
1884 return status;
1885 }
1886
1887 cmd = readl(&oxu->regs->command) | CMD_PSE;
1888 writel(cmd, &oxu->regs->command);
1889 /* posted write ... PSS happens later */
1890 oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1891
1892 /* make sure ehci_work scans these */
1893 oxu->next_uframe = readl(&oxu->regs->frame_index)
1894 % (oxu->periodic_size << 3);
1895 return 0;
1896 }
1897
1898 static int disable_periodic(struct oxu_hcd *oxu)
1899 {
1900 u32 cmd;
1901 int status;
1902
1903 /* did setting PSE not take effect yet?
1904 * takes effect only at frame boundaries...
1905 */
1906 status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
1907 if (status != 0) {
1908 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1909 usb_hc_died(oxu_to_hcd(oxu));
1910 return status;
1911 }
1912
1913 cmd = readl(&oxu->regs->command) & ~CMD_PSE;
1914 writel(cmd, &oxu->regs->command);
1915 /* posted write ... */
1916
1917 oxu->next_uframe = -1;
1918 return 0;
1919 }
1920
1921 /* periodic schedule slots have iso tds (normal or split) first, then a
1922 * sparse tree for active interrupt transfers.
1923 *
1924 * this just links in a qh; caller guarantees uframe masks are set right.
1925 * no FSTN support (yet; oxu 0.96+)
1926 */
1927 static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1928 {
1929 unsigned i;
1930 unsigned period = qh->period;
1931
1932 dev_dbg(&qh->dev->dev,
1933 "link qh%d-%04x/%p start %d [%d/%d us]\n",
1934 period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
1935 qh, qh->start, qh->usecs, qh->c_usecs);
1936
1937 /* high bandwidth, or otherwise every microframe */
1938 if (period == 0)
1939 period = 1;
1940
1941 for (i = qh->start; i < oxu->periodic_size; i += period) {
1942 union ehci_shadow *prev = &oxu->pshadow[i];
1943 __le32 *hw_p = &oxu->periodic[i];
1944 union ehci_shadow here = *prev;
1945 __le32 type = 0;
1946
1947 /* skip the iso nodes at list head */
1948 while (here.ptr) {
1949 type = Q_NEXT_TYPE(*hw_p);
1950 if (type == Q_TYPE_QH)
1951 break;
1952 prev = periodic_next_shadow(prev, type);
1953 hw_p = &here.qh->hw_next;
1954 here = *prev;
1955 }
1956
1957 /* sorting each branch by period (slow-->fast)
1958 * enables sharing interior tree nodes
1959 */
1960 while (here.ptr && qh != here.qh) {
1961 if (qh->period > here.qh->period)
1962 break;
1963 prev = &here.qh->qh_next;
1964 hw_p = &here.qh->hw_next;
1965 here = *prev;
1966 }
1967 /* link in this qh, unless some earlier pass did that */
1968 if (qh != here.qh) {
1969 qh->qh_next = here;
1970 if (here.qh)
1971 qh->hw_next = *hw_p;
1972 wmb();
1973 prev->qh = qh;
1974 *hw_p = QH_NEXT(qh->qh_dma);
1975 }
1976 }
1977 qh->qh_state = QH_STATE_LINKED;
1978 qh_get(qh);
1979
1980 /* update per-qh bandwidth for usbfs */
1981 oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
1982 ? ((qh->usecs + qh->c_usecs) / qh->period)
1983 : (qh->usecs * 8);
1984
1985 /* maybe enable periodic schedule processing */
1986 if (!oxu->periodic_sched++)
1987 return enable_periodic(oxu);
1988
1989 return 0;
1990 }
1991
1992 static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1993 {
1994 unsigned i;
1995 unsigned period;
1996
1997 /* FIXME:
1998 * IF this isn't high speed
1999 * and this qh is active in the current uframe
2000 * (and overlay token SplitXstate is false?)
2001 * THEN
2002 * qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2003 */
2004
2005 /* high bandwidth, or otherwise part of every microframe */
2006 period = qh->period;
2007 if (period == 0)
2008 period = 1;
2009
2010 for (i = qh->start; i < oxu->periodic_size; i += period)
2011 periodic_unlink(oxu, i, qh);
2012
2013 /* update per-qh bandwidth for usbfs */
2014 oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2015 ? ((qh->usecs + qh->c_usecs) / qh->period)
2016 : (qh->usecs * 8);
2017
2018 dev_dbg(&qh->dev->dev,
2019 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2020 qh->period,
2021 le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2022 qh, qh->start, qh->usecs, qh->c_usecs);
2023
2024 /* qh->qh_next still "live" to HC */
2025 qh->qh_state = QH_STATE_UNLINK;
2026 qh->qh_next.ptr = NULL;
2027 qh_put(qh);
2028
2029 /* maybe turn off periodic schedule */
2030 oxu->periodic_sched--;
2031 if (!oxu->periodic_sched)
2032 (void) disable_periodic(oxu);
2033 }
2034
2035 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2036 {
2037 unsigned wait;
2038
2039 qh_unlink_periodic(oxu, qh);
2040
2041 /* simple/paranoid: always delay, expecting the HC needs to read
2042 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2043 * expect hub_wq to clean up after any CSPLITs we won't issue.
2044 * active high speed queues may need bigger delays...
2045 */
2046 if (list_empty(&qh->qtd_list)
2047 || (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2048 wait = 2;
2049 else
2050 wait = 55; /* worst case: 3 * 1024 */
2051
2052 udelay(wait);
2053 qh->qh_state = QH_STATE_IDLE;
2054 qh->hw_next = EHCI_LIST_END;
2055 wmb();
2056 }
2057
2058 static int check_period(struct oxu_hcd *oxu,
2059 unsigned frame, unsigned uframe,
2060 unsigned period, unsigned usecs)
2061 {
2062 int claimed;
2063
2064 /* complete split running into next frame?
2065 * given FSTN support, we could sometimes check...
2066 */
2067 if (uframe >= 8)
2068 return 0;
2069
2070 /*
2071 * 80% periodic == 100 usec/uframe available
2072 * convert "usecs we need" to "max already claimed"
2073 */
2074 usecs = 100 - usecs;
2075
2076 /* we "know" 2 and 4 uframe intervals were rejected; so
2077 * for period 0, check _every_ microframe in the schedule.
2078 */
2079 if (unlikely(period == 0)) {
2080 do {
2081 for (uframe = 0; uframe < 7; uframe++) {
2082 claimed = periodic_usecs(oxu, frame, uframe);
2083 if (claimed > usecs)
2084 return 0;
2085 }
2086 } while ((frame += 1) < oxu->periodic_size);
2087
2088 /* just check the specified uframe, at that period */
2089 } else {
2090 do {
2091 claimed = periodic_usecs(oxu, frame, uframe);
2092 if (claimed > usecs)
2093 return 0;
2094 } while ((frame += period) < oxu->periodic_size);
2095 }
2096
2097 return 1;
2098 }
2099
2100 static int check_intr_schedule(struct oxu_hcd *oxu,
2101 unsigned frame, unsigned uframe,
2102 const struct ehci_qh *qh, __le32 *c_maskp)
2103 {
2104 int retval = -ENOSPC;
2105
2106 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
2107 goto done;
2108
2109 if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2110 goto done;
2111 if (!qh->c_usecs) {
2112 retval = 0;
2113 *c_maskp = 0;
2114 goto done;
2115 }
2116
2117 done:
2118 return retval;
2119 }
2120
2121 /* "first fit" scheduling policy used the first time through,
2122 * or when the previous schedule slot can't be re-used.
2123 */
2124 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2125 {
2126 int status;
2127 unsigned uframe;
2128 __le32 c_mask;
2129 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
2130
2131 qh_refresh(oxu, qh);
2132 qh->hw_next = EHCI_LIST_END;
2133 frame = qh->start;
2134
2135 /* reuse the previous schedule slots, if we can */
2136 if (frame < qh->period) {
2137 uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2138 status = check_intr_schedule(oxu, frame, --uframe,
2139 qh, &c_mask);
2140 } else {
2141 uframe = 0;
2142 c_mask = 0;
2143 status = -ENOSPC;
2144 }
2145
2146 /* else scan the schedule to find a group of slots such that all
2147 * uframes have enough periodic bandwidth available.
2148 */
2149 if (status) {
2150 /* "normal" case, uframing flexible except with splits */
2151 if (qh->period) {
2152 frame = qh->period - 1;
2153 do {
2154 for (uframe = 0; uframe < 8; uframe++) {
2155 status = check_intr_schedule(oxu,
2156 frame, uframe, qh,
2157 &c_mask);
2158 if (status == 0)
2159 break;
2160 }
2161 } while (status && frame--);
2162
2163 /* qh->period == 0 means every uframe */
2164 } else {
2165 frame = 0;
2166 status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2167 }
2168 if (status)
2169 goto done;
2170 qh->start = frame;
2171
2172 /* reset S-frame and (maybe) C-frame masks */
2173 qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2174 qh->hw_info2 |= qh->period
2175 ? cpu_to_le32(1 << uframe)
2176 : cpu_to_le32(QH_SMASK);
2177 qh->hw_info2 |= c_mask;
2178 } else
2179 oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2180
2181 /* stuff into the periodic schedule */
2182 status = qh_link_periodic(oxu, qh);
2183 done:
2184 return status;
2185 }
2186
2187 static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2188 struct list_head *qtd_list, gfp_t mem_flags)
2189 {
2190 unsigned epnum;
2191 unsigned long flags;
2192 struct ehci_qh *qh;
2193 int status = 0;
2194 struct list_head empty;
2195
2196 /* get endpoint and transfer/schedule data */
2197 epnum = urb->ep->desc.bEndpointAddress;
2198
2199 spin_lock_irqsave(&oxu->lock, flags);
2200
2201 if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2202 status = -ESHUTDOWN;
2203 goto done;
2204 }
2205
2206 /* get qh and force any scheduling errors */
2207 INIT_LIST_HEAD(&empty);
2208 qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2209 if (qh == NULL) {
2210 status = -ENOMEM;
2211 goto done;
2212 }
2213 if (qh->qh_state == QH_STATE_IDLE) {
2214 status = qh_schedule(oxu, qh);
2215 if (status != 0)
2216 goto done;
2217 }
2218
2219 /* then queue the urb's tds to the qh */
2220 qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2221 BUG_ON(qh == NULL);
2222
2223 /* ... update usbfs periodic stats */
2224 oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2225
2226 done:
2227 spin_unlock_irqrestore(&oxu->lock, flags);
2228 if (status)
2229 qtd_list_free(oxu, urb, qtd_list);
2230
2231 return status;
2232 }
2233
2234 static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2235 gfp_t mem_flags)
2236 {
2237 oxu_dbg(oxu, "iso support is missing!\n");
2238 return -ENOSYS;
2239 }
2240
2241 static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2242 gfp_t mem_flags)
2243 {
2244 oxu_dbg(oxu, "split iso support is missing!\n");
2245 return -ENOSYS;
2246 }
2247
2248 static void scan_periodic(struct oxu_hcd *oxu)
2249 {
2250 unsigned frame, clock, now_uframe, mod;
2251 unsigned modified;
2252
2253 mod = oxu->periodic_size << 3;
2254
2255 /*
2256 * When running, scan from last scan point up to "now"
2257 * else clean up by scanning everything that's left.
2258 * Touches as few pages as possible: cache-friendly.
2259 */
2260 now_uframe = oxu->next_uframe;
2261 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2262 clock = readl(&oxu->regs->frame_index);
2263 else
2264 clock = now_uframe + mod - 1;
2265 clock %= mod;
2266
2267 for (;;) {
2268 union ehci_shadow q, *q_p;
2269 __le32 type, *hw_p;
2270 unsigned uframes;
2271
2272 /* don't scan past the live uframe */
2273 frame = now_uframe >> 3;
2274 if (frame == (clock >> 3))
2275 uframes = now_uframe & 0x07;
2276 else {
2277 /* safe to scan the whole frame at once */
2278 now_uframe |= 0x07;
2279 uframes = 8;
2280 }
2281
2282 restart:
2283 /* scan each element in frame's queue for completions */
2284 q_p = &oxu->pshadow[frame];
2285 hw_p = &oxu->periodic[frame];
2286 q.ptr = q_p->ptr;
2287 type = Q_NEXT_TYPE(*hw_p);
2288 modified = 0;
2289
2290 while (q.ptr != NULL) {
2291 union ehci_shadow temp;
2292
2293 switch (type) {
2294 case Q_TYPE_QH:
2295 /* handle any completions */
2296 temp.qh = qh_get(q.qh);
2297 type = Q_NEXT_TYPE(q.qh->hw_next);
2298 q = q.qh->qh_next;
2299 modified = qh_completions(oxu, temp.qh);
2300 if (unlikely(list_empty(&temp.qh->qtd_list)))
2301 intr_deschedule(oxu, temp.qh);
2302 qh_put(temp.qh);
2303 break;
2304 default:
2305 oxu_dbg(oxu, "corrupt type %d frame %d shadow %p\n",
2306 type, frame, q.ptr);
2307 q.ptr = NULL;
2308 }
2309
2310 /* assume completion callbacks modify the queue */
2311 if (unlikely(modified))
2312 goto restart;
2313 }
2314
2315 /* Stop when we catch up to the HC */
2316
2317 /* FIXME: this assumes we won't get lapped when
2318 * latencies climb; that should be rare, but...
2319 * detect it, and just go all the way around.
2320 * FLR might help detect this case, so long as latencies
2321 * don't exceed periodic_size msec (default 1.024 sec).
2322 */
2323
2324 /* FIXME: likewise assumes HC doesn't halt mid-scan */
2325
2326 if (now_uframe == clock) {
2327 unsigned now;
2328
2329 if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2330 break;
2331 oxu->next_uframe = now_uframe;
2332 now = readl(&oxu->regs->frame_index) % mod;
2333 if (now_uframe == now)
2334 break;
2335
2336 /* rescan the rest of this frame, then ... */
2337 clock = now;
2338 } else {
2339 now_uframe++;
2340 now_uframe %= mod;
2341 }
2342 }
2343 }
2344
2345 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
2346 * The firmware seems to think that powering off is a wakeup event!
2347 * This routine turns off remote wakeup and everything else, on all ports.
2348 */
2349 static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2350 {
2351 int port = HCS_N_PORTS(oxu->hcs_params);
2352
2353 while (port--)
2354 writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2355 }
2356
2357 static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2358 {
2359 unsigned port;
2360
2361 if (!HCS_PPC(oxu->hcs_params))
2362 return;
2363
2364 oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2365 for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; )
2366 (void) oxu_hub_control(oxu_to_hcd(oxu),
2367 is_on ? SetPortFeature : ClearPortFeature,
2368 USB_PORT_FEAT_POWER,
2369 port--, NULL, 0);
2370 msleep(20);
2371 }
2372
2373 /* Called from some interrupts, timers, and so on.
2374 * It calls driver completion functions, after dropping oxu->lock.
2375 */
2376 static void ehci_work(struct oxu_hcd *oxu)
2377 {
2378 timer_action_done(oxu, TIMER_IO_WATCHDOG);
2379 if (oxu->reclaim_ready)
2380 end_unlink_async(oxu);
2381
2382 /* another CPU may drop oxu->lock during a schedule scan while
2383 * it reports urb completions. this flag guards against bogus
2384 * attempts at re-entrant schedule scanning.
2385 */
2386 if (oxu->scanning)
2387 return;
2388 oxu->scanning = 1;
2389 scan_async(oxu);
2390 if (oxu->next_uframe != -1)
2391 scan_periodic(oxu);
2392 oxu->scanning = 0;
2393
2394 /* the IO watchdog guards against hardware or driver bugs that
2395 * misplace IRQs, and should let us run completely without IRQs.
2396 * such lossage has been observed on both VT6202 and VT8235.
2397 */
2398 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2399 (oxu->async->qh_next.ptr != NULL ||
2400 oxu->periodic_sched != 0))
2401 timer_action(oxu, TIMER_IO_WATCHDOG);
2402 }
2403
2404 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2405 {
2406 /* if we need to use IAA and it's busy, defer */
2407 if (qh->qh_state == QH_STATE_LINKED
2408 && oxu->reclaim
2409 && HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2410 struct ehci_qh *last;
2411
2412 for (last = oxu->reclaim;
2413 last->reclaim;
2414 last = last->reclaim)
2415 continue;
2416 qh->qh_state = QH_STATE_UNLINK_WAIT;
2417 last->reclaim = qh;
2418
2419 /* bypass IAA if the hc can't care */
2420 } else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2421 end_unlink_async(oxu);
2422
2423 /* something else might have unlinked the qh by now */
2424 if (qh->qh_state == QH_STATE_LINKED)
2425 start_unlink_async(oxu, qh);
2426 }
2427
2428 /*
2429 * USB host controller methods
2430 */
2431
2432 static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2433 {
2434 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2435 u32 status, pcd_status = 0;
2436 int bh;
2437
2438 spin_lock(&oxu->lock);
2439
2440 status = readl(&oxu->regs->status);
2441
2442 /* e.g. cardbus physical eject */
2443 if (status == ~(u32) 0) {
2444 oxu_dbg(oxu, "device removed\n");
2445 goto dead;
2446 }
2447
2448 /* Shared IRQ? */
2449 status &= INTR_MASK;
2450 if (!status || unlikely(hcd->state == HC_STATE_HALT)) {
2451 spin_unlock(&oxu->lock);
2452 return IRQ_NONE;
2453 }
2454
2455 /* clear (just) interrupts */
2456 writel(status, &oxu->regs->status);
2457 readl(&oxu->regs->command); /* unblock posted write */
2458 bh = 0;
2459
2460 #ifdef OXU_VERBOSE_DEBUG
2461 /* unrequested/ignored: Frame List Rollover */
2462 dbg_status(oxu, "irq", status);
2463 #endif
2464
2465 /* INT, ERR, and IAA interrupt rates can be throttled */
2466
2467 /* normal [4.15.1.2] or error [4.15.1.1] completion */
2468 if (likely((status & (STS_INT|STS_ERR)) != 0))
2469 bh = 1;
2470
2471 /* complete the unlinking of some qh [4.15.2.3] */
2472 if (status & STS_IAA) {
2473 oxu->reclaim_ready = 1;
2474 bh = 1;
2475 }
2476
2477 /* remote wakeup [4.3.1] */
2478 if (status & STS_PCD) {
2479 unsigned i = HCS_N_PORTS(oxu->hcs_params);
2480 pcd_status = status;
2481
2482 /* resume root hub? */
2483 if (!(readl(&oxu->regs->command) & CMD_RUN))
2484 usb_hcd_resume_root_hub(hcd);
2485
2486 while (i--) {
2487 int pstatus = readl(&oxu->regs->port_status[i]);
2488
2489 if (pstatus & PORT_OWNER)
2490 continue;
2491 if (!(pstatus & PORT_RESUME)
2492 || oxu->reset_done[i] != 0)
2493 continue;
2494
2495 /* start USB_RESUME_TIMEOUT resume signaling from this
2496 * port, and make hub_wq collect PORT_STAT_C_SUSPEND to
2497 * stop that signaling.
2498 */
2499 oxu->reset_done[i] = jiffies +
2500 msecs_to_jiffies(USB_RESUME_TIMEOUT);
2501 oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2502 mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2503 }
2504 }
2505
2506 /* PCI errors [4.15.2.4] */
2507 if (unlikely((status & STS_FATAL) != 0)) {
2508 /* bogus "fatal" IRQs appear on some chips... why? */
2509 status = readl(&oxu->regs->status);
2510 dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2511 dbg_status(oxu, "fatal", status);
2512 if (status & STS_HALT) {
2513 oxu_err(oxu, "fatal error\n");
2514 dead:
2515 ehci_reset(oxu);
2516 writel(0, &oxu->regs->configured_flag);
2517 usb_hc_died(hcd);
2518 /* generic layer kills/unlinks all urbs, then
2519 * uses oxu_stop to clean up the rest
2520 */
2521 bh = 1;
2522 }
2523 }
2524
2525 if (bh)
2526 ehci_work(oxu);
2527 spin_unlock(&oxu->lock);
2528 if (pcd_status & STS_PCD)
2529 usb_hcd_poll_rh_status(hcd);
2530 return IRQ_HANDLED;
2531 }
2532
2533 static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2534 {
2535 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2536 int ret = IRQ_HANDLED;
2537
2538 u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2539 u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2540
2541 /* Disable all interrupt */
2542 oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2543
2544 if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2545 (!oxu->is_otg && (status & OXU_USBSPHI)))
2546 oxu210_hcd_irq(hcd);
2547 else
2548 ret = IRQ_NONE;
2549
2550 /* Enable all interrupt back */
2551 oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2552
2553 return ret;
2554 }
2555
2556 static void oxu_watchdog(unsigned long param)
2557 {
2558 struct oxu_hcd *oxu = (struct oxu_hcd *) param;
2559 unsigned long flags;
2560
2561 spin_lock_irqsave(&oxu->lock, flags);
2562
2563 /* lost IAA irqs wedge things badly; seen with a vt8235 */
2564 if (oxu->reclaim) {
2565 u32 status = readl(&oxu->regs->status);
2566 if (status & STS_IAA) {
2567 oxu_vdbg(oxu, "lost IAA\n");
2568 writel(STS_IAA, &oxu->regs->status);
2569 oxu->reclaim_ready = 1;
2570 }
2571 }
2572
2573 /* stop async processing after it's idled a bit */
2574 if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2575 start_unlink_async(oxu, oxu->async);
2576
2577 /* oxu could run by timer, without IRQs ... */
2578 ehci_work(oxu);
2579
2580 spin_unlock_irqrestore(&oxu->lock, flags);
2581 }
2582
2583 /* One-time init, only for memory state.
2584 */
2585 static int oxu_hcd_init(struct usb_hcd *hcd)
2586 {
2587 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2588 u32 temp;
2589 int retval;
2590 u32 hcc_params;
2591
2592 spin_lock_init(&oxu->lock);
2593
2594 setup_timer(&oxu->watchdog, oxu_watchdog, (unsigned long)oxu);
2595
2596 /*
2597 * hw default: 1K periodic list heads, one per frame.
2598 * periodic_size can shrink by USBCMD update if hcc_params allows.
2599 */
2600 oxu->periodic_size = DEFAULT_I_TDPS;
2601 retval = ehci_mem_init(oxu, GFP_KERNEL);
2602 if (retval < 0)
2603 return retval;
2604
2605 /* controllers may cache some of the periodic schedule ... */
2606 hcc_params = readl(&oxu->caps->hcc_params);
2607 if (HCC_ISOC_CACHE(hcc_params)) /* full frame cache */
2608 oxu->i_thresh = 8;
2609 else /* N microframes cached */
2610 oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
2611
2612 oxu->reclaim = NULL;
2613 oxu->reclaim_ready = 0;
2614 oxu->next_uframe = -1;
2615
2616 /*
2617 * dedicate a qh for the async ring head, since we couldn't unlink
2618 * a 'real' qh without stopping the async schedule [4.8]. use it
2619 * as the 'reclamation list head' too.
2620 * its dummy is used in hw_alt_next of many tds, to prevent the qh
2621 * from automatically advancing to the next td after short reads.
2622 */
2623 oxu->async->qh_next.qh = NULL;
2624 oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
2625 oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
2626 oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
2627 oxu->async->hw_qtd_next = EHCI_LIST_END;
2628 oxu->async->qh_state = QH_STATE_LINKED;
2629 oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
2630
2631 /* clear interrupt enables, set irq latency */
2632 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
2633 log2_irq_thresh = 0;
2634 temp = 1 << (16 + log2_irq_thresh);
2635 if (HCC_CANPARK(hcc_params)) {
2636 /* HW default park == 3, on hardware that supports it (like
2637 * NVidia and ALI silicon), maximizes throughput on the async
2638 * schedule by avoiding QH fetches between transfers.
2639 *
2640 * With fast usb storage devices and NForce2, "park" seems to
2641 * make problems: throughput reduction (!), data errors...
2642 */
2643 if (park) {
2644 park = min(park, (unsigned) 3);
2645 temp |= CMD_PARK;
2646 temp |= park << 8;
2647 }
2648 oxu_dbg(oxu, "park %d\n", park);
2649 }
2650 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
2651 /* periodic schedule size can be smaller than default */
2652 temp &= ~(3 << 2);
2653 temp |= (EHCI_TUNE_FLS << 2);
2654 }
2655 oxu->command = temp;
2656
2657 return 0;
2658 }
2659
2660 /* Called during probe() after chip reset completes.
2661 */
2662 static int oxu_reset(struct usb_hcd *hcd)
2663 {
2664 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2665
2666 spin_lock_init(&oxu->mem_lock);
2667 INIT_LIST_HEAD(&oxu->urb_list);
2668 oxu->urb_len = 0;
2669
2670 /* FIMXE */
2671 hcd->self.controller->dma_mask = NULL;
2672
2673 if (oxu->is_otg) {
2674 oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
2675 oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
2676 HC_LENGTH(readl(&oxu->caps->hc_capbase));
2677
2678 oxu->mem = hcd->regs + OXU_SPH_MEM;
2679 } else {
2680 oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
2681 oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
2682 HC_LENGTH(readl(&oxu->caps->hc_capbase));
2683
2684 oxu->mem = hcd->regs + OXU_OTG_MEM;
2685 }
2686
2687 oxu->hcs_params = readl(&oxu->caps->hcs_params);
2688 oxu->sbrn = 0x20;
2689
2690 return oxu_hcd_init(hcd);
2691 }
2692
2693 static int oxu_run(struct usb_hcd *hcd)
2694 {
2695 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2696 int retval;
2697 u32 temp, hcc_params;
2698
2699 hcd->uses_new_polling = 1;
2700
2701 /* EHCI spec section 4.1 */
2702 retval = ehci_reset(oxu);
2703 if (retval != 0) {
2704 ehci_mem_cleanup(oxu);
2705 return retval;
2706 }
2707 writel(oxu->periodic_dma, &oxu->regs->frame_list);
2708 writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
2709
2710 /* hcc_params controls whether oxu->regs->segment must (!!!)
2711 * be used; it constrains QH/ITD/SITD and QTD locations.
2712 * dma_pool consistent memory always uses segment zero.
2713 * streaming mappings for I/O buffers, like pci_map_single(),
2714 * can return segments above 4GB, if the device allows.
2715 *
2716 * NOTE: the dma mask is visible through dev->dma_mask, so
2717 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2718 * Scsi_Host.highmem_io, and so forth. It's readonly to all
2719 * host side drivers though.
2720 */
2721 hcc_params = readl(&oxu->caps->hcc_params);
2722 if (HCC_64BIT_ADDR(hcc_params))
2723 writel(0, &oxu->regs->segment);
2724
2725 oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
2726 CMD_ASE | CMD_RESET);
2727 oxu->command |= CMD_RUN;
2728 writel(oxu->command, &oxu->regs->command);
2729 dbg_cmd(oxu, "init", oxu->command);
2730
2731 /*
2732 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2733 * are explicitly handed to companion controller(s), so no TT is
2734 * involved with the root hub. (Except where one is integrated,
2735 * and there's no companion controller unless maybe for USB OTG.)
2736 */
2737 hcd->state = HC_STATE_RUNNING;
2738 writel(FLAG_CF, &oxu->regs->configured_flag);
2739 readl(&oxu->regs->command); /* unblock posted writes */
2740
2741 temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
2742 oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2743 ((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
2744 temp >> 8, temp & 0xff, DRIVER_VERSION,
2745 ignore_oc ? ", overcurrent ignored" : "");
2746
2747 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
2748
2749 return 0;
2750 }
2751
2752 static void oxu_stop(struct usb_hcd *hcd)
2753 {
2754 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2755
2756 /* Turn off port power on all root hub ports. */
2757 ehci_port_power(oxu, 0);
2758
2759 /* no more interrupts ... */
2760 del_timer_sync(&oxu->watchdog);
2761
2762 spin_lock_irq(&oxu->lock);
2763 if (HC_IS_RUNNING(hcd->state))
2764 ehci_quiesce(oxu);
2765
2766 ehci_reset(oxu);
2767 writel(0, &oxu->regs->intr_enable);
2768 spin_unlock_irq(&oxu->lock);
2769
2770 /* let companion controllers work when we aren't */
2771 writel(0, &oxu->regs->configured_flag);
2772
2773 /* root hub is shut down separately (first, when possible) */
2774 spin_lock_irq(&oxu->lock);
2775 if (oxu->async)
2776 ehci_work(oxu);
2777 spin_unlock_irq(&oxu->lock);
2778 ehci_mem_cleanup(oxu);
2779
2780 dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
2781 }
2782
2783 /* Kick in for silicon on any bus (not just pci, etc).
2784 * This forcibly disables dma and IRQs, helping kexec and other cases
2785 * where the next system software may expect clean state.
2786 */
2787 static void oxu_shutdown(struct usb_hcd *hcd)
2788 {
2789 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2790
2791 (void) ehci_halt(oxu);
2792 ehci_turn_off_all_ports(oxu);
2793
2794 /* make BIOS/etc use companion controller during reboot */
2795 writel(0, &oxu->regs->configured_flag);
2796
2797 /* unblock posted writes */
2798 readl(&oxu->regs->configured_flag);
2799 }
2800
2801 /* Non-error returns are a promise to giveback() the urb later
2802 * we drop ownership so next owner (or urb unlink) can get it
2803 *
2804 * urb + dev is in hcd.self.controller.urb_list
2805 * we're queueing TDs onto software and hardware lists
2806 *
2807 * hcd-specific init for hcpriv hasn't been done yet
2808 *
2809 * NOTE: control, bulk, and interrupt share the same code to append TDs
2810 * to a (possibly active) QH, and the same QH scanning code.
2811 */
2812 static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2813 gfp_t mem_flags)
2814 {
2815 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2816 struct list_head qtd_list;
2817
2818 INIT_LIST_HEAD(&qtd_list);
2819
2820 switch (usb_pipetype(urb->pipe)) {
2821 case PIPE_CONTROL:
2822 case PIPE_BULK:
2823 default:
2824 if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2825 return -ENOMEM;
2826 return submit_async(oxu, urb, &qtd_list, mem_flags);
2827
2828 case PIPE_INTERRUPT:
2829 if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2830 return -ENOMEM;
2831 return intr_submit(oxu, urb, &qtd_list, mem_flags);
2832
2833 case PIPE_ISOCHRONOUS:
2834 if (urb->dev->speed == USB_SPEED_HIGH)
2835 return itd_submit(oxu, urb, mem_flags);
2836 else
2837 return sitd_submit(oxu, urb, mem_flags);
2838 }
2839 }
2840
2841 /* This function is responsible for breaking URBs with big data size
2842 * into smaller size and processing small urbs in sequence.
2843 */
2844 static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2845 gfp_t mem_flags)
2846 {
2847 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2848 int num, rem;
2849 int transfer_buffer_length;
2850 void *transfer_buffer;
2851 struct urb *murb;
2852 int i, ret;
2853
2854 /* If not bulk pipe just enqueue the URB */
2855 if (!usb_pipebulk(urb->pipe))
2856 return __oxu_urb_enqueue(hcd, urb, mem_flags);
2857
2858 /* Otherwise we should verify the USB transfer buffer size! */
2859 transfer_buffer = urb->transfer_buffer;
2860 transfer_buffer_length = urb->transfer_buffer_length;
2861
2862 num = urb->transfer_buffer_length / 4096;
2863 rem = urb->transfer_buffer_length % 4096;
2864 if (rem != 0)
2865 num++;
2866
2867 /* If URB is smaller than 4096 bytes just enqueue it! */
2868 if (num == 1)
2869 return __oxu_urb_enqueue(hcd, urb, mem_flags);
2870
2871 /* Ok, we have more job to do! :) */
2872
2873 for (i = 0; i < num - 1; i++) {
2874 /* Get free micro URB poll till a free urb is received */
2875
2876 do {
2877 murb = (struct urb *) oxu_murb_alloc(oxu);
2878 if (!murb)
2879 schedule();
2880 } while (!murb);
2881
2882 /* Coping the urb */
2883 memcpy(murb, urb, sizeof(struct urb));
2884
2885 murb->transfer_buffer_length = 4096;
2886 murb->transfer_buffer = transfer_buffer + i * 4096;
2887
2888 /* Null pointer for the encodes that this is a micro urb */
2889 murb->complete = NULL;
2890
2891 ((struct oxu_murb *) murb)->main = urb;
2892 ((struct oxu_murb *) murb)->last = 0;
2893
2894 /* This loop is to guarantee urb to be processed when there's
2895 * not enough resources at a particular time by retrying.
2896 */
2897 do {
2898 ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
2899 if (ret)
2900 schedule();
2901 } while (ret);
2902 }
2903
2904 /* Last urb requires special handling */
2905
2906 /* Get free micro URB poll till a free urb is received */
2907 do {
2908 murb = (struct urb *) oxu_murb_alloc(oxu);
2909 if (!murb)
2910 schedule();
2911 } while (!murb);
2912
2913 /* Coping the urb */
2914 memcpy(murb, urb, sizeof(struct urb));
2915
2916 murb->transfer_buffer_length = rem > 0 ? rem : 4096;
2917 murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
2918
2919 /* Null pointer for the encodes that this is a micro urb */
2920 murb->complete = NULL;
2921
2922 ((struct oxu_murb *) murb)->main = urb;
2923 ((struct oxu_murb *) murb)->last = 1;
2924
2925 do {
2926 ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
2927 if (ret)
2928 schedule();
2929 } while (ret);
2930
2931 return ret;
2932 }
2933
2934 /* Remove from hardware lists.
2935 * Completions normally happen asynchronously
2936 */
2937 static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2938 {
2939 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2940 struct ehci_qh *qh;
2941 unsigned long flags;
2942
2943 spin_lock_irqsave(&oxu->lock, flags);
2944 switch (usb_pipetype(urb->pipe)) {
2945 case PIPE_CONTROL:
2946 case PIPE_BULK:
2947 default:
2948 qh = (struct ehci_qh *) urb->hcpriv;
2949 if (!qh)
2950 break;
2951 unlink_async(oxu, qh);
2952 break;
2953
2954 case PIPE_INTERRUPT:
2955 qh = (struct ehci_qh *) urb->hcpriv;
2956 if (!qh)
2957 break;
2958 switch (qh->qh_state) {
2959 case QH_STATE_LINKED:
2960 intr_deschedule(oxu, qh);
2961 /* FALL THROUGH */
2962 case QH_STATE_IDLE:
2963 qh_completions(oxu, qh);
2964 break;
2965 default:
2966 oxu_dbg(oxu, "bogus qh %p state %d\n",
2967 qh, qh->qh_state);
2968 goto done;
2969 }
2970
2971 /* reschedule QH iff another request is queued */
2972 if (!list_empty(&qh->qtd_list)
2973 && HC_IS_RUNNING(hcd->state)) {
2974 int status;
2975
2976 status = qh_schedule(oxu, qh);
2977 spin_unlock_irqrestore(&oxu->lock, flags);
2978
2979 if (status != 0) {
2980 /* shouldn't happen often, but ...
2981 * FIXME kill those tds' urbs
2982 */
2983 dev_err(hcd->self.controller,
2984 "can't reschedule qh %p, err %d\n", qh,
2985 status);
2986 }
2987 return status;
2988 }
2989 break;
2990 }
2991 done:
2992 spin_unlock_irqrestore(&oxu->lock, flags);
2993 return 0;
2994 }
2995
2996 /* Bulk qh holds the data toggle */
2997 static void oxu_endpoint_disable(struct usb_hcd *hcd,
2998 struct usb_host_endpoint *ep)
2999 {
3000 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3001 unsigned long flags;
3002 struct ehci_qh *qh, *tmp;
3003
3004 /* ASSERT: any requests/urbs are being unlinked */
3005 /* ASSERT: nobody can be submitting urbs for this any more */
3006
3007 rescan:
3008 spin_lock_irqsave(&oxu->lock, flags);
3009 qh = ep->hcpriv;
3010 if (!qh)
3011 goto done;
3012
3013 /* endpoints can be iso streams. for now, we don't
3014 * accelerate iso completions ... so spin a while.
3015 */
3016 if (qh->hw_info1 == 0) {
3017 oxu_vdbg(oxu, "iso delay\n");
3018 goto idle_timeout;
3019 }
3020
3021 if (!HC_IS_RUNNING(hcd->state))
3022 qh->qh_state = QH_STATE_IDLE;
3023 switch (qh->qh_state) {
3024 case QH_STATE_LINKED:
3025 for (tmp = oxu->async->qh_next.qh;
3026 tmp && tmp != qh;
3027 tmp = tmp->qh_next.qh)
3028 continue;
3029 /* periodic qh self-unlinks on empty */
3030 if (!tmp)
3031 goto nogood;
3032 unlink_async(oxu, qh);
3033 /* FALL THROUGH */
3034 case QH_STATE_UNLINK: /* wait for hw to finish? */
3035 idle_timeout:
3036 spin_unlock_irqrestore(&oxu->lock, flags);
3037 schedule_timeout_uninterruptible(1);
3038 goto rescan;
3039 case QH_STATE_IDLE: /* fully unlinked */
3040 if (list_empty(&qh->qtd_list)) {
3041 qh_put(qh);
3042 break;
3043 }
3044 /* fall through */
3045 default:
3046 nogood:
3047 /* caller was supposed to have unlinked any requests;
3048 * that's not our job. just leak this memory.
3049 */
3050 oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3051 qh, ep->desc.bEndpointAddress, qh->qh_state,
3052 list_empty(&qh->qtd_list) ? "" : "(has tds)");
3053 break;
3054 }
3055 ep->hcpriv = NULL;
3056 done:
3057 spin_unlock_irqrestore(&oxu->lock, flags);
3058 }
3059
3060 static int oxu_get_frame(struct usb_hcd *hcd)
3061 {
3062 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3063
3064 return (readl(&oxu->regs->frame_index) >> 3) %
3065 oxu->periodic_size;
3066 }
3067
3068 /* Build "status change" packet (one or two bytes) from HC registers */
3069 static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3070 {
3071 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3072 u32 temp, mask, status = 0;
3073 int ports, i, retval = 1;
3074 unsigned long flags;
3075
3076 /* if !PM, root hub timers won't get shut down ... */
3077 if (!HC_IS_RUNNING(hcd->state))
3078 return 0;
3079
3080 /* init status to no-changes */
3081 buf[0] = 0;
3082 ports = HCS_N_PORTS(oxu->hcs_params);
3083 if (ports > 7) {
3084 buf[1] = 0;
3085 retval++;
3086 }
3087
3088 /* Some boards (mostly VIA?) report bogus overcurrent indications,
3089 * causing massive log spam unless we completely ignore them. It
3090 * may be relevant that VIA VT8235 controllers, where PORT_POWER is
3091 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3092 * PORT_POWER; that's surprising, but maybe within-spec.
3093 */
3094 if (!ignore_oc)
3095 mask = PORT_CSC | PORT_PEC | PORT_OCC;
3096 else
3097 mask = PORT_CSC | PORT_PEC;
3098
3099 /* no hub change reports (bit 0) for now (power, ...) */
3100
3101 /* port N changes (bit N)? */
3102 spin_lock_irqsave(&oxu->lock, flags);
3103 for (i = 0; i < ports; i++) {
3104 temp = readl(&oxu->regs->port_status[i]);
3105
3106 /*
3107 * Return status information even for ports with OWNER set.
3108 * Otherwise hub_wq wouldn't see the disconnect event when a
3109 * high-speed device is switched over to the companion
3110 * controller by the user.
3111 */
3112
3113 if (!(temp & PORT_CONNECT))
3114 oxu->reset_done[i] = 0;
3115 if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3116 time_after_eq(jiffies, oxu->reset_done[i]))) {
3117 if (i < 7)
3118 buf[0] |= 1 << (i + 1);
3119 else
3120 buf[1] |= 1 << (i - 7);
3121 status = STS_PCD;
3122 }
3123 }
3124 /* FIXME autosuspend idle root hubs */
3125 spin_unlock_irqrestore(&oxu->lock, flags);
3126 return status ? retval : 0;
3127 }
3128
3129 /* Returns the speed of a device attached to a port on the root hub. */
3130 static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3131 unsigned int portsc)
3132 {
3133 switch ((portsc >> 26) & 3) {
3134 case 0:
3135 return 0;
3136 case 1:
3137 return USB_PORT_STAT_LOW_SPEED;
3138 case 2:
3139 default:
3140 return USB_PORT_STAT_HIGH_SPEED;
3141 }
3142 }
3143
3144 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3145 static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3146 u16 wValue, u16 wIndex, char *buf, u16 wLength)
3147 {
3148 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3149 int ports = HCS_N_PORTS(oxu->hcs_params);
3150 u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3151 u32 temp, status;
3152 unsigned long flags;
3153 int retval = 0;
3154 unsigned selector;
3155
3156 /*
3157 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3158 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3159 * (track current state ourselves) ... blink for diagnostics,
3160 * power, "this is the one", etc. EHCI spec supports this.
3161 */
3162
3163 spin_lock_irqsave(&oxu->lock, flags);
3164 switch (typeReq) {
3165 case ClearHubFeature:
3166 switch (wValue) {
3167 case C_HUB_LOCAL_POWER:
3168 case C_HUB_OVER_CURRENT:
3169 /* no hub-wide feature/status flags */
3170 break;
3171 default:
3172 goto error;
3173 }
3174 break;
3175 case ClearPortFeature:
3176 if (!wIndex || wIndex > ports)
3177 goto error;
3178 wIndex--;
3179 temp = readl(status_reg);
3180
3181 /*
3182 * Even if OWNER is set, so the port is owned by the
3183 * companion controller, hub_wq needs to be able to clear
3184 * the port-change status bits (especially
3185 * USB_PORT_STAT_C_CONNECTION).
3186 */
3187
3188 switch (wValue) {
3189 case USB_PORT_FEAT_ENABLE:
3190 writel(temp & ~PORT_PE, status_reg);
3191 break;
3192 case USB_PORT_FEAT_C_ENABLE:
3193 writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3194 break;
3195 case USB_PORT_FEAT_SUSPEND:
3196 if (temp & PORT_RESET)
3197 goto error;
3198 if (temp & PORT_SUSPEND) {
3199 if ((temp & PORT_PE) == 0)
3200 goto error;
3201 /* resume signaling for 20 msec */
3202 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3203 writel(temp | PORT_RESUME, status_reg);
3204 oxu->reset_done[wIndex] = jiffies
3205 + msecs_to_jiffies(20);
3206 }
3207 break;
3208 case USB_PORT_FEAT_C_SUSPEND:
3209 /* we auto-clear this feature */
3210 break;
3211 case USB_PORT_FEAT_POWER:
3212 if (HCS_PPC(oxu->hcs_params))
3213 writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3214 status_reg);
3215 break;
3216 case USB_PORT_FEAT_C_CONNECTION:
3217 writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3218 break;
3219 case USB_PORT_FEAT_C_OVER_CURRENT:
3220 writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3221 break;
3222 case USB_PORT_FEAT_C_RESET:
3223 /* GetPortStatus clears reset */
3224 break;
3225 default:
3226 goto error;
3227 }
3228 readl(&oxu->regs->command); /* unblock posted write */
3229 break;
3230 case GetHubDescriptor:
3231 ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3232 buf);
3233 break;
3234 case GetHubStatus:
3235 /* no hub-wide feature/status flags */
3236 memset(buf, 0, 4);
3237 break;
3238 case GetPortStatus:
3239 if (!wIndex || wIndex > ports)
3240 goto error;
3241 wIndex--;
3242 status = 0;
3243 temp = readl(status_reg);
3244
3245 /* wPortChange bits */
3246 if (temp & PORT_CSC)
3247 status |= USB_PORT_STAT_C_CONNECTION << 16;
3248 if (temp & PORT_PEC)
3249 status |= USB_PORT_STAT_C_ENABLE << 16;
3250 if ((temp & PORT_OCC) && !ignore_oc)
3251 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
3252
3253 /* whoever resumes must GetPortStatus to complete it!! */
3254 if (temp & PORT_RESUME) {
3255
3256 /* Remote Wakeup received? */
3257 if (!oxu->reset_done[wIndex]) {
3258 /* resume signaling for 20 msec */
3259 oxu->reset_done[wIndex] = jiffies
3260 + msecs_to_jiffies(20);
3261 /* check the port again */
3262 mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3263 oxu->reset_done[wIndex]);
3264 }
3265
3266 /* resume completed? */
3267 else if (time_after_eq(jiffies,
3268 oxu->reset_done[wIndex])) {
3269 status |= USB_PORT_STAT_C_SUSPEND << 16;
3270 oxu->reset_done[wIndex] = 0;
3271
3272 /* stop resume signaling */
3273 temp = readl(status_reg);
3274 writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3275 status_reg);
3276 retval = handshake(oxu, status_reg,
3277 PORT_RESUME, 0, 2000 /* 2msec */);
3278 if (retval != 0) {
3279 oxu_err(oxu,
3280 "port %d resume error %d\n",
3281 wIndex + 1, retval);
3282 goto error;
3283 }
3284 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3285 }
3286 }
3287
3288 /* whoever resets must GetPortStatus to complete it!! */
3289 if ((temp & PORT_RESET)
3290 && time_after_eq(jiffies,
3291 oxu->reset_done[wIndex])) {
3292 status |= USB_PORT_STAT_C_RESET << 16;
3293 oxu->reset_done[wIndex] = 0;
3294
3295 /* force reset to complete */
3296 writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3297 status_reg);
3298 /* REVISIT: some hardware needs 550+ usec to clear
3299 * this bit; seems too long to spin routinely...
3300 */
3301 retval = handshake(oxu, status_reg,
3302 PORT_RESET, 0, 750);
3303 if (retval != 0) {
3304 oxu_err(oxu, "port %d reset error %d\n",
3305 wIndex + 1, retval);
3306 goto error;
3307 }
3308
3309 /* see what we found out */
3310 temp = check_reset_complete(oxu, wIndex, status_reg,
3311 readl(status_reg));
3312 }
3313
3314 /* transfer dedicated ports to the companion hc */
3315 if ((temp & PORT_CONNECT) &&
3316 test_bit(wIndex, &oxu->companion_ports)) {
3317 temp &= ~PORT_RWC_BITS;
3318 temp |= PORT_OWNER;
3319 writel(temp, status_reg);
3320 oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3321 temp = readl(status_reg);
3322 }
3323
3324 /*
3325 * Even if OWNER is set, there's no harm letting hub_wq
3326 * see the wPortStatus values (they should all be 0 except
3327 * for PORT_POWER anyway).
3328 */
3329
3330 if (temp & PORT_CONNECT) {
3331 status |= USB_PORT_STAT_CONNECTION;
3332 /* status may be from integrated TT */
3333 status |= oxu_port_speed(oxu, temp);
3334 }
3335 if (temp & PORT_PE)
3336 status |= USB_PORT_STAT_ENABLE;
3337 if (temp & (PORT_SUSPEND|PORT_RESUME))
3338 status |= USB_PORT_STAT_SUSPEND;
3339 if (temp & PORT_OC)
3340 status |= USB_PORT_STAT_OVERCURRENT;
3341 if (temp & PORT_RESET)
3342 status |= USB_PORT_STAT_RESET;
3343 if (temp & PORT_POWER)
3344 status |= USB_PORT_STAT_POWER;
3345
3346 #ifndef OXU_VERBOSE_DEBUG
3347 if (status & ~0xffff) /* only if wPortChange is interesting */
3348 #endif
3349 dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3350 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3351 break;
3352 case SetHubFeature:
3353 switch (wValue) {
3354 case C_HUB_LOCAL_POWER:
3355 case C_HUB_OVER_CURRENT:
3356 /* no hub-wide feature/status flags */
3357 break;
3358 default:
3359 goto error;
3360 }
3361 break;
3362 case SetPortFeature:
3363 selector = wIndex >> 8;
3364 wIndex &= 0xff;
3365 if (!wIndex || wIndex > ports)
3366 goto error;
3367 wIndex--;
3368 temp = readl(status_reg);
3369 if (temp & PORT_OWNER)
3370 break;
3371
3372 temp &= ~PORT_RWC_BITS;
3373 switch (wValue) {
3374 case USB_PORT_FEAT_SUSPEND:
3375 if ((temp & PORT_PE) == 0
3376 || (temp & PORT_RESET) != 0)
3377 goto error;
3378 if (device_may_wakeup(&hcd->self.root_hub->dev))
3379 temp |= PORT_WAKE_BITS;
3380 writel(temp | PORT_SUSPEND, status_reg);
3381 break;
3382 case USB_PORT_FEAT_POWER:
3383 if (HCS_PPC(oxu->hcs_params))
3384 writel(temp | PORT_POWER, status_reg);
3385 break;
3386 case USB_PORT_FEAT_RESET:
3387 if (temp & PORT_RESUME)
3388 goto error;
3389 /* line status bits may report this as low speed,
3390 * which can be fine if this root hub has a
3391 * transaction translator built in.
3392 */
3393 oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3394 temp |= PORT_RESET;
3395 temp &= ~PORT_PE;
3396
3397 /*
3398 * caller must wait, then call GetPortStatus
3399 * usb 2.0 spec says 50 ms resets on root
3400 */
3401 oxu->reset_done[wIndex] = jiffies
3402 + msecs_to_jiffies(50);
3403 writel(temp, status_reg);
3404 break;
3405
3406 /* For downstream facing ports (these): one hub port is put
3407 * into test mode according to USB2 11.24.2.13, then the hub
3408 * must be reset (which for root hub now means rmmod+modprobe,
3409 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
3410 * about the EHCI-specific stuff.
3411 */
3412 case USB_PORT_FEAT_TEST:
3413 if (!selector || selector > 5)
3414 goto error;
3415 ehci_quiesce(oxu);
3416 ehci_halt(oxu);
3417 temp |= selector << 16;
3418 writel(temp, status_reg);
3419 break;
3420
3421 default:
3422 goto error;
3423 }
3424 readl(&oxu->regs->command); /* unblock posted writes */
3425 break;
3426
3427 default:
3428 error:
3429 /* "stall" on error */
3430 retval = -EPIPE;
3431 }
3432 spin_unlock_irqrestore(&oxu->lock, flags);
3433 return retval;
3434 }
3435
3436 #ifdef CONFIG_PM
3437
3438 static int oxu_bus_suspend(struct usb_hcd *hcd)
3439 {
3440 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3441 int port;
3442 int mask;
3443
3444 oxu_dbg(oxu, "suspend root hub\n");
3445
3446 if (time_before(jiffies, oxu->next_statechange))
3447 msleep(5);
3448
3449 port = HCS_N_PORTS(oxu->hcs_params);
3450 spin_lock_irq(&oxu->lock);
3451
3452 /* stop schedules, clean any completed work */
3453 if (HC_IS_RUNNING(hcd->state)) {
3454 ehci_quiesce(oxu);
3455 hcd->state = HC_STATE_QUIESCING;
3456 }
3457 oxu->command = readl(&oxu->regs->command);
3458 if (oxu->reclaim)
3459 oxu->reclaim_ready = 1;
3460 ehci_work(oxu);
3461
3462 /* Unlike other USB host controller types, EHCI doesn't have
3463 * any notion of "global" or bus-wide suspend. The driver has
3464 * to manually suspend all the active unsuspended ports, and
3465 * then manually resume them in the bus_resume() routine.
3466 */
3467 oxu->bus_suspended = 0;
3468 while (port--) {
3469 u32 __iomem *reg = &oxu->regs->port_status[port];
3470 u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3471 u32 t2 = t1;
3472
3473 /* keep track of which ports we suspend */
3474 if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3475 !(t1 & PORT_SUSPEND)) {
3476 t2 |= PORT_SUSPEND;
3477 set_bit(port, &oxu->bus_suspended);
3478 }
3479
3480 /* enable remote wakeup on all ports */
3481 if (device_may_wakeup(&hcd->self.root_hub->dev))
3482 t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3483 else
3484 t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3485
3486 if (t1 != t2) {
3487 oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3488 port + 1, t1, t2);
3489 writel(t2, reg);
3490 }
3491 }
3492
3493 /* turn off now-idle HC */
3494 del_timer_sync(&oxu->watchdog);
3495 ehci_halt(oxu);
3496 hcd->state = HC_STATE_SUSPENDED;
3497
3498 /* allow remote wakeup */
3499 mask = INTR_MASK;
3500 if (!device_may_wakeup(&hcd->self.root_hub->dev))
3501 mask &= ~STS_PCD;
3502 writel(mask, &oxu->regs->intr_enable);
3503 readl(&oxu->regs->intr_enable);
3504
3505 oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3506 spin_unlock_irq(&oxu->lock);
3507 return 0;
3508 }
3509
3510 /* Caller has locked the root hub, and should reset/reinit on error */
3511 static int oxu_bus_resume(struct usb_hcd *hcd)
3512 {
3513 struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3514 u32 temp;
3515 int i;
3516
3517 if (time_before(jiffies, oxu->next_statechange))
3518 msleep(5);
3519 spin_lock_irq(&oxu->lock);
3520
3521 /* Ideally and we've got a real resume here, and no port's power
3522 * was lost. (For PCI, that means Vaux was maintained.) But we
3523 * could instead be restoring a swsusp snapshot -- so that BIOS was
3524 * the last user of the controller, not reset/pm hardware keeping
3525 * state we gave to it.
3526 */
3527 temp = readl(&oxu->regs->intr_enable);
3528 oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3529
3530 /* at least some APM implementations will try to deliver
3531 * IRQs right away, so delay them until we're ready.
3532 */
3533 writel(0, &oxu->regs->intr_enable);
3534
3535 /* re-init operational registers */
3536 writel(0, &oxu->regs->segment);
3537 writel(oxu->periodic_dma, &oxu->regs->frame_list);
3538 writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3539
3540 /* restore CMD_RUN, framelist size, and irq threshold */
3541 writel(oxu->command, &oxu->regs->command);
3542
3543 /* Some controller/firmware combinations need a delay during which
3544 * they set up the port statuses. See Bugzilla #8190. */
3545 mdelay(8);
3546
3547 /* manually resume the ports we suspended during bus_suspend() */
3548 i = HCS_N_PORTS(oxu->hcs_params);
3549 while (i--) {
3550 temp = readl(&oxu->regs->port_status[i]);
3551 temp &= ~(PORT_RWC_BITS
3552 | PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3553 if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3554 oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3555 temp |= PORT_RESUME;
3556 }
3557 writel(temp, &oxu->regs->port_status[i]);
3558 }
3559 i = HCS_N_PORTS(oxu->hcs_params);
3560 mdelay(20);
3561 while (i--) {
3562 temp = readl(&oxu->regs->port_status[i]);
3563 if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3564 temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3565 writel(temp, &oxu->regs->port_status[i]);
3566 oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3567 }
3568 }
3569 (void) readl(&oxu->regs->command);
3570
3571 /* maybe re-activate the schedule(s) */
3572 temp = 0;
3573 if (oxu->async->qh_next.qh)
3574 temp |= CMD_ASE;
3575 if (oxu->periodic_sched)
3576 temp |= CMD_PSE;
3577 if (temp) {
3578 oxu->command |= temp;
3579 writel(oxu->command, &oxu->regs->command);
3580 }
3581
3582 oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3583 hcd->state = HC_STATE_RUNNING;
3584
3585 /* Now we can safely re-enable irqs */
3586 writel(INTR_MASK, &oxu->regs->intr_enable);
3587
3588 spin_unlock_irq(&oxu->lock);
3589 return 0;
3590 }
3591
3592 #else
3593
3594 static int oxu_bus_suspend(struct usb_hcd *hcd)
3595 {
3596 return 0;
3597 }
3598
3599 static int oxu_bus_resume(struct usb_hcd *hcd)
3600 {
3601 return 0;
3602 }
3603
3604 #endif /* CONFIG_PM */
3605
3606 static const struct hc_driver oxu_hc_driver = {
3607 .description = "oxu210hp_hcd",
3608 .product_desc = "oxu210hp HCD",
3609 .hcd_priv_size = sizeof(struct oxu_hcd),
3610
3611 /*
3612 * Generic hardware linkage
3613 */
3614 .irq = oxu_irq,
3615 .flags = HCD_MEMORY | HCD_USB2,
3616
3617 /*
3618 * Basic lifecycle operations
3619 */
3620 .reset = oxu_reset,
3621 .start = oxu_run,
3622 .stop = oxu_stop,
3623 .shutdown = oxu_shutdown,
3624
3625 /*
3626 * Managing i/o requests and associated device resources
3627 */
3628 .urb_enqueue = oxu_urb_enqueue,
3629 .urb_dequeue = oxu_urb_dequeue,
3630 .endpoint_disable = oxu_endpoint_disable,
3631
3632 /*
3633 * Scheduling support
3634 */
3635 .get_frame_number = oxu_get_frame,
3636
3637 /*
3638 * Root hub support
3639 */
3640 .hub_status_data = oxu_hub_status_data,
3641 .hub_control = oxu_hub_control,
3642 .bus_suspend = oxu_bus_suspend,
3643 .bus_resume = oxu_bus_resume,
3644 };
3645
3646 /*
3647 * Module stuff
3648 */
3649
3650 static void oxu_configuration(struct platform_device *pdev, void *base)
3651 {
3652 u32 tmp;
3653
3654 /* Initialize top level registers.
3655 * First write ever
3656 */
3657 oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3658 oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
3659 oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3660
3661 tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
3662 oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
3663
3664 oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
3665 OXU_COMPARATOR | OXU_ASO_OP);
3666
3667 tmp = oxu_readl(base, OXU_CLKCTRL_SET);
3668 oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
3669
3670 /* Clear all top interrupt enable */
3671 oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
3672
3673 /* Clear all top interrupt status */
3674 oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
3675
3676 /* Enable all needed top interrupt except OTG SPH core */
3677 oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
3678 }
3679
3680 static int oxu_verify_id(struct platform_device *pdev, void *base)
3681 {
3682 u32 id;
3683 static const char * const bo[] = {
3684 "reserved",
3685 "128-pin LQFP",
3686 "84-pin TFBGA",
3687 "reserved",
3688 };
3689
3690 /* Read controller signature register to find a match */
3691 id = oxu_readl(base, OXU_DEVICEID);
3692 dev_info(&pdev->dev, "device ID %x\n", id);
3693 if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
3694 return -1;
3695
3696 dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
3697 id >> OXU_REV_SHIFT,
3698 bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
3699 (id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
3700 (id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
3701
3702 return 0;
3703 }
3704
3705 static const struct hc_driver oxu_hc_driver;
3706 static struct usb_hcd *oxu_create(struct platform_device *pdev,
3707 unsigned long memstart, unsigned long memlen,
3708 void *base, int irq, int otg)
3709 {
3710 struct device *dev = &pdev->dev;
3711
3712 struct usb_hcd *hcd;
3713 struct oxu_hcd *oxu;
3714 int ret;
3715
3716 /* Set endian mode and host mode */
3717 oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
3718 OXU_USBMODE,
3719 OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
3720
3721 hcd = usb_create_hcd(&oxu_hc_driver, dev,
3722 otg ? "oxu210hp_otg" : "oxu210hp_sph");
3723 if (!hcd)
3724 return ERR_PTR(-ENOMEM);
3725
3726 hcd->rsrc_start = memstart;
3727 hcd->rsrc_len = memlen;
3728 hcd->regs = base;
3729 hcd->irq = irq;
3730 hcd->state = HC_STATE_HALT;
3731
3732 oxu = hcd_to_oxu(hcd);
3733 oxu->is_otg = otg;
3734
3735 ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
3736 if (ret < 0)
3737 return ERR_PTR(ret);
3738
3739 device_wakeup_enable(hcd->self.controller);
3740 return hcd;
3741 }
3742
3743 static int oxu_init(struct platform_device *pdev,
3744 unsigned long memstart, unsigned long memlen,
3745 void *base, int irq)
3746 {
3747 struct oxu_info *info = platform_get_drvdata(pdev);
3748 struct usb_hcd *hcd;
3749 int ret;
3750
3751 /* First time configuration at start up */
3752 oxu_configuration(pdev, base);
3753
3754 ret = oxu_verify_id(pdev, base);
3755 if (ret) {
3756 dev_err(&pdev->dev, "no devices found!\n");
3757 return -ENODEV;
3758 }
3759
3760 /* Create the OTG controller */
3761 hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
3762 if (IS_ERR(hcd)) {
3763 dev_err(&pdev->dev, "cannot create OTG controller!\n");
3764 ret = PTR_ERR(hcd);
3765 goto error_create_otg;
3766 }
3767 info->hcd[0] = hcd;
3768
3769 /* Create the SPH host controller */
3770 hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
3771 if (IS_ERR(hcd)) {
3772 dev_err(&pdev->dev, "cannot create SPH controller!\n");
3773 ret = PTR_ERR(hcd);
3774 goto error_create_sph;
3775 }
3776 info->hcd[1] = hcd;
3777
3778 oxu_writel(base, OXU_CHIPIRQEN_SET,
3779 oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
3780
3781 return 0;
3782
3783 error_create_sph:
3784 usb_remove_hcd(info->hcd[0]);
3785 usb_put_hcd(info->hcd[0]);
3786
3787 error_create_otg:
3788 return ret;
3789 }
3790
3791 static int oxu_drv_probe(struct platform_device *pdev)
3792 {
3793 struct resource *res;
3794 void *base;
3795 unsigned long memstart, memlen;
3796 int irq, ret;
3797 struct oxu_info *info;
3798
3799 if (usb_disabled())
3800 return -ENODEV;
3801
3802 /*
3803 * Get the platform resources
3804 */
3805 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
3806 if (!res) {
3807 dev_err(&pdev->dev,
3808 "no IRQ! Check %s setup!\n", dev_name(&pdev->dev));
3809 return -ENODEV;
3810 }
3811 irq = res->start;
3812 dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
3813
3814 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3815 base = devm_ioremap_resource(&pdev->dev, res);
3816 if (IS_ERR(base)) {
3817 ret = PTR_ERR(base);
3818 goto error;
3819 }
3820 memstart = res->start;
3821 memlen = resource_size(res);
3822
3823 ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
3824 if (ret) {
3825 dev_err(&pdev->dev, "error setting irq type\n");
3826 ret = -EFAULT;
3827 goto error;
3828 }
3829
3830 /* Allocate a driver data struct to hold useful info for both
3831 * SPH & OTG devices
3832 */
3833 info = devm_kzalloc(&pdev->dev, sizeof(struct oxu_info), GFP_KERNEL);
3834 if (!info) {
3835 ret = -EFAULT;
3836 goto error;
3837 }
3838 platform_set_drvdata(pdev, info);
3839
3840 ret = oxu_init(pdev, memstart, memlen, base, irq);
3841 if (ret < 0) {
3842 dev_dbg(&pdev->dev, "cannot init USB devices\n");
3843 goto error;
3844 }
3845
3846 dev_info(&pdev->dev, "devices enabled and running\n");
3847 platform_set_drvdata(pdev, info);
3848
3849 return 0;
3850
3851 error:
3852 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
3853 return ret;
3854 }
3855
3856 static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
3857 {
3858 usb_remove_hcd(hcd);
3859 usb_put_hcd(hcd);
3860 }
3861
3862 static int oxu_drv_remove(struct platform_device *pdev)
3863 {
3864 struct oxu_info *info = platform_get_drvdata(pdev);
3865
3866 oxu_remove(pdev, info->hcd[0]);
3867 oxu_remove(pdev, info->hcd[1]);
3868
3869 return 0;
3870 }
3871
3872 static void oxu_drv_shutdown(struct platform_device *pdev)
3873 {
3874 oxu_drv_remove(pdev);
3875 }
3876
3877 #if 0
3878 /* FIXME: TODO */
3879 static int oxu_drv_suspend(struct device *dev)
3880 {
3881 struct platform_device *pdev = to_platform_device(dev);
3882 struct usb_hcd *hcd = dev_get_drvdata(dev);
3883
3884 return 0;
3885 }
3886
3887 static int oxu_drv_resume(struct device *dev)
3888 {
3889 struct platform_device *pdev = to_platform_device(dev);
3890 struct usb_hcd *hcd = dev_get_drvdata(dev);
3891
3892 return 0;
3893 }
3894 #else
3895 #define oxu_drv_suspend NULL
3896 #define oxu_drv_resume NULL
3897 #endif
3898
3899 static struct platform_driver oxu_driver = {
3900 .probe = oxu_drv_probe,
3901 .remove = oxu_drv_remove,
3902 .shutdown = oxu_drv_shutdown,
3903 .suspend = oxu_drv_suspend,
3904 .resume = oxu_drv_resume,
3905 .driver = {
3906 .name = "oxu210hp-hcd",
3907 .bus = &platform_bus_type
3908 }
3909 };
3910
3911 module_platform_driver(oxu_driver);
3912
3913 MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
3914 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3915 MODULE_LICENSE("GPL");