2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/sched.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/unistd.h>
35 #include <linux/interrupt.h>
36 #include <linux/spinlock.h>
37 #include <linux/debugfs.h>
39 #include <linux/dmapool.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/usb.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
45 #include <asm/uaccess.h>
48 #include <asm/system.h>
50 #include "../core/hcd.h"
52 #include "pci-quirks.h"
57 #define DRIVER_VERSION "v3.0"
58 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
59 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
61 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
64 * debug = 0, no debugging messages
65 * debug = 1, dump failed URBs except for stalls
66 * debug = 2, dump all failed URBs (including stalls)
67 * show all queues in /debug/uhci/[pci_addr]
68 * debug = 3, show all TDs in URBs when dumping
71 #define DEBUG_CONFIGURED 1
73 module_param(debug
, int, S_IRUGO
| S_IWUSR
);
74 MODULE_PARM_DESC(debug
, "Debug level");
77 #define DEBUG_CONFIGURED 0
82 #define ERRBUF_LEN (32 * 1024)
84 static struct kmem_cache
*uhci_up_cachep
; /* urb_priv */
86 static void suspend_rh(struct uhci_hcd
*uhci
, enum uhci_rh_state new_state
);
87 static void wakeup_rh(struct uhci_hcd
*uhci
);
88 static void uhci_get_current_frame_number(struct uhci_hcd
*uhci
);
90 #include "uhci-debug.c"
95 * Finish up a host controller reset and update the recorded state.
97 static void finish_reset(struct uhci_hcd
*uhci
)
101 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
102 * bits in the port status and control registers.
103 * We have to clear them by hand.
105 for (port
= 0; port
< uhci
->rh_numports
; ++port
)
106 outw(0, uhci
->io_addr
+ USBPORTSC1
+ (port
* 2));
108 uhci
->port_c_suspend
= uhci
->resuming_ports
= 0;
109 uhci
->rh_state
= UHCI_RH_RESET
;
110 uhci
->is_stopped
= UHCI_IS_STOPPED
;
111 uhci_to_hcd(uhci
)->state
= HC_STATE_HALT
;
112 uhci_to_hcd(uhci
)->poll_rh
= 0;
114 uhci
->dead
= 0; /* Full reset resurrects the controller */
118 * Last rites for a defunct/nonfunctional controller
119 * or one we don't want to use any more.
121 static void uhci_hc_died(struct uhci_hcd
*uhci
)
123 uhci_get_current_frame_number(uhci
);
124 uhci_reset_hc(to_pci_dev(uhci_dev(uhci
)), uhci
->io_addr
);
128 /* The current frame may already be partway finished */
129 ++uhci
->frame_number
;
133 * Initialize a controller that was newly discovered or has lost power
134 * or otherwise been reset while it was suspended. In none of these cases
135 * can we be sure of its previous state.
137 static void check_and_reset_hc(struct uhci_hcd
*uhci
)
139 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci
)), uhci
->io_addr
))
144 * Store the basic register settings needed by the controller.
146 static void configure_hc(struct uhci_hcd
*uhci
)
148 /* Set the frame length to the default: 1 ms exactly */
149 outb(USBSOF_DEFAULT
, uhci
->io_addr
+ USBSOF
);
151 /* Store the frame list base address */
152 outl(uhci
->frame_dma_handle
, uhci
->io_addr
+ USBFLBASEADD
);
154 /* Set the current frame number */
155 outw(uhci
->frame_number
& UHCI_MAX_SOF_NUMBER
,
156 uhci
->io_addr
+ USBFRNUM
);
158 /* Mark controller as not halted before we enable interrupts */
159 uhci_to_hcd(uhci
)->state
= HC_STATE_SUSPENDED
;
163 pci_write_config_word(to_pci_dev(uhci_dev(uhci
)), USBLEGSUP
,
168 static int resume_detect_interrupts_are_broken(struct uhci_hcd
*uhci
)
172 switch (to_pci_dev(uhci_dev(uhci
))->vendor
) {
176 case PCI_VENDOR_ID_GENESYS
:
177 /* Genesys Logic's GL880S controllers don't generate
178 * resume-detect interrupts.
182 case PCI_VENDOR_ID_INTEL
:
183 /* Some of Intel's USB controllers have a bug that causes
184 * resume-detect interrupts if any port has an over-current
185 * condition. To make matters worse, some motherboards
186 * hardwire unused USB ports' over-current inputs active!
187 * To prevent problems, we will not enable resume-detect
188 * interrupts if any ports are OC.
190 for (port
= 0; port
< uhci
->rh_numports
; ++port
) {
191 if (inw(uhci
->io_addr
+ USBPORTSC1
+ port
* 2) &
200 static int remote_wakeup_is_broken(struct uhci_hcd
*uhci
)
202 static struct dmi_system_id broken_wakeup_table
[] = {
204 .ident
= "Asus A7V8X",
206 DMI_MATCH(DMI_BOARD_VENDOR
, "ASUSTeK"),
207 DMI_MATCH(DMI_BOARD_NAME
, "A7V8X"),
208 DMI_MATCH(DMI_BOARD_VERSION
, "REV 1.xx"),
215 /* One of Asus's motherboards has a bug which causes it to
216 * wake up immediately from suspend-to-RAM if any of the ports
217 * are connected. In such cases we will not set EGSM.
219 if (dmi_check_system(broken_wakeup_table
)) {
220 for (port
= 0; port
< uhci
->rh_numports
; ++port
) {
221 if (inw(uhci
->io_addr
+ USBPORTSC1
+ port
* 2) &
230 static void suspend_rh(struct uhci_hcd
*uhci
, enum uhci_rh_state new_state
)
231 __releases(uhci
->lock
)
232 __acquires(uhci
->lock
)
235 int int_enable
, egsm_enable
;
237 auto_stop
= (new_state
== UHCI_RH_AUTO_STOPPED
);
238 dev_dbg(&uhci_to_hcd(uhci
)->self
.root_hub
->dev
,
239 "%s%s\n", __FUNCTION__
,
240 (auto_stop
? " (auto-stop)" : ""));
242 /* If we get a suspend request when we're already auto-stopped
243 * then there's nothing to do.
245 if (uhci
->rh_state
== UHCI_RH_AUTO_STOPPED
) {
246 uhci
->rh_state
= new_state
;
250 /* Enable resume-detect interrupts if they work.
251 * Then enter Global Suspend mode if _it_ works, still configured.
253 egsm_enable
= USBCMD_EGSM
;
254 uhci
->working_RD
= 1;
255 int_enable
= USBINTR_RESUME
;
256 if (remote_wakeup_is_broken(uhci
))
258 if (resume_detect_interrupts_are_broken(uhci
) || !egsm_enable
)
259 uhci
->working_RD
= int_enable
= 0;
261 outw(int_enable
, uhci
->io_addr
+ USBINTR
);
262 outw(egsm_enable
| USBCMD_CF
, uhci
->io_addr
+ USBCMD
);
266 /* If we're auto-stopping then no devices have been attached
267 * for a while, so there shouldn't be any active URBs and the
268 * controller should stop after a few microseconds. Otherwise
269 * we will give the controller one frame to stop.
271 if (!auto_stop
&& !(inw(uhci
->io_addr
+ USBSTS
) & USBSTS_HCH
)) {
272 uhci
->rh_state
= UHCI_RH_SUSPENDING
;
273 spin_unlock_irq(&uhci
->lock
);
275 spin_lock_irq(&uhci
->lock
);
279 if (!(inw(uhci
->io_addr
+ USBSTS
) & USBSTS_HCH
))
280 dev_warn(&uhci_to_hcd(uhci
)->self
.root_hub
->dev
,
281 "Controller not stopped yet!\n");
283 uhci_get_current_frame_number(uhci
);
285 uhci
->rh_state
= new_state
;
286 uhci
->is_stopped
= UHCI_IS_STOPPED
;
287 uhci_to_hcd(uhci
)->poll_rh
= !int_enable
;
289 uhci_scan_schedule(uhci
);
293 static void start_rh(struct uhci_hcd
*uhci
)
295 uhci_to_hcd(uhci
)->state
= HC_STATE_RUNNING
;
296 uhci
->is_stopped
= 0;
298 /* Mark it configured and running with a 64-byte max packet.
299 * All interrupts are enabled, even though RESUME won't do anything.
301 outw(USBCMD_RS
| USBCMD_CF
| USBCMD_MAXP
, uhci
->io_addr
+ USBCMD
);
302 outw(USBINTR_TIMEOUT
| USBINTR_RESUME
| USBINTR_IOC
| USBINTR_SP
,
303 uhci
->io_addr
+ USBINTR
);
305 uhci
->rh_state
= UHCI_RH_RUNNING
;
306 uhci_to_hcd(uhci
)->poll_rh
= 1;
309 static void wakeup_rh(struct uhci_hcd
*uhci
)
310 __releases(uhci
->lock
)
311 __acquires(uhci
->lock
)
313 dev_dbg(&uhci_to_hcd(uhci
)->self
.root_hub
->dev
,
314 "%s%s\n", __FUNCTION__
,
315 uhci
->rh_state
== UHCI_RH_AUTO_STOPPED
?
316 " (auto-start)" : "");
318 /* If we are auto-stopped then no devices are attached so there's
319 * no need for wakeup signals. Otherwise we send Global Resume
322 if (uhci
->rh_state
== UHCI_RH_SUSPENDED
) {
323 uhci
->rh_state
= UHCI_RH_RESUMING
;
324 outw(USBCMD_FGR
| USBCMD_EGSM
| USBCMD_CF
,
325 uhci
->io_addr
+ USBCMD
);
326 spin_unlock_irq(&uhci
->lock
);
328 spin_lock_irq(&uhci
->lock
);
332 /* End Global Resume and wait for EOP to be sent */
333 outw(USBCMD_CF
, uhci
->io_addr
+ USBCMD
);
336 if (inw(uhci
->io_addr
+ USBCMD
) & USBCMD_FGR
)
337 dev_warn(uhci_dev(uhci
), "FGR not stopped yet!\n");
342 /* Restart root hub polling */
343 mod_timer(&uhci_to_hcd(uhci
)->rh_timer
, jiffies
);
346 static irqreturn_t
uhci_irq(struct usb_hcd
*hcd
)
348 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
349 unsigned short status
;
353 * Read the interrupt status, and write it back to clear the
354 * interrupt cause. Contrary to the UHCI specification, the
355 * "HC Halted" status bit is persistent: it is RO, not R/WC.
357 status
= inw(uhci
->io_addr
+ USBSTS
);
358 if (!(status
& ~USBSTS_HCH
)) /* shared interrupt, not mine */
360 outw(status
, uhci
->io_addr
+ USBSTS
); /* Clear it */
362 if (status
& ~(USBSTS_USBINT
| USBSTS_ERROR
| USBSTS_RD
)) {
363 if (status
& USBSTS_HSE
)
364 dev_err(uhci_dev(uhci
), "host system error, "
366 if (status
& USBSTS_HCPE
)
367 dev_err(uhci_dev(uhci
), "host controller process "
368 "error, something bad happened!\n");
369 if (status
& USBSTS_HCH
) {
370 spin_lock_irqsave(&uhci
->lock
, flags
);
371 if (uhci
->rh_state
>= UHCI_RH_RUNNING
) {
372 dev_err(uhci_dev(uhci
),
373 "host controller halted, "
375 if (debug
> 1 && errbuf
) {
376 /* Print the schedule for debugging */
377 uhci_sprint_schedule(uhci
,
383 /* Force a callback in case there are
385 mod_timer(&hcd
->rh_timer
, jiffies
);
387 spin_unlock_irqrestore(&uhci
->lock
, flags
);
391 if (status
& USBSTS_RD
)
392 usb_hcd_poll_rh_status(hcd
);
394 spin_lock_irqsave(&uhci
->lock
, flags
);
395 uhci_scan_schedule(uhci
);
396 spin_unlock_irqrestore(&uhci
->lock
, flags
);
403 * Store the current frame number in uhci->frame_number if the controller
404 * is runnning. Expand from 11 bits (of which we use only 10) to a
405 * full-sized integer.
407 * Like many other parts of the driver, this code relies on being polled
408 * more than once per second as long as the controller is running.
410 static void uhci_get_current_frame_number(struct uhci_hcd
*uhci
)
412 if (!uhci
->is_stopped
) {
415 delta
= (inw(uhci
->io_addr
+ USBFRNUM
) - uhci
->frame_number
) &
416 (UHCI_NUMFRAMES
- 1);
417 uhci
->frame_number
+= delta
;
422 * De-allocate all resources
424 static void release_uhci(struct uhci_hcd
*uhci
)
428 if (DEBUG_CONFIGURED
) {
429 spin_lock_irq(&uhci
->lock
);
430 uhci
->is_initialized
= 0;
431 spin_unlock_irq(&uhci
->lock
);
433 debugfs_remove(uhci
->dentry
);
436 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++)
437 uhci_free_qh(uhci
, uhci
->skelqh
[i
]);
439 uhci_free_td(uhci
, uhci
->term_td
);
441 dma_pool_destroy(uhci
->qh_pool
);
443 dma_pool_destroy(uhci
->td_pool
);
445 kfree(uhci
->frame_cpu
);
447 dma_free_coherent(uhci_dev(uhci
),
448 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
449 uhci
->frame
, uhci
->frame_dma_handle
);
452 static int uhci_init(struct usb_hcd
*hcd
)
454 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
455 unsigned io_size
= (unsigned) hcd
->rsrc_len
;
458 uhci
->io_addr
= (unsigned long) hcd
->rsrc_start
;
460 /* The UHCI spec says devices must have 2 ports, and goes on to say
461 * they may have more but gives no way to determine how many there
462 * are. However according to the UHCI spec, Bit 7 of the port
463 * status and control register is always set to 1. So we try to
464 * use this to our advantage. Another common failure mode when
465 * a nonexistent register is addressed is to return all ones, so
466 * we test for that also.
468 for (port
= 0; port
< (io_size
- USBPORTSC1
) / 2; port
++) {
469 unsigned int portstatus
;
471 portstatus
= inw(uhci
->io_addr
+ USBPORTSC1
+ (port
* 2));
472 if (!(portstatus
& 0x0080) || portstatus
== 0xffff)
476 dev_info(uhci_dev(uhci
), "detected %d ports\n", port
);
478 /* Anything greater than 7 is weird so we'll ignore it. */
479 if (port
> UHCI_RH_MAXCHILD
) {
480 dev_info(uhci_dev(uhci
), "port count misdetected? "
481 "forcing to 2 ports\n");
484 uhci
->rh_numports
= port
;
486 /* Kick BIOS off this hardware and reset if the controller
487 * isn't already safely quiescent.
489 check_and_reset_hc(uhci
);
493 /* Make sure the controller is quiescent and that we're not using it
494 * any more. This is mainly for the benefit of programs which, like kexec,
495 * expect the hardware to be idle: not doing DMA or generating IRQs.
497 * This routine may be called in a damaged or failing kernel. Hence we
498 * do not acquire the spinlock before shutting down the controller.
500 static void uhci_shutdown(struct pci_dev
*pdev
)
502 struct usb_hcd
*hcd
= (struct usb_hcd
*) pci_get_drvdata(pdev
);
504 uhci_hc_died(hcd_to_uhci(hcd
));
508 * Allocate a frame list, and then setup the skeleton
510 * The hardware doesn't really know any difference
511 * in the queues, but the order does matter for the
512 * protocols higher up. The order is:
514 * - any isochronous events handled before any
515 * of the queues. We don't do that here, because
516 * we'll create the actual TD entries on demand.
517 * - The first queue is the interrupt queue.
518 * - The second queue is the control queue, split into low- and full-speed
519 * - The third queue is bulk queue.
520 * - The fourth queue is the bandwidth reclamation queue, which loops back
521 * to the full-speed control queue.
523 static int uhci_start(struct usb_hcd
*hcd
)
525 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
528 struct dentry
*dentry
;
530 hcd
->uses_new_polling
= 1;
532 spin_lock_init(&uhci
->lock
);
533 setup_timer(&uhci
->fsbr_timer
, uhci_fsbr_timeout
,
534 (unsigned long) uhci
);
535 INIT_LIST_HEAD(&uhci
->idle_qh_list
);
536 init_waitqueue_head(&uhci
->waitqh
);
538 if (DEBUG_CONFIGURED
) {
539 dentry
= debugfs_create_file(hcd
->self
.bus_name
,
540 S_IFREG
|S_IRUGO
|S_IWUSR
, uhci_debugfs_root
,
541 uhci
, &uhci_debug_operations
);
543 dev_err(uhci_dev(uhci
), "couldn't create uhci "
546 goto err_create_debug_entry
;
548 uhci
->dentry
= dentry
;
551 uhci
->frame
= dma_alloc_coherent(uhci_dev(uhci
),
552 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
553 &uhci
->frame_dma_handle
, 0);
555 dev_err(uhci_dev(uhci
), "unable to allocate "
556 "consistent memory for frame list\n");
557 goto err_alloc_frame
;
559 memset(uhci
->frame
, 0, UHCI_NUMFRAMES
* sizeof(*uhci
->frame
));
561 uhci
->frame_cpu
= kcalloc(UHCI_NUMFRAMES
, sizeof(*uhci
->frame_cpu
),
563 if (!uhci
->frame_cpu
) {
564 dev_err(uhci_dev(uhci
), "unable to allocate "
565 "memory for frame pointers\n");
566 goto err_alloc_frame_cpu
;
569 uhci
->td_pool
= dma_pool_create("uhci_td", uhci_dev(uhci
),
570 sizeof(struct uhci_td
), 16, 0);
571 if (!uhci
->td_pool
) {
572 dev_err(uhci_dev(uhci
), "unable to create td dma_pool\n");
573 goto err_create_td_pool
;
576 uhci
->qh_pool
= dma_pool_create("uhci_qh", uhci_dev(uhci
),
577 sizeof(struct uhci_qh
), 16, 0);
578 if (!uhci
->qh_pool
) {
579 dev_err(uhci_dev(uhci
), "unable to create qh dma_pool\n");
580 goto err_create_qh_pool
;
583 uhci
->term_td
= uhci_alloc_td(uhci
);
584 if (!uhci
->term_td
) {
585 dev_err(uhci_dev(uhci
), "unable to allocate terminating TD\n");
586 goto err_alloc_term_td
;
589 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++) {
590 uhci
->skelqh
[i
] = uhci_alloc_qh(uhci
, NULL
, NULL
);
591 if (!uhci
->skelqh
[i
]) {
592 dev_err(uhci_dev(uhci
), "unable to allocate QH\n");
593 goto err_alloc_skelqh
;
598 * 8 Interrupt queues; link all higher int queues to int1,
599 * then link int1 to control and control to bulk
601 uhci
->skel_int128_qh
->link
=
602 uhci
->skel_int64_qh
->link
=
603 uhci
->skel_int32_qh
->link
=
604 uhci
->skel_int16_qh
->link
=
605 uhci
->skel_int8_qh
->link
=
606 uhci
->skel_int4_qh
->link
=
607 uhci
->skel_int2_qh
->link
= UHCI_PTR_QH
|
608 cpu_to_le32(uhci
->skel_int1_qh
->dma_handle
);
610 uhci
->skel_int1_qh
->link
= UHCI_PTR_QH
|
611 cpu_to_le32(uhci
->skel_ls_control_qh
->dma_handle
);
612 uhci
->skel_ls_control_qh
->link
= UHCI_PTR_QH
|
613 cpu_to_le32(uhci
->skel_fs_control_qh
->dma_handle
);
614 uhci
->skel_fs_control_qh
->link
= UHCI_PTR_QH
|
615 cpu_to_le32(uhci
->skel_bulk_qh
->dma_handle
);
616 uhci
->skel_bulk_qh
->link
= UHCI_PTR_QH
|
617 cpu_to_le32(uhci
->skel_term_qh
->dma_handle
);
619 /* This dummy TD is to work around a bug in Intel PIIX controllers */
620 uhci_fill_td(uhci
->term_td
, 0, uhci_explen(0) |
621 (0x7f << TD_TOKEN_DEVADDR_SHIFT
) | USB_PID_IN
, 0);
622 uhci
->term_td
->link
= cpu_to_le32(uhci
->term_td
->dma_handle
);
624 uhci
->skel_term_qh
->link
= UHCI_PTR_TERM
;
625 uhci
->skel_term_qh
->element
= cpu_to_le32(uhci
->term_td
->dma_handle
);
628 * Fill the frame list: make all entries point to the proper
631 * The interrupt queues will be interleaved as evenly as possible.
632 * There's not much to be done about period-1 interrupts; they have
633 * to occur in every frame. But we can schedule period-2 interrupts
634 * in odd-numbered frames, period-4 interrupts in frames congruent
635 * to 2 (mod 4), and so on. This way each frame only has two
636 * interrupt QHs, which will help spread out bandwidth utilization.
638 for (i
= 0; i
< UHCI_NUMFRAMES
; i
++) {
642 * ffs (Find First bit Set) does exactly what we need:
643 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[8],
644 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
645 * ffs >= 7 => not on any high-period queue, so use
646 * skel_int1_qh = skelqh[9].
647 * Add UHCI_NUMFRAMES to insure at least one bit is set.
649 irq
= 8 - (int) __ffs(i
+ UHCI_NUMFRAMES
);
653 /* Only place we don't use the frame list routines */
654 uhci
->frame
[i
] = UHCI_PTR_QH
|
655 cpu_to_le32(uhci
->skelqh
[irq
]->dma_handle
);
659 * Some architectures require a full mb() to enforce completion of
660 * the memory writes above before the I/O transfers in configure_hc().
665 uhci
->is_initialized
= 1;
673 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++) {
675 uhci_free_qh(uhci
, uhci
->skelqh
[i
]);
678 uhci_free_td(uhci
, uhci
->term_td
);
681 dma_pool_destroy(uhci
->qh_pool
);
684 dma_pool_destroy(uhci
->td_pool
);
687 kfree(uhci
->frame_cpu
);
690 dma_free_coherent(uhci_dev(uhci
),
691 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
692 uhci
->frame
, uhci
->frame_dma_handle
);
695 debugfs_remove(uhci
->dentry
);
697 err_create_debug_entry
:
701 static void uhci_stop(struct usb_hcd
*hcd
)
703 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
705 spin_lock_irq(&uhci
->lock
);
706 if (test_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
) && !uhci
->dead
)
708 uhci_scan_schedule(uhci
);
709 spin_unlock_irq(&uhci
->lock
);
711 del_timer_sync(&uhci
->fsbr_timer
);
716 static int uhci_rh_suspend(struct usb_hcd
*hcd
)
718 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
721 spin_lock_irq(&uhci
->lock
);
722 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
))
724 else if (!uhci
->dead
)
725 suspend_rh(uhci
, UHCI_RH_SUSPENDED
);
726 spin_unlock_irq(&uhci
->lock
);
730 static int uhci_rh_resume(struct usb_hcd
*hcd
)
732 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
735 spin_lock_irq(&uhci
->lock
);
736 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
)) {
737 dev_warn(&hcd
->self
.root_hub
->dev
, "HC isn't running!\n");
739 } else if (!uhci
->dead
)
741 spin_unlock_irq(&uhci
->lock
);
745 static int uhci_suspend(struct usb_hcd
*hcd
, pm_message_t message
)
747 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
750 dev_dbg(uhci_dev(uhci
), "%s\n", __FUNCTION__
);
752 spin_lock_irq(&uhci
->lock
);
753 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
) || uhci
->dead
)
754 goto done_okay
; /* Already suspended or dead */
756 if (uhci
->rh_state
> UHCI_RH_SUSPENDED
) {
757 dev_warn(uhci_dev(uhci
), "Root hub isn't suspended!\n");
762 /* All PCI host controllers are required to disable IRQ generation
763 * at the source, so we must turn off PIRQ.
765 pci_write_config_word(to_pci_dev(uhci_dev(uhci
)), USBLEGSUP
, 0);
769 /* FIXME: Enable non-PME# remote wakeup? */
771 /* make sure snapshot being resumed re-enumerates everything */
772 if (message
.event
== PM_EVENT_PRETHAW
)
776 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
778 spin_unlock_irq(&uhci
->lock
);
782 static int uhci_resume(struct usb_hcd
*hcd
)
784 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
786 dev_dbg(uhci_dev(uhci
), "%s\n", __FUNCTION__
);
788 /* Since we aren't in D3 any more, it's safe to set this flag
789 * even if the controller was dead.
791 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
794 spin_lock_irq(&uhci
->lock
);
796 /* FIXME: Disable non-PME# remote wakeup? */
798 /* The firmware or a boot kernel may have changed the controller
799 * settings during a system wakeup. Check it and reconfigure
802 check_and_reset_hc(uhci
);
804 /* If the controller was dead before, it's back alive now */
807 if (uhci
->rh_state
== UHCI_RH_RESET
) {
809 /* The controller had to be reset */
810 usb_root_hub_lost_power(hcd
->self
.root_hub
);
811 suspend_rh(uhci
, UHCI_RH_SUSPENDED
);
814 spin_unlock_irq(&uhci
->lock
);
816 if (!uhci
->working_RD
) {
817 /* Suspended root hub needs to be polled */
819 usb_hcd_poll_rh_status(hcd
);
825 /* Wait until a particular device/endpoint's QH is idle, and free it */
826 static void uhci_hcd_endpoint_disable(struct usb_hcd
*hcd
,
827 struct usb_host_endpoint
*hep
)
829 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
832 spin_lock_irq(&uhci
->lock
);
833 qh
= (struct uhci_qh
*) hep
->hcpriv
;
837 while (qh
->state
!= QH_STATE_IDLE
) {
839 spin_unlock_irq(&uhci
->lock
);
840 wait_event_interruptible(uhci
->waitqh
,
841 qh
->state
== QH_STATE_IDLE
);
842 spin_lock_irq(&uhci
->lock
);
846 uhci_free_qh(uhci
, qh
);
848 spin_unlock_irq(&uhci
->lock
);
851 static int uhci_hcd_get_frame_number(struct usb_hcd
*hcd
)
853 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
854 unsigned frame_number
;
857 /* Minimize latency by avoiding the spinlock */
858 frame_number
= uhci
->frame_number
;
860 delta
= (inw(uhci
->io_addr
+ USBFRNUM
) - frame_number
) &
861 (UHCI_NUMFRAMES
- 1);
862 return frame_number
+ delta
;
865 static const char hcd_name
[] = "uhci_hcd";
867 static const struct hc_driver uhci_driver
= {
868 .description
= hcd_name
,
869 .product_desc
= "UHCI Host Controller",
870 .hcd_priv_size
= sizeof(struct uhci_hcd
),
872 /* Generic hardware linkage */
876 /* Basic lifecycle operations */
880 .suspend
= uhci_suspend
,
881 .resume
= uhci_resume
,
882 .bus_suspend
= uhci_rh_suspend
,
883 .bus_resume
= uhci_rh_resume
,
887 .urb_enqueue
= uhci_urb_enqueue
,
888 .urb_dequeue
= uhci_urb_dequeue
,
890 .endpoint_disable
= uhci_hcd_endpoint_disable
,
891 .get_frame_number
= uhci_hcd_get_frame_number
,
893 .hub_status_data
= uhci_hub_status_data
,
894 .hub_control
= uhci_hub_control
,
897 static const struct pci_device_id uhci_pci_ids
[] = { {
898 /* handle any USB UHCI controller */
899 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI
, ~0),
900 .driver_data
= (unsigned long) &uhci_driver
,
901 }, { /* end: all zeroes */ }
904 MODULE_DEVICE_TABLE(pci
, uhci_pci_ids
);
906 static struct pci_driver uhci_pci_driver
= {
907 .name
= (char *)hcd_name
,
908 .id_table
= uhci_pci_ids
,
910 .probe
= usb_hcd_pci_probe
,
911 .remove
= usb_hcd_pci_remove
,
912 .shutdown
= uhci_shutdown
,
915 .suspend
= usb_hcd_pci_suspend
,
916 .resume
= usb_hcd_pci_resume
,
920 static int __init
uhci_hcd_init(void)
922 int retval
= -ENOMEM
;
924 printk(KERN_INFO DRIVER_DESC
" " DRIVER_VERSION
"\n");
929 if (DEBUG_CONFIGURED
) {
930 errbuf
= kmalloc(ERRBUF_LEN
, GFP_KERNEL
);
933 uhci_debugfs_root
= debugfs_create_dir("uhci", NULL
);
934 if (!uhci_debugfs_root
)
938 uhci_up_cachep
= kmem_cache_create("uhci_urb_priv",
939 sizeof(struct urb_priv
), 0, 0, NULL
, NULL
);
943 retval
= pci_register_driver(&uhci_pci_driver
);
950 kmem_cache_destroy(uhci_up_cachep
);
953 debugfs_remove(uhci_debugfs_root
);
963 static void __exit
uhci_hcd_cleanup(void)
965 pci_unregister_driver(&uhci_pci_driver
);
966 kmem_cache_destroy(uhci_up_cachep
);
967 debugfs_remove(uhci_debugfs_root
);
971 module_init(uhci_hcd_init
);
972 module_exit(uhci_hcd_cleanup
);
974 MODULE_AUTHOR(DRIVER_AUTHOR
);
975 MODULE_DESCRIPTION(DRIVER_DESC
);
976 MODULE_LICENSE("GPL");