2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/config.h>
26 #ifdef CONFIG_USB_DEBUG
31 #include <linux/module.h>
32 #include <linux/pci.h>
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/delay.h>
36 #include <linux/ioport.h>
37 #include <linux/sched.h>
38 #include <linux/slab.h>
39 #include <linux/smp_lock.h>
40 #include <linux/errno.h>
41 #include <linux/unistd.h>
42 #include <linux/interrupt.h>
43 #include <linux/spinlock.h>
44 #include <linux/debugfs.h>
46 #include <linux/dmapool.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/usb.h>
49 #include <linux/bitops.h>
51 #include <asm/uaccess.h>
54 #include <asm/system.h>
56 #include "../core/hcd.h"
62 #define DRIVER_VERSION "v2.3"
63 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
64 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
66 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
69 * debug = 0, no debugging messages
70 * debug = 1, dump failed URB's except for stalls
71 * debug = 2, dump all failed URB's (including stalls)
72 * show all queues in /debug/uhci/[pci_addr]
73 * debug = 3, show all TD's in URB's when dumping
80 module_param(debug
, int, S_IRUGO
| S_IWUSR
);
81 MODULE_PARM_DESC(debug
, "Debug level");
83 #define ERRBUF_LEN (32 * 1024)
85 static kmem_cache_t
*uhci_up_cachep
; /* urb_priv */
87 static void suspend_rh(struct uhci_hcd
*uhci
, enum uhci_rh_state new_state
);
88 static void wakeup_rh(struct uhci_hcd
*uhci
);
89 static void uhci_get_current_frame_number(struct uhci_hcd
*uhci
);
91 /* If a transfer is still active after this much time, turn off FSBR */
92 #define IDLE_TIMEOUT msecs_to_jiffies(50)
93 #define FSBR_DELAY msecs_to_jiffies(50)
95 /* When we timeout an idle transfer for FSBR, we'll switch it over to */
96 /* depth first traversal. We'll do it in groups of this number of TD's */
97 /* to make sure it doesn't hog all of the bandwidth */
98 #define DEPTH_INTERVAL 5
100 static inline void restart_timer(struct uhci_hcd
*uhci
)
102 mod_timer(&uhci
->stall_timer
, jiffies
+ msecs_to_jiffies(100));
105 #include "uhci-hub.c"
106 #include "uhci-debug.c"
110 * Make sure the controller is completely inactive, unable to
111 * generate interrupts or do DMA.
113 static void reset_hc(struct uhci_hcd
*uhci
)
115 /* Turn off PIRQ enable and SMI enable. (This also turns off the
116 * BIOS's USB Legacy Support.) Turn off all the R/WC bits too.
118 pci_write_config_word(to_pci_dev(uhci_dev(uhci
)), USBLEGSUP
,
121 /* Reset the HC - this will force us to get a
122 * new notification of any already connected
123 * ports due to the virtual disconnect that it
126 outw(USBCMD_HCRESET
, uhci
->io_addr
+ USBCMD
);
129 if (inw(uhci
->io_addr
+ USBCMD
) & USBCMD_HCRESET
)
130 dev_warn(uhci_dev(uhci
), "HCRESET not completed yet!\n");
132 /* Just to be safe, disable interrupt requests and
133 * make sure the controller is stopped.
135 outw(0, uhci
->io_addr
+ USBINTR
);
136 outw(0, uhci
->io_addr
+ USBCMD
);
138 uhci
->port_c_suspend
= uhci
->suspended_ports
=
139 uhci
->resuming_ports
= 0;
140 uhci
->rh_state
= UHCI_RH_RESET
;
141 uhci
->is_stopped
= UHCI_IS_STOPPED
;
142 uhci_to_hcd(uhci
)->state
= HC_STATE_HALT
;
143 uhci_to_hcd(uhci
)->poll_rh
= 0;
147 * Last rites for a defunct/nonfunctional controller
149 static void hc_died(struct uhci_hcd
*uhci
)
152 uhci
->hc_inaccessible
= 1;
153 del_timer(&uhci
->stall_timer
);
157 * Initialize a controller that was newly discovered or has just been
158 * resumed. In either case we can't be sure of its previous state.
160 static void check_and_reset_hc(struct uhci_hcd
*uhci
)
163 unsigned int cmd
, intr
;
166 * When restarting a suspended controller, we expect all the
167 * settings to be the same as we left them:
169 * PIRQ and SMI disabled, no R/WC bits set in USBLEGSUP;
170 * Controller is stopped and configured with EGSM set;
171 * No interrupts enabled except possibly Resume Detect.
173 * If any of these conditions are violated we do a complete reset.
175 pci_read_config_word(to_pci_dev(uhci_dev(uhci
)), USBLEGSUP
, &legsup
);
176 if (legsup
& ~USBLEGSUP_RO
) {
177 dev_dbg(uhci_dev(uhci
), "%s: legsup = 0x%04x\n",
178 __FUNCTION__
, legsup
);
182 cmd
= inw(uhci
->io_addr
+ USBCMD
);
183 if ((cmd
& USBCMD_RS
) || !(cmd
& USBCMD_CF
) || !(cmd
& USBCMD_EGSM
)) {
184 dev_dbg(uhci_dev(uhci
), "%s: cmd = 0x%04x\n",
189 intr
= inw(uhci
->io_addr
+ USBINTR
);
190 if (intr
& (~USBINTR_RESUME
)) {
191 dev_dbg(uhci_dev(uhci
), "%s: intr = 0x%04x\n",
198 dev_dbg(uhci_dev(uhci
), "Performing full reset\n");
203 * Store the basic register settings needed by the controller.
205 static void configure_hc(struct uhci_hcd
*uhci
)
207 /* Set the frame length to the default: 1 ms exactly */
208 outb(USBSOF_DEFAULT
, uhci
->io_addr
+ USBSOF
);
210 /* Store the frame list base address */
211 outl(uhci
->fl
->dma_handle
, uhci
->io_addr
+ USBFLBASEADD
);
213 /* Set the current frame number */
214 outw(uhci
->frame_number
, uhci
->io_addr
+ USBFRNUM
);
216 /* Mark controller as running before we enable interrupts */
217 uhci_to_hcd(uhci
)->state
= HC_STATE_RUNNING
;
221 pci_write_config_word(to_pci_dev(uhci_dev(uhci
)), USBLEGSUP
,
226 static int resume_detect_interrupts_are_broken(struct uhci_hcd
*uhci
)
230 switch (to_pci_dev(uhci_dev(uhci
))->vendor
) {
234 case PCI_VENDOR_ID_GENESYS
:
235 /* Genesys Logic's GL880S controllers don't generate
236 * resume-detect interrupts.
240 case PCI_VENDOR_ID_INTEL
:
241 /* Some of Intel's USB controllers have a bug that causes
242 * resume-detect interrupts if any port has an over-current
243 * condition. To make matters worse, some motherboards
244 * hardwire unused USB ports' over-current inputs active!
245 * To prevent problems, we will not enable resume-detect
246 * interrupts if any ports are OC.
248 for (port
= 0; port
< uhci
->rh_numports
; ++port
) {
249 if (inw(uhci
->io_addr
+ USBPORTSC1
+ port
* 2) &
258 static void suspend_rh(struct uhci_hcd
*uhci
, enum uhci_rh_state new_state
)
259 __releases(uhci
->lock
)
260 __acquires(uhci
->lock
)
265 auto_stop
= (new_state
== UHCI_RH_AUTO_STOPPED
);
266 dev_dbg(uhci_dev(uhci
), "%s%s\n", __FUNCTION__
,
267 (auto_stop
? " (auto-stop)" : ""));
269 /* If we get a suspend request when we're already auto-stopped
270 * then there's nothing to do.
272 if (uhci
->rh_state
== UHCI_RH_AUTO_STOPPED
) {
273 uhci
->rh_state
= new_state
;
277 /* Enable resume-detect interrupts if they work.
278 * Then enter Global Suspend mode, still configured.
280 int_enable
= (resume_detect_interrupts_are_broken(uhci
) ?
282 outw(int_enable
, uhci
->io_addr
+ USBINTR
);
283 outw(USBCMD_EGSM
| USBCMD_CF
, uhci
->io_addr
+ USBCMD
);
287 /* If we're auto-stopping then no devices have been attached
288 * for a while, so there shouldn't be any active URBs and the
289 * controller should stop after a few microseconds. Otherwise
290 * we will give the controller one frame to stop.
292 if (!auto_stop
&& !(inw(uhci
->io_addr
+ USBSTS
) & USBSTS_HCH
)) {
293 uhci
->rh_state
= UHCI_RH_SUSPENDING
;
294 spin_unlock_irq(&uhci
->lock
);
296 spin_lock_irq(&uhci
->lock
);
297 if (uhci
->hc_inaccessible
) /* Died */
300 if (!(inw(uhci
->io_addr
+ USBSTS
) & USBSTS_HCH
))
301 dev_warn(uhci_dev(uhci
), "Controller not stopped yet!\n");
303 uhci_get_current_frame_number(uhci
);
306 uhci
->rh_state
= new_state
;
307 uhci
->is_stopped
= UHCI_IS_STOPPED
;
308 del_timer(&uhci
->stall_timer
);
309 uhci_to_hcd(uhci
)->poll_rh
= !int_enable
;
311 uhci_scan_schedule(uhci
, NULL
);
314 static void start_rh(struct uhci_hcd
*uhci
)
316 uhci
->is_stopped
= 0;
319 /* Mark it configured and running with a 64-byte max packet.
320 * All interrupts are enabled, even though RESUME won't do anything.
322 outw(USBCMD_RS
| USBCMD_CF
| USBCMD_MAXP
, uhci
->io_addr
+ USBCMD
);
323 outw(USBINTR_TIMEOUT
| USBINTR_RESUME
| USBINTR_IOC
| USBINTR_SP
,
324 uhci
->io_addr
+ USBINTR
);
326 uhci
->rh_state
= UHCI_RH_RUNNING
;
327 uhci_to_hcd(uhci
)->poll_rh
= 1;
331 static void wakeup_rh(struct uhci_hcd
*uhci
)
332 __releases(uhci
->lock
)
333 __acquires(uhci
->lock
)
335 dev_dbg(uhci_dev(uhci
), "%s%s\n", __FUNCTION__
,
336 uhci
->rh_state
== UHCI_RH_AUTO_STOPPED
?
337 " (auto-start)" : "");
339 /* If we are auto-stopped then no devices are attached so there's
340 * no need for wakeup signals. Otherwise we send Global Resume
343 if (uhci
->rh_state
== UHCI_RH_SUSPENDED
) {
344 uhci
->rh_state
= UHCI_RH_RESUMING
;
345 outw(USBCMD_FGR
| USBCMD_EGSM
| USBCMD_CF
,
346 uhci
->io_addr
+ USBCMD
);
347 spin_unlock_irq(&uhci
->lock
);
349 spin_lock_irq(&uhci
->lock
);
350 if (uhci
->hc_inaccessible
) /* Died */
353 /* End Global Resume and wait for EOP to be sent */
354 outw(USBCMD_CF
, uhci
->io_addr
+ USBCMD
);
357 if (inw(uhci
->io_addr
+ USBCMD
) & USBCMD_FGR
)
358 dev_warn(uhci_dev(uhci
), "FGR not stopped yet!\n");
363 /* Restart root hub polling */
364 mod_timer(&uhci_to_hcd(uhci
)->rh_timer
, jiffies
);
367 static void stall_callback(unsigned long _uhci
)
369 struct uhci_hcd
*uhci
= (struct uhci_hcd
*) _uhci
;
372 spin_lock_irqsave(&uhci
->lock
, flags
);
373 uhci_scan_schedule(uhci
, NULL
);
376 if (!uhci
->is_stopped
)
378 spin_unlock_irqrestore(&uhci
->lock
, flags
);
381 static irqreturn_t
uhci_irq(struct usb_hcd
*hcd
, struct pt_regs
*regs
)
383 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
384 unsigned short status
;
388 * Read the interrupt status, and write it back to clear the
389 * interrupt cause. Contrary to the UHCI specification, the
390 * "HC Halted" status bit is persistent: it is RO, not R/WC.
392 status
= inw(uhci
->io_addr
+ USBSTS
);
393 if (!(status
& ~USBSTS_HCH
)) /* shared interrupt, not mine */
395 outw(status
, uhci
->io_addr
+ USBSTS
); /* Clear it */
397 if (status
& ~(USBSTS_USBINT
| USBSTS_ERROR
| USBSTS_RD
)) {
398 if (status
& USBSTS_HSE
)
399 dev_err(uhci_dev(uhci
), "host system error, "
401 if (status
& USBSTS_HCPE
)
402 dev_err(uhci_dev(uhci
), "host controller process "
403 "error, something bad happened!\n");
404 if (status
& USBSTS_HCH
) {
405 spin_lock_irqsave(&uhci
->lock
, flags
);
406 if (uhci
->rh_state
>= UHCI_RH_RUNNING
) {
407 dev_err(uhci_dev(uhci
),
408 "host controller halted, "
411 spin_unlock_irqrestore(&uhci
->lock
, flags
);
414 spin_unlock_irqrestore(&uhci
->lock
, flags
);
418 if (status
& USBSTS_RD
)
419 usb_hcd_poll_rh_status(hcd
);
421 spin_lock_irqsave(&uhci
->lock
, flags
);
422 uhci_scan_schedule(uhci
, regs
);
423 spin_unlock_irqrestore(&uhci
->lock
, flags
);
429 * Store the current frame number in uhci->frame_number if the controller
432 static void uhci_get_current_frame_number(struct uhci_hcd
*uhci
)
434 if (!uhci
->is_stopped
)
435 uhci
->frame_number
= inw(uhci
->io_addr
+ USBFRNUM
);
439 * De-allocate all resources
441 static void release_uhci(struct uhci_hcd
*uhci
)
445 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++)
446 if (uhci
->skelqh
[i
]) {
447 uhci_free_qh(uhci
, uhci
->skelqh
[i
]);
448 uhci
->skelqh
[i
] = NULL
;
452 uhci_free_td(uhci
, uhci
->term_td
);
453 uhci
->term_td
= NULL
;
457 dma_pool_destroy(uhci
->qh_pool
);
458 uhci
->qh_pool
= NULL
;
462 dma_pool_destroy(uhci
->td_pool
);
463 uhci
->td_pool
= NULL
;
467 dma_free_coherent(uhci_dev(uhci
), sizeof(*uhci
->fl
),
468 uhci
->fl
, uhci
->fl
->dma_handle
);
473 debugfs_remove(uhci
->dentry
);
478 static int uhci_reset(struct usb_hcd
*hcd
)
480 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
482 uhci
->io_addr
= (unsigned long) hcd
->rsrc_start
;
484 /* Kick BIOS off this hardware and reset if the controller
485 * isn't already safely quiescent.
487 check_and_reset_hc(uhci
);
492 * Allocate a frame list, and then setup the skeleton
494 * The hardware doesn't really know any difference
495 * in the queues, but the order does matter for the
496 * protocols higher up. The order is:
498 * - any isochronous events handled before any
499 * of the queues. We don't do that here, because
500 * we'll create the actual TD entries on demand.
501 * - The first queue is the interrupt queue.
502 * - The second queue is the control queue, split into low- and full-speed
503 * - The third queue is bulk queue.
504 * - The fourth queue is the bandwidth reclamation queue, which loops back
505 * to the full-speed control queue.
507 static int uhci_start(struct usb_hcd
*hcd
)
509 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
513 dma_addr_t dma_handle
;
514 struct usb_device
*udev
;
515 struct dentry
*dentry
;
517 io_size
= (unsigned) hcd
->rsrc_len
;
518 hcd
->uses_new_polling
= 1;
519 if (pci_find_capability(to_pci_dev(uhci_dev(uhci
)), PCI_CAP_ID_PM
))
520 hcd
->can_wakeup
= 1; /* Assume it supports PME# */
522 dentry
= debugfs_create_file(hcd
->self
.bus_name
,
523 S_IFREG
|S_IRUGO
|S_IWUSR
, uhci_debugfs_root
, uhci
,
524 &uhci_debug_operations
);
526 dev_err(uhci_dev(uhci
),
527 "couldn't create uhci debugfs entry\n");
529 goto err_create_debug_entry
;
531 uhci
->dentry
= dentry
;
534 uhci
->fsbrtimeout
= 0;
536 spin_lock_init(&uhci
->lock
);
537 INIT_LIST_HEAD(&uhci
->qh_remove_list
);
539 INIT_LIST_HEAD(&uhci
->td_remove_list
);
541 INIT_LIST_HEAD(&uhci
->urb_remove_list
);
543 INIT_LIST_HEAD(&uhci
->urb_list
);
545 INIT_LIST_HEAD(&uhci
->complete_list
);
547 init_waitqueue_head(&uhci
->waitqh
);
549 init_timer(&uhci
->stall_timer
);
550 uhci
->stall_timer
.function
= stall_callback
;
551 uhci
->stall_timer
.data
= (unsigned long) uhci
;
553 uhci
->fl
= dma_alloc_coherent(uhci_dev(uhci
), sizeof(*uhci
->fl
),
556 dev_err(uhci_dev(uhci
), "unable to allocate "
557 "consistent memory for frame list\n");
561 memset((void *)uhci
->fl
, 0, sizeof(*uhci
->fl
));
563 uhci
->fl
->dma_handle
= dma_handle
;
565 uhci
->td_pool
= dma_pool_create("uhci_td", uhci_dev(uhci
),
566 sizeof(struct uhci_td
), 16, 0);
567 if (!uhci
->td_pool
) {
568 dev_err(uhci_dev(uhci
), "unable to create td dma_pool\n");
569 goto err_create_td_pool
;
572 uhci
->qh_pool
= dma_pool_create("uhci_qh", uhci_dev(uhci
),
573 sizeof(struct uhci_qh
), 16, 0);
574 if (!uhci
->qh_pool
) {
575 dev_err(uhci_dev(uhci
), "unable to create qh dma_pool\n");
576 goto err_create_qh_pool
;
579 /* Initialize the root hub */
581 /* UHCI specs says devices must have 2 ports, but goes on to say */
582 /* they may have more but give no way to determine how many they */
583 /* have. However, according to the UHCI spec, Bit 7 is always set */
584 /* to 1. So we try to use this to our advantage */
585 for (port
= 0; port
< (io_size
- 0x10) / 2; port
++) {
586 unsigned int portstatus
;
588 portstatus
= inw(uhci
->io_addr
+ 0x10 + (port
* 2));
589 if (!(portstatus
& 0x0080))
593 dev_info(uhci_dev(uhci
), "detected %d ports\n", port
);
595 /* This is experimental so anything less than 2 or greater than 8 is */
596 /* something weird and we'll ignore it */
597 if (port
< 2 || port
> UHCI_RH_MAXCHILD
) {
598 dev_info(uhci_dev(uhci
), "port count misdetected? "
599 "forcing to 2 ports\n");
603 uhci
->rh_numports
= port
;
605 udev
= usb_alloc_dev(NULL
, &hcd
->self
, 0);
607 dev_err(uhci_dev(uhci
), "unable to allocate root hub\n");
608 goto err_alloc_root_hub
;
611 uhci
->term_td
= uhci_alloc_td(uhci
, udev
);
612 if (!uhci
->term_td
) {
613 dev_err(uhci_dev(uhci
), "unable to allocate terminating TD\n");
614 goto err_alloc_term_td
;
617 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++) {
618 uhci
->skelqh
[i
] = uhci_alloc_qh(uhci
, udev
);
619 if (!uhci
->skelqh
[i
]) {
620 dev_err(uhci_dev(uhci
), "unable to allocate QH\n");
621 goto err_alloc_skelqh
;
626 * 8 Interrupt queues; link all higher int queues to int1,
627 * then link int1 to control and control to bulk
629 uhci
->skel_int128_qh
->link
=
630 uhci
->skel_int64_qh
->link
=
631 uhci
->skel_int32_qh
->link
=
632 uhci
->skel_int16_qh
->link
=
633 uhci
->skel_int8_qh
->link
=
634 uhci
->skel_int4_qh
->link
=
635 uhci
->skel_int2_qh
->link
=
636 cpu_to_le32(uhci
->skel_int1_qh
->dma_handle
) | UHCI_PTR_QH
;
637 uhci
->skel_int1_qh
->link
= cpu_to_le32(uhci
->skel_ls_control_qh
->dma_handle
) | UHCI_PTR_QH
;
639 uhci
->skel_ls_control_qh
->link
= cpu_to_le32(uhci
->skel_fs_control_qh
->dma_handle
) | UHCI_PTR_QH
;
640 uhci
->skel_fs_control_qh
->link
= cpu_to_le32(uhci
->skel_bulk_qh
->dma_handle
) | UHCI_PTR_QH
;
641 uhci
->skel_bulk_qh
->link
= cpu_to_le32(uhci
->skel_term_qh
->dma_handle
) | UHCI_PTR_QH
;
643 /* This dummy TD is to work around a bug in Intel PIIX controllers */
644 uhci_fill_td(uhci
->term_td
, 0, (UHCI_NULL_DATA_SIZE
<< 21) |
645 (0x7f << TD_TOKEN_DEVADDR_SHIFT
) | USB_PID_IN
, 0);
646 uhci
->term_td
->link
= cpu_to_le32(uhci
->term_td
->dma_handle
);
648 uhci
->skel_term_qh
->link
= UHCI_PTR_TERM
;
649 uhci
->skel_term_qh
->element
= cpu_to_le32(uhci
->term_td
->dma_handle
);
652 * Fill the frame list: make all entries point to the proper
655 * The interrupt queues will be interleaved as evenly as possible.
656 * There's not much to be done about period-1 interrupts; they have
657 * to occur in every frame. But we can schedule period-2 interrupts
658 * in odd-numbered frames, period-4 interrupts in frames congruent
659 * to 2 (mod 4), and so on. This way each frame only has two
660 * interrupt QHs, which will help spread out bandwidth utilization.
662 for (i
= 0; i
< UHCI_NUMFRAMES
; i
++) {
666 * ffs (Find First bit Set) does exactly what we need:
667 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6],
668 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc.
669 * ffs > 6 => not on any high-period queue, so use
670 * skel_int1_qh = skelqh[7].
671 * Add UHCI_NUMFRAMES to insure at least one bit is set.
673 irq
= 6 - (int) __ffs(i
+ UHCI_NUMFRAMES
);
677 /* Only place we don't use the frame list routines */
678 uhci
->fl
->frame
[i
] = UHCI_PTR_QH
|
679 cpu_to_le32(uhci
->skelqh
[irq
]->dma_handle
);
683 * Some architectures require a full mb() to enforce completion of
684 * the memory writes above before the I/O transfers in configure_hc().
691 udev
->speed
= USB_SPEED_FULL
;
693 if (usb_hcd_register_root_hub(udev
, hcd
) != 0) {
694 dev_err(uhci_dev(uhci
), "unable to start root hub\n");
696 goto err_start_root_hub
;
706 del_timer_sync(&uhci
->stall_timer
);
709 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++)
710 if (uhci
->skelqh
[i
]) {
711 uhci_free_qh(uhci
, uhci
->skelqh
[i
]);
712 uhci
->skelqh
[i
] = NULL
;
715 uhci_free_td(uhci
, uhci
->term_td
);
716 uhci
->term_td
= NULL
;
722 dma_pool_destroy(uhci
->qh_pool
);
723 uhci
->qh_pool
= NULL
;
726 dma_pool_destroy(uhci
->td_pool
);
727 uhci
->td_pool
= NULL
;
730 dma_free_coherent(uhci_dev(uhci
), sizeof(*uhci
->fl
),
731 uhci
->fl
, uhci
->fl
->dma_handle
);
735 debugfs_remove(uhci
->dentry
);
738 err_create_debug_entry
:
742 static void uhci_stop(struct usb_hcd
*hcd
)
744 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
746 spin_lock_irq(&uhci
->lock
);
748 uhci_scan_schedule(uhci
, NULL
);
749 spin_unlock_irq(&uhci
->lock
);
751 del_timer_sync(&uhci
->stall_timer
);
756 static int uhci_rh_suspend(struct usb_hcd
*hcd
)
758 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
760 spin_lock_irq(&uhci
->lock
);
761 if (!uhci
->hc_inaccessible
) /* Not dead */
762 suspend_rh(uhci
, UHCI_RH_SUSPENDED
);
763 spin_unlock_irq(&uhci
->lock
);
767 static int uhci_rh_resume(struct usb_hcd
*hcd
)
769 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
772 spin_lock_irq(&uhci
->lock
);
773 if (uhci
->hc_inaccessible
) {
774 if (uhci
->rh_state
== UHCI_RH_SUSPENDED
) {
775 dev_warn(uhci_dev(uhci
), "HC isn't running!\n");
778 /* Otherwise the HC is dead */
781 spin_unlock_irq(&uhci
->lock
);
785 static int uhci_suspend(struct usb_hcd
*hcd
, pm_message_t message
)
787 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
790 dev_dbg(uhci_dev(uhci
), "%s\n", __FUNCTION__
);
792 spin_lock_irq(&uhci
->lock
);
793 if (uhci
->hc_inaccessible
) /* Dead or already suspended */
796 #ifndef CONFIG_USB_SUSPEND
797 /* Otherwise this would never happen */
798 suspend_rh(uhci
, UHCI_RH_SUSPENDED
);
801 if (uhci
->rh_state
> UHCI_RH_SUSPENDED
) {
802 dev_warn(uhci_dev(uhci
), "Root hub isn't suspended!\n");
803 hcd
->state
= HC_STATE_RUNNING
;
808 /* All PCI host controllers are required to disable IRQ generation
809 * at the source, so we must turn off PIRQ.
811 pci_write_config_word(to_pci_dev(uhci_dev(uhci
)), USBLEGSUP
, 0);
812 uhci
->hc_inaccessible
= 1;
814 /* FIXME: Enable non-PME# remote wakeup? */
817 spin_unlock_irq(&uhci
->lock
);
819 del_timer_sync(&hcd
->rh_timer
);
823 static int uhci_resume(struct usb_hcd
*hcd
)
825 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
827 dev_dbg(uhci_dev(uhci
), "%s\n", __FUNCTION__
);
829 if (uhci
->rh_state
== UHCI_RH_RESET
) /* Dead */
831 spin_lock_irq(&uhci
->lock
);
833 /* FIXME: Disable non-PME# remote wakeup? */
835 uhci
->hc_inaccessible
= 0;
837 /* The BIOS may have changed the controller settings during a
838 * system wakeup. Check it and reconfigure to avoid problems.
840 check_and_reset_hc(uhci
);
843 #ifndef CONFIG_USB_SUSPEND
844 /* Otherwise this would never happen */
847 if (uhci
->rh_state
== UHCI_RH_RESET
)
848 suspend_rh(uhci
, UHCI_RH_SUSPENDED
);
850 spin_unlock_irq(&uhci
->lock
);
853 usb_hcd_poll_rh_status(hcd
);
858 /* Wait until all the URBs for a particular device/endpoint are gone */
859 static void uhci_hcd_endpoint_disable(struct usb_hcd
*hcd
,
860 struct usb_host_endpoint
*ep
)
862 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
864 wait_event_interruptible(uhci
->waitqh
, list_empty(&ep
->urb_list
));
867 static int uhci_hcd_get_frame_number(struct usb_hcd
*hcd
)
869 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
874 /* Minimize latency by avoiding the spinlock */
875 local_irq_save(flags
);
876 is_stopped
= uhci
->is_stopped
;
878 frame_number
= (is_stopped
? uhci
->frame_number
:
879 inw(uhci
->io_addr
+ USBFRNUM
));
880 local_irq_restore(flags
);
884 static const char hcd_name
[] = "uhci_hcd";
886 static const struct hc_driver uhci_driver
= {
887 .description
= hcd_name
,
888 .product_desc
= "UHCI Host Controller",
889 .hcd_priv_size
= sizeof(struct uhci_hcd
),
891 /* Generic hardware linkage */
895 /* Basic lifecycle operations */
899 .suspend
= uhci_suspend
,
900 .resume
= uhci_resume
,
901 .hub_suspend
= uhci_rh_suspend
,
902 .hub_resume
= uhci_rh_resume
,
906 .urb_enqueue
= uhci_urb_enqueue
,
907 .urb_dequeue
= uhci_urb_dequeue
,
909 .endpoint_disable
= uhci_hcd_endpoint_disable
,
910 .get_frame_number
= uhci_hcd_get_frame_number
,
912 .hub_status_data
= uhci_hub_status_data
,
913 .hub_control
= uhci_hub_control
,
916 static const struct pci_device_id uhci_pci_ids
[] = { {
917 /* handle any USB UHCI controller */
918 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB
<< 8) | 0x00), ~0),
919 .driver_data
= (unsigned long) &uhci_driver
,
920 }, { /* end: all zeroes */ }
923 MODULE_DEVICE_TABLE(pci
, uhci_pci_ids
);
925 static struct pci_driver uhci_pci_driver
= {
926 .name
= (char *)hcd_name
,
927 .id_table
= uhci_pci_ids
,
929 .probe
= usb_hcd_pci_probe
,
930 .remove
= usb_hcd_pci_remove
,
933 .suspend
= usb_hcd_pci_suspend
,
934 .resume
= usb_hcd_pci_resume
,
938 static int __init
uhci_hcd_init(void)
940 int retval
= -ENOMEM
;
942 printk(KERN_INFO DRIVER_DESC
" " DRIVER_VERSION
"\n");
948 errbuf
= kmalloc(ERRBUF_LEN
, GFP_KERNEL
);
953 uhci_debugfs_root
= debugfs_create_dir("uhci", NULL
);
954 if (!uhci_debugfs_root
)
957 uhci_up_cachep
= kmem_cache_create("uhci_urb_priv",
958 sizeof(struct urb_priv
), 0, 0, NULL
, NULL
);
962 retval
= pci_register_driver(&uhci_pci_driver
);
969 if (kmem_cache_destroy(uhci_up_cachep
))
970 warn("not all urb_priv's were freed!");
973 debugfs_remove(uhci_debugfs_root
);
983 static void __exit
uhci_hcd_cleanup(void)
985 pci_unregister_driver(&uhci_pci_driver
);
987 if (kmem_cache_destroy(uhci_up_cachep
))
988 warn("not all urb_priv's were freed!");
990 debugfs_remove(uhci_debugfs_root
);
994 module_init(uhci_hcd_init
);
995 module_exit(uhci_hcd_cleanup
);
997 MODULE_AUTHOR(DRIVER_AUTHOR
);
998 MODULE_DESCRIPTION(DRIVER_DESC
);
999 MODULE_LICENSE("GPL");