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usb: xhci: dbc: Don't decrement runtime PM counter if DBC is not started
[mirror_ubuntu-bionic-kernel.git] / drivers / usb / host / xhci-dbgcap.c
1 /**
2 * xhci-dbgcap.c - xHCI debug capability support
3 *
4 * Copyright (C) 2017 Intel Corporation
5 *
6 * Author: Lu Baolu <baolu.lu@linux.intel.com>
7 */
8 #include <linux/dma-mapping.h>
9 #include <linux/slab.h>
10 #include <linux/nls.h>
11
12 #include "xhci.h"
13 #include "xhci-trace.h"
14 #include "xhci-dbgcap.h"
15
16 static inline void *
17 dbc_dma_alloc_coherent(struct xhci_hcd *xhci, size_t size,
18 dma_addr_t *dma_handle, gfp_t flags)
19 {
20 void *vaddr;
21
22 vaddr = dma_alloc_coherent(xhci_to_hcd(xhci)->self.sysdev,
23 size, dma_handle, flags);
24 memset(vaddr, 0, size);
25 return vaddr;
26 }
27
28 static inline void
29 dbc_dma_free_coherent(struct xhci_hcd *xhci, size_t size,
30 void *cpu_addr, dma_addr_t dma_handle)
31 {
32 if (cpu_addr)
33 dma_free_coherent(xhci_to_hcd(xhci)->self.sysdev,
34 size, cpu_addr, dma_handle);
35 }
36
37 static u32 xhci_dbc_populate_strings(struct dbc_str_descs *strings)
38 {
39 struct usb_string_descriptor *s_desc;
40 u32 string_length;
41
42 /* Serial string: */
43 s_desc = (struct usb_string_descriptor *)strings->serial;
44 utf8s_to_utf16s(DBC_STRING_SERIAL, strlen(DBC_STRING_SERIAL),
45 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
46 DBC_MAX_STRING_LENGTH);
47
48 s_desc->bLength = (strlen(DBC_STRING_SERIAL) + 1) * 2;
49 s_desc->bDescriptorType = USB_DT_STRING;
50 string_length = s_desc->bLength;
51 string_length <<= 8;
52
53 /* Product string: */
54 s_desc = (struct usb_string_descriptor *)strings->product;
55 utf8s_to_utf16s(DBC_STRING_PRODUCT, strlen(DBC_STRING_PRODUCT),
56 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
57 DBC_MAX_STRING_LENGTH);
58
59 s_desc->bLength = (strlen(DBC_STRING_PRODUCT) + 1) * 2;
60 s_desc->bDescriptorType = USB_DT_STRING;
61 string_length += s_desc->bLength;
62 string_length <<= 8;
63
64 /* Manufacture string: */
65 s_desc = (struct usb_string_descriptor *)strings->manufacturer;
66 utf8s_to_utf16s(DBC_STRING_MANUFACTURER,
67 strlen(DBC_STRING_MANUFACTURER),
68 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
69 DBC_MAX_STRING_LENGTH);
70
71 s_desc->bLength = (strlen(DBC_STRING_MANUFACTURER) + 1) * 2;
72 s_desc->bDescriptorType = USB_DT_STRING;
73 string_length += s_desc->bLength;
74 string_length <<= 8;
75
76 /* String0: */
77 strings->string0[0] = 4;
78 strings->string0[1] = USB_DT_STRING;
79 strings->string0[2] = 0x09;
80 strings->string0[3] = 0x04;
81 string_length += 4;
82
83 return string_length;
84 }
85
86 static void xhci_dbc_init_contexts(struct xhci_hcd *xhci, u32 string_length)
87 {
88 struct xhci_dbc *dbc;
89 struct dbc_info_context *info;
90 struct xhci_ep_ctx *ep_ctx;
91 u32 dev_info;
92 dma_addr_t deq, dma;
93 unsigned int max_burst;
94
95 dbc = xhci->dbc;
96 if (!dbc)
97 return;
98
99 /* Populate info Context: */
100 info = (struct dbc_info_context *)dbc->ctx->bytes;
101 dma = dbc->string_dma;
102 info->string0 = cpu_to_le64(dma);
103 info->manufacturer = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH);
104 info->product = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 2);
105 info->serial = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 3);
106 info->length = cpu_to_le32(string_length);
107
108 /* Populate bulk out endpoint context: */
109 ep_ctx = dbc_bulkout_ctx(dbc);
110 max_burst = DBC_CTRL_MAXBURST(readl(&dbc->regs->control));
111 deq = dbc_bulkout_enq(dbc);
112 ep_ctx->ep_info = 0;
113 ep_ctx->ep_info2 = dbc_epctx_info2(BULK_OUT_EP, 1024, max_burst);
114 ep_ctx->deq = cpu_to_le64(deq | dbc->ring_out->cycle_state);
115
116 /* Populate bulk in endpoint context: */
117 ep_ctx = dbc_bulkin_ctx(dbc);
118 deq = dbc_bulkin_enq(dbc);
119 ep_ctx->ep_info = 0;
120 ep_ctx->ep_info2 = dbc_epctx_info2(BULK_IN_EP, 1024, max_burst);
121 ep_ctx->deq = cpu_to_le64(deq | dbc->ring_in->cycle_state);
122
123 /* Set DbC context and info registers: */
124 xhci_write_64(xhci, dbc->ctx->dma, &dbc->regs->dccp);
125
126 dev_info = cpu_to_le32((DBC_VENDOR_ID << 16) | DBC_PROTOCOL);
127 writel(dev_info, &dbc->regs->devinfo1);
128
129 dev_info = cpu_to_le32((DBC_DEVICE_REV << 16) | DBC_PRODUCT_ID);
130 writel(dev_info, &dbc->regs->devinfo2);
131 }
132
133 static void xhci_dbc_giveback(struct dbc_request *req, int status)
134 __releases(&dbc->lock)
135 __acquires(&dbc->lock)
136 {
137 struct dbc_ep *dep = req->dep;
138 struct xhci_dbc *dbc = dep->dbc;
139 struct xhci_hcd *xhci = dbc->xhci;
140 struct device *dev = xhci_to_hcd(dbc->xhci)->self.sysdev;
141
142 list_del_init(&req->list_pending);
143 req->trb_dma = 0;
144 req->trb = NULL;
145
146 if (req->status == -EINPROGRESS)
147 req->status = status;
148
149 trace_xhci_dbc_giveback_request(req);
150
151 dma_unmap_single(dev,
152 req->dma,
153 req->length,
154 dbc_ep_dma_direction(dep));
155
156 /* Give back the transfer request: */
157 spin_unlock(&dbc->lock);
158 req->complete(xhci, req);
159 spin_lock(&dbc->lock);
160 }
161
162 static void xhci_dbc_flush_single_request(struct dbc_request *req)
163 {
164 union xhci_trb *trb = req->trb;
165
166 trb->generic.field[0] = 0;
167 trb->generic.field[1] = 0;
168 trb->generic.field[2] = 0;
169 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
170 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(TRB_TR_NOOP));
171
172 xhci_dbc_giveback(req, -ESHUTDOWN);
173 }
174
175 static void xhci_dbc_flush_endpoint_requests(struct dbc_ep *dep)
176 {
177 struct dbc_request *req, *tmp;
178
179 list_for_each_entry_safe(req, tmp, &dep->list_pending, list_pending)
180 xhci_dbc_flush_single_request(req);
181 }
182
183 static void xhci_dbc_flush_reqests(struct xhci_dbc *dbc)
184 {
185 xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_OUT]);
186 xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_IN]);
187 }
188
189 struct dbc_request *
190 dbc_alloc_request(struct dbc_ep *dep, gfp_t gfp_flags)
191 {
192 struct dbc_request *req;
193
194 req = kzalloc(sizeof(*req), gfp_flags);
195 if (!req)
196 return NULL;
197
198 req->dep = dep;
199 INIT_LIST_HEAD(&req->list_pending);
200 INIT_LIST_HEAD(&req->list_pool);
201 req->direction = dep->direction;
202
203 trace_xhci_dbc_alloc_request(req);
204
205 return req;
206 }
207
208 void
209 dbc_free_request(struct dbc_ep *dep, struct dbc_request *req)
210 {
211 trace_xhci_dbc_free_request(req);
212
213 kfree(req);
214 }
215
216 static void
217 xhci_dbc_queue_trb(struct xhci_ring *ring, u32 field1,
218 u32 field2, u32 field3, u32 field4)
219 {
220 union xhci_trb *trb, *next;
221
222 trb = ring->enqueue;
223 trb->generic.field[0] = cpu_to_le32(field1);
224 trb->generic.field[1] = cpu_to_le32(field2);
225 trb->generic.field[2] = cpu_to_le32(field3);
226 trb->generic.field[3] = cpu_to_le32(field4);
227
228 trace_xhci_dbc_gadget_ep_queue(ring, &trb->generic);
229
230 ring->num_trbs_free--;
231 next = ++(ring->enqueue);
232 if (TRB_TYPE_LINK_LE32(next->link.control)) {
233 next->link.control ^= cpu_to_le32(TRB_CYCLE);
234 ring->enqueue = ring->enq_seg->trbs;
235 ring->cycle_state ^= 1;
236 }
237 }
238
239 static int xhci_dbc_queue_bulk_tx(struct dbc_ep *dep,
240 struct dbc_request *req)
241 {
242 u64 addr;
243 union xhci_trb *trb;
244 unsigned int num_trbs;
245 struct xhci_dbc *dbc = dep->dbc;
246 struct xhci_ring *ring = dep->ring;
247 u32 length, control, cycle;
248
249 num_trbs = count_trbs(req->dma, req->length);
250 WARN_ON(num_trbs != 1);
251 if (ring->num_trbs_free < num_trbs)
252 return -EBUSY;
253
254 addr = req->dma;
255 trb = ring->enqueue;
256 cycle = ring->cycle_state;
257 length = TRB_LEN(req->length);
258 control = TRB_TYPE(TRB_NORMAL) | TRB_IOC;
259
260 if (cycle)
261 control &= cpu_to_le32(~TRB_CYCLE);
262 else
263 control |= cpu_to_le32(TRB_CYCLE);
264
265 req->trb = ring->enqueue;
266 req->trb_dma = xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
267 xhci_dbc_queue_trb(ring,
268 lower_32_bits(addr),
269 upper_32_bits(addr),
270 length, control);
271
272 /*
273 * Add a barrier between writes of trb fields and flipping
274 * the cycle bit:
275 */
276 wmb();
277
278 if (cycle)
279 trb->generic.field[3] |= cpu_to_le32(TRB_CYCLE);
280 else
281 trb->generic.field[3] &= cpu_to_le32(~TRB_CYCLE);
282
283 writel(DBC_DOOR_BELL_TARGET(dep->direction), &dbc->regs->doorbell);
284
285 return 0;
286 }
287
288 static int
289 dbc_ep_do_queue(struct dbc_ep *dep, struct dbc_request *req)
290 {
291 int ret;
292 struct device *dev;
293 struct xhci_dbc *dbc = dep->dbc;
294 struct xhci_hcd *xhci = dbc->xhci;
295
296 dev = xhci_to_hcd(xhci)->self.sysdev;
297
298 if (!req->length || !req->buf)
299 return -EINVAL;
300
301 req->actual = 0;
302 req->status = -EINPROGRESS;
303
304 req->dma = dma_map_single(dev,
305 req->buf,
306 req->length,
307 dbc_ep_dma_direction(dep));
308 if (dma_mapping_error(dev, req->dma)) {
309 xhci_err(xhci, "failed to map buffer\n");
310 return -EFAULT;
311 }
312
313 ret = xhci_dbc_queue_bulk_tx(dep, req);
314 if (ret) {
315 xhci_err(xhci, "failed to queue trbs\n");
316 dma_unmap_single(dev,
317 req->dma,
318 req->length,
319 dbc_ep_dma_direction(dep));
320 return -EFAULT;
321 }
322
323 list_add_tail(&req->list_pending, &dep->list_pending);
324
325 return 0;
326 }
327
328 int dbc_ep_queue(struct dbc_ep *dep, struct dbc_request *req,
329 gfp_t gfp_flags)
330 {
331 unsigned long flags;
332 struct xhci_dbc *dbc = dep->dbc;
333 int ret = -ESHUTDOWN;
334
335 spin_lock_irqsave(&dbc->lock, flags);
336 if (dbc->state == DS_CONFIGURED)
337 ret = dbc_ep_do_queue(dep, req);
338 spin_unlock_irqrestore(&dbc->lock, flags);
339
340 mod_delayed_work(system_wq, &dbc->event_work, 0);
341
342 trace_xhci_dbc_queue_request(req);
343
344 return ret;
345 }
346
347 static inline void xhci_dbc_do_eps_init(struct xhci_hcd *xhci, bool direction)
348 {
349 struct dbc_ep *dep;
350 struct xhci_dbc *dbc = xhci->dbc;
351
352 dep = &dbc->eps[direction];
353 dep->dbc = dbc;
354 dep->direction = direction;
355 dep->ring = direction ? dbc->ring_in : dbc->ring_out;
356
357 INIT_LIST_HEAD(&dep->list_pending);
358 }
359
360 static void xhci_dbc_eps_init(struct xhci_hcd *xhci)
361 {
362 xhci_dbc_do_eps_init(xhci, BULK_OUT);
363 xhci_dbc_do_eps_init(xhci, BULK_IN);
364 }
365
366 static void xhci_dbc_eps_exit(struct xhci_hcd *xhci)
367 {
368 struct xhci_dbc *dbc = xhci->dbc;
369
370 memset(dbc->eps, 0, ARRAY_SIZE(dbc->eps));
371 }
372
373 static int xhci_dbc_mem_init(struct xhci_hcd *xhci, gfp_t flags)
374 {
375 int ret;
376 dma_addr_t deq;
377 u32 string_length;
378 struct xhci_dbc *dbc = xhci->dbc;
379
380 /* Allocate various rings for events and transfers: */
381 dbc->ring_evt = xhci_ring_alloc(xhci, 1, 1, TYPE_EVENT, 0, flags);
382 if (!dbc->ring_evt)
383 goto evt_fail;
384
385 dbc->ring_in = xhci_ring_alloc(xhci, 1, 1, TYPE_BULK, 0, flags);
386 if (!dbc->ring_in)
387 goto in_fail;
388
389 dbc->ring_out = xhci_ring_alloc(xhci, 1, 1, TYPE_BULK, 0, flags);
390 if (!dbc->ring_out)
391 goto out_fail;
392
393 /* Allocate and populate ERST: */
394 ret = xhci_alloc_erst(xhci, dbc->ring_evt, &dbc->erst, flags);
395 if (ret)
396 goto erst_fail;
397
398 /* Allocate context data structure: */
399 dbc->ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
400 if (!dbc->ctx)
401 goto ctx_fail;
402
403 /* Allocate the string table: */
404 dbc->string_size = sizeof(struct dbc_str_descs);
405 dbc->string = dbc_dma_alloc_coherent(xhci,
406 dbc->string_size,
407 &dbc->string_dma,
408 flags);
409 if (!dbc->string)
410 goto string_fail;
411
412 /* Setup ERST register: */
413 writel(dbc->erst.erst_size, &dbc->regs->ersts);
414 xhci_write_64(xhci, dbc->erst.erst_dma_addr, &dbc->regs->erstba);
415 deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
416 dbc->ring_evt->dequeue);
417 xhci_write_64(xhci, deq, &dbc->regs->erdp);
418
419 /* Setup strings and contexts: */
420 string_length = xhci_dbc_populate_strings(dbc->string);
421 xhci_dbc_init_contexts(xhci, string_length);
422
423 mmiowb();
424
425 xhci_dbc_eps_init(xhci);
426 dbc->state = DS_INITIALIZED;
427
428 return 0;
429
430 string_fail:
431 xhci_free_container_ctx(xhci, dbc->ctx);
432 dbc->ctx = NULL;
433 ctx_fail:
434 xhci_free_erst(xhci, &dbc->erst);
435 erst_fail:
436 xhci_ring_free(xhci, dbc->ring_out);
437 dbc->ring_out = NULL;
438 out_fail:
439 xhci_ring_free(xhci, dbc->ring_in);
440 dbc->ring_in = NULL;
441 in_fail:
442 xhci_ring_free(xhci, dbc->ring_evt);
443 dbc->ring_evt = NULL;
444 evt_fail:
445 return -ENOMEM;
446 }
447
448 static void xhci_dbc_mem_cleanup(struct xhci_hcd *xhci)
449 {
450 struct xhci_dbc *dbc = xhci->dbc;
451
452 if (!dbc)
453 return;
454
455 xhci_dbc_eps_exit(xhci);
456
457 if (dbc->string) {
458 dbc_dma_free_coherent(xhci,
459 dbc->string_size,
460 dbc->string, dbc->string_dma);
461 dbc->string = NULL;
462 }
463
464 xhci_free_container_ctx(xhci, dbc->ctx);
465 dbc->ctx = NULL;
466
467 xhci_free_erst(xhci, &dbc->erst);
468 xhci_ring_free(xhci, dbc->ring_out);
469 xhci_ring_free(xhci, dbc->ring_in);
470 xhci_ring_free(xhci, dbc->ring_evt);
471 dbc->ring_in = NULL;
472 dbc->ring_out = NULL;
473 dbc->ring_evt = NULL;
474 }
475
476 static int xhci_do_dbc_start(struct xhci_hcd *xhci)
477 {
478 int ret;
479 u32 ctrl;
480 struct xhci_dbc *dbc = xhci->dbc;
481
482 if (dbc->state != DS_DISABLED)
483 return -EINVAL;
484
485 writel(0, &dbc->regs->control);
486 ret = xhci_handshake(&dbc->regs->control,
487 DBC_CTRL_DBC_ENABLE,
488 0, 1000);
489 if (ret)
490 return ret;
491
492 ret = xhci_dbc_mem_init(xhci, GFP_ATOMIC);
493 if (ret)
494 return ret;
495
496 ctrl = readl(&dbc->regs->control);
497 writel(ctrl | DBC_CTRL_DBC_ENABLE | DBC_CTRL_PORT_ENABLE,
498 &dbc->regs->control);
499 ret = xhci_handshake(&dbc->regs->control,
500 DBC_CTRL_DBC_ENABLE,
501 DBC_CTRL_DBC_ENABLE, 1000);
502 if (ret)
503 return ret;
504
505 dbc->state = DS_ENABLED;
506
507 return 0;
508 }
509
510 static int xhci_do_dbc_stop(struct xhci_hcd *xhci)
511 {
512 struct xhci_dbc *dbc = xhci->dbc;
513
514 if (dbc->state == DS_DISABLED)
515 return -1;
516
517 writel(0, &dbc->regs->control);
518 xhci_dbc_mem_cleanup(xhci);
519 dbc->state = DS_DISABLED;
520
521 return 0;
522 }
523
524 static int xhci_dbc_start(struct xhci_hcd *xhci)
525 {
526 int ret;
527 unsigned long flags;
528 struct xhci_dbc *dbc = xhci->dbc;
529
530 WARN_ON(!dbc);
531
532 pm_runtime_get_sync(xhci_to_hcd(xhci)->self.controller);
533
534 spin_lock_irqsave(&dbc->lock, flags);
535 ret = xhci_do_dbc_start(xhci);
536 spin_unlock_irqrestore(&dbc->lock, flags);
537
538 if (ret) {
539 pm_runtime_put(xhci_to_hcd(xhci)->self.controller);
540 return ret;
541 }
542
543 return mod_delayed_work(system_wq, &dbc->event_work, 1);
544 }
545
546 static void xhci_dbc_stop(struct xhci_hcd *xhci)
547 {
548 int ret;
549 unsigned long flags;
550 struct xhci_dbc *dbc = xhci->dbc;
551 struct dbc_port *port = &dbc->port;
552
553 WARN_ON(!dbc);
554
555 cancel_delayed_work_sync(&dbc->event_work);
556
557 if (port->registered)
558 xhci_dbc_tty_unregister_device(xhci);
559
560 spin_lock_irqsave(&dbc->lock, flags);
561 ret = xhci_do_dbc_stop(xhci);
562 spin_unlock_irqrestore(&dbc->lock, flags);
563
564 if (!ret)
565 pm_runtime_put_sync(xhci_to_hcd(xhci)->self.controller);
566 }
567
568 static void
569 dbc_handle_port_status(struct xhci_hcd *xhci, union xhci_trb *event)
570 {
571 u32 portsc;
572 struct xhci_dbc *dbc = xhci->dbc;
573
574 portsc = readl(&dbc->regs->portsc);
575 if (portsc & DBC_PORTSC_CONN_CHANGE)
576 xhci_info(xhci, "DbC port connect change\n");
577
578 if (portsc & DBC_PORTSC_RESET_CHANGE)
579 xhci_info(xhci, "DbC port reset change\n");
580
581 if (portsc & DBC_PORTSC_LINK_CHANGE)
582 xhci_info(xhci, "DbC port link status change\n");
583
584 if (portsc & DBC_PORTSC_CONFIG_CHANGE)
585 xhci_info(xhci, "DbC config error change\n");
586
587 /* Port reset change bit will be cleared in other place: */
588 writel(portsc & ~DBC_PORTSC_RESET_CHANGE, &dbc->regs->portsc);
589 }
590
591 static void dbc_handle_xfer_event(struct xhci_hcd *xhci, union xhci_trb *event)
592 {
593 struct dbc_ep *dep;
594 struct xhci_ring *ring;
595 int ep_id;
596 int status;
597 u32 comp_code;
598 size_t remain_length;
599 struct dbc_request *req = NULL, *r;
600
601 comp_code = GET_COMP_CODE(le32_to_cpu(event->generic.field[2]));
602 remain_length = EVENT_TRB_LEN(le32_to_cpu(event->generic.field[2]));
603 ep_id = TRB_TO_EP_ID(le32_to_cpu(event->generic.field[3]));
604 dep = (ep_id == EPID_OUT) ?
605 get_out_ep(xhci) : get_in_ep(xhci);
606 ring = dep->ring;
607
608 switch (comp_code) {
609 case COMP_SUCCESS:
610 remain_length = 0;
611 /* FALLTHROUGH */
612 case COMP_SHORT_PACKET:
613 status = 0;
614 break;
615 case COMP_TRB_ERROR:
616 case COMP_BABBLE_DETECTED_ERROR:
617 case COMP_USB_TRANSACTION_ERROR:
618 case COMP_STALL_ERROR:
619 xhci_warn(xhci, "tx error %d detected\n", comp_code);
620 status = -comp_code;
621 break;
622 default:
623 xhci_err(xhci, "unknown tx error %d\n", comp_code);
624 status = -comp_code;
625 break;
626 }
627
628 /* Match the pending request: */
629 list_for_each_entry(r, &dep->list_pending, list_pending) {
630 if (r->trb_dma == event->trans_event.buffer) {
631 req = r;
632 break;
633 }
634 }
635
636 if (!req) {
637 xhci_warn(xhci, "no matched request\n");
638 return;
639 }
640
641 trace_xhci_dbc_handle_transfer(ring, &req->trb->generic);
642
643 ring->num_trbs_free++;
644 req->actual = req->length - remain_length;
645 xhci_dbc_giveback(req, status);
646 }
647
648 static enum evtreturn xhci_dbc_do_handle_events(struct xhci_dbc *dbc)
649 {
650 dma_addr_t deq;
651 struct dbc_ep *dep;
652 union xhci_trb *evt;
653 u32 ctrl, portsc;
654 struct xhci_hcd *xhci = dbc->xhci;
655 bool update_erdp = false;
656
657 /* DbC state machine: */
658 switch (dbc->state) {
659 case DS_DISABLED:
660 case DS_INITIALIZED:
661
662 return EVT_ERR;
663 case DS_ENABLED:
664 portsc = readl(&dbc->regs->portsc);
665 if (portsc & DBC_PORTSC_CONN_STATUS) {
666 dbc->state = DS_CONNECTED;
667 xhci_info(xhci, "DbC connected\n");
668 }
669
670 return EVT_DONE;
671 case DS_CONNECTED:
672 ctrl = readl(&dbc->regs->control);
673 if (ctrl & DBC_CTRL_DBC_RUN) {
674 dbc->state = DS_CONFIGURED;
675 xhci_info(xhci, "DbC configured\n");
676 portsc = readl(&dbc->regs->portsc);
677 writel(portsc, &dbc->regs->portsc);
678 return EVT_GSER;
679 }
680
681 return EVT_DONE;
682 case DS_CONFIGURED:
683 /* Handle cable unplug event: */
684 portsc = readl(&dbc->regs->portsc);
685 if (!(portsc & DBC_PORTSC_PORT_ENABLED) &&
686 !(portsc & DBC_PORTSC_CONN_STATUS)) {
687 xhci_info(xhci, "DbC cable unplugged\n");
688 dbc->state = DS_ENABLED;
689 xhci_dbc_flush_reqests(dbc);
690
691 return EVT_DISC;
692 }
693
694 /* Handle debug port reset event: */
695 if (portsc & DBC_PORTSC_RESET_CHANGE) {
696 xhci_info(xhci, "DbC port reset\n");
697 writel(portsc, &dbc->regs->portsc);
698 dbc->state = DS_ENABLED;
699 xhci_dbc_flush_reqests(dbc);
700
701 return EVT_DISC;
702 }
703
704 /* Handle endpoint stall event: */
705 ctrl = readl(&dbc->regs->control);
706 if ((ctrl & DBC_CTRL_HALT_IN_TR) ||
707 (ctrl & DBC_CTRL_HALT_OUT_TR)) {
708 xhci_info(xhci, "DbC Endpoint stall\n");
709 dbc->state = DS_STALLED;
710
711 if (ctrl & DBC_CTRL_HALT_IN_TR) {
712 dep = get_in_ep(xhci);
713 xhci_dbc_flush_endpoint_requests(dep);
714 }
715
716 if (ctrl & DBC_CTRL_HALT_OUT_TR) {
717 dep = get_out_ep(xhci);
718 xhci_dbc_flush_endpoint_requests(dep);
719 }
720
721 return EVT_DONE;
722 }
723
724 /* Clear DbC run change bit: */
725 if (ctrl & DBC_CTRL_DBC_RUN_CHANGE) {
726 writel(ctrl, &dbc->regs->control);
727 ctrl = readl(&dbc->regs->control);
728 }
729
730 break;
731 case DS_STALLED:
732 ctrl = readl(&dbc->regs->control);
733 if (!(ctrl & DBC_CTRL_HALT_IN_TR) &&
734 !(ctrl & DBC_CTRL_HALT_OUT_TR) &&
735 (ctrl & DBC_CTRL_DBC_RUN)) {
736 dbc->state = DS_CONFIGURED;
737 break;
738 }
739
740 return EVT_DONE;
741 default:
742 xhci_err(xhci, "Unknown DbC state %d\n", dbc->state);
743 break;
744 }
745
746 /* Handle the events in the event ring: */
747 evt = dbc->ring_evt->dequeue;
748 while ((le32_to_cpu(evt->event_cmd.flags) & TRB_CYCLE) ==
749 dbc->ring_evt->cycle_state) {
750 /*
751 * Add a barrier between reading the cycle flag and any
752 * reads of the event's flags/data below:
753 */
754 rmb();
755
756 trace_xhci_dbc_handle_event(dbc->ring_evt, &evt->generic);
757
758 switch (le32_to_cpu(evt->event_cmd.flags) & TRB_TYPE_BITMASK) {
759 case TRB_TYPE(TRB_PORT_STATUS):
760 dbc_handle_port_status(xhci, evt);
761 break;
762 case TRB_TYPE(TRB_TRANSFER):
763 dbc_handle_xfer_event(xhci, evt);
764 break;
765 default:
766 break;
767 }
768
769 inc_deq(xhci, dbc->ring_evt);
770 evt = dbc->ring_evt->dequeue;
771 update_erdp = true;
772 }
773
774 /* Update event ring dequeue pointer: */
775 if (update_erdp) {
776 deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
777 dbc->ring_evt->dequeue);
778 xhci_write_64(xhci, deq, &dbc->regs->erdp);
779 }
780
781 return EVT_DONE;
782 }
783
784 static void xhci_dbc_handle_events(struct work_struct *work)
785 {
786 int ret;
787 enum evtreturn evtr;
788 struct xhci_dbc *dbc;
789 unsigned long flags;
790 struct xhci_hcd *xhci;
791
792 dbc = container_of(to_delayed_work(work), struct xhci_dbc, event_work);
793 xhci = dbc->xhci;
794
795 spin_lock_irqsave(&dbc->lock, flags);
796 evtr = xhci_dbc_do_handle_events(dbc);
797 spin_unlock_irqrestore(&dbc->lock, flags);
798
799 switch (evtr) {
800 case EVT_GSER:
801 ret = xhci_dbc_tty_register_device(xhci);
802 if (ret) {
803 xhci_err(xhci, "failed to alloc tty device\n");
804 break;
805 }
806
807 xhci_info(xhci, "DbC now attached to /dev/ttyDBC0\n");
808 break;
809 case EVT_DISC:
810 xhci_dbc_tty_unregister_device(xhci);
811 break;
812 case EVT_DONE:
813 break;
814 default:
815 xhci_info(xhci, "stop handling dbc events\n");
816 return;
817 }
818
819 mod_delayed_work(system_wq, &dbc->event_work, 1);
820 }
821
822 static void xhci_do_dbc_exit(struct xhci_hcd *xhci)
823 {
824 unsigned long flags;
825
826 spin_lock_irqsave(&xhci->lock, flags);
827 kfree(xhci->dbc);
828 xhci->dbc = NULL;
829 spin_unlock_irqrestore(&xhci->lock, flags);
830 }
831
832 static int xhci_do_dbc_init(struct xhci_hcd *xhci)
833 {
834 u32 reg;
835 struct xhci_dbc *dbc;
836 unsigned long flags;
837 void __iomem *base;
838 int dbc_cap_offs;
839
840 base = &xhci->cap_regs->hc_capbase;
841 dbc_cap_offs = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_DEBUG);
842 if (!dbc_cap_offs)
843 return -ENODEV;
844
845 dbc = kzalloc(sizeof(*dbc), GFP_KERNEL);
846 if (!dbc)
847 return -ENOMEM;
848
849 dbc->regs = base + dbc_cap_offs;
850
851 /* We will avoid using DbC in xhci driver if it's in use. */
852 reg = readl(&dbc->regs->control);
853 if (reg & DBC_CTRL_DBC_ENABLE) {
854 kfree(dbc);
855 return -EBUSY;
856 }
857
858 spin_lock_irqsave(&xhci->lock, flags);
859 if (xhci->dbc) {
860 spin_unlock_irqrestore(&xhci->lock, flags);
861 kfree(dbc);
862 return -EBUSY;
863 }
864 xhci->dbc = dbc;
865 spin_unlock_irqrestore(&xhci->lock, flags);
866
867 dbc->xhci = xhci;
868 INIT_DELAYED_WORK(&dbc->event_work, xhci_dbc_handle_events);
869 spin_lock_init(&dbc->lock);
870
871 return 0;
872 }
873
874 static ssize_t dbc_show(struct device *dev,
875 struct device_attribute *attr,
876 char *buf)
877 {
878 const char *p;
879 struct xhci_dbc *dbc;
880 struct xhci_hcd *xhci;
881
882 xhci = hcd_to_xhci(dev_get_drvdata(dev));
883 dbc = xhci->dbc;
884
885 switch (dbc->state) {
886 case DS_DISABLED:
887 p = "disabled";
888 break;
889 case DS_INITIALIZED:
890 p = "initialized";
891 break;
892 case DS_ENABLED:
893 p = "enabled";
894 break;
895 case DS_CONNECTED:
896 p = "connected";
897 break;
898 case DS_CONFIGURED:
899 p = "configured";
900 break;
901 case DS_STALLED:
902 p = "stalled";
903 break;
904 default:
905 p = "unknown";
906 }
907
908 return sprintf(buf, "%s\n", p);
909 }
910
911 static ssize_t dbc_store(struct device *dev,
912 struct device_attribute *attr,
913 const char *buf, size_t count)
914 {
915 struct xhci_dbc *dbc;
916 struct xhci_hcd *xhci;
917
918 xhci = hcd_to_xhci(dev_get_drvdata(dev));
919 dbc = xhci->dbc;
920
921 if (!strncmp(buf, "enable", 6))
922 xhci_dbc_start(xhci);
923 else if (!strncmp(buf, "disable", 7))
924 xhci_dbc_stop(xhci);
925 else
926 return -EINVAL;
927
928 return count;
929 }
930
931 static DEVICE_ATTR(dbc, 0644, dbc_show, dbc_store);
932
933 int xhci_dbc_init(struct xhci_hcd *xhci)
934 {
935 int ret;
936 struct device *dev = xhci_to_hcd(xhci)->self.controller;
937
938 ret = xhci_do_dbc_init(xhci);
939 if (ret)
940 goto init_err3;
941
942 ret = xhci_dbc_tty_register_driver(xhci);
943 if (ret)
944 goto init_err2;
945
946 ret = device_create_file(dev, &dev_attr_dbc);
947 if (ret)
948 goto init_err1;
949
950 return 0;
951
952 init_err1:
953 xhci_dbc_tty_unregister_driver();
954 init_err2:
955 xhci_do_dbc_exit(xhci);
956 init_err3:
957 return ret;
958 }
959
960 void xhci_dbc_exit(struct xhci_hcd *xhci)
961 {
962 struct device *dev = xhci_to_hcd(xhci)->self.controller;
963
964 if (!xhci->dbc)
965 return;
966
967 device_remove_file(dev, &dev_attr_dbc);
968 xhci_dbc_tty_unregister_driver();
969 xhci_dbc_stop(xhci);
970 xhci_do_dbc_exit(xhci);
971 }
972
973 #ifdef CONFIG_PM
974 int xhci_dbc_suspend(struct xhci_hcd *xhci)
975 {
976 struct xhci_dbc *dbc = xhci->dbc;
977
978 if (!dbc)
979 return 0;
980
981 if (dbc->state == DS_CONFIGURED)
982 dbc->resume_required = 1;
983
984 xhci_dbc_stop(xhci);
985
986 return 0;
987 }
988
989 int xhci_dbc_resume(struct xhci_hcd *xhci)
990 {
991 int ret = 0;
992 struct xhci_dbc *dbc = xhci->dbc;
993
994 if (!dbc)
995 return 0;
996
997 if (dbc->resume_required) {
998 dbc->resume_required = 0;
999 xhci_dbc_start(xhci);
1000 }
1001
1002 return ret;
1003 }
1004 #endif /* CONFIG_PM */
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