drivers/usb/host/xhci-pci.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * xHCI host controller driver PCI Bus Glue.
   4  *
   5  * Copyright (C) 2008 Intel Corp.
   6  *
   7  * Author: Sarah Sharp
   8  * Some code borrowed from the Linux EHCI driver.
   9  */
  10
  11 #include <linux/pci.h>
  12 #include <linux/slab.h>
  13 #include <linux/module.h>
  14 #include <linux/acpi.h>
  15
  16 #include "xhci.h"
  17 #include "xhci-trace.h"
  18
  19 #define SSIC_PORT_NUM           2
  20 #define SSIC_PORT_CFG2          0x880c
  21 #define SSIC_PORT_CFG2_OFFSET   0x30
  22 #define PROG_DONE               (1 << 30)
  23 #define SSIC_PORT_UNUSED        (1 << 31)
  24
  25 /* Device for a quirk */
  26 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
  27 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
  28 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009       0x1009
  29 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
  30
  31 #define PCI_VENDOR_ID_ETRON             0x1b6f
  32 #define PCI_DEVICE_ID_EJ168             0x7023
  33
  34 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI      0x8c31
  35 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI   0x9c31
  36 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI        0x9cb1
  37 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI             0x22b5
  38 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI         0xa12f
  39 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI        0x9d2f
  40 #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI              0x0aa8
  41 #define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI              0x1aa8
  42 #define PCI_DEVICE_ID_INTEL_APL_XHCI                    0x5aa8
  43 #define PCI_DEVICE_ID_INTEL_DNV_XHCI                    0x19d0
  44
  45 #define PCI_DEVICE_ID_AMD_PROMONTORYA_4                 0x43b9
  46 #define PCI_DEVICE_ID_AMD_PROMONTORYA_3                 0x43ba
  47 #define PCI_DEVICE_ID_AMD_PROMONTORYA_2                 0x43bb
  48 #define PCI_DEVICE_ID_AMD_PROMONTORYA_1                 0x43bc
  49 #define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI                0x1142
  50
  51 static const char hcd_name[] = "xhci_hcd";
  52
  53 static struct hc_driver __read_mostly xhci_pci_hc_driver;
  54
  55 static int xhci_pci_setup(struct usb_hcd *hcd);
  56
  57 static const struct xhci_driver_overrides xhci_pci_overrides __initconst = {
  58         .reset = xhci_pci_setup,
  59 };
  60
  61 /* called after powerup, by probe or system-pm "wakeup" */
  62 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  63 {
  64         /*
  65          * TODO: Implement finding debug ports later.
  66          * TODO: see if there are any quirks that need to be added to handle
  67          * new extended capabilities.
  68          */
  69
  70         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  71         if (!pci_set_mwi(pdev))
  72                 xhci_dbg(xhci, "MWI active\n");
  73
  74         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  75         return 0;
  76 }
  77
  78 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
  79 {
  80         struct pci_dev          *pdev = to_pci_dev(dev);
  81
  82         /* Look for vendor-specific quirks */
  83         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
  84                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
  85                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
  86                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  87                                 pdev->revision == 0x0) {
  88                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
  89                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
  90                                 "QUIRK: Fresco Logic xHC needs configure"
  91                                 " endpoint cmd after reset endpoint");
  92                 }
  93                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  94                                 pdev->revision == 0x4) {
  95                         xhci->quirks |= XHCI_SLOW_SUSPEND;
  96                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
  97                                 "QUIRK: Fresco Logic xHC revision %u"
  98                                 "must be suspended extra slowly",
  99                                 pdev->revision);
 100                 }
 101                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK)
 102                         xhci->quirks |= XHCI_BROKEN_STREAMS;
 103                 /* Fresco Logic confirms: all revisions of this chip do not
 104                  * support MSI, even though some of them claim to in their PCI
 105                  * capabilities.
 106                  */
 107                 xhci->quirks |= XHCI_BROKEN_MSI;
 108                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 109                                 "QUIRK: Fresco Logic revision %u "
 110                                 "has broken MSI implementation",
 111                                 pdev->revision);
 112                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 113         }
 114
 115         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
 116                         pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1009)
 117                 xhci->quirks |= XHCI_BROKEN_STREAMS;
 118
 119         if (pdev->vendor == PCI_VENDOR_ID_NEC)
 120                 xhci->quirks |= XHCI_NEC_HOST;
 121
 122         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
 123                 xhci->quirks |= XHCI_AMD_0x96_HOST;
 124
 125         /* AMD PLL quirk */
 126         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
 127                 xhci->quirks |= XHCI_AMD_PLL_FIX;
 128
 129         if (pdev->vendor == PCI_VENDOR_ID_AMD &&
 130                 (pdev->device == 0x15e0 ||
 131                  pdev->device == 0x15e1 ||
 132                  pdev->device == 0x43bb))
 133                 xhci->quirks |= XHCI_SUSPEND_DELAY;
 134
 135         if (pdev->vendor == PCI_VENDOR_ID_AMD &&
 136             (pdev->device == 0x15e0 || pdev->device == 0x15e1))
 137                 xhci->quirks |= XHCI_SNPS_BROKEN_SUSPEND;
 138
 139         if (pdev->vendor == PCI_VENDOR_ID_AMD)
 140                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 141
 142         if ((pdev->vendor == PCI_VENDOR_ID_AMD) &&
 143                 ((pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4) ||
 144                 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_3) ||
 145                 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_2) ||
 146                 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_1)))
 147                 xhci->quirks |= XHCI_U2_DISABLE_WAKE;
 148
 149         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
 150                 xhci->quirks |= XHCI_LPM_SUPPORT;
 151                 xhci->quirks |= XHCI_INTEL_HOST;
 152                 xhci->quirks |= XHCI_AVOID_BEI;
 153         }
 154         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 155                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
 156                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
 157                 xhci->limit_active_eps = 64;
 158                 xhci->quirks |= XHCI_SW_BW_CHECKING;
 159                 /*
 160                  * PPT desktop boards DH77EB and DH77DF will power back on after
 161                  * a few seconds of being shutdown.  The fix for this is to
 162                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
 163                  * DMI information to find those particular boards (since each
 164                  * vendor will change the board name), so we have to key off all
 165                  * PPT chipsets.
 166                  */
 167                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 168         }
 169         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 170                 (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI ||
 171                  pdev->device == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI)) {
 172                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 173                 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
 174         }
 175         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 176                 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
 177                  pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
 178                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
 179                  pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI ||
 180                  pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI ||
 181                  pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
 182                  pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI)) {
 183                 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
 184         }
 185         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 186                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
 187                 xhci->quirks |= XHCI_SSIC_PORT_UNUSED;
 188         }
 189         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
 190             (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
 191              pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
 192              pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
 193              pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
 194              pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI))
 195                 xhci->quirks |= XHCI_MISSING_CAS;
 196
 197         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
 198                         pdev->device == PCI_DEVICE_ID_EJ168) {
 199                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 200                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 201                 xhci->quirks |= XHCI_BROKEN_STREAMS;
 202         }
 203         if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
 204                         pdev->device == 0x0014)
 205                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 206         if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
 207                         pdev->device == 0x0015)
 208                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 209         if (pdev->vendor == PCI_VENDOR_ID_VIA)
 210                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 211
 212         /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */
 213         if (pdev->vendor == PCI_VENDOR_ID_VIA &&
 214                         pdev->device == 0x3432)
 215                 xhci->quirks |= XHCI_BROKEN_STREAMS;
 216
 217         if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 218                         pdev->device == 0x1042)
 219                 xhci->quirks |= XHCI_BROKEN_STREAMS;
 220         if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 221                         pdev->device == 0x1142)
 222                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 223
 224         if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 225                 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042A_XHCI)
 226                 xhci->quirks |= XHCI_ASMEDIA_MODIFY_FLOWCONTROL;
 227
 228         if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
 229                 xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
 230
 231         if ((pdev->vendor == PCI_VENDOR_ID_BROADCOM ||
 232              pdev->vendor == PCI_VENDOR_ID_CAVIUM) &&
 233              pdev->device == 0x9026)
 234                 xhci->quirks |= XHCI_RESET_PLL_ON_DISCONNECT;
 235
 236         if (xhci->quirks & XHCI_RESET_ON_RESUME)
 237                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 238                                 "QUIRK: Resetting on resume");
 239 }
 240
 241 #ifdef CONFIG_ACPI
 242 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
 243 {
 244         static const guid_t intel_dsm_guid =
 245                 GUID_INIT(0xac340cb7, 0xe901, 0x45bf,
 246                           0xb7, 0xe6, 0x2b, 0x34, 0xec, 0x93, 0x1e, 0x23);
 247         union acpi_object *obj;
 248
 249         obj = acpi_evaluate_dsm(ACPI_HANDLE(&dev->dev), &intel_dsm_guid, 3, 1,
 250                                 NULL);
 251         ACPI_FREE(obj);
 252 }
 253 #else
 254 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
 255 #endif /* CONFIG_ACPI */
 256
 257 /* called during probe() after chip reset completes */
 258 static int xhci_pci_setup(struct usb_hcd *hcd)
 259 {
 260         struct xhci_hcd         *xhci;
 261         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 262         int                     retval;
 263
 264         xhci = hcd_to_xhci(hcd);
 265         if (!xhci->sbrn)
 266                 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
 267
 268         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
 269         if (retval)
 270                 return retval;
 271
 272         if (!usb_hcd_is_primary_hcd(hcd))
 273                 return 0;
 274
 275         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
 276
 277         /* Find any debug ports */
 278         return xhci_pci_reinit(xhci, pdev);
 279 }
 280
 281 /*
 282  * We need to register our own PCI probe function (instead of the USB core's
 283  * function) in order to create a second roothub under xHCI.
 284  */
 285 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 286 {
 287         int retval;
 288         struct xhci_hcd *xhci;
 289         struct hc_driver *driver;
 290         struct usb_hcd *hcd;
 291
 292         driver = (struct hc_driver *)id->driver_data;
 293
 294         /* For some HW implementation, a XHCI reset is just not enough... */
 295         if (usb_xhci_needs_pci_reset(dev)) {
 296                 dev_info(&dev->dev, "Resetting\n");
 297                 if (pci_reset_function_locked(dev))
 298                         dev_warn(&dev->dev, "Reset failed");
 299         }
 300
 301         /* Prevent runtime suspending between USB-2 and USB-3 initialization */
 302         pm_runtime_get_noresume(&dev->dev);
 303
 304         /* Register the USB 2.0 roothub.
 305          * FIXME: USB core must know to register the USB 2.0 roothub first.
 306          * This is sort of silly, because we could just set the HCD driver flags
 307          * to say USB 2.0, but I'm not sure what the implications would be in
 308          * the other parts of the HCD code.
 309          */
 310         retval = usb_hcd_pci_probe(dev, id);
 311
 312         if (retval)
 313                 goto put_runtime_pm;
 314
 315         /* USB 2.0 roothub is stored in the PCI device now. */
 316         hcd = dev_get_drvdata(&dev->dev);
 317         xhci = hcd_to_xhci(hcd);
 318         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
 319                                 pci_name(dev), hcd);
 320         if (!xhci->shared_hcd) {
 321                 retval = -ENOMEM;
 322                 goto dealloc_usb2_hcd;
 323         }
 324
 325         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
 326                         IRQF_SHARED);
 327         if (retval)
 328                 goto put_usb3_hcd;
 329         /* Roothub already marked as USB 3.0 speed */
 330
 331         if (!(xhci->quirks & XHCI_BROKEN_STREAMS) &&
 332                         HCC_MAX_PSA(xhci->hcc_params) >= 4)
 333                 xhci->shared_hcd->can_do_streams = 1;
 334
 335         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
 336                 xhci_pme_acpi_rtd3_enable(dev);
 337
 338         /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
 339         pm_runtime_put_noidle(&dev->dev);
 340
 341         return 0;
 342
 343 put_usb3_hcd:
 344         usb_put_hcd(xhci->shared_hcd);
 345 dealloc_usb2_hcd:
 346         usb_hcd_pci_remove(dev);
 347 put_runtime_pm:
 348         pm_runtime_put_noidle(&dev->dev);
 349         return retval;
 350 }
 351
 352 static void xhci_pci_remove(struct pci_dev *dev)
 353 {
 354         struct xhci_hcd *xhci;
 355
 356         xhci = hcd_to_xhci(pci_get_drvdata(dev));
 357         xhci->xhc_state |= XHCI_STATE_REMOVING;
 358         if (xhci->shared_hcd) {
 359                 usb_remove_hcd(xhci->shared_hcd);
 360                 usb_put_hcd(xhci->shared_hcd);
 361                 xhci->shared_hcd = NULL;
 362         }
 363
 364         /* Workaround for spurious wakeups at shutdown with HSW */
 365         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
 366                 pci_set_power_state(dev, PCI_D3hot);
 367
 368         usb_hcd_pci_remove(dev);
 369 }
 370
 371 #ifdef CONFIG_PM
 372 /*
 373  * In some Intel xHCI controllers, in order to get D3 working,
 374  * through a vendor specific SSIC CONFIG register at offset 0x883c,
 375  * SSIC PORT need to be marked as "unused" before putting xHCI
 376  * into D3. After D3 exit, the SSIC port need to be marked as "used".
 377  * Without this change, xHCI might not enter D3 state.
 378  */
 379 static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend)
 380 {
 381         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 382         u32 val;
 383         void __iomem *reg;
 384         int i;
 385
 386         for (i = 0; i < SSIC_PORT_NUM; i++) {
 387                 reg = (void __iomem *) xhci->cap_regs +
 388                                 SSIC_PORT_CFG2 +
 389                                 i * SSIC_PORT_CFG2_OFFSET;
 390
 391                 /* Notify SSIC that SSIC profile programming is not done. */
 392                 val = readl(reg) & ~PROG_DONE;
 393                 writel(val, reg);
 394
 395                 /* Mark SSIC port as unused(suspend) or used(resume) */
 396                 val = readl(reg);
 397                 if (suspend)
 398                         val |= SSIC_PORT_UNUSED;
 399                 else
 400                         val &= ~SSIC_PORT_UNUSED;
 401                 writel(val, reg);
 402
 403                 /* Notify SSIC that SSIC profile programming is done */
 404                 val = readl(reg) | PROG_DONE;
 405                 writel(val, reg);
 406                 readl(reg);
 407         }
 408 }
 409
 410 /*
 411  * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
 412  * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
 413  */
 414 static void xhci_pme_quirk(struct usb_hcd *hcd)
 415 {
 416         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 417         void __iomem *reg;
 418         u32 val;
 419
 420         reg = (void __iomem *) xhci->cap_regs + 0x80a4;
 421         val = readl(reg);
 422         writel(val | BIT(28), reg);
 423         readl(reg);
 424 }
 425
 426 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 427 {
 428         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 429         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 430         int                     ret;
 431
 432         /*
 433          * Systems with the TI redriver that loses port status change events
 434          * need to have the registers polled during D3, so avoid D3cold.
 435          */
 436         if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
 437                 pci_d3cold_disable(pdev);
 438
 439         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
 440                 xhci_pme_quirk(hcd);
 441
 442         if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
 443                 xhci_ssic_port_unused_quirk(hcd, true);
 444
 445         ret = xhci_suspend(xhci, do_wakeup);
 446         if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED))
 447                 xhci_ssic_port_unused_quirk(hcd, false);
 448
 449         return ret;
 450 }
 451
 452 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 453 {
 454         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 455         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 456         int                     retval = 0;
 457
 458         /* The BIOS on systems with the Intel Panther Point chipset may or may
 459          * not support xHCI natively.  That means that during system resume, it
 460          * may switch the ports back to EHCI so that users can use their
 461          * keyboard to select a kernel from GRUB after resume from hibernate.
 462          *
 463          * The BIOS is supposed to remember whether the OS had xHCI ports
 464          * enabled before resume, and switch the ports back to xHCI when the
 465          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
 466          * writers.
 467          *
 468          * Unconditionally switch the ports back to xHCI after a system resume.
 469          * It should not matter whether the EHCI or xHCI controller is
 470          * resumed first. It's enough to do the switchover in xHCI because
 471          * USB core won't notice anything as the hub driver doesn't start
 472          * running again until after all the devices (including both EHCI and
 473          * xHCI host controllers) have been resumed.
 474          */
 475
 476         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 477                 usb_enable_intel_xhci_ports(pdev);
 478
 479         if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
 480                 xhci_ssic_port_unused_quirk(hcd, false);
 481
 482         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
 483                 xhci_pme_quirk(hcd);
 484
 485         retval = xhci_resume(xhci, hibernated);
 486         return retval;
 487 }
 488
 489 static void xhci_pci_shutdown(struct usb_hcd *hcd)
 490 {
 491         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 492         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 493
 494         xhci_shutdown(hcd);
 495
 496         /* Yet another workaround for spurious wakeups at shutdown with HSW */
 497         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
 498                 pci_set_power_state(pdev, PCI_D3hot);
 499 }
 500 #endif /* CONFIG_PM */
 501
 502 /*-------------------------------------------------------------------------*/
 503
 504 /* PCI driver selection metadata; PCI hotplugging uses this */
 505 static const struct pci_device_id pci_ids[] = { {
 506         /* handle any USB 3.0 xHCI controller */
 507         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
 508         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
 509         },
 510         { /* end: all zeroes */ }
 511 };
 512 MODULE_DEVICE_TABLE(pci, pci_ids);
 513
 514 /* pci driver glue; this is a "new style" PCI driver module */
 515 static struct pci_driver xhci_pci_driver = {
 516         .name =         (char *) hcd_name,
 517         .id_table =     pci_ids,
 518
 519         .probe =        xhci_pci_probe,
 520         .remove =       xhci_pci_remove,
 521         /* suspend and resume implemented later */
 522
 523         .shutdown =     usb_hcd_pci_shutdown,
 524 #ifdef CONFIG_PM
 525         .driver = {
 526                 .pm = &usb_hcd_pci_pm_ops
 527         },
 528 #endif
 529 };
 530
 531 static int __init xhci_pci_init(void)
 532 {
 533         xhci_init_driver(&xhci_pci_hc_driver, &xhci_pci_overrides);
 534 #ifdef CONFIG_PM
 535         xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend;
 536         xhci_pci_hc_driver.pci_resume = xhci_pci_resume;
 537         xhci_pci_hc_driver.shutdown = xhci_pci_shutdown;
 538 #endif
 539         return pci_register_driver(&xhci_pci_driver);
 540 }
 541 module_init(xhci_pci_init);
 542
 543 static void __exit xhci_pci_exit(void)
 544 {
 545         pci_unregister_driver(&xhci_pci_driver);
 546 }
 547 module_exit(xhci_pci_exit);
 548
 549 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver");
 550 MODULE_LICENSE("GPL");