2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Ring initialization rules:
25 * 1. Each segment is initialized to zero, except for link TRBs.
26 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
27 * Consumer Cycle State (CCS), depending on ring function.
28 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
30 * Ring behavior rules:
31 * 1. A ring is empty if enqueue == dequeue. This means there will always be at
32 * least one free TRB in the ring. This is useful if you want to turn that
33 * into a link TRB and expand the ring.
34 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
35 * link TRB, then load the pointer with the address in the link TRB. If the
36 * link TRB had its toggle bit set, you may need to update the ring cycle
37 * state (see cycle bit rules). You may have to do this multiple times
38 * until you reach a non-link TRB.
39 * 3. A ring is full if enqueue++ (for the definition of increment above)
40 * equals the dequeue pointer.
43 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
44 * in a link TRB, it must toggle the ring cycle state.
45 * 2. When a producer increments an enqueue pointer and encounters a toggle bit
46 * in a link TRB, it must toggle the ring cycle state.
49 * 1. Check if ring is full before you enqueue.
50 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
51 * Update enqueue pointer between each write (which may update the ring
53 * 3. Notify consumer. If SW is producer, it rings the doorbell for command
54 * and endpoint rings. If HC is the producer for the event ring,
55 * and it generates an interrupt according to interrupt modulation rules.
58 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state,
59 * the TRB is owned by the consumer.
60 * 2. Update dequeue pointer (which may update the ring cycle state) and
61 * continue processing TRBs until you reach a TRB which is not owned by you.
62 * 3. Notify the producer. SW is the consumer for the event ring, and it
63 * updates event ring dequeue pointer. HC is the consumer for the command and
64 * endpoint rings; it generates events on the event ring for these.
67 #include <linux/scatterlist.h>
68 #include <linux/slab.h>
69 #include <linux/dma-mapping.h>
71 #include "xhci-trace.h"
75 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
78 dma_addr_t
xhci_trb_virt_to_dma(struct xhci_segment
*seg
,
81 unsigned long segment_offset
;
83 if (!seg
|| !trb
|| trb
< seg
->trbs
)
86 segment_offset
= trb
- seg
->trbs
;
87 if (segment_offset
>= TRBS_PER_SEGMENT
)
89 return seg
->dma
+ (segment_offset
* sizeof(*trb
));
92 static bool trb_is_noop(union xhci_trb
*trb
)
94 return TRB_TYPE_NOOP_LE32(trb
->generic
.field
[3]);
97 static bool trb_is_link(union xhci_trb
*trb
)
99 return TRB_TYPE_LINK_LE32(trb
->link
.control
);
102 static bool last_trb_on_seg(struct xhci_segment
*seg
, union xhci_trb
*trb
)
104 return trb
== &seg
->trbs
[TRBS_PER_SEGMENT
- 1];
107 static bool last_trb_on_ring(struct xhci_ring
*ring
,
108 struct xhci_segment
*seg
, union xhci_trb
*trb
)
110 return last_trb_on_seg(seg
, trb
) && (seg
->next
== ring
->first_seg
);
113 static bool link_trb_toggles_cycle(union xhci_trb
*trb
)
115 return le32_to_cpu(trb
->link
.control
) & LINK_TOGGLE
;
118 static bool last_td_in_urb(struct xhci_td
*td
)
120 struct urb_priv
*urb_priv
= td
->urb
->hcpriv
;
122 return urb_priv
->num_tds_done
== urb_priv
->num_tds
;
125 static void inc_td_cnt(struct urb
*urb
)
127 struct urb_priv
*urb_priv
= urb
->hcpriv
;
129 urb_priv
->num_tds_done
++;
132 static void trb_to_noop(union xhci_trb
*trb
, u32 noop_type
)
134 if (trb_is_link(trb
)) {
135 /* unchain chained link TRBs */
136 trb
->link
.control
&= cpu_to_le32(~TRB_CHAIN
);
138 trb
->generic
.field
[0] = 0;
139 trb
->generic
.field
[1] = 0;
140 trb
->generic
.field
[2] = 0;
141 /* Preserve only the cycle bit of this TRB */
142 trb
->generic
.field
[3] &= cpu_to_le32(TRB_CYCLE
);
143 trb
->generic
.field
[3] |= cpu_to_le32(TRB_TYPE(noop_type
));
147 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
148 * TRB is in a new segment. This does not skip over link TRBs, and it does not
149 * effect the ring dequeue or enqueue pointers.
151 static void next_trb(struct xhci_hcd
*xhci
,
152 struct xhci_ring
*ring
,
153 struct xhci_segment
**seg
,
154 union xhci_trb
**trb
)
156 if (trb_is_link(*trb
)) {
158 *trb
= ((*seg
)->trbs
);
165 * See Cycle bit rules. SW is the consumer for the event ring only.
166 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
168 static void inc_deq(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
)
170 /* event ring doesn't have link trbs, check for last trb */
171 if (ring
->type
== TYPE_EVENT
) {
172 if (!last_trb_on_seg(ring
->deq_seg
, ring
->dequeue
)) {
176 if (last_trb_on_ring(ring
, ring
->deq_seg
, ring
->dequeue
))
177 ring
->cycle_state
^= 1;
178 ring
->deq_seg
= ring
->deq_seg
->next
;
179 ring
->dequeue
= ring
->deq_seg
->trbs
;
183 /* All other rings have link trbs */
184 if (!trb_is_link(ring
->dequeue
)) {
186 ring
->num_trbs_free
++;
188 while (trb_is_link(ring
->dequeue
)) {
189 ring
->deq_seg
= ring
->deq_seg
->next
;
190 ring
->dequeue
= ring
->deq_seg
->trbs
;
193 trace_xhci_inc_deq(ring
);
199 * See Cycle bit rules. SW is the consumer for the event ring only.
200 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
202 * If we've just enqueued a TRB that is in the middle of a TD (meaning the
203 * chain bit is set), then set the chain bit in all the following link TRBs.
204 * If we've enqueued the last TRB in a TD, make sure the following link TRBs
205 * have their chain bit cleared (so that each Link TRB is a separate TD).
207 * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
208 * set, but other sections talk about dealing with the chain bit set. This was
209 * fixed in the 0.96 specification errata, but we have to assume that all 0.95
210 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
212 * @more_trbs_coming: Will you enqueue more TRBs before calling
213 * prepare_transfer()?
215 static void inc_enq(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
216 bool more_trbs_coming
)
219 union xhci_trb
*next
;
221 chain
= le32_to_cpu(ring
->enqueue
->generic
.field
[3]) & TRB_CHAIN
;
222 /* If this is not event ring, there is one less usable TRB */
223 if (!trb_is_link(ring
->enqueue
))
224 ring
->num_trbs_free
--;
225 next
= ++(ring
->enqueue
);
227 /* Update the dequeue pointer further if that was a link TRB */
228 while (trb_is_link(next
)) {
231 * If the caller doesn't plan on enqueueing more TDs before
232 * ringing the doorbell, then we don't want to give the link TRB
233 * to the hardware just yet. We'll give the link TRB back in
234 * prepare_ring() just before we enqueue the TD at the top of
237 if (!chain
&& !more_trbs_coming
)
240 /* If we're not dealing with 0.95 hardware or isoc rings on
241 * AMD 0.96 host, carry over the chain bit of the previous TRB
242 * (which may mean the chain bit is cleared).
244 if (!(ring
->type
== TYPE_ISOC
&&
245 (xhci
->quirks
& XHCI_AMD_0x96_HOST
)) &&
246 !xhci_link_trb_quirk(xhci
)) {
247 next
->link
.control
&= cpu_to_le32(~TRB_CHAIN
);
248 next
->link
.control
|= cpu_to_le32(chain
);
250 /* Give this link TRB to the hardware */
252 next
->link
.control
^= cpu_to_le32(TRB_CYCLE
);
254 /* Toggle the cycle bit after the last ring segment. */
255 if (link_trb_toggles_cycle(next
))
256 ring
->cycle_state
^= 1;
258 ring
->enq_seg
= ring
->enq_seg
->next
;
259 ring
->enqueue
= ring
->enq_seg
->trbs
;
260 next
= ring
->enqueue
;
263 trace_xhci_inc_enq(ring
);
267 * Check to see if there's room to enqueue num_trbs on the ring and make sure
268 * enqueue pointer will not advance into dequeue segment. See rules above.
270 static inline int room_on_ring(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
271 unsigned int num_trbs
)
273 int num_trbs_in_deq_seg
;
275 if (ring
->num_trbs_free
< num_trbs
)
278 if (ring
->type
!= TYPE_COMMAND
&& ring
->type
!= TYPE_EVENT
) {
279 num_trbs_in_deq_seg
= ring
->dequeue
- ring
->deq_seg
->trbs
;
280 if (ring
->num_trbs_free
< num_trbs
+ num_trbs_in_deq_seg
)
287 /* Ring the host controller doorbell after placing a command on the ring */
288 void xhci_ring_cmd_db(struct xhci_hcd
*xhci
)
290 if (!(xhci
->cmd_ring_state
& CMD_RING_STATE_RUNNING
))
293 xhci_dbg(xhci
, "// Ding dong!\n");
294 writel(DB_VALUE_HOST
, &xhci
->dba
->doorbell
[0]);
295 /* Flush PCI posted writes */
296 readl(&xhci
->dba
->doorbell
[0]);
299 static bool xhci_mod_cmd_timer(struct xhci_hcd
*xhci
, unsigned long delay
)
301 return mod_delayed_work(system_wq
, &xhci
->cmd_timer
, delay
);
304 static struct xhci_command
*xhci_next_queued_cmd(struct xhci_hcd
*xhci
)
306 return list_first_entry_or_null(&xhci
->cmd_list
, struct xhci_command
,
311 * Turn all commands on command ring with status set to "aborted" to no-op trbs.
312 * If there are other commands waiting then restart the ring and kick the timer.
313 * This must be called with command ring stopped and xhci->lock held.
315 static void xhci_handle_stopped_cmd_ring(struct xhci_hcd
*xhci
,
316 struct xhci_command
*cur_cmd
)
318 struct xhci_command
*i_cmd
;
320 /* Turn all aborted commands in list to no-ops, then restart */
321 list_for_each_entry(i_cmd
, &xhci
->cmd_list
, cmd_list
) {
323 if (i_cmd
->status
!= COMP_COMMAND_ABORTED
)
326 i_cmd
->status
= COMP_COMMAND_RING_STOPPED
;
328 xhci_dbg(xhci
, "Turn aborted command %p to no-op\n",
331 trb_to_noop(i_cmd
->command_trb
, TRB_CMD_NOOP
);
334 * caller waiting for completion is called when command
335 * completion event is received for these no-op commands
339 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
341 /* ring command ring doorbell to restart the command ring */
342 if ((xhci
->cmd_ring
->dequeue
!= xhci
->cmd_ring
->enqueue
) &&
343 !(xhci
->xhc_state
& XHCI_STATE_DYING
)) {
344 xhci
->current_cmd
= cur_cmd
;
345 xhci_mod_cmd_timer(xhci
, XHCI_CMD_DEFAULT_TIMEOUT
);
346 xhci_ring_cmd_db(xhci
);
350 /* Must be called with xhci->lock held, releases and aquires lock back */
351 static int xhci_abort_cmd_ring(struct xhci_hcd
*xhci
, unsigned long flags
)
356 xhci_dbg(xhci
, "Abort command ring\n");
358 reinit_completion(&xhci
->cmd_ring_stop_completion
);
360 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
361 xhci_write_64(xhci
, temp_64
| CMD_RING_ABORT
,
362 &xhci
->op_regs
->cmd_ring
);
364 /* Section 4.6.1.2 of xHCI 1.0 spec says software should also time the
365 * completion of the Command Abort operation. If CRR is not negated in 5
366 * seconds then driver handles it as if host died (-ENODEV).
367 * In the future we should distinguish between -ENODEV and -ETIMEDOUT
368 * and try to recover a -ETIMEDOUT with a host controller reset.
370 ret
= xhci_handshake(&xhci
->op_regs
->cmd_ring
,
371 CMD_RING_RUNNING
, 0, 5 * 1000 * 1000);
373 xhci_err(xhci
, "Abort failed to stop command ring: %d\n", ret
);
379 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
380 * however on some host hw the CMD_RING_RUNNING bit is correctly cleared
381 * but the completion event in never sent. Wait 2 secs (arbitrary
382 * number) to handle those cases after negation of CMD_RING_RUNNING.
384 spin_unlock_irqrestore(&xhci
->lock
, flags
);
385 ret
= wait_for_completion_timeout(&xhci
->cmd_ring_stop_completion
,
386 msecs_to_jiffies(2000));
387 spin_lock_irqsave(&xhci
->lock
, flags
);
389 xhci_dbg(xhci
, "No stop event for abort, ring start fail?\n");
390 xhci_cleanup_command_queue(xhci
);
392 xhci_handle_stopped_cmd_ring(xhci
, xhci_next_queued_cmd(xhci
));
397 void xhci_ring_ep_doorbell(struct xhci_hcd
*xhci
,
398 unsigned int slot_id
,
399 unsigned int ep_index
,
400 unsigned int stream_id
)
402 __le32 __iomem
*db_addr
= &xhci
->dba
->doorbell
[slot_id
];
403 struct xhci_virt_ep
*ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
404 unsigned int ep_state
= ep
->ep_state
;
406 /* Don't ring the doorbell for this endpoint if there are pending
407 * cancellations because we don't want to interrupt processing.
408 * We don't want to restart any stream rings if there's a set dequeue
409 * pointer command pending because the device can choose to start any
410 * stream once the endpoint is on the HW schedule.
412 if ((ep_state
& EP_STOP_CMD_PENDING
) || (ep_state
& SET_DEQ_PENDING
) ||
413 (ep_state
& EP_HALTED
))
415 writel(DB_VALUE(ep_index
, stream_id
), db_addr
);
416 /* The CPU has better things to do at this point than wait for a
417 * write-posting flush. It'll get there soon enough.
421 /* Ring the doorbell for any rings with pending URBs */
422 static void ring_doorbell_for_active_rings(struct xhci_hcd
*xhci
,
423 unsigned int slot_id
,
424 unsigned int ep_index
)
426 unsigned int stream_id
;
427 struct xhci_virt_ep
*ep
;
429 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
431 /* A ring has pending URBs if its TD list is not empty */
432 if (!(ep
->ep_state
& EP_HAS_STREAMS
)) {
433 if (ep
->ring
&& !(list_empty(&ep
->ring
->td_list
)))
434 xhci_ring_ep_doorbell(xhci
, slot_id
, ep_index
, 0);
438 for (stream_id
= 1; stream_id
< ep
->stream_info
->num_streams
;
440 struct xhci_stream_info
*stream_info
= ep
->stream_info
;
441 if (!list_empty(&stream_info
->stream_rings
[stream_id
]->td_list
))
442 xhci_ring_ep_doorbell(xhci
, slot_id
, ep_index
,
447 /* Get the right ring for the given slot_id, ep_index and stream_id.
448 * If the endpoint supports streams, boundary check the URB's stream ID.
449 * If the endpoint doesn't support streams, return the singular endpoint ring.
451 struct xhci_ring
*xhci_triad_to_transfer_ring(struct xhci_hcd
*xhci
,
452 unsigned int slot_id
, unsigned int ep_index
,
453 unsigned int stream_id
)
455 struct xhci_virt_ep
*ep
;
457 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
458 /* Common case: no streams */
459 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
462 if (stream_id
== 0) {
464 "WARN: Slot ID %u, ep index %u has streams, "
465 "but URB has no stream ID.\n",
470 if (stream_id
< ep
->stream_info
->num_streams
)
471 return ep
->stream_info
->stream_rings
[stream_id
];
474 "WARN: Slot ID %u, ep index %u has "
475 "stream IDs 1 to %u allocated, "
476 "but stream ID %u is requested.\n",
478 ep
->stream_info
->num_streams
- 1,
485 * Get the hw dequeue pointer xHC stopped on, either directly from the
486 * endpoint context, or if streams are in use from the stream context.
487 * The returned hw_dequeue contains the lowest four bits with cycle state
488 * and possbile stream context type.
490 static u64
xhci_get_hw_deq(struct xhci_hcd
*xhci
, struct xhci_virt_device
*vdev
,
491 unsigned int ep_index
, unsigned int stream_id
)
493 struct xhci_ep_ctx
*ep_ctx
;
494 struct xhci_stream_ctx
*st_ctx
;
495 struct xhci_virt_ep
*ep
;
497 ep
= &vdev
->eps
[ep_index
];
499 if (ep
->ep_state
& EP_HAS_STREAMS
) {
500 st_ctx
= &ep
->stream_info
->stream_ctx_array
[stream_id
];
501 return le64_to_cpu(st_ctx
->stream_ring
);
503 ep_ctx
= xhci_get_ep_ctx(xhci
, vdev
->out_ctx
, ep_index
);
504 return le64_to_cpu(ep_ctx
->deq
);
508 * Move the xHC's endpoint ring dequeue pointer past cur_td.
509 * Record the new state of the xHC's endpoint ring dequeue segment,
510 * dequeue pointer, stream id, and new consumer cycle state in state.
511 * Update our internal representation of the ring's dequeue pointer.
513 * We do this in three jumps:
514 * - First we update our new ring state to be the same as when the xHC stopped.
515 * - Then we traverse the ring to find the segment that contains
516 * the last TRB in the TD. We toggle the xHC's new cycle state when we pass
517 * any link TRBs with the toggle cycle bit set.
518 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
519 * if we've moved it past a link TRB with the toggle cycle bit set.
521 * Some of the uses of xhci_generic_trb are grotty, but if they're done
522 * with correct __le32 accesses they should work fine. Only users of this are
525 void xhci_find_new_dequeue_state(struct xhci_hcd
*xhci
,
526 unsigned int slot_id
, unsigned int ep_index
,
527 unsigned int stream_id
, struct xhci_td
*cur_td
,
528 struct xhci_dequeue_state
*state
)
530 struct xhci_virt_device
*dev
= xhci
->devs
[slot_id
];
531 struct xhci_virt_ep
*ep
= &dev
->eps
[ep_index
];
532 struct xhci_ring
*ep_ring
;
533 struct xhci_segment
*new_seg
;
534 union xhci_trb
*new_deq
;
537 bool cycle_found
= false;
538 bool td_last_trb_found
= false;
540 ep_ring
= xhci_triad_to_transfer_ring(xhci
, slot_id
,
541 ep_index
, stream_id
);
543 xhci_warn(xhci
, "WARN can't find new dequeue state "
544 "for invalid stream ID %u.\n",
548 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
549 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
550 "Finding endpoint context");
552 hw_dequeue
= xhci_get_hw_deq(xhci
, dev
, ep_index
, stream_id
);
553 new_seg
= ep_ring
->deq_seg
;
554 new_deq
= ep_ring
->dequeue
;
555 state
->new_cycle_state
= hw_dequeue
& 0x1;
556 state
->stream_id
= stream_id
;
559 * We want to find the pointer, segment and cycle state of the new trb
560 * (the one after current TD's last_trb). We know the cycle state at
561 * hw_dequeue, so walk the ring until both hw_dequeue and last_trb are
565 if (!cycle_found
&& xhci_trb_virt_to_dma(new_seg
, new_deq
)
566 == (dma_addr_t
)(hw_dequeue
& ~0xf)) {
568 if (td_last_trb_found
)
571 if (new_deq
== cur_td
->last_trb
)
572 td_last_trb_found
= true;
574 if (cycle_found
&& trb_is_link(new_deq
) &&
575 link_trb_toggles_cycle(new_deq
))
576 state
->new_cycle_state
^= 0x1;
578 next_trb(xhci
, ep_ring
, &new_seg
, &new_deq
);
580 /* Search wrapped around, bail out */
581 if (new_deq
== ep
->ring
->dequeue
) {
582 xhci_err(xhci
, "Error: Failed finding new dequeue state\n");
583 state
->new_deq_seg
= NULL
;
584 state
->new_deq_ptr
= NULL
;
588 } while (!cycle_found
|| !td_last_trb_found
);
590 state
->new_deq_seg
= new_seg
;
591 state
->new_deq_ptr
= new_deq
;
593 /* Don't update the ring cycle state for the producer (us). */
594 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
595 "Cycle state = 0x%x", state
->new_cycle_state
);
597 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
598 "New dequeue segment = %p (virtual)",
600 addr
= xhci_trb_virt_to_dma(state
->new_deq_seg
, state
->new_deq_ptr
);
601 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
602 "New dequeue pointer = 0x%llx (DMA)",
603 (unsigned long long) addr
);
606 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
607 * (The last TRB actually points to the ring enqueue pointer, which is not part
608 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
610 static void td_to_noop(struct xhci_hcd
*xhci
, struct xhci_ring
*ep_ring
,
611 struct xhci_td
*td
, bool flip_cycle
)
613 struct xhci_segment
*seg
= td
->start_seg
;
614 union xhci_trb
*trb
= td
->first_trb
;
617 trb_to_noop(trb
, TRB_TR_NOOP
);
619 /* flip cycle if asked to */
620 if (flip_cycle
&& trb
!= td
->first_trb
&& trb
!= td
->last_trb
)
621 trb
->generic
.field
[3] ^= cpu_to_le32(TRB_CYCLE
);
623 if (trb
== td
->last_trb
)
626 next_trb(xhci
, ep_ring
, &seg
, &trb
);
630 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd
*xhci
,
631 struct xhci_virt_ep
*ep
)
633 ep
->ep_state
&= ~EP_STOP_CMD_PENDING
;
634 /* Can't del_timer_sync in interrupt */
635 del_timer(&ep
->stop_cmd_timer
);
639 * Must be called with xhci->lock held in interrupt context,
640 * releases and re-acquires xhci->lock
642 static void xhci_giveback_urb_in_irq(struct xhci_hcd
*xhci
,
643 struct xhci_td
*cur_td
, int status
)
645 struct urb
*urb
= cur_td
->urb
;
646 struct urb_priv
*urb_priv
= urb
->hcpriv
;
647 struct usb_hcd
*hcd
= bus_to_hcd(urb
->dev
->bus
);
649 if (usb_pipetype(urb
->pipe
) == PIPE_ISOCHRONOUS
) {
650 xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
--;
651 if (xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
== 0) {
652 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
653 usb_amd_quirk_pll_enable();
656 xhci_urb_free_priv(urb_priv
);
657 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
658 spin_unlock(&xhci
->lock
);
659 trace_xhci_urb_giveback(urb
);
660 usb_hcd_giveback_urb(hcd
, urb
, status
);
661 spin_lock(&xhci
->lock
);
664 static void xhci_unmap_td_bounce_buffer(struct xhci_hcd
*xhci
,
665 struct xhci_ring
*ring
, struct xhci_td
*td
)
667 struct device
*dev
= xhci_to_hcd(xhci
)->self
.controller
;
668 struct xhci_segment
*seg
= td
->bounce_seg
;
669 struct urb
*urb
= td
->urb
;
671 if (!ring
|| !seg
|| !urb
)
674 if (usb_urb_dir_out(urb
)) {
675 dma_unmap_single(dev
, seg
->bounce_dma
, ring
->bounce_buf_len
,
680 /* for in tranfers we need to copy the data from bounce to sg */
681 sg_pcopy_from_buffer(urb
->sg
, urb
->num_mapped_sgs
, seg
->bounce_buf
,
682 seg
->bounce_len
, seg
->bounce_offs
);
683 dma_unmap_single(dev
, seg
->bounce_dma
, ring
->bounce_buf_len
,
686 seg
->bounce_offs
= 0;
690 * When we get a command completion for a Stop Endpoint Command, we need to
691 * unlink any cancelled TDs from the ring. There are two ways to do that:
693 * 1. If the HW was in the middle of processing the TD that needs to be
694 * cancelled, then we must move the ring's dequeue pointer past the last TRB
695 * in the TD with a Set Dequeue Pointer Command.
696 * 2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
697 * bit cleared) so that the HW will skip over them.
699 static void xhci_handle_cmd_stop_ep(struct xhci_hcd
*xhci
, int slot_id
,
700 union xhci_trb
*trb
, struct xhci_event_cmd
*event
)
702 unsigned int ep_index
;
703 struct xhci_ring
*ep_ring
;
704 struct xhci_virt_ep
*ep
;
705 struct xhci_td
*cur_td
= NULL
;
706 struct xhci_td
*last_unlinked_td
;
707 struct xhci_ep_ctx
*ep_ctx
;
708 struct xhci_virt_device
*vdev
;
710 struct xhci_dequeue_state deq_state
;
712 if (unlikely(TRB_TO_SUSPEND_PORT(le32_to_cpu(trb
->generic
.field
[3])))) {
713 if (!xhci
->devs
[slot_id
])
714 xhci_warn(xhci
, "Stop endpoint command "
715 "completion for disabled slot %u\n",
720 memset(&deq_state
, 0, sizeof(deq_state
));
721 ep_index
= TRB_TO_EP_INDEX(le32_to_cpu(trb
->generic
.field
[3]));
723 vdev
= xhci
->devs
[slot_id
];
724 ep_ctx
= xhci_get_ep_ctx(xhci
, vdev
->out_ctx
, ep_index
);
725 trace_xhci_handle_cmd_stop_ep(ep_ctx
);
727 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
728 last_unlinked_td
= list_last_entry(&ep
->cancelled_td_list
,
729 struct xhci_td
, cancelled_td_list
);
731 if (list_empty(&ep
->cancelled_td_list
)) {
732 xhci_stop_watchdog_timer_in_irq(xhci
, ep
);
733 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
737 /* Fix up the ep ring first, so HW stops executing cancelled TDs.
738 * We have the xHCI lock, so nothing can modify this list until we drop
739 * it. We're also in the event handler, so we can't get re-interrupted
740 * if another Stop Endpoint command completes
742 list_for_each_entry(cur_td
, &ep
->cancelled_td_list
, cancelled_td_list
) {
743 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
744 "Removing canceled TD starting at 0x%llx (dma).",
745 (unsigned long long)xhci_trb_virt_to_dma(
746 cur_td
->start_seg
, cur_td
->first_trb
));
747 ep_ring
= xhci_urb_to_transfer_ring(xhci
, cur_td
->urb
);
749 /* This shouldn't happen unless a driver is mucking
750 * with the stream ID after submission. This will
751 * leave the TD on the hardware ring, and the hardware
752 * will try to execute it, and may access a buffer
753 * that has already been freed. In the best case, the
754 * hardware will execute it, and the event handler will
755 * ignore the completion event for that TD, since it was
756 * removed from the td_list for that endpoint. In
757 * short, don't muck with the stream ID after
760 xhci_warn(xhci
, "WARN Cancelled URB %p "
761 "has invalid stream ID %u.\n",
763 cur_td
->urb
->stream_id
);
764 goto remove_finished_td
;
767 * If we stopped on the TD we need to cancel, then we have to
768 * move the xHC endpoint ring dequeue pointer past this TD.
770 hw_deq
= xhci_get_hw_deq(xhci
, vdev
, ep_index
,
771 cur_td
->urb
->stream_id
);
774 if (trb_in_td(xhci
, cur_td
->start_seg
, cur_td
->first_trb
,
775 cur_td
->last_trb
, hw_deq
, false)) {
776 xhci_find_new_dequeue_state(xhci
, slot_id
, ep_index
,
777 cur_td
->urb
->stream_id
,
780 td_to_noop(xhci
, ep_ring
, cur_td
, false);
785 * The event handler won't see a completion for this TD anymore,
786 * so remove it from the endpoint ring's TD list. Keep it in
787 * the cancelled TD list for URB completion later.
789 list_del_init(&cur_td
->td_list
);
792 xhci_stop_watchdog_timer_in_irq(xhci
, ep
);
794 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
795 if (deq_state
.new_deq_ptr
&& deq_state
.new_deq_seg
) {
796 xhci_queue_new_dequeue_state(xhci
, slot_id
, ep_index
,
798 xhci_ring_cmd_db(xhci
);
800 /* Otherwise ring the doorbell(s) to restart queued transfers */
801 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
805 * Drop the lock and complete the URBs in the cancelled TD list.
806 * New TDs to be cancelled might be added to the end of the list before
807 * we can complete all the URBs for the TDs we already unlinked.
808 * So stop when we've completed the URB for the last TD we unlinked.
811 cur_td
= list_first_entry(&ep
->cancelled_td_list
,
812 struct xhci_td
, cancelled_td_list
);
813 list_del_init(&cur_td
->cancelled_td_list
);
815 /* Clean up the cancelled URB */
816 /* Doesn't matter what we pass for status, since the core will
817 * just overwrite it (because the URB has been unlinked).
819 ep_ring
= xhci_urb_to_transfer_ring(xhci
, cur_td
->urb
);
820 xhci_unmap_td_bounce_buffer(xhci
, ep_ring
, cur_td
);
821 inc_td_cnt(cur_td
->urb
);
822 if (last_td_in_urb(cur_td
))
823 xhci_giveback_urb_in_irq(xhci
, cur_td
, 0);
825 /* Stop processing the cancelled list if the watchdog timer is
828 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
830 } while (cur_td
!= last_unlinked_td
);
832 /* Return to the event handler with xhci->lock re-acquired */
835 static void xhci_kill_ring_urbs(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
)
837 struct xhci_td
*cur_td
;
840 list_for_each_entry_safe(cur_td
, tmp
, &ring
->td_list
, td_list
) {
841 list_del_init(&cur_td
->td_list
);
843 if (!list_empty(&cur_td
->cancelled_td_list
))
844 list_del_init(&cur_td
->cancelled_td_list
);
846 xhci_unmap_td_bounce_buffer(xhci
, ring
, cur_td
);
848 inc_td_cnt(cur_td
->urb
);
849 if (last_td_in_urb(cur_td
))
850 xhci_giveback_urb_in_irq(xhci
, cur_td
, -ESHUTDOWN
);
854 static void xhci_kill_endpoint_urbs(struct xhci_hcd
*xhci
,
855 int slot_id
, int ep_index
)
857 struct xhci_td
*cur_td
;
859 struct xhci_virt_ep
*ep
;
860 struct xhci_ring
*ring
;
862 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
863 if ((ep
->ep_state
& EP_HAS_STREAMS
) ||
864 (ep
->ep_state
& EP_GETTING_NO_STREAMS
)) {
867 for (stream_id
= 1; stream_id
< ep
->stream_info
->num_streams
;
869 ring
= ep
->stream_info
->stream_rings
[stream_id
];
873 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
874 "Killing URBs for slot ID %u, ep index %u, stream %u",
875 slot_id
, ep_index
, stream_id
);
876 xhci_kill_ring_urbs(xhci
, ring
);
882 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
883 "Killing URBs for slot ID %u, ep index %u",
885 xhci_kill_ring_urbs(xhci
, ring
);
888 list_for_each_entry_safe(cur_td
, tmp
, &ep
->cancelled_td_list
,
890 list_del_init(&cur_td
->cancelled_td_list
);
891 inc_td_cnt(cur_td
->urb
);
893 if (last_td_in_urb(cur_td
))
894 xhci_giveback_urb_in_irq(xhci
, cur_td
, -ESHUTDOWN
);
899 * host controller died, register read returns 0xffffffff
900 * Complete pending commands, mark them ABORTED.
901 * URBs need to be given back as usb core might be waiting with device locks
902 * held for the URBs to finish during device disconnect, blocking host remove.
904 * Call with xhci->lock held.
905 * lock is relased and re-acquired while giving back urb.
907 void xhci_hc_died(struct xhci_hcd
*xhci
)
911 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
914 xhci_err(xhci
, "xHCI host controller not responding, assume dead\n");
915 xhci
->xhc_state
|= XHCI_STATE_DYING
;
917 xhci_cleanup_command_queue(xhci
);
919 /* return any pending urbs, remove may be waiting for them */
920 for (i
= 0; i
<= HCS_MAX_SLOTS(xhci
->hcs_params1
); i
++) {
923 for (j
= 0; j
< 31; j
++)
924 xhci_kill_endpoint_urbs(xhci
, i
, j
);
927 /* inform usb core hc died if PCI remove isn't already handling it */
928 if (!(xhci
->xhc_state
& XHCI_STATE_REMOVING
))
929 usb_hc_died(xhci_to_hcd(xhci
));
932 /* Watchdog timer function for when a stop endpoint command fails to complete.
933 * In this case, we assume the host controller is broken or dying or dead. The
934 * host may still be completing some other events, so we have to be careful to
935 * let the event ring handler and the URB dequeueing/enqueueing functions know
936 * through xhci->state.
938 * The timer may also fire if the host takes a very long time to respond to the
939 * command, and the stop endpoint command completion handler cannot delete the
940 * timer before the timer function is called. Another endpoint cancellation may
941 * sneak in before the timer function can grab the lock, and that may queue
942 * another stop endpoint command and add the timer back. So we cannot use a
943 * simple flag to say whether there is a pending stop endpoint command for a
944 * particular endpoint.
946 * Instead we use a combination of that flag and checking if a new timer is
949 void xhci_stop_endpoint_command_watchdog(unsigned long arg
)
951 struct xhci_hcd
*xhci
;
952 struct xhci_virt_ep
*ep
;
955 ep
= (struct xhci_virt_ep
*) arg
;
958 spin_lock_irqsave(&xhci
->lock
, flags
);
960 /* bail out if cmd completed but raced with stop ep watchdog timer.*/
961 if (!(ep
->ep_state
& EP_STOP_CMD_PENDING
) ||
962 timer_pending(&ep
->stop_cmd_timer
)) {
963 spin_unlock_irqrestore(&xhci
->lock
, flags
);
964 xhci_dbg(xhci
, "Stop EP timer raced with cmd completion, exit");
968 xhci_warn(xhci
, "xHCI host not responding to stop endpoint command.\n");
969 ep
->ep_state
&= ~EP_STOP_CMD_PENDING
;
974 * handle a stop endpoint cmd timeout as if host died (-ENODEV).
975 * In the future we could distinguish between -ENODEV and -ETIMEDOUT
976 * and try to recover a -ETIMEDOUT with a host controller reset
980 spin_unlock_irqrestore(&xhci
->lock
, flags
);
981 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
982 "xHCI host controller is dead.");
985 static void update_ring_for_set_deq_completion(struct xhci_hcd
*xhci
,
986 struct xhci_virt_device
*dev
,
987 struct xhci_ring
*ep_ring
,
988 unsigned int ep_index
)
990 union xhci_trb
*dequeue_temp
;
991 int num_trbs_free_temp
;
994 num_trbs_free_temp
= ep_ring
->num_trbs_free
;
995 dequeue_temp
= ep_ring
->dequeue
;
997 /* If we get two back-to-back stalls, and the first stalled transfer
998 * ends just before a link TRB, the dequeue pointer will be left on
999 * the link TRB by the code in the while loop. So we have to update
1000 * the dequeue pointer one segment further, or we'll jump off
1001 * the segment into la-la-land.
1003 if (trb_is_link(ep_ring
->dequeue
)) {
1004 ep_ring
->deq_seg
= ep_ring
->deq_seg
->next
;
1005 ep_ring
->dequeue
= ep_ring
->deq_seg
->trbs
;
1008 while (ep_ring
->dequeue
!= dev
->eps
[ep_index
].queued_deq_ptr
) {
1009 /* We have more usable TRBs */
1010 ep_ring
->num_trbs_free
++;
1012 if (trb_is_link(ep_ring
->dequeue
)) {
1013 if (ep_ring
->dequeue
==
1014 dev
->eps
[ep_index
].queued_deq_ptr
)
1016 ep_ring
->deq_seg
= ep_ring
->deq_seg
->next
;
1017 ep_ring
->dequeue
= ep_ring
->deq_seg
->trbs
;
1019 if (ep_ring
->dequeue
== dequeue_temp
) {
1026 xhci_dbg(xhci
, "Unable to find new dequeue pointer\n");
1027 ep_ring
->num_trbs_free
= num_trbs_free_temp
;
1032 * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1033 * we need to clear the set deq pending flag in the endpoint ring state, so that
1034 * the TD queueing code can ring the doorbell again. We also need to ring the
1035 * endpoint doorbell to restart the ring, but only if there aren't more
1036 * cancellations pending.
1038 static void xhci_handle_cmd_set_deq(struct xhci_hcd
*xhci
, int slot_id
,
1039 union xhci_trb
*trb
, u32 cmd_comp_code
)
1041 unsigned int ep_index
;
1042 unsigned int stream_id
;
1043 struct xhci_ring
*ep_ring
;
1044 struct xhci_virt_device
*dev
;
1045 struct xhci_virt_ep
*ep
;
1046 struct xhci_ep_ctx
*ep_ctx
;
1047 struct xhci_slot_ctx
*slot_ctx
;
1049 ep_index
= TRB_TO_EP_INDEX(le32_to_cpu(trb
->generic
.field
[3]));
1050 stream_id
= TRB_TO_STREAM_ID(le32_to_cpu(trb
->generic
.field
[2]));
1051 dev
= xhci
->devs
[slot_id
];
1052 ep
= &dev
->eps
[ep_index
];
1054 ep_ring
= xhci_stream_id_to_ring(dev
, ep_index
, stream_id
);
1056 xhci_warn(xhci
, "WARN Set TR deq ptr command for freed stream ID %u\n",
1058 /* XXX: Harmless??? */
1062 ep_ctx
= xhci_get_ep_ctx(xhci
, dev
->out_ctx
, ep_index
);
1063 slot_ctx
= xhci_get_slot_ctx(xhci
, dev
->out_ctx
);
1064 trace_xhci_handle_cmd_set_deq(slot_ctx
);
1065 trace_xhci_handle_cmd_set_deq_ep(ep_ctx
);
1067 if (cmd_comp_code
!= COMP_SUCCESS
) {
1068 unsigned int ep_state
;
1069 unsigned int slot_state
;
1071 switch (cmd_comp_code
) {
1072 case COMP_TRB_ERROR
:
1073 xhci_warn(xhci
, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n");
1075 case COMP_CONTEXT_STATE_ERROR
:
1076 xhci_warn(xhci
, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
1077 ep_state
= GET_EP_CTX_STATE(ep_ctx
);
1078 slot_state
= le32_to_cpu(slot_ctx
->dev_state
);
1079 slot_state
= GET_SLOT_STATE(slot_state
);
1080 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1081 "Slot state = %u, EP state = %u",
1082 slot_state
, ep_state
);
1084 case COMP_SLOT_NOT_ENABLED_ERROR
:
1085 xhci_warn(xhci
, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n",
1089 xhci_warn(xhci
, "WARN Set TR Deq Ptr cmd with unknown completion code of %u.\n",
1093 /* OK what do we do now? The endpoint state is hosed, and we
1094 * should never get to this point if the synchronization between
1095 * queueing, and endpoint state are correct. This might happen
1096 * if the device gets disconnected after we've finished
1097 * cancelling URBs, which might not be an error...
1101 /* 4.6.10 deq ptr is written to the stream ctx for streams */
1102 if (ep
->ep_state
& EP_HAS_STREAMS
) {
1103 struct xhci_stream_ctx
*ctx
=
1104 &ep
->stream_info
->stream_ctx_array
[stream_id
];
1105 deq
= le64_to_cpu(ctx
->stream_ring
) & SCTX_DEQ_MASK
;
1107 deq
= le64_to_cpu(ep_ctx
->deq
) & ~EP_CTX_CYCLE_MASK
;
1109 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1110 "Successful Set TR Deq Ptr cmd, deq = @%08llx", deq
);
1111 if (xhci_trb_virt_to_dma(ep
->queued_deq_seg
,
1112 ep
->queued_deq_ptr
) == deq
) {
1113 /* Update the ring's dequeue segment and dequeue pointer
1114 * to reflect the new position.
1116 update_ring_for_set_deq_completion(xhci
, dev
,
1119 xhci_warn(xhci
, "Mismatch between completed Set TR Deq Ptr command & xHCI internal state.\n");
1120 xhci_warn(xhci
, "ep deq seg = %p, deq ptr = %p\n",
1121 ep
->queued_deq_seg
, ep
->queued_deq_ptr
);
1126 dev
->eps
[ep_index
].ep_state
&= ~SET_DEQ_PENDING
;
1127 dev
->eps
[ep_index
].queued_deq_seg
= NULL
;
1128 dev
->eps
[ep_index
].queued_deq_ptr
= NULL
;
1129 /* Restart any rings with pending URBs */
1130 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
1133 static void xhci_handle_cmd_reset_ep(struct xhci_hcd
*xhci
, int slot_id
,
1134 union xhci_trb
*trb
, u32 cmd_comp_code
)
1136 struct xhci_virt_device
*vdev
;
1137 struct xhci_ep_ctx
*ep_ctx
;
1138 unsigned int ep_index
;
1140 ep_index
= TRB_TO_EP_INDEX(le32_to_cpu(trb
->generic
.field
[3]));
1141 vdev
= xhci
->devs
[slot_id
];
1142 ep_ctx
= xhci_get_ep_ctx(xhci
, vdev
->out_ctx
, ep_index
);
1143 trace_xhci_handle_cmd_reset_ep(ep_ctx
);
1145 /* This command will only fail if the endpoint wasn't halted,
1146 * but we don't care.
1148 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
1149 "Ignoring reset ep completion code of %u", cmd_comp_code
);
1151 /* HW with the reset endpoint quirk needs to have a configure endpoint
1152 * command complete before the endpoint can be used. Queue that here
1153 * because the HW can't handle two commands being queued in a row.
1155 if (xhci
->quirks
& XHCI_RESET_EP_QUIRK
) {
1156 struct xhci_command
*command
;
1158 command
= xhci_alloc_command(xhci
, false, false, GFP_ATOMIC
);
1162 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1163 "Queueing configure endpoint command");
1164 xhci_queue_configure_endpoint(xhci
, command
,
1165 xhci
->devs
[slot_id
]->in_ctx
->dma
, slot_id
,
1167 xhci_ring_cmd_db(xhci
);
1169 /* Clear our internal halted state */
1170 xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&= ~EP_HALTED
;
1174 static void xhci_handle_cmd_enable_slot(struct xhci_hcd
*xhci
, int slot_id
,
1175 struct xhci_command
*command
, u32 cmd_comp_code
)
1177 if (cmd_comp_code
== COMP_SUCCESS
)
1178 command
->slot_id
= slot_id
;
1180 command
->slot_id
= 0;
1183 static void xhci_handle_cmd_disable_slot(struct xhci_hcd
*xhci
, int slot_id
)
1185 struct xhci_virt_device
*virt_dev
;
1186 struct xhci_slot_ctx
*slot_ctx
;
1188 virt_dev
= xhci
->devs
[slot_id
];
1192 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
1193 trace_xhci_handle_cmd_disable_slot(slot_ctx
);
1195 if (xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)
1196 /* Delete default control endpoint resources */
1197 xhci_free_device_endpoint_resources(xhci
, virt_dev
, true);
1198 xhci_free_virt_device(xhci
, slot_id
);
1201 static void xhci_handle_cmd_config_ep(struct xhci_hcd
*xhci
, int slot_id
,
1202 struct xhci_event_cmd
*event
, u32 cmd_comp_code
)
1204 struct xhci_virt_device
*virt_dev
;
1205 struct xhci_input_control_ctx
*ctrl_ctx
;
1206 struct xhci_ep_ctx
*ep_ctx
;
1207 unsigned int ep_index
;
1208 unsigned int ep_state
;
1209 u32 add_flags
, drop_flags
;
1212 * Configure endpoint commands can come from the USB core
1213 * configuration or alt setting changes, or because the HW
1214 * needed an extra configure endpoint command after a reset
1215 * endpoint command or streams were being configured.
1216 * If the command was for a halted endpoint, the xHCI driver
1217 * is not waiting on the configure endpoint command.
1219 virt_dev
= xhci
->devs
[slot_id
];
1220 ctrl_ctx
= xhci_get_input_control_ctx(virt_dev
->in_ctx
);
1222 xhci_warn(xhci
, "Could not get input context, bad type.\n");
1226 add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1227 drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1228 /* Input ctx add_flags are the endpoint index plus one */
1229 ep_index
= xhci_last_valid_endpoint(add_flags
) - 1;
1231 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->out_ctx
, ep_index
);
1232 trace_xhci_handle_cmd_config_ep(ep_ctx
);
1234 /* A usb_set_interface() call directly after clearing a halted
1235 * condition may race on this quirky hardware. Not worth
1236 * worrying about, since this is prototype hardware. Not sure
1237 * if this will work for streams, but streams support was
1238 * untested on this prototype.
1240 if (xhci
->quirks
& XHCI_RESET_EP_QUIRK
&&
1241 ep_index
!= (unsigned int) -1 &&
1242 add_flags
- SLOT_FLAG
== drop_flags
) {
1243 ep_state
= virt_dev
->eps
[ep_index
].ep_state
;
1244 if (!(ep_state
& EP_HALTED
))
1246 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1247 "Completed config ep cmd - "
1248 "last ep index = %d, state = %d",
1249 ep_index
, ep_state
);
1250 /* Clear internal halted state and restart ring(s) */
1251 virt_dev
->eps
[ep_index
].ep_state
&= ~EP_HALTED
;
1252 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
1258 static void xhci_handle_cmd_addr_dev(struct xhci_hcd
*xhci
, int slot_id
)
1260 struct xhci_virt_device
*vdev
;
1261 struct xhci_slot_ctx
*slot_ctx
;
1263 vdev
= xhci
->devs
[slot_id
];
1264 slot_ctx
= xhci_get_slot_ctx(xhci
, vdev
->out_ctx
);
1265 trace_xhci_handle_cmd_addr_dev(slot_ctx
);
1268 static void xhci_handle_cmd_reset_dev(struct xhci_hcd
*xhci
, int slot_id
,
1269 struct xhci_event_cmd
*event
)
1271 struct xhci_virt_device
*vdev
;
1272 struct xhci_slot_ctx
*slot_ctx
;
1274 vdev
= xhci
->devs
[slot_id
];
1275 slot_ctx
= xhci_get_slot_ctx(xhci
, vdev
->out_ctx
);
1276 trace_xhci_handle_cmd_reset_dev(slot_ctx
);
1278 xhci_dbg(xhci
, "Completed reset device command.\n");
1279 if (!xhci
->devs
[slot_id
])
1280 xhci_warn(xhci
, "Reset device command completion "
1281 "for disabled slot %u\n", slot_id
);
1284 static void xhci_handle_cmd_nec_get_fw(struct xhci_hcd
*xhci
,
1285 struct xhci_event_cmd
*event
)
1287 if (!(xhci
->quirks
& XHCI_NEC_HOST
)) {
1288 xhci_warn(xhci
, "WARN NEC_GET_FW command on non-NEC host\n");
1291 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1292 "NEC firmware version %2x.%02x",
1293 NEC_FW_MAJOR(le32_to_cpu(event
->status
)),
1294 NEC_FW_MINOR(le32_to_cpu(event
->status
)));
1297 static void xhci_complete_del_and_free_cmd(struct xhci_command
*cmd
, u32 status
)
1299 list_del(&cmd
->cmd_list
);
1301 if (cmd
->completion
) {
1302 cmd
->status
= status
;
1303 complete(cmd
->completion
);
1309 void xhci_cleanup_command_queue(struct xhci_hcd
*xhci
)
1311 struct xhci_command
*cur_cmd
, *tmp_cmd
;
1312 list_for_each_entry_safe(cur_cmd
, tmp_cmd
, &xhci
->cmd_list
, cmd_list
)
1313 xhci_complete_del_and_free_cmd(cur_cmd
, COMP_COMMAND_ABORTED
);
1316 void xhci_handle_command_timeout(struct work_struct
*work
)
1318 struct xhci_hcd
*xhci
;
1319 unsigned long flags
;
1322 xhci
= container_of(to_delayed_work(work
), struct xhci_hcd
, cmd_timer
);
1324 spin_lock_irqsave(&xhci
->lock
, flags
);
1327 * If timeout work is pending, or current_cmd is NULL, it means we
1328 * raced with command completion. Command is handled so just return.
1330 if (!xhci
->current_cmd
|| delayed_work_pending(&xhci
->cmd_timer
)) {
1331 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1334 /* mark this command to be cancelled */
1335 xhci
->current_cmd
->status
= COMP_COMMAND_ABORTED
;
1337 /* Make sure command ring is running before aborting it */
1338 hw_ring_state
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
1339 if (hw_ring_state
== ~(u64
)0) {
1341 goto time_out_completed
;
1344 if ((xhci
->cmd_ring_state
& CMD_RING_STATE_RUNNING
) &&
1345 (hw_ring_state
& CMD_RING_RUNNING
)) {
1346 /* Prevent new doorbell, and start command abort */
1347 xhci
->cmd_ring_state
= CMD_RING_STATE_ABORTED
;
1348 xhci_dbg(xhci
, "Command timeout\n");
1349 xhci_abort_cmd_ring(xhci
, flags
);
1350 goto time_out_completed
;
1353 /* host removed. Bail out */
1354 if (xhci
->xhc_state
& XHCI_STATE_REMOVING
) {
1355 xhci_dbg(xhci
, "host removed, ring start fail?\n");
1356 xhci_cleanup_command_queue(xhci
);
1358 goto time_out_completed
;
1361 /* command timeout on stopped ring, ring can't be aborted */
1362 xhci_dbg(xhci
, "Command timeout on stopped ring\n");
1363 xhci_handle_stopped_cmd_ring(xhci
, xhci
->current_cmd
);
1366 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1370 static void handle_cmd_completion(struct xhci_hcd
*xhci
,
1371 struct xhci_event_cmd
*event
)
1373 int slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
));
1375 dma_addr_t cmd_dequeue_dma
;
1377 union xhci_trb
*cmd_trb
;
1378 struct xhci_command
*cmd
;
1381 cmd_dma
= le64_to_cpu(event
->cmd_trb
);
1382 cmd_trb
= xhci
->cmd_ring
->dequeue
;
1384 trace_xhci_handle_command(xhci
->cmd_ring
, &cmd_trb
->generic
);
1386 cmd_dequeue_dma
= xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
1389 * Check whether the completion event is for our internal kept
1392 if (!cmd_dequeue_dma
|| cmd_dma
!= (u64
)cmd_dequeue_dma
) {
1394 "ERROR mismatched command completion event\n");
1398 cmd
= list_first_entry(&xhci
->cmd_list
, struct xhci_command
, cmd_list
);
1400 cancel_delayed_work(&xhci
->cmd_timer
);
1402 cmd_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->status
));
1404 /* If CMD ring stopped we own the trbs between enqueue and dequeue */
1405 if (cmd_comp_code
== COMP_COMMAND_RING_STOPPED
) {
1406 complete_all(&xhci
->cmd_ring_stop_completion
);
1410 if (cmd
->command_trb
!= xhci
->cmd_ring
->dequeue
) {
1412 "Command completion event does not match command\n");
1417 * Host aborted the command ring, check if the current command was
1418 * supposed to be aborted, otherwise continue normally.
1419 * The command ring is stopped now, but the xHC will issue a Command
1420 * Ring Stopped event which will cause us to restart it.
1422 if (cmd_comp_code
== COMP_COMMAND_ABORTED
) {
1423 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
1424 if (cmd
->status
== COMP_COMMAND_ABORTED
) {
1425 if (xhci
->current_cmd
== cmd
)
1426 xhci
->current_cmd
= NULL
;
1431 cmd_type
= TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb
->generic
.field
[3]));
1433 case TRB_ENABLE_SLOT
:
1434 xhci_handle_cmd_enable_slot(xhci
, slot_id
, cmd
, cmd_comp_code
);
1436 case TRB_DISABLE_SLOT
:
1437 xhci_handle_cmd_disable_slot(xhci
, slot_id
);
1440 if (!cmd
->completion
)
1441 xhci_handle_cmd_config_ep(xhci
, slot_id
, event
,
1444 case TRB_EVAL_CONTEXT
:
1447 xhci_handle_cmd_addr_dev(xhci
, slot_id
);
1450 WARN_ON(slot_id
!= TRB_TO_SLOT_ID(
1451 le32_to_cpu(cmd_trb
->generic
.field
[3])));
1452 xhci_handle_cmd_stop_ep(xhci
, slot_id
, cmd_trb
, event
);
1455 WARN_ON(slot_id
!= TRB_TO_SLOT_ID(
1456 le32_to_cpu(cmd_trb
->generic
.field
[3])));
1457 xhci_handle_cmd_set_deq(xhci
, slot_id
, cmd_trb
, cmd_comp_code
);
1460 /* Is this an aborted command turned to NO-OP? */
1461 if (cmd
->status
== COMP_COMMAND_RING_STOPPED
)
1462 cmd_comp_code
= COMP_COMMAND_RING_STOPPED
;
1465 WARN_ON(slot_id
!= TRB_TO_SLOT_ID(
1466 le32_to_cpu(cmd_trb
->generic
.field
[3])));
1467 xhci_handle_cmd_reset_ep(xhci
, slot_id
, cmd_trb
, cmd_comp_code
);
1470 /* SLOT_ID field in reset device cmd completion event TRB is 0.
1471 * Use the SLOT_ID from the command TRB instead (xhci 4.6.11)
1473 slot_id
= TRB_TO_SLOT_ID(
1474 le32_to_cpu(cmd_trb
->generic
.field
[3]));
1475 xhci_handle_cmd_reset_dev(xhci
, slot_id
, event
);
1477 case TRB_NEC_GET_FW
:
1478 xhci_handle_cmd_nec_get_fw(xhci
, event
);
1481 /* Skip over unknown commands on the event ring */
1482 xhci_info(xhci
, "INFO unknown command type %d\n", cmd_type
);
1486 /* restart timer if this wasn't the last command */
1487 if (!list_is_singular(&xhci
->cmd_list
)) {
1488 xhci
->current_cmd
= list_first_entry(&cmd
->cmd_list
,
1489 struct xhci_command
, cmd_list
);
1490 xhci_mod_cmd_timer(xhci
, XHCI_CMD_DEFAULT_TIMEOUT
);
1491 } else if (xhci
->current_cmd
== cmd
) {
1492 xhci
->current_cmd
= NULL
;
1496 xhci_complete_del_and_free_cmd(cmd
, cmd_comp_code
);
1498 inc_deq(xhci
, xhci
->cmd_ring
);
1501 static void handle_vendor_event(struct xhci_hcd
*xhci
,
1502 union xhci_trb
*event
)
1506 trb_type
= TRB_FIELD_TO_TYPE(le32_to_cpu(event
->generic
.field
[3]));
1507 xhci_dbg(xhci
, "Vendor specific event TRB type = %u\n", trb_type
);
1508 if (trb_type
== TRB_NEC_CMD_COMP
&& (xhci
->quirks
& XHCI_NEC_HOST
))
1509 handle_cmd_completion(xhci
, &event
->event_cmd
);
1512 /* @port_id: the one-based port ID from the hardware (indexed from array of all
1513 * port registers -- USB 3.0 and USB 2.0).
1515 * Returns a zero-based port number, which is suitable for indexing into each of
1516 * the split roothubs' port arrays and bus state arrays.
1517 * Add one to it in order to call xhci_find_slot_id_by_port.
1519 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd
*hcd
,
1520 struct xhci_hcd
*xhci
, u32 port_id
)
1523 unsigned int num_similar_speed_ports
= 0;
1525 /* port_id from the hardware is 1-based, but port_array[], usb3_ports[],
1526 * and usb2_ports are 0-based indexes. Count the number of similar
1527 * speed ports, up to 1 port before this port.
1529 for (i
= 0; i
< (port_id
- 1); i
++) {
1530 u8 port_speed
= xhci
->port_array
[i
];
1533 * Skip ports that don't have known speeds, or have duplicate
1534 * Extended Capabilities port speed entries.
1536 if (port_speed
== 0 || port_speed
== DUPLICATE_ENTRY
)
1540 * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and
1541 * 1.1 ports are under the USB 2.0 hub. If the port speed
1542 * matches the device speed, it's a similar speed port.
1544 if ((port_speed
== 0x03) == (hcd
->speed
>= HCD_USB3
))
1545 num_similar_speed_ports
++;
1547 return num_similar_speed_ports
;
1550 static void handle_device_notification(struct xhci_hcd
*xhci
,
1551 union xhci_trb
*event
)
1554 struct usb_device
*udev
;
1556 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->generic
.field
[3]));
1557 if (!xhci
->devs
[slot_id
]) {
1558 xhci_warn(xhci
, "Device Notification event for "
1559 "unused slot %u\n", slot_id
);
1563 xhci_dbg(xhci
, "Device Wake Notification event for slot ID %u\n",
1565 udev
= xhci
->devs
[slot_id
]->udev
;
1566 if (udev
&& udev
->parent
)
1567 usb_wakeup_notification(udev
->parent
, udev
->portnum
);
1570 static void handle_port_status(struct xhci_hcd
*xhci
,
1571 union xhci_trb
*event
)
1573 struct usb_hcd
*hcd
;
1575 u32 portsc
, cmd_reg
;
1578 unsigned int faked_port_index
;
1580 struct xhci_bus_state
*bus_state
;
1581 __le32 __iomem
**port_array
;
1582 bool bogus_port_status
= false;
1584 /* Port status change events always have a successful completion code */
1585 if (GET_COMP_CODE(le32_to_cpu(event
->generic
.field
[2])) != COMP_SUCCESS
)
1587 "WARN: xHC returned failed port status event\n");
1589 port_id
= GET_PORT_ID(le32_to_cpu(event
->generic
.field
[0]));
1590 xhci_dbg(xhci
, "Port Status Change Event for port %d\n", port_id
);
1592 max_ports
= HCS_MAX_PORTS(xhci
->hcs_params1
);
1593 if ((port_id
<= 0) || (port_id
> max_ports
)) {
1594 xhci_warn(xhci
, "Invalid port id %d\n", port_id
);
1595 inc_deq(xhci
, xhci
->event_ring
);
1599 /* Figure out which usb_hcd this port is attached to:
1600 * is it a USB 3.0 port or a USB 2.0/1.1 port?
1602 major_revision
= xhci
->port_array
[port_id
- 1];
1604 /* Find the right roothub. */
1605 hcd
= xhci_to_hcd(xhci
);
1606 if ((major_revision
== 0x03) != (hcd
->speed
>= HCD_USB3
))
1607 hcd
= xhci
->shared_hcd
;
1609 if (major_revision
== 0) {
1610 xhci_warn(xhci
, "Event for port %u not in "
1611 "Extended Capabilities, ignoring.\n",
1613 bogus_port_status
= true;
1616 if (major_revision
== DUPLICATE_ENTRY
) {
1617 xhci_warn(xhci
, "Event for port %u duplicated in"
1618 "Extended Capabilities, ignoring.\n",
1620 bogus_port_status
= true;
1625 * Hardware port IDs reported by a Port Status Change Event include USB
1626 * 3.0 and USB 2.0 ports. We want to check if the port has reported a
1627 * resume event, but we first need to translate the hardware port ID
1628 * into the index into the ports on the correct split roothub, and the
1629 * correct bus_state structure.
1631 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
1632 if (hcd
->speed
>= HCD_USB3
)
1633 port_array
= xhci
->usb3_ports
;
1635 port_array
= xhci
->usb2_ports
;
1636 /* Find the faked port hub number */
1637 faked_port_index
= find_faked_portnum_from_hw_portnum(hcd
, xhci
,
1639 portsc
= readl(port_array
[faked_port_index
]);
1641 trace_xhci_handle_port_status(faked_port_index
, portsc
);
1643 if (hcd
->state
== HC_STATE_SUSPENDED
) {
1644 xhci_dbg(xhci
, "resume root hub\n");
1645 usb_hcd_resume_root_hub(hcd
);
1648 if (hcd
->speed
>= HCD_USB3
&& (portsc
& PORT_PLS_MASK
) == XDEV_INACTIVE
)
1649 bus_state
->port_remote_wakeup
&= ~(1 << faked_port_index
);
1651 if ((portsc
& PORT_PLC
) && (portsc
& PORT_PLS_MASK
) == XDEV_RESUME
) {
1652 xhci_dbg(xhci
, "port resume event for port %d\n", port_id
);
1654 cmd_reg
= readl(&xhci
->op_regs
->command
);
1655 if (!(cmd_reg
& CMD_RUN
)) {
1656 xhci_warn(xhci
, "xHC is not running.\n");
1660 if (DEV_SUPERSPEED_ANY(portsc
)) {
1661 xhci_dbg(xhci
, "remote wake SS port %d\n", port_id
);
1662 /* Set a flag to say the port signaled remote wakeup,
1663 * so we can tell the difference between the end of
1664 * device and host initiated resume.
1666 bus_state
->port_remote_wakeup
|= 1 << faked_port_index
;
1667 xhci_test_and_clear_bit(xhci
, port_array
,
1668 faked_port_index
, PORT_PLC
);
1669 xhci_set_link_state(xhci
, port_array
, faked_port_index
,
1671 /* Need to wait until the next link state change
1672 * indicates the device is actually in U0.
1674 bogus_port_status
= true;
1676 } else if (!test_bit(faked_port_index
,
1677 &bus_state
->resuming_ports
)) {
1678 xhci_dbg(xhci
, "resume HS port %d\n", port_id
);
1679 bus_state
->resume_done
[faked_port_index
] = jiffies
+
1680 msecs_to_jiffies(USB_RESUME_TIMEOUT
);
1681 set_bit(faked_port_index
, &bus_state
->resuming_ports
);
1682 mod_timer(&hcd
->rh_timer
,
1683 bus_state
->resume_done
[faked_port_index
]);
1684 /* Do the rest in GetPortStatus */
1688 if ((portsc
& PORT_PLC
) && (portsc
& PORT_PLS_MASK
) == XDEV_U0
&&
1689 DEV_SUPERSPEED_ANY(portsc
)) {
1690 xhci_dbg(xhci
, "resume SS port %d finished\n", port_id
);
1691 /* We've just brought the device into U0 through either the
1692 * Resume state after a device remote wakeup, or through the
1693 * U3Exit state after a host-initiated resume. If it's a device
1694 * initiated remote wake, don't pass up the link state change,
1695 * so the roothub behavior is consistent with external
1696 * USB 3.0 hub behavior.
1698 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
1699 faked_port_index
+ 1);
1700 if (slot_id
&& xhci
->devs
[slot_id
])
1701 xhci_ring_device(xhci
, slot_id
);
1702 if (bus_state
->port_remote_wakeup
& (1 << faked_port_index
)) {
1703 bus_state
->port_remote_wakeup
&=
1704 ~(1 << faked_port_index
);
1705 xhci_test_and_clear_bit(xhci
, port_array
,
1706 faked_port_index
, PORT_PLC
);
1707 usb_wakeup_notification(hcd
->self
.root_hub
,
1708 faked_port_index
+ 1);
1709 bogus_port_status
= true;
1715 * Check to see if xhci-hub.c is waiting on RExit to U0 transition (or
1716 * RExit to a disconnect state). If so, let the the driver know it's
1717 * out of the RExit state.
1719 if (!DEV_SUPERSPEED_ANY(portsc
) &&
1720 test_and_clear_bit(faked_port_index
,
1721 &bus_state
->rexit_ports
)) {
1722 complete(&bus_state
->rexit_done
[faked_port_index
]);
1723 bogus_port_status
= true;
1727 if (hcd
->speed
< HCD_USB3
)
1728 xhci_test_and_clear_bit(xhci
, port_array
, faked_port_index
,
1732 /* Update event ring dequeue pointer before dropping the lock */
1733 inc_deq(xhci
, xhci
->event_ring
);
1735 /* Don't make the USB core poll the roothub if we got a bad port status
1736 * change event. Besides, at that point we can't tell which roothub
1737 * (USB 2.0 or USB 3.0) to kick.
1739 if (bogus_port_status
)
1743 * xHCI port-status-change events occur when the "or" of all the
1744 * status-change bits in the portsc register changes from 0 to 1.
1745 * New status changes won't cause an event if any other change
1746 * bits are still set. When an event occurs, switch over to
1747 * polling to avoid losing status changes.
1749 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1750 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1751 spin_unlock(&xhci
->lock
);
1752 /* Pass this up to the core */
1753 usb_hcd_poll_rh_status(hcd
);
1754 spin_lock(&xhci
->lock
);
1758 * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1759 * at end_trb, which may be in another segment. If the suspect DMA address is a
1760 * TRB in this TD, this function returns that TRB's segment. Otherwise it
1763 struct xhci_segment
*trb_in_td(struct xhci_hcd
*xhci
,
1764 struct xhci_segment
*start_seg
,
1765 union xhci_trb
*start_trb
,
1766 union xhci_trb
*end_trb
,
1767 dma_addr_t suspect_dma
,
1770 dma_addr_t start_dma
;
1771 dma_addr_t end_seg_dma
;
1772 dma_addr_t end_trb_dma
;
1773 struct xhci_segment
*cur_seg
;
1775 start_dma
= xhci_trb_virt_to_dma(start_seg
, start_trb
);
1776 cur_seg
= start_seg
;
1781 /* We may get an event for a Link TRB in the middle of a TD */
1782 end_seg_dma
= xhci_trb_virt_to_dma(cur_seg
,
1783 &cur_seg
->trbs
[TRBS_PER_SEGMENT
- 1]);
1784 /* If the end TRB isn't in this segment, this is set to 0 */
1785 end_trb_dma
= xhci_trb_virt_to_dma(cur_seg
, end_trb
);
1789 "Looking for event-dma %016llx trb-start %016llx trb-end %016llx seg-start %016llx seg-end %016llx\n",
1790 (unsigned long long)suspect_dma
,
1791 (unsigned long long)start_dma
,
1792 (unsigned long long)end_trb_dma
,
1793 (unsigned long long)cur_seg
->dma
,
1794 (unsigned long long)end_seg_dma
);
1796 if (end_trb_dma
> 0) {
1797 /* The end TRB is in this segment, so suspect should be here */
1798 if (start_dma
<= end_trb_dma
) {
1799 if (suspect_dma
>= start_dma
&& suspect_dma
<= end_trb_dma
)
1802 /* Case for one segment with
1803 * a TD wrapped around to the top
1805 if ((suspect_dma
>= start_dma
&&
1806 suspect_dma
<= end_seg_dma
) ||
1807 (suspect_dma
>= cur_seg
->dma
&&
1808 suspect_dma
<= end_trb_dma
))
1813 /* Might still be somewhere in this segment */
1814 if (suspect_dma
>= start_dma
&& suspect_dma
<= end_seg_dma
)
1817 cur_seg
= cur_seg
->next
;
1818 start_dma
= xhci_trb_virt_to_dma(cur_seg
, &cur_seg
->trbs
[0]);
1819 } while (cur_seg
!= start_seg
);
1824 static void xhci_cleanup_halted_endpoint(struct xhci_hcd
*xhci
,
1825 unsigned int slot_id
, unsigned int ep_index
,
1826 unsigned int stream_id
,
1827 struct xhci_td
*td
, union xhci_trb
*ep_trb
,
1828 enum xhci_ep_reset_type reset_type
)
1830 struct xhci_virt_ep
*ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1831 struct xhci_command
*command
;
1832 command
= xhci_alloc_command(xhci
, false, false, GFP_ATOMIC
);
1836 ep
->ep_state
|= EP_HALTED
;
1838 xhci_queue_reset_ep(xhci
, command
, slot_id
, ep_index
, reset_type
);
1840 if (reset_type
== EP_HARD_RESET
)
1841 xhci_cleanup_stalled_ring(xhci
, ep_index
, stream_id
, td
);
1843 xhci_ring_cmd_db(xhci
);
1846 /* Check if an error has halted the endpoint ring. The class driver will
1847 * cleanup the halt for a non-default control endpoint if we indicate a stall.
1848 * However, a babble and other errors also halt the endpoint ring, and the class
1849 * driver won't clear the halt in that case, so we need to issue a Set Transfer
1850 * Ring Dequeue Pointer command manually.
1852 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd
*xhci
,
1853 struct xhci_ep_ctx
*ep_ctx
,
1854 unsigned int trb_comp_code
)
1856 /* TRB completion codes that may require a manual halt cleanup */
1857 if (trb_comp_code
== COMP_USB_TRANSACTION_ERROR
||
1858 trb_comp_code
== COMP_BABBLE_DETECTED_ERROR
||
1859 trb_comp_code
== COMP_SPLIT_TRANSACTION_ERROR
)
1860 /* The 0.95 spec says a babbling control endpoint
1861 * is not halted. The 0.96 spec says it is. Some HW
1862 * claims to be 0.95 compliant, but it halts the control
1863 * endpoint anyway. Check if a babble halted the
1866 if (GET_EP_CTX_STATE(ep_ctx
) == EP_STATE_HALTED
)
1872 int xhci_is_vendor_info_code(struct xhci_hcd
*xhci
, unsigned int trb_comp_code
)
1874 if (trb_comp_code
>= 224 && trb_comp_code
<= 255) {
1875 /* Vendor defined "informational" completion code,
1876 * treat as not-an-error.
1878 xhci_dbg(xhci
, "Vendor defined info completion code %u\n",
1880 xhci_dbg(xhci
, "Treating code as success.\n");
1886 static int xhci_td_cleanup(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
1887 struct xhci_ring
*ep_ring
, int *status
)
1889 struct urb_priv
*urb_priv
;
1890 struct urb
*urb
= NULL
;
1892 /* Clean up the endpoint's TD list */
1894 urb_priv
= urb
->hcpriv
;
1896 /* if a bounce buffer was used to align this td then unmap it */
1897 xhci_unmap_td_bounce_buffer(xhci
, ep_ring
, td
);
1899 /* Do one last check of the actual transfer length.
1900 * If the host controller said we transferred more data than the buffer
1901 * length, urb->actual_length will be a very big number (since it's
1902 * unsigned). Play it safe and say we didn't transfer anything.
1904 if (urb
->actual_length
> urb
->transfer_buffer_length
) {
1905 xhci_warn(xhci
, "URB req %u and actual %u transfer length mismatch\n",
1906 urb
->transfer_buffer_length
, urb
->actual_length
);
1907 urb
->actual_length
= 0;
1910 list_del_init(&td
->td_list
);
1911 /* Was this TD slated to be cancelled but completed anyway? */
1912 if (!list_empty(&td
->cancelled_td_list
))
1913 list_del_init(&td
->cancelled_td_list
);
1916 /* Giveback the urb when all the tds are completed */
1917 if (last_td_in_urb(td
)) {
1918 if ((urb
->actual_length
!= urb
->transfer_buffer_length
&&
1919 (urb
->transfer_flags
& URB_SHORT_NOT_OK
)) ||
1920 (*status
!= 0 && !usb_endpoint_xfer_isoc(&urb
->ep
->desc
)))
1921 xhci_dbg(xhci
, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
1922 urb
, urb
->actual_length
,
1923 urb
->transfer_buffer_length
, *status
);
1925 /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
1926 if (usb_pipetype(urb
->pipe
) == PIPE_ISOCHRONOUS
)
1928 xhci_giveback_urb_in_irq(xhci
, td
, *status
);
1934 static int finish_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
1935 union xhci_trb
*ep_trb
, struct xhci_transfer_event
*event
,
1936 struct xhci_virt_ep
*ep
, int *status
)
1938 struct xhci_virt_device
*xdev
;
1939 struct xhci_ep_ctx
*ep_ctx
;
1940 struct xhci_ring
*ep_ring
;
1941 unsigned int slot_id
;
1945 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
));
1946 xdev
= xhci
->devs
[slot_id
];
1947 ep_index
= TRB_TO_EP_ID(le32_to_cpu(event
->flags
)) - 1;
1948 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
1949 ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
1950 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
1952 if (trb_comp_code
== COMP_STOPPED_LENGTH_INVALID
||
1953 trb_comp_code
== COMP_STOPPED
||
1954 trb_comp_code
== COMP_STOPPED_SHORT_PACKET
) {
1955 /* The Endpoint Stop Command completion will take care of any
1956 * stopped TDs. A stopped TD may be restarted, so don't update
1957 * the ring dequeue pointer or take this TD off any lists yet.
1961 if (trb_comp_code
== COMP_STALL_ERROR
||
1962 xhci_requires_manual_halt_cleanup(xhci
, ep_ctx
,
1964 /* Issue a reset endpoint command to clear the host side
1965 * halt, followed by a set dequeue command to move the
1966 * dequeue pointer past the TD.
1967 * The class driver clears the device side halt later.
1969 xhci_cleanup_halted_endpoint(xhci
, slot_id
, ep_index
,
1970 ep_ring
->stream_id
, td
, ep_trb
,
1973 /* Update ring dequeue pointer */
1974 while (ep_ring
->dequeue
!= td
->last_trb
)
1975 inc_deq(xhci
, ep_ring
);
1976 inc_deq(xhci
, ep_ring
);
1979 return xhci_td_cleanup(xhci
, td
, ep_ring
, status
);
1982 /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
1983 static int sum_trb_lengths(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
1984 union xhci_trb
*stop_trb
)
1987 union xhci_trb
*trb
= ring
->dequeue
;
1988 struct xhci_segment
*seg
= ring
->deq_seg
;
1990 for (sum
= 0; trb
!= stop_trb
; next_trb(xhci
, ring
, &seg
, &trb
)) {
1991 if (!trb_is_noop(trb
) && !trb_is_link(trb
))
1992 sum
+= TRB_LEN(le32_to_cpu(trb
->generic
.field
[2]));
1998 * Process control tds, update urb status and actual_length.
2000 static int process_ctrl_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
2001 union xhci_trb
*ep_trb
, struct xhci_transfer_event
*event
,
2002 struct xhci_virt_ep
*ep
, int *status
)
2004 struct xhci_virt_device
*xdev
;
2005 struct xhci_ring
*ep_ring
;
2006 unsigned int slot_id
;
2008 struct xhci_ep_ctx
*ep_ctx
;
2010 u32 remaining
, requested
;
2013 trb_type
= TRB_FIELD_TO_TYPE(le32_to_cpu(ep_trb
->generic
.field
[3]));
2014 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
));
2015 xdev
= xhci
->devs
[slot_id
];
2016 ep_index
= TRB_TO_EP_ID(le32_to_cpu(event
->flags
)) - 1;
2017 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2018 ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
2019 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
2020 requested
= td
->urb
->transfer_buffer_length
;
2021 remaining
= EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
));
2023 switch (trb_comp_code
) {
2025 if (trb_type
!= TRB_STATUS
) {
2026 xhci_warn(xhci
, "WARN: Success on ctrl %s TRB without IOC set?\n",
2027 (trb_type
== TRB_DATA
) ? "data" : "setup");
2028 *status
= -ESHUTDOWN
;
2033 case COMP_SHORT_PACKET
:
2036 case COMP_STOPPED_SHORT_PACKET
:
2037 if (trb_type
== TRB_DATA
|| trb_type
== TRB_NORMAL
)
2038 td
->urb
->actual_length
= remaining
;
2040 xhci_warn(xhci
, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
2045 td
->urb
->actual_length
= 0;
2049 td
->urb
->actual_length
= requested
- remaining
;
2052 td
->urb
->actual_length
= requested
;
2055 xhci_warn(xhci
, "WARN: unexpected TRB Type %d\n",
2059 case COMP_STOPPED_LENGTH_INVALID
:
2062 if (!xhci_requires_manual_halt_cleanup(xhci
,
2063 ep_ctx
, trb_comp_code
))
2065 xhci_dbg(xhci
, "TRB error %u, halted endpoint index = %u\n",
2066 trb_comp_code
, ep_index
);
2067 /* else fall through */
2068 case COMP_STALL_ERROR
:
2069 /* Did we transfer part of the data (middle) phase? */
2070 if (trb_type
== TRB_DATA
|| trb_type
== TRB_NORMAL
)
2071 td
->urb
->actual_length
= requested
- remaining
;
2072 else if (!td
->urb_length_set
)
2073 td
->urb
->actual_length
= 0;
2077 /* stopped at setup stage, no data transferred */
2078 if (trb_type
== TRB_SETUP
)
2082 * if on data stage then update the actual_length of the URB and flag it
2083 * as set, so it won't be overwritten in the event for the last TRB.
2085 if (trb_type
== TRB_DATA
||
2086 trb_type
== TRB_NORMAL
) {
2087 td
->urb_length_set
= true;
2088 td
->urb
->actual_length
= requested
- remaining
;
2089 xhci_dbg(xhci
, "Waiting for status stage event\n");
2093 /* at status stage */
2094 if (!td
->urb_length_set
)
2095 td
->urb
->actual_length
= requested
;
2098 return finish_td(xhci
, td
, ep_trb
, event
, ep
, status
);
2102 * Process isochronous tds, update urb packet status and actual_length.
2104 static int process_isoc_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
2105 union xhci_trb
*ep_trb
, struct xhci_transfer_event
*event
,
2106 struct xhci_virt_ep
*ep
, int *status
)
2108 struct xhci_ring
*ep_ring
;
2109 struct urb_priv
*urb_priv
;
2111 struct usb_iso_packet_descriptor
*frame
;
2113 bool sum_trbs_for_length
= false;
2114 u32 remaining
, requested
, ep_trb_len
;
2115 int short_framestatus
;
2117 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2118 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
2119 urb_priv
= td
->urb
->hcpriv
;
2120 idx
= urb_priv
->num_tds_done
;
2121 frame
= &td
->urb
->iso_frame_desc
[idx
];
2122 requested
= frame
->length
;
2123 remaining
= EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
));
2124 ep_trb_len
= TRB_LEN(le32_to_cpu(ep_trb
->generic
.field
[2]));
2125 short_framestatus
= td
->urb
->transfer_flags
& URB_SHORT_NOT_OK
?
2128 /* handle completion code */
2129 switch (trb_comp_code
) {
2132 frame
->status
= short_framestatus
;
2133 if (xhci
->quirks
& XHCI_TRUST_TX_LENGTH
)
2134 sum_trbs_for_length
= true;
2139 case COMP_SHORT_PACKET
:
2140 frame
->status
= short_framestatus
;
2141 sum_trbs_for_length
= true;
2143 case COMP_BANDWIDTH_OVERRUN_ERROR
:
2144 frame
->status
= -ECOMM
;
2146 case COMP_ISOCH_BUFFER_OVERRUN
:
2147 case COMP_BABBLE_DETECTED_ERROR
:
2148 frame
->status
= -EOVERFLOW
;
2150 case COMP_INCOMPATIBLE_DEVICE_ERROR
:
2151 case COMP_STALL_ERROR
:
2152 frame
->status
= -EPROTO
;
2154 case COMP_USB_TRANSACTION_ERROR
:
2155 frame
->status
= -EPROTO
;
2156 if (ep_trb
!= td
->last_trb
)
2160 sum_trbs_for_length
= true;
2162 case COMP_STOPPED_SHORT_PACKET
:
2163 /* field normally containing residue now contains tranferred */
2164 frame
->status
= short_framestatus
;
2165 requested
= remaining
;
2167 case COMP_STOPPED_LENGTH_INVALID
:
2172 sum_trbs_for_length
= true;
2177 if (sum_trbs_for_length
)
2178 frame
->actual_length
= sum_trb_lengths(xhci
, ep_ring
, ep_trb
) +
2179 ep_trb_len
- remaining
;
2181 frame
->actual_length
= requested
;
2183 td
->urb
->actual_length
+= frame
->actual_length
;
2185 return finish_td(xhci
, td
, ep_trb
, event
, ep
, status
);
2188 static int skip_isoc_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
2189 struct xhci_transfer_event
*event
,
2190 struct xhci_virt_ep
*ep
, int *status
)
2192 struct xhci_ring
*ep_ring
;
2193 struct urb_priv
*urb_priv
;
2194 struct usb_iso_packet_descriptor
*frame
;
2197 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2198 urb_priv
= td
->urb
->hcpriv
;
2199 idx
= urb_priv
->num_tds_done
;
2200 frame
= &td
->urb
->iso_frame_desc
[idx
];
2202 /* The transfer is partly done. */
2203 frame
->status
= -EXDEV
;
2205 /* calc actual length */
2206 frame
->actual_length
= 0;
2208 /* Update ring dequeue pointer */
2209 while (ep_ring
->dequeue
!= td
->last_trb
)
2210 inc_deq(xhci
, ep_ring
);
2211 inc_deq(xhci
, ep_ring
);
2213 return xhci_td_cleanup(xhci
, td
, ep_ring
, status
);
2217 * Process bulk and interrupt tds, update urb status and actual_length.
2219 static int process_bulk_intr_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
2220 union xhci_trb
*ep_trb
, struct xhci_transfer_event
*event
,
2221 struct xhci_virt_ep
*ep
, int *status
)
2223 struct xhci_ring
*ep_ring
;
2225 u32 remaining
, requested
, ep_trb_len
;
2227 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2228 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
2229 remaining
= EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
));
2230 ep_trb_len
= TRB_LEN(le32_to_cpu(ep_trb
->generic
.field
[2]));
2231 requested
= td
->urb
->transfer_buffer_length
;
2233 switch (trb_comp_code
) {
2235 /* handle success with untransferred data as short packet */
2236 if (ep_trb
!= td
->last_trb
|| remaining
) {
2237 xhci_warn(xhci
, "WARN Successful completion on short TX\n");
2238 xhci_dbg(xhci
, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2239 td
->urb
->ep
->desc
.bEndpointAddress
,
2240 requested
, remaining
);
2244 case COMP_SHORT_PACKET
:
2245 xhci_dbg(xhci
, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2246 td
->urb
->ep
->desc
.bEndpointAddress
,
2247 requested
, remaining
);
2250 case COMP_STOPPED_SHORT_PACKET
:
2251 td
->urb
->actual_length
= remaining
;
2253 case COMP_STOPPED_LENGTH_INVALID
:
2254 /* stopped on ep trb with invalid length, exclude it */
2263 if (ep_trb
== td
->last_trb
)
2264 td
->urb
->actual_length
= requested
- remaining
;
2266 td
->urb
->actual_length
=
2267 sum_trb_lengths(xhci
, ep_ring
, ep_trb
) +
2268 ep_trb_len
- remaining
;
2270 if (remaining
> requested
) {
2271 xhci_warn(xhci
, "bad transfer trb length %d in event trb\n",
2273 td
->urb
->actual_length
= 0;
2275 return finish_td(xhci
, td
, ep_trb
, event
, ep
, status
);
2279 * If this function returns an error condition, it means it got a Transfer
2280 * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2281 * At this point, the host controller is probably hosed and should be reset.
2283 static int handle_tx_event(struct xhci_hcd
*xhci
,
2284 struct xhci_transfer_event
*event
)
2286 struct xhci_virt_device
*xdev
;
2287 struct xhci_virt_ep
*ep
;
2288 struct xhci_ring
*ep_ring
;
2289 unsigned int slot_id
;
2291 struct xhci_td
*td
= NULL
;
2292 dma_addr_t ep_trb_dma
;
2293 struct xhci_segment
*ep_seg
;
2294 union xhci_trb
*ep_trb
;
2295 int status
= -EINPROGRESS
;
2296 struct xhci_ep_ctx
*ep_ctx
;
2297 struct list_head
*tmp
;
2300 bool handling_skipped_tds
= false;
2302 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
));
2303 ep_index
= TRB_TO_EP_ID(le32_to_cpu(event
->flags
)) - 1;
2304 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
2305 ep_trb_dma
= le64_to_cpu(event
->buffer
);
2307 xdev
= xhci
->devs
[slot_id
];
2309 xhci_err(xhci
, "ERROR Transfer event pointed to bad slot %u\n",
2314 ep
= &xdev
->eps
[ep_index
];
2315 ep_ring
= xhci_dma_to_transfer_ring(ep
, ep_trb_dma
);
2316 ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
2318 if (GET_EP_CTX_STATE(ep_ctx
) == EP_STATE_DISABLED
) {
2320 "ERROR Transfer event for disabled endpoint slot %u ep %u\n",
2325 /* Some transfer events don't always point to a trb, see xhci 4.17.4 */
2327 switch (trb_comp_code
) {
2328 case COMP_STALL_ERROR
:
2329 case COMP_USB_TRANSACTION_ERROR
:
2330 case COMP_INVALID_STREAM_TYPE_ERROR
:
2331 case COMP_INVALID_STREAM_ID_ERROR
:
2332 xhci_cleanup_halted_endpoint(xhci
, slot_id
, ep_index
, 0,
2333 NULL
, NULL
, EP_SOFT_RESET
);
2335 case COMP_RING_UNDERRUN
:
2336 case COMP_RING_OVERRUN
:
2339 xhci_err(xhci
, "ERROR Transfer event for unknown stream ring slot %u ep %u\n",
2345 /* Count current td numbers if ep->skip is set */
2347 list_for_each(tmp
, &ep_ring
->td_list
)
2351 /* Look for common error cases */
2352 switch (trb_comp_code
) {
2353 /* Skip codes that require special handling depending on
2357 if (EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
)) == 0)
2359 if (xhci
->quirks
& XHCI_TRUST_TX_LENGTH
)
2360 trb_comp_code
= COMP_SHORT_PACKET
;
2362 xhci_warn_ratelimited(xhci
,
2363 "WARN Successful completion on short TX for slot %u ep %u: needs XHCI_TRUST_TX_LENGTH quirk?\n",
2365 case COMP_SHORT_PACKET
:
2367 /* Completion codes for endpoint stopped state */
2369 xhci_dbg(xhci
, "Stopped on Transfer TRB for slot %u ep %u\n",
2372 case COMP_STOPPED_LENGTH_INVALID
:
2374 "Stopped on No-op or Link TRB for slot %u ep %u\n",
2377 case COMP_STOPPED_SHORT_PACKET
:
2379 "Stopped with short packet transfer detected for slot %u ep %u\n",
2382 /* Completion codes for endpoint halted state */
2383 case COMP_STALL_ERROR
:
2384 xhci_dbg(xhci
, "Stalled endpoint for slot %u ep %u\n", slot_id
,
2386 ep
->ep_state
|= EP_HALTED
;
2389 case COMP_SPLIT_TRANSACTION_ERROR
:
2390 case COMP_USB_TRANSACTION_ERROR
:
2391 xhci_dbg(xhci
, "Transfer error for slot %u ep %u on endpoint\n",
2395 case COMP_BABBLE_DETECTED_ERROR
:
2396 xhci_dbg(xhci
, "Babble error for slot %u ep %u on endpoint\n",
2398 status
= -EOVERFLOW
;
2400 /* Completion codes for endpoint error state */
2401 case COMP_TRB_ERROR
:
2403 "WARN: TRB error for slot %u ep %u on endpoint\n",
2407 /* completion codes not indicating endpoint state change */
2408 case COMP_DATA_BUFFER_ERROR
:
2410 "WARN: HC couldn't access mem fast enough for slot %u ep %u\n",
2414 case COMP_BANDWIDTH_OVERRUN_ERROR
:
2416 "WARN: bandwidth overrun event for slot %u ep %u on endpoint\n",
2419 case COMP_ISOCH_BUFFER_OVERRUN
:
2421 "WARN: buffer overrun event for slot %u ep %u on endpoint",
2424 case COMP_RING_UNDERRUN
:
2426 * When the Isoch ring is empty, the xHC will generate
2427 * a Ring Overrun Event for IN Isoch endpoint or Ring
2428 * Underrun Event for OUT Isoch endpoint.
2430 xhci_dbg(xhci
, "underrun event on endpoint\n");
2431 if (!list_empty(&ep_ring
->td_list
))
2432 xhci_dbg(xhci
, "Underrun Event for slot %d ep %d "
2433 "still with TDs queued?\n",
2434 TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
)),
2437 case COMP_RING_OVERRUN
:
2438 xhci_dbg(xhci
, "overrun event on endpoint\n");
2439 if (!list_empty(&ep_ring
->td_list
))
2440 xhci_dbg(xhci
, "Overrun Event for slot %d ep %d "
2441 "still with TDs queued?\n",
2442 TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
)),
2445 case COMP_MISSED_SERVICE_ERROR
:
2447 * When encounter missed service error, one or more isoc tds
2448 * may be missed by xHC.
2449 * Set skip flag of the ep_ring; Complete the missed tds as
2450 * short transfer when process the ep_ring next time.
2454 "Miss service interval error for slot %u ep %u, set skip flag\n",
2457 case COMP_NO_PING_RESPONSE_ERROR
:
2460 "No Ping response error for slot %u ep %u, Skip one Isoc TD\n",
2464 case COMP_INCOMPATIBLE_DEVICE_ERROR
:
2465 /* needs disable slot command to recover */
2467 "WARN: detect an incompatible device for slot %u ep %u",
2472 if (xhci_is_vendor_info_code(xhci
, trb_comp_code
)) {
2477 "ERROR Unknown event condition %u for slot %u ep %u , HC probably busted\n",
2478 trb_comp_code
, slot_id
, ep_index
);
2483 /* This TRB should be in the TD at the head of this ring's
2486 if (list_empty(&ep_ring
->td_list
)) {
2488 * A stopped endpoint may generate an extra completion
2489 * event if the device was suspended. Don't print
2492 if (!(trb_comp_code
== COMP_STOPPED
||
2493 trb_comp_code
== COMP_STOPPED_LENGTH_INVALID
)) {
2494 xhci_warn(xhci
, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2495 TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
)),
2500 xhci_dbg(xhci
, "td_list is empty while skip flag set. Clear skip flag for slot %u ep %u.\n",
2506 /* We've skipped all the TDs on the ep ring when ep->skip set */
2507 if (ep
->skip
&& td_num
== 0) {
2509 xhci_dbg(xhci
, "All tds on the ep_ring skipped. Clear skip flag for slot %u ep %u.\n",
2514 td
= list_first_entry(&ep_ring
->td_list
, struct xhci_td
,
2519 /* Is this a TRB in the currently executing TD? */
2520 ep_seg
= trb_in_td(xhci
, ep_ring
->deq_seg
, ep_ring
->dequeue
,
2521 td
->last_trb
, ep_trb_dma
, false);
2524 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2525 * is not in the current TD pointed by ep_ring->dequeue because
2526 * that the hardware dequeue pointer still at the previous TRB
2527 * of the current TD. The previous TRB maybe a Link TD or the
2528 * last TRB of the previous TD. The command completion handle
2529 * will take care the rest.
2531 if (!ep_seg
&& (trb_comp_code
== COMP_STOPPED
||
2532 trb_comp_code
== COMP_STOPPED_LENGTH_INVALID
)) {
2538 !usb_endpoint_xfer_isoc(&td
->urb
->ep
->desc
)) {
2539 /* Some host controllers give a spurious
2540 * successful event after a short transfer.
2543 if ((xhci
->quirks
& XHCI_SPURIOUS_SUCCESS
) &&
2544 ep_ring
->last_td_was_short
) {
2545 ep_ring
->last_td_was_short
= false;
2548 /* HC is busted, give up! */
2550 "ERROR Transfer event TRB DMA ptr not "
2551 "part of current TD ep_index %d "
2552 "comp_code %u\n", ep_index
,
2554 trb_in_td(xhci
, ep_ring
->deq_seg
,
2555 ep_ring
->dequeue
, td
->last_trb
,
2560 skip_isoc_td(xhci
, td
, event
, ep
, &status
);
2563 if (trb_comp_code
== COMP_SHORT_PACKET
)
2564 ep_ring
->last_td_was_short
= true;
2566 ep_ring
->last_td_was_short
= false;
2570 "Found td. Clear skip flag for slot %u ep %u.\n",
2575 ep_trb
= &ep_seg
->trbs
[(ep_trb_dma
- ep_seg
->dma
) /
2578 trace_xhci_handle_transfer(ep_ring
,
2579 (struct xhci_generic_trb
*) ep_trb
);
2582 * No-op TRB should not trigger interrupts.
2583 * If ep_trb is a no-op TRB, it means the
2584 * corresponding TD has been cancelled. Just ignore
2587 if (trb_is_noop(ep_trb
)) {
2589 "ep_trb is a no-op TRB. Skip it for slot %u ep %u\n",
2594 /* update the urb's actual_length and give back to the core */
2595 if (usb_endpoint_xfer_control(&td
->urb
->ep
->desc
))
2596 process_ctrl_td(xhci
, td
, ep_trb
, event
, ep
, &status
);
2597 else if (usb_endpoint_xfer_isoc(&td
->urb
->ep
->desc
))
2598 process_isoc_td(xhci
, td
, ep_trb
, event
, ep
, &status
);
2600 process_bulk_intr_td(xhci
, td
, ep_trb
, event
, ep
,
2603 handling_skipped_tds
= ep
->skip
&&
2604 trb_comp_code
!= COMP_MISSED_SERVICE_ERROR
&&
2605 trb_comp_code
!= COMP_NO_PING_RESPONSE_ERROR
;
2608 * Do not update event ring dequeue pointer if we're in a loop
2609 * processing missed tds.
2611 if (!handling_skipped_tds
)
2612 inc_deq(xhci
, xhci
->event_ring
);
2615 * If ep->skip is set, it means there are missed tds on the
2616 * endpoint ring need to take care of.
2617 * Process them as short transfer until reach the td pointed by
2620 } while (handling_skipped_tds
);
2625 xhci_err(xhci
, "@%016llx %08x %08x %08x %08x\n",
2626 (unsigned long long) xhci_trb_virt_to_dma(
2627 xhci
->event_ring
->deq_seg
,
2628 xhci
->event_ring
->dequeue
),
2629 lower_32_bits(le64_to_cpu(event
->buffer
)),
2630 upper_32_bits(le64_to_cpu(event
->buffer
)),
2631 le32_to_cpu(event
->transfer_len
),
2632 le32_to_cpu(event
->flags
));
2637 * This function handles all OS-owned events on the event ring. It may drop
2638 * xhci->lock between event processing (e.g. to pass up port status changes).
2639 * Returns >0 for "possibly more events to process" (caller should call again),
2640 * otherwise 0 if done. In future, <0 returns should indicate error code.
2642 static int xhci_handle_event(struct xhci_hcd
*xhci
)
2644 union xhci_trb
*event
;
2645 int update_ptrs
= 1;
2648 /* Event ring hasn't been allocated yet. */
2649 if (!xhci
->event_ring
|| !xhci
->event_ring
->dequeue
) {
2650 xhci_err(xhci
, "ERROR event ring not ready\n");
2654 event
= xhci
->event_ring
->dequeue
;
2655 /* Does the HC or OS own the TRB? */
2656 if ((le32_to_cpu(event
->event_cmd
.flags
) & TRB_CYCLE
) !=
2657 xhci
->event_ring
->cycle_state
)
2660 trace_xhci_handle_event(xhci
->event_ring
, &event
->generic
);
2663 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2664 * speculative reads of the event's flags/data below.
2667 /* FIXME: Handle more event types. */
2668 switch (le32_to_cpu(event
->event_cmd
.flags
) & TRB_TYPE_BITMASK
) {
2669 case TRB_TYPE(TRB_COMPLETION
):
2670 handle_cmd_completion(xhci
, &event
->event_cmd
);
2672 case TRB_TYPE(TRB_PORT_STATUS
):
2673 handle_port_status(xhci
, event
);
2676 case TRB_TYPE(TRB_TRANSFER
):
2677 ret
= handle_tx_event(xhci
, &event
->trans_event
);
2681 case TRB_TYPE(TRB_DEV_NOTE
):
2682 handle_device_notification(xhci
, event
);
2685 if ((le32_to_cpu(event
->event_cmd
.flags
) & TRB_TYPE_BITMASK
) >=
2687 handle_vendor_event(xhci
, event
);
2689 xhci_warn(xhci
, "ERROR unknown event type %d\n",
2691 le32_to_cpu(event
->event_cmd
.flags
)));
2693 /* Any of the above functions may drop and re-acquire the lock, so check
2694 * to make sure a watchdog timer didn't mark the host as non-responsive.
2696 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
2697 xhci_dbg(xhci
, "xHCI host dying, returning from "
2698 "event handler.\n");
2703 /* Update SW event ring dequeue pointer */
2704 inc_deq(xhci
, xhci
->event_ring
);
2706 /* Are there more items on the event ring? Caller will call us again to
2713 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2714 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
2715 * indicators of an event TRB error, but we check the status *first* to be safe.
2717 irqreturn_t
xhci_irq(struct usb_hcd
*hcd
)
2719 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2720 union xhci_trb
*event_ring_deq
;
2721 irqreturn_t ret
= IRQ_NONE
;
2722 unsigned long flags
;
2727 spin_lock_irqsave(&xhci
->lock
, flags
);
2728 /* Check if the xHC generated the interrupt, or the irq is shared */
2729 status
= readl(&xhci
->op_regs
->status
);
2730 if (status
== ~(u32
)0) {
2736 if (!(status
& STS_EINT
))
2739 if (status
& STS_FATAL
) {
2740 xhci_warn(xhci
, "WARNING: Host System Error\n");
2747 * Clear the op reg interrupt status first,
2748 * so we can receive interrupts from other MSI-X interrupters.
2749 * Write 1 to clear the interrupt status.
2752 writel(status
, &xhci
->op_regs
->status
);
2754 if (!hcd
->msi_enabled
) {
2756 irq_pending
= readl(&xhci
->ir_set
->irq_pending
);
2757 irq_pending
|= IMAN_IP
;
2758 writel(irq_pending
, &xhci
->ir_set
->irq_pending
);
2761 if (xhci
->xhc_state
& XHCI_STATE_DYING
||
2762 xhci
->xhc_state
& XHCI_STATE_HALTED
) {
2763 xhci_dbg(xhci
, "xHCI dying, ignoring interrupt. "
2764 "Shouldn't IRQs be disabled?\n");
2765 /* Clear the event handler busy flag (RW1C);
2766 * the event ring should be empty.
2768 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
2769 xhci_write_64(xhci
, temp_64
| ERST_EHB
,
2770 &xhci
->ir_set
->erst_dequeue
);
2775 event_ring_deq
= xhci
->event_ring
->dequeue
;
2776 /* FIXME this should be a delayed service routine
2777 * that clears the EHB.
2779 while (xhci_handle_event(xhci
) > 0) {}
2781 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
2782 /* If necessary, update the HW's version of the event ring deq ptr. */
2783 if (event_ring_deq
!= xhci
->event_ring
->dequeue
) {
2784 deq
= xhci_trb_virt_to_dma(xhci
->event_ring
->deq_seg
,
2785 xhci
->event_ring
->dequeue
);
2787 xhci_warn(xhci
, "WARN something wrong with SW event "
2788 "ring dequeue ptr.\n");
2789 /* Update HC event ring dequeue pointer */
2790 temp_64
&= ERST_PTR_MASK
;
2791 temp_64
|= ((u64
) deq
& (u64
) ~ERST_PTR_MASK
);
2794 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2795 temp_64
|= ERST_EHB
;
2796 xhci_write_64(xhci
, temp_64
, &xhci
->ir_set
->erst_dequeue
);
2800 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2805 irqreturn_t
xhci_msi_irq(int irq
, void *hcd
)
2807 return xhci_irq(hcd
);
2810 /**** Endpoint Ring Operations ****/
2813 * Generic function for queueing a TRB on a ring.
2814 * The caller must have checked to make sure there's room on the ring.
2816 * @more_trbs_coming: Will you enqueue more TRBs before calling
2817 * prepare_transfer()?
2819 static void queue_trb(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
2820 bool more_trbs_coming
,
2821 u32 field1
, u32 field2
, u32 field3
, u32 field4
)
2823 struct xhci_generic_trb
*trb
;
2825 trb
= &ring
->enqueue
->generic
;
2826 trb
->field
[0] = cpu_to_le32(field1
);
2827 trb
->field
[1] = cpu_to_le32(field2
);
2828 trb
->field
[2] = cpu_to_le32(field3
);
2829 trb
->field
[3] = cpu_to_le32(field4
);
2831 trace_xhci_queue_trb(ring
, trb
);
2833 inc_enq(xhci
, ring
, more_trbs_coming
);
2837 * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
2838 * FIXME allocate segments if the ring is full.
2840 static int prepare_ring(struct xhci_hcd
*xhci
, struct xhci_ring
*ep_ring
,
2841 u32 ep_state
, unsigned int num_trbs
, gfp_t mem_flags
)
2843 unsigned int num_trbs_needed
;
2845 /* Make sure the endpoint has been added to xHC schedule */
2847 case EP_STATE_DISABLED
:
2849 * USB core changed config/interfaces without notifying us,
2850 * or hardware is reporting the wrong state.
2852 xhci_warn(xhci
, "WARN urb submitted to disabled ep\n");
2854 case EP_STATE_ERROR
:
2855 xhci_warn(xhci
, "WARN waiting for error on ep to be cleared\n");
2856 /* FIXME event handling code for error needs to clear it */
2857 /* XXX not sure if this should be -ENOENT or not */
2859 case EP_STATE_HALTED
:
2860 xhci_dbg(xhci
, "WARN halted endpoint, queueing URB anyway.\n");
2861 case EP_STATE_STOPPED
:
2862 case EP_STATE_RUNNING
:
2865 xhci_err(xhci
, "ERROR unknown endpoint state for ep\n");
2867 * FIXME issue Configure Endpoint command to try to get the HC
2868 * back into a known state.
2874 if (room_on_ring(xhci
, ep_ring
, num_trbs
))
2877 if (ep_ring
== xhci
->cmd_ring
) {
2878 xhci_err(xhci
, "Do not support expand command ring\n");
2882 xhci_dbg_trace(xhci
, trace_xhci_dbg_ring_expansion
,
2883 "ERROR no room on ep ring, try ring expansion");
2884 num_trbs_needed
= num_trbs
- ep_ring
->num_trbs_free
;
2885 if (xhci_ring_expansion(xhci
, ep_ring
, num_trbs_needed
,
2887 xhci_err(xhci
, "Ring expansion failed\n");
2892 while (trb_is_link(ep_ring
->enqueue
)) {
2893 /* If we're not dealing with 0.95 hardware or isoc rings
2894 * on AMD 0.96 host, clear the chain bit.
2896 if (!xhci_link_trb_quirk(xhci
) &&
2897 !(ep_ring
->type
== TYPE_ISOC
&&
2898 (xhci
->quirks
& XHCI_AMD_0x96_HOST
)))
2899 ep_ring
->enqueue
->link
.control
&=
2900 cpu_to_le32(~TRB_CHAIN
);
2902 ep_ring
->enqueue
->link
.control
|=
2903 cpu_to_le32(TRB_CHAIN
);
2906 ep_ring
->enqueue
->link
.control
^= cpu_to_le32(TRB_CYCLE
);
2908 /* Toggle the cycle bit after the last ring segment. */
2909 if (link_trb_toggles_cycle(ep_ring
->enqueue
))
2910 ep_ring
->cycle_state
^= 1;
2912 ep_ring
->enq_seg
= ep_ring
->enq_seg
->next
;
2913 ep_ring
->enqueue
= ep_ring
->enq_seg
->trbs
;
2918 static int prepare_transfer(struct xhci_hcd
*xhci
,
2919 struct xhci_virt_device
*xdev
,
2920 unsigned int ep_index
,
2921 unsigned int stream_id
,
2922 unsigned int num_trbs
,
2924 unsigned int td_index
,
2928 struct urb_priv
*urb_priv
;
2930 struct xhci_ring
*ep_ring
;
2931 struct xhci_ep_ctx
*ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
2933 ep_ring
= xhci_stream_id_to_ring(xdev
, ep_index
, stream_id
);
2935 xhci_dbg(xhci
, "Can't prepare ring for bad stream ID %u\n",
2940 ret
= prepare_ring(xhci
, ep_ring
, GET_EP_CTX_STATE(ep_ctx
),
2941 num_trbs
, mem_flags
);
2945 urb_priv
= urb
->hcpriv
;
2946 td
= &urb_priv
->td
[td_index
];
2948 INIT_LIST_HEAD(&td
->td_list
);
2949 INIT_LIST_HEAD(&td
->cancelled_td_list
);
2951 if (td_index
== 0) {
2952 ret
= usb_hcd_link_urb_to_ep(bus_to_hcd(urb
->dev
->bus
), urb
);
2958 /* Add this TD to the tail of the endpoint ring's TD list */
2959 list_add_tail(&td
->td_list
, &ep_ring
->td_list
);
2960 td
->start_seg
= ep_ring
->enq_seg
;
2961 td
->first_trb
= ep_ring
->enqueue
;
2966 static unsigned int count_trbs(u64 addr
, u64 len
)
2968 unsigned int num_trbs
;
2970 num_trbs
= DIV_ROUND_UP(len
+ (addr
& (TRB_MAX_BUFF_SIZE
- 1)),
2978 static inline unsigned int count_trbs_needed(struct urb
*urb
)
2980 return count_trbs(urb
->transfer_dma
, urb
->transfer_buffer_length
);
2983 static unsigned int count_sg_trbs_needed(struct urb
*urb
)
2985 struct scatterlist
*sg
;
2986 unsigned int i
, len
, full_len
, num_trbs
= 0;
2988 full_len
= urb
->transfer_buffer_length
;
2990 for_each_sg(urb
->sg
, sg
, urb
->num_mapped_sgs
, i
) {
2991 len
= sg_dma_len(sg
);
2992 num_trbs
+= count_trbs(sg_dma_address(sg
), len
);
2993 len
= min_t(unsigned int, len
, full_len
);
3002 static unsigned int count_isoc_trbs_needed(struct urb
*urb
, int i
)
3006 addr
= (u64
) (urb
->transfer_dma
+ urb
->iso_frame_desc
[i
].offset
);
3007 len
= urb
->iso_frame_desc
[i
].length
;
3009 return count_trbs(addr
, len
);
3012 static void check_trb_math(struct urb
*urb
, int running_total
)
3014 if (unlikely(running_total
!= urb
->transfer_buffer_length
))
3015 dev_err(&urb
->dev
->dev
, "%s - ep %#x - Miscalculated tx length, "
3016 "queued %#x (%d), asked for %#x (%d)\n",
3018 urb
->ep
->desc
.bEndpointAddress
,
3019 running_total
, running_total
,
3020 urb
->transfer_buffer_length
,
3021 urb
->transfer_buffer_length
);
3024 static void giveback_first_trb(struct xhci_hcd
*xhci
, int slot_id
,
3025 unsigned int ep_index
, unsigned int stream_id
, int start_cycle
,
3026 struct xhci_generic_trb
*start_trb
)
3029 * Pass all the TRBs to the hardware at once and make sure this write
3034 start_trb
->field
[3] |= cpu_to_le32(start_cycle
);
3036 start_trb
->field
[3] &= cpu_to_le32(~TRB_CYCLE
);
3037 xhci_ring_ep_doorbell(xhci
, slot_id
, ep_index
, stream_id
);
3040 static void check_interval(struct xhci_hcd
*xhci
, struct urb
*urb
,
3041 struct xhci_ep_ctx
*ep_ctx
)
3046 xhci_interval
= EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx
->ep_info
));
3047 ep_interval
= urb
->interval
;
3049 /* Convert to microframes */
3050 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3051 urb
->dev
->speed
== USB_SPEED_FULL
)
3054 /* FIXME change this to a warning and a suggestion to use the new API
3055 * to set the polling interval (once the API is added).
3057 if (xhci_interval
!= ep_interval
) {
3058 dev_dbg_ratelimited(&urb
->dev
->dev
,
3059 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3060 ep_interval
, ep_interval
== 1 ? "" : "s",
3061 xhci_interval
, xhci_interval
== 1 ? "" : "s");
3062 urb
->interval
= xhci_interval
;
3063 /* Convert back to frames for LS/FS devices */
3064 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3065 urb
->dev
->speed
== USB_SPEED_FULL
)
3071 * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt
3072 * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD
3073 * (comprised of sg list entries) can take several service intervals to
3076 int xhci_queue_intr_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3077 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3079 struct xhci_ep_ctx
*ep_ctx
;
3081 ep_ctx
= xhci_get_ep_ctx(xhci
, xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
3082 check_interval(xhci
, urb
, ep_ctx
);
3084 return xhci_queue_bulk_tx(xhci
, mem_flags
, urb
, slot_id
, ep_index
);
3088 * For xHCI 1.0 host controllers, TD size is the number of max packet sized
3089 * packets remaining in the TD (*not* including this TRB).
3091 * Total TD packet count = total_packet_count =
3092 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
3094 * Packets transferred up to and including this TRB = packets_transferred =
3095 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
3097 * TD size = total_packet_count - packets_transferred
3099 * For xHCI 0.96 and older, TD size field should be the remaining bytes
3100 * including this TRB, right shifted by 10
3102 * For all hosts it must fit in bits 21:17, so it can't be bigger than 31.
3103 * This is taken care of in the TRB_TD_SIZE() macro
3105 * The last TRB in a TD must have the TD size set to zero.
3107 static u32
xhci_td_remainder(struct xhci_hcd
*xhci
, int transferred
,
3108 int trb_buff_len
, unsigned int td_total_len
,
3109 struct urb
*urb
, bool more_trbs_coming
)
3111 u32 maxp
, total_packet_count
;
3113 /* MTK xHCI is mostly 0.97 but contains some features from 1.0 */
3114 if (xhci
->hci_version
< 0x100 && !(xhci
->quirks
& XHCI_MTK_HOST
))
3115 return ((td_total_len
- transferred
) >> 10);
3117 /* One TRB with a zero-length data packet. */
3118 if (!more_trbs_coming
|| (transferred
== 0 && trb_buff_len
== 0) ||
3119 trb_buff_len
== td_total_len
)
3122 /* for MTK xHCI, TD size doesn't include this TRB */
3123 if (xhci
->quirks
& XHCI_MTK_HOST
)
3126 maxp
= usb_endpoint_maxp(&urb
->ep
->desc
);
3127 total_packet_count
= DIV_ROUND_UP(td_total_len
, maxp
);
3129 /* Queueing functions don't count the current TRB into transferred */
3130 return (total_packet_count
- ((transferred
+ trb_buff_len
) / maxp
));
3134 static int xhci_align_td(struct xhci_hcd
*xhci
, struct urb
*urb
, u32 enqd_len
,
3135 u32
*trb_buff_len
, struct xhci_segment
*seg
)
3137 struct device
*dev
= xhci_to_hcd(xhci
)->self
.controller
;
3138 unsigned int unalign
;
3139 unsigned int max_pkt
;
3142 max_pkt
= usb_endpoint_maxp(&urb
->ep
->desc
);
3143 unalign
= (enqd_len
+ *trb_buff_len
) % max_pkt
;
3145 /* we got lucky, last normal TRB data on segment is packet aligned */
3149 xhci_dbg(xhci
, "Unaligned %d bytes, buff len %d\n",
3150 unalign
, *trb_buff_len
);
3152 /* is the last nornal TRB alignable by splitting it */
3153 if (*trb_buff_len
> unalign
) {
3154 *trb_buff_len
-= unalign
;
3155 xhci_dbg(xhci
, "split align, new buff len %d\n", *trb_buff_len
);
3160 * We want enqd_len + trb_buff_len to sum up to a number aligned to
3161 * number which is divisible by the endpoint's wMaxPacketSize. IOW:
3162 * (size of currently enqueued TRBs + remainder) % wMaxPacketSize == 0.
3164 new_buff_len
= max_pkt
- (enqd_len
% max_pkt
);
3166 if (new_buff_len
> (urb
->transfer_buffer_length
- enqd_len
))
3167 new_buff_len
= (urb
->transfer_buffer_length
- enqd_len
);
3169 /* create a max max_pkt sized bounce buffer pointed to by last trb */
3170 if (usb_urb_dir_out(urb
)) {
3171 sg_pcopy_to_buffer(urb
->sg
, urb
->num_mapped_sgs
,
3172 seg
->bounce_buf
, new_buff_len
, enqd_len
);
3173 seg
->bounce_dma
= dma_map_single(dev
, seg
->bounce_buf
,
3174 max_pkt
, DMA_TO_DEVICE
);
3176 seg
->bounce_dma
= dma_map_single(dev
, seg
->bounce_buf
,
3177 max_pkt
, DMA_FROM_DEVICE
);
3180 if (dma_mapping_error(dev
, seg
->bounce_dma
)) {
3181 /* try without aligning. Some host controllers survive */
3182 xhci_warn(xhci
, "Failed mapping bounce buffer, not aligning\n");
3185 *trb_buff_len
= new_buff_len
;
3186 seg
->bounce_len
= new_buff_len
;
3187 seg
->bounce_offs
= enqd_len
;
3189 xhci_dbg(xhci
, "Bounce align, new buff len %d\n", *trb_buff_len
);
3194 /* This is very similar to what ehci-q.c qtd_fill() does */
3195 int xhci_queue_bulk_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3196 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3198 struct xhci_ring
*ring
;
3199 struct urb_priv
*urb_priv
;
3201 struct xhci_generic_trb
*start_trb
;
3202 struct scatterlist
*sg
= NULL
;
3203 bool more_trbs_coming
= true;
3204 bool need_zero_pkt
= false;
3205 bool first_trb
= true;
3206 unsigned int num_trbs
;
3207 unsigned int start_cycle
, num_sgs
= 0;
3208 unsigned int enqd_len
, block_len
, trb_buff_len
, full_len
;
3210 u32 field
, length_field
, remainder
;
3211 u64 addr
, send_addr
;
3213 ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
3217 full_len
= urb
->transfer_buffer_length
;
3218 /* If we have scatter/gather list, we use it. */
3220 num_sgs
= urb
->num_mapped_sgs
;
3222 addr
= (u64
) sg_dma_address(sg
);
3223 block_len
= sg_dma_len(sg
);
3224 num_trbs
= count_sg_trbs_needed(urb
);
3226 num_trbs
= count_trbs_needed(urb
);
3227 addr
= (u64
) urb
->transfer_dma
;
3228 block_len
= full_len
;
3230 ret
= prepare_transfer(xhci
, xhci
->devs
[slot_id
],
3231 ep_index
, urb
->stream_id
,
3232 num_trbs
, urb
, 0, mem_flags
);
3233 if (unlikely(ret
< 0))
3236 urb_priv
= urb
->hcpriv
;
3238 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3239 if (urb
->transfer_flags
& URB_ZERO_PACKET
&& urb_priv
->num_tds
> 1)
3240 need_zero_pkt
= true;
3242 td
= &urb_priv
->td
[0];
3245 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3246 * until we've finished creating all the other TRBs. The ring's cycle
3247 * state may change as we enqueue the other TRBs, so save it too.
3249 start_trb
= &ring
->enqueue
->generic
;
3250 start_cycle
= ring
->cycle_state
;
3253 /* Queue the TRBs, even if they are zero-length */
3254 for (enqd_len
= 0; first_trb
|| enqd_len
< full_len
;
3255 enqd_len
+= trb_buff_len
) {
3256 field
= TRB_TYPE(TRB_NORMAL
);
3258 /* TRB buffer should not cross 64KB boundaries */
3259 trb_buff_len
= TRB_BUFF_LEN_UP_TO_BOUNDARY(addr
);
3260 trb_buff_len
= min_t(unsigned int, trb_buff_len
, block_len
);
3262 if (enqd_len
+ trb_buff_len
> full_len
)
3263 trb_buff_len
= full_len
- enqd_len
;
3265 /* Don't change the cycle bit of the first TRB until later */
3268 if (start_cycle
== 0)
3271 field
|= ring
->cycle_state
;
3273 /* Chain all the TRBs together; clear the chain bit in the last
3274 * TRB to indicate it's the last TRB in the chain.
3276 if (enqd_len
+ trb_buff_len
< full_len
) {
3278 if (trb_is_link(ring
->enqueue
+ 1)) {
3279 if (xhci_align_td(xhci
, urb
, enqd_len
,
3282 send_addr
= ring
->enq_seg
->bounce_dma
;
3283 /* assuming TD won't span 2 segs */
3284 td
->bounce_seg
= ring
->enq_seg
;
3288 if (enqd_len
+ trb_buff_len
>= full_len
) {
3289 field
&= ~TRB_CHAIN
;
3291 more_trbs_coming
= false;
3292 td
->last_trb
= ring
->enqueue
;
3295 /* Only set interrupt on short packet for IN endpoints */
3296 if (usb_urb_dir_in(urb
))
3299 /* Set the TRB length, TD size, and interrupter fields. */
3300 remainder
= xhci_td_remainder(xhci
, enqd_len
, trb_buff_len
,
3301 full_len
, urb
, more_trbs_coming
);
3303 length_field
= TRB_LEN(trb_buff_len
) |
3304 TRB_TD_SIZE(remainder
) |
3307 queue_trb(xhci
, ring
, more_trbs_coming
| need_zero_pkt
,
3308 lower_32_bits(send_addr
),
3309 upper_32_bits(send_addr
),
3313 addr
+= trb_buff_len
;
3314 sent_len
= trb_buff_len
;
3316 while (sg
&& sent_len
>= block_len
) {
3319 sent_len
-= block_len
;
3322 block_len
= sg_dma_len(sg
);
3323 addr
= (u64
) sg_dma_address(sg
);
3327 block_len
-= sent_len
;
3331 if (need_zero_pkt
) {
3332 ret
= prepare_transfer(xhci
, xhci
->devs
[slot_id
],
3333 ep_index
, urb
->stream_id
,
3334 1, urb
, 1, mem_flags
);
3335 urb_priv
->td
[1].last_trb
= ring
->enqueue
;
3336 field
= TRB_TYPE(TRB_NORMAL
) | ring
->cycle_state
| TRB_IOC
;
3337 queue_trb(xhci
, ring
, 0, 0, 0, TRB_INTR_TARGET(0), field
);
3340 check_trb_math(urb
, enqd_len
);
3341 giveback_first_trb(xhci
, slot_id
, ep_index
, urb
->stream_id
,
3342 start_cycle
, start_trb
);
3346 /* Caller must have locked xhci->lock */
3347 int xhci_queue_ctrl_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3348 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3350 struct xhci_ring
*ep_ring
;
3353 struct usb_ctrlrequest
*setup
;
3354 struct xhci_generic_trb
*start_trb
;
3357 struct urb_priv
*urb_priv
;
3360 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
3365 * Need to copy setup packet into setup TRB, so we can't use the setup
3368 if (!urb
->setup_packet
)
3371 /* 1 TRB for setup, 1 for status */
3374 * Don't need to check if we need additional event data and normal TRBs,
3375 * since data in control transfers will never get bigger than 16MB
3376 * XXX: can we get a buffer that crosses 64KB boundaries?
3378 if (urb
->transfer_buffer_length
> 0)
3380 ret
= prepare_transfer(xhci
, xhci
->devs
[slot_id
],
3381 ep_index
, urb
->stream_id
,
3382 num_trbs
, urb
, 0, mem_flags
);
3386 urb_priv
= urb
->hcpriv
;
3387 td
= &urb_priv
->td
[0];
3390 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3391 * until we've finished creating all the other TRBs. The ring's cycle
3392 * state may change as we enqueue the other TRBs, so save it too.
3394 start_trb
= &ep_ring
->enqueue
->generic
;
3395 start_cycle
= ep_ring
->cycle_state
;
3397 /* Queue setup TRB - see section 6.4.1.2.1 */
3398 /* FIXME better way to translate setup_packet into two u32 fields? */
3399 setup
= (struct usb_ctrlrequest
*) urb
->setup_packet
;
3401 field
|= TRB_IDT
| TRB_TYPE(TRB_SETUP
);
3402 if (start_cycle
== 0)
3405 /* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
3406 if ((xhci
->hci_version
>= 0x100) || (xhci
->quirks
& XHCI_MTK_HOST
)) {
3407 if (urb
->transfer_buffer_length
> 0) {
3408 if (setup
->bRequestType
& USB_DIR_IN
)
3409 field
|= TRB_TX_TYPE(TRB_DATA_IN
);
3411 field
|= TRB_TX_TYPE(TRB_DATA_OUT
);
3415 queue_trb(xhci
, ep_ring
, true,
3416 setup
->bRequestType
| setup
->bRequest
<< 8 | le16_to_cpu(setup
->wValue
) << 16,
3417 le16_to_cpu(setup
->wIndex
) | le16_to_cpu(setup
->wLength
) << 16,
3418 TRB_LEN(8) | TRB_INTR_TARGET(0),
3419 /* Immediate data in pointer */
3422 /* If there's data, queue data TRBs */
3423 /* Only set interrupt on short packet for IN endpoints */
3424 if (usb_urb_dir_in(urb
))
3425 field
= TRB_ISP
| TRB_TYPE(TRB_DATA
);
3427 field
= TRB_TYPE(TRB_DATA
);
3429 if (urb
->transfer_buffer_length
> 0) {
3430 u32 length_field
, remainder
;
3432 remainder
= xhci_td_remainder(xhci
, 0,
3433 urb
->transfer_buffer_length
,
3434 urb
->transfer_buffer_length
,
3436 length_field
= TRB_LEN(urb
->transfer_buffer_length
) |
3437 TRB_TD_SIZE(remainder
) |
3439 if (setup
->bRequestType
& USB_DIR_IN
)
3440 field
|= TRB_DIR_IN
;
3441 queue_trb(xhci
, ep_ring
, true,
3442 lower_32_bits(urb
->transfer_dma
),
3443 upper_32_bits(urb
->transfer_dma
),
3445 field
| ep_ring
->cycle_state
);
3448 /* Save the DMA address of the last TRB in the TD */
3449 td
->last_trb
= ep_ring
->enqueue
;
3451 /* Queue status TRB - see Table 7 and sections 4.11.2.2 and 6.4.1.2.3 */
3452 /* If the device sent data, the status stage is an OUT transfer */
3453 if (urb
->transfer_buffer_length
> 0 && setup
->bRequestType
& USB_DIR_IN
)
3457 queue_trb(xhci
, ep_ring
, false,
3461 /* Event on completion */
3462 field
| TRB_IOC
| TRB_TYPE(TRB_STATUS
) | ep_ring
->cycle_state
);
3464 giveback_first_trb(xhci
, slot_id
, ep_index
, 0,
3465 start_cycle
, start_trb
);
3470 * The transfer burst count field of the isochronous TRB defines the number of
3471 * bursts that are required to move all packets in this TD. Only SuperSpeed
3472 * devices can burst up to bMaxBurst number of packets per service interval.
3473 * This field is zero based, meaning a value of zero in the field means one
3474 * burst. Basically, for everything but SuperSpeed devices, this field will be
3475 * zero. Only xHCI 1.0 host controllers support this field.
3477 static unsigned int xhci_get_burst_count(struct xhci_hcd
*xhci
,
3478 struct urb
*urb
, unsigned int total_packet_count
)
3480 unsigned int max_burst
;
3482 if (xhci
->hci_version
< 0x100 || urb
->dev
->speed
< USB_SPEED_SUPER
)
3485 max_burst
= urb
->ep
->ss_ep_comp
.bMaxBurst
;
3486 return DIV_ROUND_UP(total_packet_count
, max_burst
+ 1) - 1;
3490 * Returns the number of packets in the last "burst" of packets. This field is
3491 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3492 * the last burst packet count is equal to the total number of packets in the
3493 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3494 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3495 * contain 1 to (bMaxBurst + 1) packets.
3497 static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd
*xhci
,
3498 struct urb
*urb
, unsigned int total_packet_count
)
3500 unsigned int max_burst
;
3501 unsigned int residue
;
3503 if (xhci
->hci_version
< 0x100)
3506 if (urb
->dev
->speed
>= USB_SPEED_SUPER
) {
3507 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3508 max_burst
= urb
->ep
->ss_ep_comp
.bMaxBurst
;
3509 residue
= total_packet_count
% (max_burst
+ 1);
3510 /* If residue is zero, the last burst contains (max_burst + 1)
3511 * number of packets, but the TLBPC field is zero-based.
3517 if (total_packet_count
== 0)
3519 return total_packet_count
- 1;
3523 * Calculates Frame ID field of the isochronous TRB identifies the
3524 * target frame that the Interval associated with this Isochronous
3525 * Transfer Descriptor will start on. Refer to 4.11.2.5 in 1.1 spec.
3527 * Returns actual frame id on success, negative value on error.
3529 static int xhci_get_isoc_frame_id(struct xhci_hcd
*xhci
,
3530 struct urb
*urb
, int index
)
3532 int start_frame
, ist
, ret
= 0;
3533 int start_frame_id
, end_frame_id
, current_frame_id
;
3535 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3536 urb
->dev
->speed
== USB_SPEED_FULL
)
3537 start_frame
= urb
->start_frame
+ index
* urb
->interval
;
3539 start_frame
= (urb
->start_frame
+ index
* urb
->interval
) >> 3;
3541 /* Isochronous Scheduling Threshold (IST, bits 0~3 in HCSPARAMS2):
3543 * If bit [3] of IST is cleared to '0', software can add a TRB no
3544 * later than IST[2:0] Microframes before that TRB is scheduled to
3546 * If bit [3] of IST is set to '1', software can add a TRB no later
3547 * than IST[2:0] Frames before that TRB is scheduled to be executed.
3549 ist
= HCS_IST(xhci
->hcs_params2
) & 0x7;
3550 if (HCS_IST(xhci
->hcs_params2
) & (1 << 3))
3553 /* Software shall not schedule an Isoch TD with a Frame ID value that
3554 * is less than the Start Frame ID or greater than the End Frame ID,
3557 * End Frame ID = (Current MFINDEX register value + 895 ms.) MOD 2048
3558 * Start Frame ID = (Current MFINDEX register value + IST + 1) MOD 2048
3560 * Both the End Frame ID and Start Frame ID values are calculated
3561 * in microframes. When software determines the valid Frame ID value;
3562 * The End Frame ID value should be rounded down to the nearest Frame
3563 * boundary, and the Start Frame ID value should be rounded up to the
3564 * nearest Frame boundary.
3566 current_frame_id
= readl(&xhci
->run_regs
->microframe_index
);
3567 start_frame_id
= roundup(current_frame_id
+ ist
+ 1, 8);
3568 end_frame_id
= rounddown(current_frame_id
+ 895 * 8, 8);
3570 start_frame
&= 0x7ff;
3571 start_frame_id
= (start_frame_id
>> 3) & 0x7ff;
3572 end_frame_id
= (end_frame_id
>> 3) & 0x7ff;
3574 xhci_dbg(xhci
, "%s: index %d, reg 0x%x start_frame_id 0x%x, end_frame_id 0x%x, start_frame 0x%x\n",
3575 __func__
, index
, readl(&xhci
->run_regs
->microframe_index
),
3576 start_frame_id
, end_frame_id
, start_frame
);
3578 if (start_frame_id
< end_frame_id
) {
3579 if (start_frame
> end_frame_id
||
3580 start_frame
< start_frame_id
)
3582 } else if (start_frame_id
> end_frame_id
) {
3583 if ((start_frame
> end_frame_id
&&
3584 start_frame
< start_frame_id
))
3591 if (ret
== -EINVAL
|| start_frame
== start_frame_id
) {
3592 start_frame
= start_frame_id
+ 1;
3593 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3594 urb
->dev
->speed
== USB_SPEED_FULL
)
3595 urb
->start_frame
= start_frame
;
3597 urb
->start_frame
= start_frame
<< 3;
3603 xhci_warn(xhci
, "Frame ID %d (reg %d, index %d) beyond range (%d, %d)\n",
3604 start_frame
, current_frame_id
, index
,
3605 start_frame_id
, end_frame_id
);
3606 xhci_warn(xhci
, "Ignore frame ID field, use SIA bit instead\n");
3613 /* This is for isoc transfer */
3614 static int xhci_queue_isoc_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3615 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3617 struct xhci_ring
*ep_ring
;
3618 struct urb_priv
*urb_priv
;
3620 int num_tds
, trbs_per_td
;
3621 struct xhci_generic_trb
*start_trb
;
3624 u32 field
, length_field
;
3625 int running_total
, trb_buff_len
, td_len
, td_remain_len
, ret
;
3626 u64 start_addr
, addr
;
3628 bool more_trbs_coming
;
3629 struct xhci_virt_ep
*xep
;
3632 xep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
3633 ep_ring
= xhci
->devs
[slot_id
]->eps
[ep_index
].ring
;
3635 num_tds
= urb
->number_of_packets
;
3637 xhci_dbg(xhci
, "Isoc URB with zero packets?\n");
3640 start_addr
= (u64
) urb
->transfer_dma
;
3641 start_trb
= &ep_ring
->enqueue
->generic
;
3642 start_cycle
= ep_ring
->cycle_state
;
3644 urb_priv
= urb
->hcpriv
;
3645 /* Queue the TRBs for each TD, even if they are zero-length */
3646 for (i
= 0; i
< num_tds
; i
++) {
3647 unsigned int total_pkt_count
, max_pkt
;
3648 unsigned int burst_count
, last_burst_pkt_count
;
3653 addr
= start_addr
+ urb
->iso_frame_desc
[i
].offset
;
3654 td_len
= urb
->iso_frame_desc
[i
].length
;
3655 td_remain_len
= td_len
;
3656 max_pkt
= usb_endpoint_maxp(&urb
->ep
->desc
);
3657 total_pkt_count
= DIV_ROUND_UP(td_len
, max_pkt
);
3659 /* A zero-length transfer still involves at least one packet. */
3660 if (total_pkt_count
== 0)
3662 burst_count
= xhci_get_burst_count(xhci
, urb
, total_pkt_count
);
3663 last_burst_pkt_count
= xhci_get_last_burst_packet_count(xhci
,
3664 urb
, total_pkt_count
);
3666 trbs_per_td
= count_isoc_trbs_needed(urb
, i
);
3668 ret
= prepare_transfer(xhci
, xhci
->devs
[slot_id
], ep_index
,
3669 urb
->stream_id
, trbs_per_td
, urb
, i
, mem_flags
);
3675 td
= &urb_priv
->td
[i
];
3677 /* use SIA as default, if frame id is used overwrite it */
3678 sia_frame_id
= TRB_SIA
;
3679 if (!(urb
->transfer_flags
& URB_ISO_ASAP
) &&
3680 HCC_CFC(xhci
->hcc_params
)) {
3681 frame_id
= xhci_get_isoc_frame_id(xhci
, urb
, i
);
3683 sia_frame_id
= TRB_FRAME_ID(frame_id
);
3686 * Set isoc specific data for the first TRB in a TD.
3687 * Prevent HW from getting the TRBs by keeping the cycle state
3688 * inverted in the first TDs isoc TRB.
3690 field
= TRB_TYPE(TRB_ISOC
) |
3691 TRB_TLBPC(last_burst_pkt_count
) |
3693 (i
? ep_ring
->cycle_state
: !start_cycle
);
3695 /* xhci 1.1 with ETE uses TD_Size field for TBC, old is Rsvdz */
3696 if (!xep
->use_extended_tbc
)
3697 field
|= TRB_TBC(burst_count
);
3699 /* fill the rest of the TRB fields, and remaining normal TRBs */
3700 for (j
= 0; j
< trbs_per_td
; j
++) {
3703 /* only first TRB is isoc, overwrite otherwise */
3705 field
= TRB_TYPE(TRB_NORMAL
) |
3706 ep_ring
->cycle_state
;
3708 /* Only set interrupt on short packet for IN EPs */
3709 if (usb_urb_dir_in(urb
))
3712 /* Set the chain bit for all except the last TRB */
3713 if (j
< trbs_per_td
- 1) {
3714 more_trbs_coming
= true;
3717 more_trbs_coming
= false;
3718 td
->last_trb
= ep_ring
->enqueue
;
3720 /* set BEI, except for the last TD */
3721 if (xhci
->hci_version
>= 0x100 &&
3722 !(xhci
->quirks
& XHCI_AVOID_BEI
) &&
3726 /* Calculate TRB length */
3727 trb_buff_len
= TRB_BUFF_LEN_UP_TO_BOUNDARY(addr
);
3728 if (trb_buff_len
> td_remain_len
)
3729 trb_buff_len
= td_remain_len
;
3731 /* Set the TRB length, TD size, & interrupter fields. */
3732 remainder
= xhci_td_remainder(xhci
, running_total
,
3733 trb_buff_len
, td_len
,
3734 urb
, more_trbs_coming
);
3736 length_field
= TRB_LEN(trb_buff_len
) |
3739 /* xhci 1.1 with ETE uses TD Size field for TBC */
3740 if (first_trb
&& xep
->use_extended_tbc
)
3741 length_field
|= TRB_TD_SIZE_TBC(burst_count
);
3743 length_field
|= TRB_TD_SIZE(remainder
);
3746 queue_trb(xhci
, ep_ring
, more_trbs_coming
,
3747 lower_32_bits(addr
),
3748 upper_32_bits(addr
),
3751 running_total
+= trb_buff_len
;
3753 addr
+= trb_buff_len
;
3754 td_remain_len
-= trb_buff_len
;
3757 /* Check TD length */
3758 if (running_total
!= td_len
) {
3759 xhci_err(xhci
, "ISOC TD length unmatch\n");
3765 /* store the next frame id */
3766 if (HCC_CFC(xhci
->hcc_params
))
3767 xep
->next_frame_id
= urb
->start_frame
+ num_tds
* urb
->interval
;
3769 if (xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
== 0) {
3770 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
3771 usb_amd_quirk_pll_disable();
3773 xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
++;
3775 giveback_first_trb(xhci
, slot_id
, ep_index
, urb
->stream_id
,
3776 start_cycle
, start_trb
);
3779 /* Clean up a partially enqueued isoc transfer. */
3781 for (i
--; i
>= 0; i
--)
3782 list_del_init(&urb_priv
->td
[i
].td_list
);
3784 /* Use the first TD as a temporary variable to turn the TDs we've queued
3785 * into No-ops with a software-owned cycle bit. That way the hardware
3786 * won't accidentally start executing bogus TDs when we partially
3787 * overwrite them. td->first_trb and td->start_seg are already set.
3789 urb_priv
->td
[0].last_trb
= ep_ring
->enqueue
;
3790 /* Every TRB except the first & last will have its cycle bit flipped. */
3791 td_to_noop(xhci
, ep_ring
, &urb_priv
->td
[0], true);
3793 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
3794 ep_ring
->enqueue
= urb_priv
->td
[0].first_trb
;
3795 ep_ring
->enq_seg
= urb_priv
->td
[0].start_seg
;
3796 ep_ring
->cycle_state
= start_cycle
;
3797 ep_ring
->num_trbs_free
= ep_ring
->num_trbs_free_temp
;
3798 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb
->dev
->bus
), urb
);
3803 * Check transfer ring to guarantee there is enough room for the urb.
3804 * Update ISO URB start_frame and interval.
3805 * Update interval as xhci_queue_intr_tx does. Use xhci frame_index to
3806 * update urb->start_frame if URB_ISO_ASAP is set in transfer_flags or
3807 * Contiguous Frame ID is not supported by HC.
3809 int xhci_queue_isoc_tx_prepare(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3810 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3812 struct xhci_virt_device
*xdev
;
3813 struct xhci_ring
*ep_ring
;
3814 struct xhci_ep_ctx
*ep_ctx
;
3816 int num_tds
, num_trbs
, i
;
3818 struct xhci_virt_ep
*xep
;
3821 xdev
= xhci
->devs
[slot_id
];
3822 xep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
3823 ep_ring
= xdev
->eps
[ep_index
].ring
;
3824 ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
3827 num_tds
= urb
->number_of_packets
;
3828 for (i
= 0; i
< num_tds
; i
++)
3829 num_trbs
+= count_isoc_trbs_needed(urb
, i
);
3831 /* Check the ring to guarantee there is enough room for the whole urb.
3832 * Do not insert any td of the urb to the ring if the check failed.
3834 ret
= prepare_ring(xhci
, ep_ring
, GET_EP_CTX_STATE(ep_ctx
),
3835 num_trbs
, mem_flags
);
3840 * Check interval value. This should be done before we start to
3841 * calculate the start frame value.
3843 check_interval(xhci
, urb
, ep_ctx
);
3845 /* Calculate the start frame and put it in urb->start_frame. */
3846 if (HCC_CFC(xhci
->hcc_params
) && !list_empty(&ep_ring
->td_list
)) {
3847 if (GET_EP_CTX_STATE(ep_ctx
) == EP_STATE_RUNNING
) {
3848 urb
->start_frame
= xep
->next_frame_id
;
3849 goto skip_start_over
;
3853 start_frame
= readl(&xhci
->run_regs
->microframe_index
);
3854 start_frame
&= 0x3fff;
3856 * Round up to the next frame and consider the time before trb really
3857 * gets scheduled by hardare.
3859 ist
= HCS_IST(xhci
->hcs_params2
) & 0x7;
3860 if (HCS_IST(xhci
->hcs_params2
) & (1 << 3))
3862 start_frame
+= ist
+ XHCI_CFC_DELAY
;
3863 start_frame
= roundup(start_frame
, 8);
3866 * Round up to the next ESIT (Endpoint Service Interval Time) if ESIT
3867 * is greate than 8 microframes.
3869 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3870 urb
->dev
->speed
== USB_SPEED_FULL
) {
3871 start_frame
= roundup(start_frame
, urb
->interval
<< 3);
3872 urb
->start_frame
= start_frame
>> 3;
3874 start_frame
= roundup(start_frame
, urb
->interval
);
3875 urb
->start_frame
= start_frame
;
3879 ep_ring
->num_trbs_free_temp
= ep_ring
->num_trbs_free
;
3881 return xhci_queue_isoc_tx(xhci
, mem_flags
, urb
, slot_id
, ep_index
);
3884 /**** Command Ring Operations ****/
3886 /* Generic function for queueing a command TRB on the command ring.
3887 * Check to make sure there's room on the command ring for one command TRB.
3888 * Also check that there's room reserved for commands that must not fail.
3889 * If this is a command that must not fail, meaning command_must_succeed = TRUE,
3890 * then only check for the number of reserved spots.
3891 * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB
3892 * because the command event handler may want to resubmit a failed command.
3894 static int queue_command(struct xhci_hcd
*xhci
, struct xhci_command
*cmd
,
3895 u32 field1
, u32 field2
,
3896 u32 field3
, u32 field4
, bool command_must_succeed
)
3898 int reserved_trbs
= xhci
->cmd_ring_reserved_trbs
;
3901 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3902 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3903 xhci_dbg(xhci
, "xHCI dying or halted, can't queue_command\n");
3907 if (!command_must_succeed
)
3910 ret
= prepare_ring(xhci
, xhci
->cmd_ring
, EP_STATE_RUNNING
,
3911 reserved_trbs
, GFP_ATOMIC
);
3913 xhci_err(xhci
, "ERR: No room for command on command ring\n");
3914 if (command_must_succeed
)
3915 xhci_err(xhci
, "ERR: Reserved TRB counting for "
3916 "unfailable commands failed.\n");
3920 cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
3922 /* if there are no other commands queued we start the timeout timer */
3923 if (list_empty(&xhci
->cmd_list
)) {
3924 xhci
->current_cmd
= cmd
;
3925 xhci_mod_cmd_timer(xhci
, XHCI_CMD_DEFAULT_TIMEOUT
);
3928 list_add_tail(&cmd
->cmd_list
, &xhci
->cmd_list
);
3930 queue_trb(xhci
, xhci
->cmd_ring
, false, field1
, field2
, field3
,
3931 field4
| xhci
->cmd_ring
->cycle_state
);
3935 /* Queue a slot enable or disable request on the command ring */
3936 int xhci_queue_slot_control(struct xhci_hcd
*xhci
, struct xhci_command
*cmd
,
3937 u32 trb_type
, u32 slot_id
)
3939 return queue_command(xhci
, cmd
, 0, 0, 0,
3940 TRB_TYPE(trb_type
) | SLOT_ID_FOR_TRB(slot_id
), false);
3943 /* Queue an address device command TRB */
3944 int xhci_queue_address_device(struct xhci_hcd
*xhci
, struct xhci_command
*cmd
,
3945 dma_addr_t in_ctx_ptr
, u32 slot_id
, enum xhci_setup_dev setup
)
3947 return queue_command(xhci
, cmd
, lower_32_bits(in_ctx_ptr
),
3948 upper_32_bits(in_ctx_ptr
), 0,
3949 TRB_TYPE(TRB_ADDR_DEV
) | SLOT_ID_FOR_TRB(slot_id
)
3950 | (setup
== SETUP_CONTEXT_ONLY
? TRB_BSR
: 0), false);
3953 int xhci_queue_vendor_command(struct xhci_hcd
*xhci
, struct xhci_command
*cmd
,
3954 u32 field1
, u32 field2
, u32 field3
, u32 field4
)
3956 return queue_command(xhci
, cmd
, field1
, field2
, field3
, field4
, false);
3959 /* Queue a reset device command TRB */
3960 int xhci_queue_reset_device(struct xhci_hcd
*xhci
, struct xhci_command
*cmd
,
3963 return queue_command(xhci
, cmd
, 0, 0, 0,
3964 TRB_TYPE(TRB_RESET_DEV
) | SLOT_ID_FOR_TRB(slot_id
),
3968 /* Queue a configure endpoint command TRB */
3969 int xhci_queue_configure_endpoint(struct xhci_hcd
*xhci
,
3970 struct xhci_command
*cmd
, dma_addr_t in_ctx_ptr
,
3971 u32 slot_id
, bool command_must_succeed
)
3973 return queue_command(xhci
, cmd
, lower_32_bits(in_ctx_ptr
),
3974 upper_32_bits(in_ctx_ptr
), 0,
3975 TRB_TYPE(TRB_CONFIG_EP
) | SLOT_ID_FOR_TRB(slot_id
),
3976 command_must_succeed
);
3979 /* Queue an evaluate context command TRB */
3980 int xhci_queue_evaluate_context(struct xhci_hcd
*xhci
, struct xhci_command
*cmd
,
3981 dma_addr_t in_ctx_ptr
, u32 slot_id
, bool command_must_succeed
)
3983 return queue_command(xhci
, cmd
, lower_32_bits(in_ctx_ptr
),
3984 upper_32_bits(in_ctx_ptr
), 0,
3985 TRB_TYPE(TRB_EVAL_CONTEXT
) | SLOT_ID_FOR_TRB(slot_id
),
3986 command_must_succeed
);
3990 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop
3991 * activity on an endpoint that is about to be suspended.
3993 int xhci_queue_stop_endpoint(struct xhci_hcd
*xhci
, struct xhci_command
*cmd
,
3994 int slot_id
, unsigned int ep_index
, int suspend
)
3996 u32 trb_slot_id
= SLOT_ID_FOR_TRB(slot_id
);
3997 u32 trb_ep_index
= EP_ID_FOR_TRB(ep_index
);
3998 u32 type
= TRB_TYPE(TRB_STOP_RING
);
3999 u32 trb_suspend
= SUSPEND_PORT_FOR_TRB(suspend
);
4001 return queue_command(xhci
, cmd
, 0, 0, 0,
4002 trb_slot_id
| trb_ep_index
| type
| trb_suspend
, false);
4005 /* Set Transfer Ring Dequeue Pointer command */
4006 void xhci_queue_new_dequeue_state(struct xhci_hcd
*xhci
,
4007 unsigned int slot_id
, unsigned int ep_index
,
4008 struct xhci_dequeue_state
*deq_state
)
4011 u32 trb_slot_id
= SLOT_ID_FOR_TRB(slot_id
);
4012 u32 trb_ep_index
= EP_ID_FOR_TRB(ep_index
);
4013 u32 trb_stream_id
= STREAM_ID_FOR_TRB(deq_state
->stream_id
);
4015 u32 type
= TRB_TYPE(TRB_SET_DEQ
);
4016 struct xhci_virt_ep
*ep
;
4017 struct xhci_command
*cmd
;
4020 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
4021 "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), new deq ptr = %p (0x%llx dma), new cycle = %u",
4022 deq_state
->new_deq_seg
,
4023 (unsigned long long)deq_state
->new_deq_seg
->dma
,
4024 deq_state
->new_deq_ptr
,
4025 (unsigned long long)xhci_trb_virt_to_dma(
4026 deq_state
->new_deq_seg
, deq_state
->new_deq_ptr
),
4027 deq_state
->new_cycle_state
);
4029 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
4030 deq_state
->new_deq_ptr
);
4032 xhci_warn(xhci
, "WARN Cannot submit Set TR Deq Ptr\n");
4033 xhci_warn(xhci
, "WARN deq seg = %p, deq pt = %p\n",
4034 deq_state
->new_deq_seg
, deq_state
->new_deq_ptr
);
4037 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
4038 if ((ep
->ep_state
& SET_DEQ_PENDING
)) {
4039 xhci_warn(xhci
, "WARN Cannot submit Set TR Deq Ptr\n");
4040 xhci_warn(xhci
, "A Set TR Deq Ptr command is pending.\n");
4044 /* This function gets called from contexts where it cannot sleep */
4045 cmd
= xhci_alloc_command(xhci
, false, false, GFP_ATOMIC
);
4049 ep
->queued_deq_seg
= deq_state
->new_deq_seg
;
4050 ep
->queued_deq_ptr
= deq_state
->new_deq_ptr
;
4051 if (deq_state
->stream_id
)
4052 trb_sct
= SCT_FOR_TRB(SCT_PRI_TR
);
4053 ret
= queue_command(xhci
, cmd
,
4054 lower_32_bits(addr
) | trb_sct
| deq_state
->new_cycle_state
,
4055 upper_32_bits(addr
), trb_stream_id
,
4056 trb_slot_id
| trb_ep_index
| type
, false);
4058 xhci_free_command(xhci
, cmd
);
4062 /* Stop the TD queueing code from ringing the doorbell until
4063 * this command completes. The HC won't set the dequeue pointer
4064 * if the ring is running, and ringing the doorbell starts the
4067 ep
->ep_state
|= SET_DEQ_PENDING
;
4070 int xhci_queue_reset_ep(struct xhci_hcd
*xhci
, struct xhci_command
*cmd
,
4071 int slot_id
, unsigned int ep_index
,
4072 enum xhci_ep_reset_type reset_type
)
4074 u32 trb_slot_id
= SLOT_ID_FOR_TRB(slot_id
);
4075 u32 trb_ep_index
= EP_ID_FOR_TRB(ep_index
);
4076 u32 type
= TRB_TYPE(TRB_RESET_EP
);
4078 if (reset_type
== EP_SOFT_RESET
)
4081 return queue_command(xhci
, cmd
, 0, 0, 0,
4082 trb_slot_id
| trb_ep_index
| type
, false);