1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
5 * Copyright (C) 2008 Intel Corp.
8 * Some code borrowed from the Linux EHCI driver.
11 #include <linux/pci.h>
12 #include <linux/irq.h>
13 #include <linux/log2.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/slab.h>
17 #include <linux/dmi.h>
18 #include <linux/dma-mapping.h>
21 #include "xhci-trace.h"
23 #include "xhci-debugfs.h"
24 #include "xhci-dbgcap.h"
26 #define DRIVER_AUTHOR "Sarah Sharp"
27 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
29 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
31 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
32 static int link_quirk
;
33 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
34 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
36 static unsigned long long quirks
;
37 module_param(quirks
, ullong
, S_IRUGO
);
38 MODULE_PARM_DESC(quirks
, "Bit flags for quirks to be enabled as default");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * xhci_handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 int xhci_handshake(void __iomem
*ptr
, u32 mask
, u32 done
, int usec
)
60 if (result
== ~(u32
)0) /* card removed */
72 * Disable interrupts and begin the xHCI halting process.
74 void xhci_quiesce(struct xhci_hcd
*xhci
)
81 halted
= readl(&xhci
->op_regs
->status
) & STS_HALT
;
85 cmd
= readl(&xhci
->op_regs
->command
);
87 writel(cmd
, &xhci
->op_regs
->command
);
91 * Force HC into halt state.
93 * Disable any IRQs and clear the run/stop bit.
94 * HC will complete any current and actively pipelined transactions, and
95 * should halt within 16 ms of the run/stop bit being cleared.
96 * Read HC Halted bit in the status register to see when the HC is finished.
98 int xhci_halt(struct xhci_hcd
*xhci
)
101 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Halt the HC");
104 ret
= xhci_handshake(&xhci
->op_regs
->status
,
105 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
107 xhci_warn(xhci
, "Host halt failed, %d\n", ret
);
110 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
111 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
116 * Set the run bit and wait for the host to be running.
118 int xhci_start(struct xhci_hcd
*xhci
)
123 temp
= readl(&xhci
->op_regs
->command
);
125 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Turn on HC, cmd = 0x%x.",
127 writel(temp
, &xhci
->op_regs
->command
);
130 * Wait for the HCHalted Status bit to be 0 to indicate the host is
133 ret
= xhci_handshake(&xhci
->op_regs
->status
,
134 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
135 if (ret
== -ETIMEDOUT
)
136 xhci_err(xhci
, "Host took too long to start, "
137 "waited %u microseconds.\n",
140 /* clear state flags. Including dying, halted or removing */
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd
*xhci
)
159 state
= readl(&xhci
->op_regs
->status
);
161 if (state
== ~(u32
)0) {
162 xhci_warn(xhci
, "Host not accessible, reset failed.\n");
166 if ((state
& STS_HALT
) == 0) {
167 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
171 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Reset the HC");
172 command
= readl(&xhci
->op_regs
->command
);
173 command
|= CMD_RESET
;
174 writel(command
, &xhci
->op_regs
->command
);
176 /* Existing Intel xHCI controllers require a delay of 1 mS,
177 * after setting the CMD_RESET bit, and before accessing any
178 * HC registers. This allows the HC to complete the
179 * reset operation and be ready for HC register access.
180 * Without this delay, the subsequent HC register access,
181 * may result in a system hang very rarely.
183 if (xhci
->quirks
& XHCI_INTEL_HOST
)
186 ret
= xhci_handshake(&xhci
->op_regs
->command
,
187 CMD_RESET
, 0, 10 * 1000 * 1000);
191 if (xhci
->quirks
& XHCI_ASMEDIA_MODIFY_FLOWCONTROL
)
192 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
));
194 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
195 "Wait for controller to be ready for doorbell rings");
197 * xHCI cannot write to any doorbells or operational registers other
198 * than status until the "Controller Not Ready" flag is cleared.
200 ret
= xhci_handshake(&xhci
->op_regs
->status
,
201 STS_CNR
, 0, 10 * 1000 * 1000);
203 for (i
= 0; i
< 2; i
++) {
204 xhci
->bus_state
[i
].port_c_suspend
= 0;
205 xhci
->bus_state
[i
].suspended_ports
= 0;
206 xhci
->bus_state
[i
].resuming_ports
= 0;
213 #ifdef CONFIG_USB_PCI
217 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
221 * TODO:Check with MSI Soc for sysdev
223 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
225 ret
= pci_alloc_irq_vectors(pdev
, 1, 1, PCI_IRQ_MSI
);
227 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
228 "failed to allocate MSI entry");
232 ret
= request_irq(pdev
->irq
, xhci_msi_irq
,
233 0, "xhci_hcd", xhci_to_hcd(xhci
));
235 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
236 "disable MSI interrupt");
237 pci_free_irq_vectors(pdev
);
246 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
249 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
250 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
253 * calculate number of msi-x vectors supported.
254 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
255 * with max number of interrupters based on the xhci HCSPARAMS1.
256 * - num_online_cpus: maximum msi-x vectors per CPUs core.
257 * Add additional 1 vector to ensure always available interrupt.
259 xhci
->msix_count
= min(num_online_cpus() + 1,
260 HCS_MAX_INTRS(xhci
->hcs_params1
));
262 ret
= pci_alloc_irq_vectors(pdev
, xhci
->msix_count
, xhci
->msix_count
,
265 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
266 "Failed to enable MSI-X");
270 for (i
= 0; i
< xhci
->msix_count
; i
++) {
271 ret
= request_irq(pci_irq_vector(pdev
, i
), xhci_msi_irq
, 0,
272 "xhci_hcd", xhci_to_hcd(xhci
));
277 hcd
->msix_enabled
= 1;
281 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "disable MSI-X interrupt");
283 free_irq(pci_irq_vector(pdev
, i
), xhci_to_hcd(xhci
));
284 pci_free_irq_vectors(pdev
);
288 /* Free any IRQs and disable MSI-X */
289 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
291 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
292 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
294 if (xhci
->quirks
& XHCI_PLAT
)
297 /* return if using legacy interrupt */
301 if (hcd
->msix_enabled
) {
304 for (i
= 0; i
< xhci
->msix_count
; i
++)
305 free_irq(pci_irq_vector(pdev
, i
), xhci_to_hcd(xhci
));
307 free_irq(pci_irq_vector(pdev
, 0), xhci_to_hcd(xhci
));
310 pci_free_irq_vectors(pdev
);
311 hcd
->msix_enabled
= 0;
314 static void __maybe_unused
xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
316 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
318 if (hcd
->msix_enabled
) {
319 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
322 for (i
= 0; i
< xhci
->msix_count
; i
++)
323 synchronize_irq(pci_irq_vector(pdev
, i
));
327 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
329 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
330 struct pci_dev
*pdev
;
333 /* The xhci platform device has set up IRQs through usb_add_hcd. */
334 if (xhci
->quirks
& XHCI_PLAT
)
337 pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
339 * Some Fresco Logic host controllers advertise MSI, but fail to
340 * generate interrupts. Don't even try to enable MSI.
342 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
345 /* unregister the legacy interrupt */
347 free_irq(hcd
->irq
, hcd
);
350 ret
= xhci_setup_msix(xhci
);
352 /* fall back to msi*/
353 ret
= xhci_setup_msi(xhci
);
356 hcd
->msi_enabled
= 1;
361 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
366 if (!strlen(hcd
->irq_descr
))
367 snprintf(hcd
->irq_descr
, sizeof(hcd
->irq_descr
), "%s:usb%d",
368 hcd
->driver
->description
, hcd
->self
.busnum
);
370 /* fall back to legacy interrupt*/
371 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
372 hcd
->irq_descr
, hcd
);
374 xhci_err(xhci
, "request interrupt %d failed\n",
378 hcd
->irq
= pdev
->irq
;
384 static inline int xhci_try_enable_msi(struct usb_hcd
*hcd
)
389 static inline void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
393 static inline void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
399 static void compliance_mode_recovery(struct timer_list
*t
)
401 struct xhci_hcd
*xhci
;
406 xhci
= from_timer(xhci
, t
, comp_mode_recovery_timer
);
408 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
409 temp
= readl(xhci
->usb3_ports
[i
]);
410 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
412 * Compliance Mode Detected. Letting USB Core
413 * handle the Warm Reset
415 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
416 "Compliance mode detected->port %d",
418 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
419 "Attempting compliance mode recovery");
420 hcd
= xhci
->shared_hcd
;
422 if (hcd
->state
== HC_STATE_SUSPENDED
)
423 usb_hcd_resume_root_hub(hcd
);
425 usb_hcd_poll_rh_status(hcd
);
429 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
430 mod_timer(&xhci
->comp_mode_recovery_timer
,
431 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
435 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
436 * that causes ports behind that hardware to enter compliance mode sometimes.
437 * The quirk creates a timer that polls every 2 seconds the link state of
438 * each host controller's port and recovers it by issuing a Warm reset
439 * if Compliance mode is detected, otherwise the port will become "dead" (no
440 * device connections or disconnections will be detected anymore). Becasue no
441 * status event is generated when entering compliance mode (per xhci spec),
442 * this quirk is needed on systems that have the failing hardware installed.
444 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
446 xhci
->port_status_u0
= 0;
447 timer_setup(&xhci
->comp_mode_recovery_timer
, compliance_mode_recovery
,
449 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
450 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
452 add_timer(&xhci
->comp_mode_recovery_timer
);
453 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
454 "Compliance mode recovery timer initialized");
458 * This function identifies the systems that have installed the SN65LVPE502CP
459 * USB3.0 re-driver and that need the Compliance Mode Quirk.
461 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
463 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
465 const char *dmi_product_name
, *dmi_sys_vendor
;
467 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
468 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
469 if (!dmi_product_name
|| !dmi_sys_vendor
)
472 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
475 if (strstr(dmi_product_name
, "Z420") ||
476 strstr(dmi_product_name
, "Z620") ||
477 strstr(dmi_product_name
, "Z820") ||
478 strstr(dmi_product_name
, "Z1 Workstation"))
484 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
486 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
491 * Initialize memory for HCD and xHC (one-time init).
493 * Program the PAGESIZE register, initialize the device context array, create
494 * device contexts (?), set up a command ring segment (or two?), create event
495 * ring (one for now).
497 static int xhci_init(struct usb_hcd
*hcd
)
499 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
502 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_init");
503 spin_lock_init(&xhci
->lock
);
504 if (xhci
->hci_version
== 0x95 && link_quirk
) {
505 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
506 "QUIRK: Not clearing Link TRB chain bits.");
507 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
509 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
510 "xHCI doesn't need link TRB QUIRK");
512 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
513 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "Finished xhci_init");
515 /* Initializing Compliance Mode Recovery Data If Needed */
516 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
517 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
518 compliance_mode_recovery_timer_init(xhci
);
524 /*-------------------------------------------------------------------------*/
527 static int xhci_run_finished(struct xhci_hcd
*xhci
)
529 if (xhci_start(xhci
)) {
533 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
534 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
536 if (xhci
->quirks
& XHCI_NEC_HOST
)
537 xhci_ring_cmd_db(xhci
);
539 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
540 "Finished xhci_run for USB3 roothub");
545 * Start the HC after it was halted.
547 * This function is called by the USB core when the HC driver is added.
548 * Its opposite is xhci_stop().
550 * xhci_init() must be called once before this function can be called.
551 * Reset the HC, enable device slot contexts, program DCBAAP, and
552 * set command ring pointer and event ring pointer.
554 * Setup MSI-X vectors and enable interrupts.
556 int xhci_run(struct usb_hcd
*hcd
)
561 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
563 /* Start the xHCI host controller running only after the USB 2.0 roothub
567 hcd
->uses_new_polling
= 1;
568 if (!usb_hcd_is_primary_hcd(hcd
))
569 return xhci_run_finished(xhci
);
571 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_run");
573 ret
= xhci_try_enable_msi(hcd
);
577 xhci_dbg_cmd_ptrs(xhci
);
579 xhci_dbg(xhci
, "ERST memory map follows:\n");
580 xhci_dbg_erst(xhci
, &xhci
->erst
);
581 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
582 temp_64
&= ~ERST_PTR_MASK
;
583 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
584 "ERST deq = 64'h%0lx", (long unsigned int) temp_64
);
586 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
587 "// Set the interrupt modulation register");
588 temp
= readl(&xhci
->ir_set
->irq_control
);
589 temp
&= ~ER_IRQ_INTERVAL_MASK
;
591 * the increment interval is 8 times as much as that defined
592 * in xHCI spec on MTK's controller
594 temp
|= (u32
) ((xhci
->quirks
& XHCI_MTK_HOST
) ? 20 : 160);
595 writel(temp
, &xhci
->ir_set
->irq_control
);
597 /* Set the HCD state before we enable the irqs */
598 temp
= readl(&xhci
->op_regs
->command
);
600 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
601 "// Enable interrupts, cmd = 0x%x.", temp
);
602 writel(temp
, &xhci
->op_regs
->command
);
604 temp
= readl(&xhci
->ir_set
->irq_pending
);
605 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
606 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
607 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
608 writel(ER_IRQ_ENABLE(temp
), &xhci
->ir_set
->irq_pending
);
609 xhci_print_ir_set(xhci
, 0);
611 if (xhci
->quirks
& XHCI_NEC_HOST
) {
612 struct xhci_command
*command
;
614 command
= xhci_alloc_command(xhci
, false, false, GFP_KERNEL
);
618 ret
= xhci_queue_vendor_command(xhci
, command
, 0, 0, 0,
619 TRB_TYPE(TRB_NEC_GET_FW
));
621 xhci_free_command(xhci
, command
);
623 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
624 "Finished xhci_run for USB2 roothub");
628 xhci_debugfs_init(xhci
);
632 EXPORT_SYMBOL_GPL(xhci_run
);
637 * This function is called by the USB core when the HC driver is removed.
638 * Its opposite is xhci_run().
640 * Disable device contexts, disable IRQs, and quiesce the HC.
641 * Reset the HC, finish any completed transactions, and cleanup memory.
643 static void xhci_stop(struct usb_hcd
*hcd
)
646 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
648 mutex_lock(&xhci
->mutex
);
650 /* Only halt host and free memory after both hcds are removed */
651 if (!usb_hcd_is_primary_hcd(hcd
)) {
652 /* usb core will free this hcd shortly, unset pointer */
653 xhci
->shared_hcd
= NULL
;
654 mutex_unlock(&xhci
->mutex
);
660 spin_lock_irq(&xhci
->lock
);
661 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
662 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
665 spin_unlock_irq(&xhci
->lock
);
667 xhci_cleanup_msix(xhci
);
669 /* Deleting Compliance Mode Recovery Timer */
670 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
671 (!(xhci_all_ports_seen_u0(xhci
)))) {
672 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
673 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
674 "%s: compliance mode recovery timer deleted",
678 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
681 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
682 "// Disabling event ring interrupts");
683 temp
= readl(&xhci
->op_regs
->status
);
684 writel((temp
& ~0x1fff) | STS_EINT
, &xhci
->op_regs
->status
);
685 temp
= readl(&xhci
->ir_set
->irq_pending
);
686 writel(ER_IRQ_DISABLE(temp
), &xhci
->ir_set
->irq_pending
);
687 xhci_print_ir_set(xhci
, 0);
689 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "cleaning up memory");
690 xhci_mem_cleanup(xhci
);
691 xhci_debugfs_exit(xhci
);
692 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
693 "xhci_stop completed - status = %x",
694 readl(&xhci
->op_regs
->status
));
695 mutex_unlock(&xhci
->mutex
);
699 * Shutdown HC (not bus-specific)
701 * This is called when the machine is rebooting or halting. We assume that the
702 * machine will be powered off, and the HC's internal state will be reset.
703 * Don't bother to free memory.
705 * This will only ever be called with the main usb_hcd (the USB3 roothub).
707 static void xhci_shutdown(struct usb_hcd
*hcd
)
709 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
711 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
712 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.sysdev
));
714 spin_lock_irq(&xhci
->lock
);
716 /* Workaround for spurious wakeups at shutdown with HSW */
717 if (xhci
->quirks
& XHCI_SPURIOUS_WAKEUP
)
719 spin_unlock_irq(&xhci
->lock
);
721 xhci_cleanup_msix(xhci
);
723 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
724 "xhci_shutdown completed - status = %x",
725 readl(&xhci
->op_regs
->status
));
727 /* Yet another workaround for spurious wakeups at shutdown with HSW */
728 if (xhci
->quirks
& XHCI_SPURIOUS_WAKEUP
)
729 pci_set_power_state(to_pci_dev(hcd
->self
.sysdev
), PCI_D3hot
);
733 static void xhci_save_registers(struct xhci_hcd
*xhci
)
735 xhci
->s3
.command
= readl(&xhci
->op_regs
->command
);
736 xhci
->s3
.dev_nt
= readl(&xhci
->op_regs
->dev_notification
);
737 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
738 xhci
->s3
.config_reg
= readl(&xhci
->op_regs
->config_reg
);
739 xhci
->s3
.erst_size
= readl(&xhci
->ir_set
->erst_size
);
740 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
741 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
742 xhci
->s3
.irq_pending
= readl(&xhci
->ir_set
->irq_pending
);
743 xhci
->s3
.irq_control
= readl(&xhci
->ir_set
->irq_control
);
746 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
748 writel(xhci
->s3
.command
, &xhci
->op_regs
->command
);
749 writel(xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
750 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
751 writel(xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
752 writel(xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
753 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
754 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
755 writel(xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
756 writel(xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
759 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
763 /* step 2: initialize command ring buffer */
764 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
765 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
766 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
767 xhci
->cmd_ring
->dequeue
) &
768 (u64
) ~CMD_RING_RSVD_BITS
) |
769 xhci
->cmd_ring
->cycle_state
;
770 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
771 "// Setting command ring address to 0x%llx",
772 (long unsigned long) val_64
);
773 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
777 * The whole command ring must be cleared to zero when we suspend the host.
779 * The host doesn't save the command ring pointer in the suspend well, so we
780 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
781 * aligned, because of the reserved bits in the command ring dequeue pointer
782 * register. Therefore, we can't just set the dequeue pointer back in the
783 * middle of the ring (TRBs are 16-byte aligned).
785 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
787 struct xhci_ring
*ring
;
788 struct xhci_segment
*seg
;
790 ring
= xhci
->cmd_ring
;
794 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
795 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
796 cpu_to_le32(~TRB_CYCLE
);
798 } while (seg
!= ring
->deq_seg
);
800 /* Reset the software enqueue and dequeue pointers */
801 ring
->deq_seg
= ring
->first_seg
;
802 ring
->dequeue
= ring
->first_seg
->trbs
;
803 ring
->enq_seg
= ring
->deq_seg
;
804 ring
->enqueue
= ring
->dequeue
;
806 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
808 * Ring is now zeroed, so the HW should look for change of ownership
809 * when the cycle bit is set to 1.
811 ring
->cycle_state
= 1;
814 * Reset the hardware dequeue pointer.
815 * Yes, this will need to be re-written after resume, but we're paranoid
816 * and want to make sure the hardware doesn't access bogus memory
817 * because, say, the BIOS or an SMI started the host without changing
818 * the command ring pointers.
820 xhci_set_cmd_ring_deq(xhci
);
823 static void xhci_disable_port_wake_on_bits(struct xhci_hcd
*xhci
)
826 __le32 __iomem
**port_array
;
830 spin_lock_irqsave(&xhci
->lock
, flags
);
832 /* disable usb3 ports Wake bits */
833 port_index
= xhci
->num_usb3_ports
;
834 port_array
= xhci
->usb3_ports
;
835 while (port_index
--) {
836 t1
= readl(port_array
[port_index
]);
837 t1
= xhci_port_state_to_neutral(t1
);
838 t2
= t1
& ~PORT_WAKE_BITS
;
840 writel(t2
, port_array
[port_index
]);
843 /* disable usb2 ports Wake bits */
844 port_index
= xhci
->num_usb2_ports
;
845 port_array
= xhci
->usb2_ports
;
846 while (port_index
--) {
847 t1
= readl(port_array
[port_index
]);
848 t1
= xhci_port_state_to_neutral(t1
);
849 t2
= t1
& ~PORT_WAKE_BITS
;
851 writel(t2
, port_array
[port_index
]);
854 spin_unlock_irqrestore(&xhci
->lock
, flags
);
858 * Stop HC (not bus-specific)
860 * This is called when the machine transition into S3/S4 mode.
863 int xhci_suspend(struct xhci_hcd
*xhci
, bool do_wakeup
)
866 unsigned int delay
= XHCI_MAX_HALT_USEC
;
867 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
873 if (hcd
->state
!= HC_STATE_SUSPENDED
||
874 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
877 xhci_dbc_suspend(xhci
);
879 /* Clear root port wake on bits if wakeup not allowed. */
881 xhci_disable_port_wake_on_bits(xhci
);
883 /* Don't poll the roothubs on bus suspend. */
884 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
885 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
886 del_timer_sync(&hcd
->rh_timer
);
887 clear_bit(HCD_FLAG_POLL_RH
, &xhci
->shared_hcd
->flags
);
888 del_timer_sync(&xhci
->shared_hcd
->rh_timer
);
890 if (xhci
->quirks
& XHCI_SUSPEND_DELAY
)
891 usleep_range(1000, 1500);
893 spin_lock_irq(&xhci
->lock
);
894 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
895 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
896 /* step 1: stop endpoint */
897 /* skipped assuming that port suspend has done */
899 /* step 2: clear Run/Stop bit */
900 command
= readl(&xhci
->op_regs
->command
);
902 writel(command
, &xhci
->op_regs
->command
);
904 /* Some chips from Fresco Logic need an extraordinary delay */
905 delay
*= (xhci
->quirks
& XHCI_SLOW_SUSPEND
) ? 10 : 1;
907 if (xhci_handshake(&xhci
->op_regs
->status
,
908 STS_HALT
, STS_HALT
, delay
)) {
909 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
910 spin_unlock_irq(&xhci
->lock
);
913 xhci_clear_command_ring(xhci
);
915 /* step 3: save registers */
916 xhci_save_registers(xhci
);
918 /* step 4: set CSS flag */
919 command
= readl(&xhci
->op_regs
->command
);
921 writel(command
, &xhci
->op_regs
->command
);
922 if (xhci_handshake(&xhci
->op_regs
->status
,
923 STS_SAVE
, 0, 10 * 1000)) {
924 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
925 spin_unlock_irq(&xhci
->lock
);
928 spin_unlock_irq(&xhci
->lock
);
931 * Deleting Compliance Mode Recovery Timer because the xHCI Host
932 * is about to be suspended.
934 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
935 (!(xhci_all_ports_seen_u0(xhci
)))) {
936 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
937 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
938 "%s: compliance mode recovery timer deleted",
942 /* step 5: remove core well power */
943 /* synchronize irq when using MSI-X */
944 xhci_msix_sync_irqs(xhci
);
948 EXPORT_SYMBOL_GPL(xhci_suspend
);
951 * start xHC (not bus-specific)
953 * This is called when the machine transition from S3/S4 mode.
956 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
958 u32 command
, temp
= 0, status
;
959 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
960 struct usb_hcd
*secondary_hcd
;
962 bool comp_timer_running
= false;
967 /* Wait a bit if either of the roothubs need to settle from the
968 * transition into bus suspend.
970 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
972 xhci
->bus_state
[1].next_statechange
))
975 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
976 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
978 spin_lock_irq(&xhci
->lock
);
979 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
983 /* step 1: restore register */
984 xhci_restore_registers(xhci
);
985 /* step 2: initialize command ring buffer */
986 xhci_set_cmd_ring_deq(xhci
);
987 /* step 3: restore state and start state*/
988 /* step 3: set CRS flag */
989 command
= readl(&xhci
->op_regs
->command
);
991 writel(command
, &xhci
->op_regs
->command
);
992 if (xhci_handshake(&xhci
->op_regs
->status
,
993 STS_RESTORE
, 0, 10 * 1000)) {
994 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
995 spin_unlock_irq(&xhci
->lock
);
998 temp
= readl(&xhci
->op_regs
->status
);
1001 /* If restore operation fails, re-initialize the HC during resume */
1002 if ((temp
& STS_SRE
) || hibernated
) {
1004 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
1005 !(xhci_all_ports_seen_u0(xhci
))) {
1006 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
1007 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1008 "Compliance Mode Recovery Timer deleted!");
1011 /* Let the USB core know _both_ roothubs lost power. */
1012 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
1013 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
1015 xhci_dbg(xhci
, "Stop HCD\n");
1018 spin_unlock_irq(&xhci
->lock
);
1019 xhci_cleanup_msix(xhci
);
1021 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
1022 temp
= readl(&xhci
->op_regs
->status
);
1023 writel((temp
& ~0x1fff) | STS_EINT
, &xhci
->op_regs
->status
);
1024 temp
= readl(&xhci
->ir_set
->irq_pending
);
1025 writel(ER_IRQ_DISABLE(temp
), &xhci
->ir_set
->irq_pending
);
1026 xhci_print_ir_set(xhci
, 0);
1028 xhci_dbg(xhci
, "cleaning up memory\n");
1029 xhci_mem_cleanup(xhci
);
1030 xhci_debugfs_exit(xhci
);
1031 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1032 readl(&xhci
->op_regs
->status
));
1034 /* USB core calls the PCI reinit and start functions twice:
1035 * first with the primary HCD, and then with the secondary HCD.
1036 * If we don't do the same, the host will never be started.
1038 if (!usb_hcd_is_primary_hcd(hcd
))
1039 secondary_hcd
= hcd
;
1041 secondary_hcd
= xhci
->shared_hcd
;
1043 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1044 retval
= xhci_init(hcd
->primary_hcd
);
1047 comp_timer_running
= true;
1049 xhci_dbg(xhci
, "Start the primary HCD\n");
1050 retval
= xhci_run(hcd
->primary_hcd
);
1052 xhci_dbg(xhci
, "Start the secondary HCD\n");
1053 retval
= xhci_run(secondary_hcd
);
1055 hcd
->state
= HC_STATE_SUSPENDED
;
1056 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1060 /* step 4: set Run/Stop bit */
1061 command
= readl(&xhci
->op_regs
->command
);
1063 writel(command
, &xhci
->op_regs
->command
);
1064 xhci_handshake(&xhci
->op_regs
->status
, STS_HALT
,
1067 /* step 5: walk topology and initialize portsc,
1068 * portpmsc and portli
1070 /* this is done in bus_resume */
1072 /* step 6: restart each of the previously
1073 * Running endpoints by ringing their doorbells
1076 spin_unlock_irq(&xhci
->lock
);
1078 xhci_dbc_resume(xhci
);
1082 /* Resume root hubs only when have pending events. */
1083 status
= readl(&xhci
->op_regs
->status
);
1084 if (status
& STS_EINT
) {
1085 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1086 usb_hcd_resume_root_hub(hcd
);
1091 * If system is subject to the Quirk, Compliance Mode Timer needs to
1092 * be re-initialized Always after a system resume. Ports are subject
1093 * to suffer the Compliance Mode issue again. It doesn't matter if
1094 * ports have entered previously to U0 before system's suspension.
1096 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) && !comp_timer_running
)
1097 compliance_mode_recovery_timer_init(xhci
);
1099 if (xhci
->quirks
& XHCI_ASMEDIA_MODIFY_FLOWCONTROL
)
1100 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd
->self
.controller
));
1102 /* Re-enable port polling. */
1103 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1104 set_bit(HCD_FLAG_POLL_RH
, &xhci
->shared_hcd
->flags
);
1105 usb_hcd_poll_rh_status(xhci
->shared_hcd
);
1106 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1107 usb_hcd_poll_rh_status(hcd
);
1111 EXPORT_SYMBOL_GPL(xhci_resume
);
1112 #endif /* CONFIG_PM */
1114 /*-------------------------------------------------------------------------*/
1117 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1118 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1119 * value to right shift 1 for the bitmask.
1121 * Index = (epnum * 2) + direction - 1,
1122 * where direction = 0 for OUT, 1 for IN.
1123 * For control endpoints, the IN index is used (OUT index is unused), so
1124 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1126 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1129 if (usb_endpoint_xfer_control(desc
))
1130 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1132 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1133 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1137 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1138 * address from the XHCI endpoint index.
1140 unsigned int xhci_get_endpoint_address(unsigned int ep_index
)
1142 unsigned int number
= DIV_ROUND_UP(ep_index
, 2);
1143 unsigned int direction
= ep_index
% 2 ? USB_DIR_OUT
: USB_DIR_IN
;
1144 return direction
| number
;
1147 /* Find the flag for this endpoint (for use in the control context). Use the
1148 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1151 static unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1153 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1156 /* Find the flag for this endpoint (for use in the control context). Use the
1157 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1160 static unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1162 return 1 << (ep_index
+ 1);
1165 /* Compute the last valid endpoint context index. Basically, this is the
1166 * endpoint index plus one. For slot contexts with more than valid endpoint,
1167 * we find the most significant bit set in the added contexts flags.
1168 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1169 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1171 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1173 return fls(added_ctxs
) - 1;
1176 /* Returns 1 if the arguments are OK;
1177 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1179 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1180 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1182 struct xhci_hcd
*xhci
;
1183 struct xhci_virt_device
*virt_dev
;
1185 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1186 pr_debug("xHCI %s called with invalid args\n", func
);
1189 if (!udev
->parent
) {
1190 pr_debug("xHCI %s called for root hub\n", func
);
1194 xhci
= hcd_to_xhci(hcd
);
1195 if (check_virt_dev
) {
1196 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1197 xhci_dbg(xhci
, "xHCI %s called with unaddressed device\n",
1202 virt_dev
= xhci
->devs
[udev
->slot_id
];
1203 if (virt_dev
->udev
!= udev
) {
1204 xhci_dbg(xhci
, "xHCI %s called with udev and "
1205 "virt_dev does not match\n", func
);
1210 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1216 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1217 struct usb_device
*udev
, struct xhci_command
*command
,
1218 bool ctx_change
, bool must_succeed
);
1221 * Full speed devices may have a max packet size greater than 8 bytes, but the
1222 * USB core doesn't know that until it reads the first 8 bytes of the
1223 * descriptor. If the usb_device's max packet size changes after that point,
1224 * we need to issue an evaluate context command and wait on it.
1226 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1227 unsigned int ep_index
, struct urb
*urb
)
1229 struct xhci_container_ctx
*out_ctx
;
1230 struct xhci_input_control_ctx
*ctrl_ctx
;
1231 struct xhci_ep_ctx
*ep_ctx
;
1232 struct xhci_command
*command
;
1233 int max_packet_size
;
1234 int hw_max_packet_size
;
1237 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1238 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1239 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1240 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1241 if (hw_max_packet_size
!= max_packet_size
) {
1242 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1243 "Max Packet Size for ep 0 changed.");
1244 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1245 "Max packet size in usb_device = %d",
1247 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1248 "Max packet size in xHCI HW = %d",
1249 hw_max_packet_size
);
1250 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1251 "Issuing evaluate context command.");
1253 /* Set up the input context flags for the command */
1254 /* FIXME: This won't work if a non-default control endpoint
1255 * changes max packet sizes.
1258 command
= xhci_alloc_command(xhci
, false, true, GFP_KERNEL
);
1262 command
->in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1263 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
1265 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1268 goto command_cleanup
;
1270 /* Set up the modified control endpoint 0 */
1271 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1272 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1274 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
1275 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1276 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1278 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1279 ctrl_ctx
->drop_flags
= 0;
1281 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, command
,
1284 /* Clean up the input context for later use by bandwidth
1287 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1289 kfree(command
->completion
);
1296 * non-error returns are a promise to giveback() the urb later
1297 * we drop ownership so next owner (or urb unlink) can get it
1299 static int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1301 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1302 unsigned long flags
;
1304 unsigned int slot_id
, ep_index
, ep_state
;
1305 struct urb_priv
*urb_priv
;
1308 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1309 true, true, __func__
) <= 0)
1312 slot_id
= urb
->dev
->slot_id
;
1313 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1315 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1316 if (!in_interrupt())
1317 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1321 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1322 num_tds
= urb
->number_of_packets
;
1323 else if (usb_endpoint_is_bulk_out(&urb
->ep
->desc
) &&
1324 urb
->transfer_buffer_length
> 0 &&
1325 urb
->transfer_flags
& URB_ZERO_PACKET
&&
1326 !(urb
->transfer_buffer_length
% usb_endpoint_maxp(&urb
->ep
->desc
)))
1331 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1332 num_tds
* sizeof(struct xhci_td
), mem_flags
);
1336 urb_priv
->num_tds
= num_tds
;
1337 urb_priv
->num_tds_done
= 0;
1338 urb
->hcpriv
= urb_priv
;
1340 trace_xhci_urb_enqueue(urb
);
1342 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1343 /* Check to see if the max packet size for the default control
1344 * endpoint changed during FS device enumeration
1346 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1347 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1350 xhci_urb_free_priv(urb_priv
);
1357 spin_lock_irqsave(&xhci
->lock
, flags
);
1359 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
1360 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
1361 urb
->ep
->desc
.bEndpointAddress
, urb
);
1366 switch (usb_endpoint_type(&urb
->ep
->desc
)) {
1368 case USB_ENDPOINT_XFER_CONTROL
:
1369 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1372 case USB_ENDPOINT_XFER_BULK
:
1373 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
1374 if (ep_state
& (EP_GETTING_STREAMS
| EP_GETTING_NO_STREAMS
)) {
1375 xhci_warn(xhci
, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
1380 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1385 case USB_ENDPOINT_XFER_INT
:
1386 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1390 case USB_ENDPOINT_XFER_ISOC
:
1391 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1397 xhci_urb_free_priv(urb_priv
);
1400 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1405 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1406 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1407 * should pick up where it left off in the TD, unless a Set Transfer Ring
1408 * Dequeue Pointer is issued.
1410 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1411 * the ring. Since the ring is a contiguous structure, they can't be physically
1412 * removed. Instead, there are two options:
1414 * 1) If the HC is in the middle of processing the URB to be canceled, we
1415 * simply move the ring's dequeue pointer past those TRBs using the Set
1416 * Transfer Ring Dequeue Pointer command. This will be the common case,
1417 * when drivers timeout on the last submitted URB and attempt to cancel.
1419 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1420 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1421 * HC will need to invalidate the any TRBs it has cached after the stop
1422 * endpoint command, as noted in the xHCI 0.95 errata.
1424 * 3) The TD may have completed by the time the Stop Endpoint Command
1425 * completes, so software needs to handle that case too.
1427 * This function should protect against the TD enqueueing code ringing the
1428 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1429 * It also needs to account for multiple cancellations on happening at the same
1430 * time for the same endpoint.
1432 * Note that this function can be called in any context, or so says
1433 * usb_hcd_unlink_urb()
1435 static int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1437 unsigned long flags
;
1440 struct xhci_hcd
*xhci
;
1441 struct urb_priv
*urb_priv
;
1443 unsigned int ep_index
;
1444 struct xhci_ring
*ep_ring
;
1445 struct xhci_virt_ep
*ep
;
1446 struct xhci_command
*command
;
1447 struct xhci_virt_device
*vdev
;
1449 xhci
= hcd_to_xhci(hcd
);
1450 spin_lock_irqsave(&xhci
->lock
, flags
);
1452 trace_xhci_urb_dequeue(urb
);
1454 /* Make sure the URB hasn't completed or been unlinked already */
1455 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1459 /* give back URB now if we can't queue it for cancel */
1460 vdev
= xhci
->devs
[urb
->dev
->slot_id
];
1461 urb_priv
= urb
->hcpriv
;
1462 if (!vdev
|| !urb_priv
)
1465 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1466 ep
= &vdev
->eps
[ep_index
];
1467 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1468 if (!ep
|| !ep_ring
)
1471 /* If xHC is dead take it down and return ALL URBs in xhci_hc_died() */
1472 temp
= readl(&xhci
->op_regs
->status
);
1473 if (temp
== ~(u32
)0 || xhci
->xhc_state
& XHCI_STATE_DYING
) {
1478 if (xhci
->xhc_state
& XHCI_STATE_HALTED
) {
1479 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1480 "HC halted, freeing TD manually.");
1481 for (i
= urb_priv
->num_tds_done
;
1482 i
< urb_priv
->num_tds
;
1484 td
= &urb_priv
->td
[i
];
1485 if (!list_empty(&td
->td_list
))
1486 list_del_init(&td
->td_list
);
1487 if (!list_empty(&td
->cancelled_td_list
))
1488 list_del_init(&td
->cancelled_td_list
);
1493 i
= urb_priv
->num_tds_done
;
1494 if (i
< urb_priv
->num_tds
)
1495 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1496 "Cancel URB %p, dev %s, ep 0x%x, "
1497 "starting at offset 0x%llx",
1498 urb
, urb
->dev
->devpath
,
1499 urb
->ep
->desc
.bEndpointAddress
,
1500 (unsigned long long) xhci_trb_virt_to_dma(
1501 urb_priv
->td
[i
].start_seg
,
1502 urb_priv
->td
[i
].first_trb
));
1504 for (; i
< urb_priv
->num_tds
; i
++) {
1505 td
= &urb_priv
->td
[i
];
1506 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1509 /* Queue a stop endpoint command, but only if this is
1510 * the first cancellation to be handled.
1512 if (!(ep
->ep_state
& EP_STOP_CMD_PENDING
)) {
1513 command
= xhci_alloc_command(xhci
, false, false, GFP_ATOMIC
);
1518 ep
->ep_state
|= EP_STOP_CMD_PENDING
;
1519 ep
->stop_cmd_timer
.expires
= jiffies
+
1520 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1521 add_timer(&ep
->stop_cmd_timer
);
1522 xhci_queue_stop_endpoint(xhci
, command
, urb
->dev
->slot_id
,
1524 xhci_ring_cmd_db(xhci
);
1527 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1532 xhci_urb_free_priv(urb_priv
);
1533 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1534 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1535 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1539 /* Drop an endpoint from a new bandwidth configuration for this device.
1540 * Only one call to this function is allowed per endpoint before
1541 * check_bandwidth() or reset_bandwidth() must be called.
1542 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1543 * add the endpoint to the schedule with possibly new parameters denoted by a
1544 * different endpoint descriptor in usb_host_endpoint.
1545 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1548 * The USB core will not allow URBs to be queued to an endpoint that is being
1549 * disabled, so there's no need for mutual exclusion to protect
1550 * the xhci->devs[slot_id] structure.
1552 static int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1553 struct usb_host_endpoint
*ep
)
1555 struct xhci_hcd
*xhci
;
1556 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1557 struct xhci_input_control_ctx
*ctrl_ctx
;
1558 unsigned int ep_index
;
1559 struct xhci_ep_ctx
*ep_ctx
;
1561 u32 new_add_flags
, new_drop_flags
;
1564 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1567 xhci
= hcd_to_xhci(hcd
);
1568 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1571 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1572 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1573 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1574 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1575 __func__
, drop_flag
);
1579 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1580 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1581 ctrl_ctx
= xhci_get_input_control_ctx(in_ctx
);
1583 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1588 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1589 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1590 /* If the HC already knows the endpoint is disabled,
1591 * or the HCD has noted it is disabled, ignore this request
1593 if ((GET_EP_CTX_STATE(ep_ctx
) == EP_STATE_DISABLED
) ||
1594 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1595 xhci_get_endpoint_flag(&ep
->desc
)) {
1596 /* Do not warn when called after a usb_device_reset */
1597 if (xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ring
!= NULL
)
1598 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1603 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1604 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1606 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1607 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1609 xhci_debugfs_remove_endpoint(xhci
, xhci
->devs
[udev
->slot_id
], ep_index
);
1611 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1613 if (xhci
->quirks
& XHCI_MTK_HOST
)
1614 xhci_mtk_drop_ep_quirk(hcd
, udev
, ep
);
1616 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1617 (unsigned int) ep
->desc
.bEndpointAddress
,
1619 (unsigned int) new_drop_flags
,
1620 (unsigned int) new_add_flags
);
1624 /* Add an endpoint to a new possible bandwidth configuration for this device.
1625 * Only one call to this function is allowed per endpoint before
1626 * check_bandwidth() or reset_bandwidth() must be called.
1627 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1628 * add the endpoint to the schedule with possibly new parameters denoted by a
1629 * different endpoint descriptor in usb_host_endpoint.
1630 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1633 * The USB core will not allow URBs to be queued to an endpoint until the
1634 * configuration or alt setting is installed in the device, so there's no need
1635 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1637 static int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1638 struct usb_host_endpoint
*ep
)
1640 struct xhci_hcd
*xhci
;
1641 struct xhci_container_ctx
*in_ctx
;
1642 unsigned int ep_index
;
1643 struct xhci_input_control_ctx
*ctrl_ctx
;
1645 u32 new_add_flags
, new_drop_flags
;
1646 struct xhci_virt_device
*virt_dev
;
1649 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1651 /* So we won't queue a reset ep command for a root hub */
1655 xhci
= hcd_to_xhci(hcd
);
1656 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1659 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1660 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1661 /* FIXME when we have to issue an evaluate endpoint command to
1662 * deal with ep0 max packet size changing once we get the
1665 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1666 __func__
, added_ctxs
);
1670 virt_dev
= xhci
->devs
[udev
->slot_id
];
1671 in_ctx
= virt_dev
->in_ctx
;
1672 ctrl_ctx
= xhci_get_input_control_ctx(in_ctx
);
1674 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1679 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1680 /* If this endpoint is already in use, and the upper layers are trying
1681 * to add it again without dropping it, reject the addition.
1683 if (virt_dev
->eps
[ep_index
].ring
&&
1684 !(le32_to_cpu(ctrl_ctx
->drop_flags
) & added_ctxs
)) {
1685 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1686 "without dropping it.\n",
1687 (unsigned int) ep
->desc
.bEndpointAddress
);
1691 /* If the HCD has already noted the endpoint is enabled,
1692 * ignore this request.
1694 if (le32_to_cpu(ctrl_ctx
->add_flags
) & added_ctxs
) {
1695 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1701 * Configuration and alternate setting changes must be done in
1702 * process context, not interrupt context (or so documenation
1703 * for usb_set_interface() and usb_set_configuration() claim).
1705 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1706 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1707 __func__
, ep
->desc
.bEndpointAddress
);
1711 if (xhci
->quirks
& XHCI_MTK_HOST
) {
1712 ret
= xhci_mtk_add_ep_quirk(hcd
, udev
, ep
);
1714 xhci_ring_free(xhci
, virt_dev
->eps
[ep_index
].new_ring
);
1715 virt_dev
->eps
[ep_index
].new_ring
= NULL
;
1720 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1721 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1723 /* If xhci_endpoint_disable() was called for this endpoint, but the
1724 * xHC hasn't been notified yet through the check_bandwidth() call,
1725 * this re-adds a new state for the endpoint from the new endpoint
1726 * descriptors. We must drop and re-add this endpoint, so we leave the
1729 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1731 /* Store the usb_device pointer for later use */
1734 xhci_debugfs_create_endpoint(xhci
, virt_dev
, ep_index
);
1736 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1737 (unsigned int) ep
->desc
.bEndpointAddress
,
1739 (unsigned int) new_drop_flags
,
1740 (unsigned int) new_add_flags
);
1744 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1746 struct xhci_input_control_ctx
*ctrl_ctx
;
1747 struct xhci_ep_ctx
*ep_ctx
;
1748 struct xhci_slot_ctx
*slot_ctx
;
1751 ctrl_ctx
= xhci_get_input_control_ctx(virt_dev
->in_ctx
);
1753 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1758 /* When a device's add flag and drop flag are zero, any subsequent
1759 * configure endpoint command will leave that endpoint's state
1760 * untouched. Make sure we don't leave any old state in the input
1761 * endpoint contexts.
1763 ctrl_ctx
->drop_flags
= 0;
1764 ctrl_ctx
->add_flags
= 0;
1765 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1766 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1767 /* Endpoint 0 is always valid */
1768 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1769 for (i
= 1; i
< 31; i
++) {
1770 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1771 ep_ctx
->ep_info
= 0;
1772 ep_ctx
->ep_info2
= 0;
1774 ep_ctx
->tx_info
= 0;
1778 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1779 struct usb_device
*udev
, u32
*cmd_status
)
1783 switch (*cmd_status
) {
1784 case COMP_COMMAND_ABORTED
:
1785 case COMP_COMMAND_RING_STOPPED
:
1786 xhci_warn(xhci
, "Timeout while waiting for configure endpoint command\n");
1789 case COMP_RESOURCE_ERROR
:
1790 dev_warn(&udev
->dev
,
1791 "Not enough host controller resources for new device state.\n");
1793 /* FIXME: can we allocate more resources for the HC? */
1795 case COMP_BANDWIDTH_ERROR
:
1796 case COMP_SECONDARY_BANDWIDTH_ERROR
:
1797 dev_warn(&udev
->dev
,
1798 "Not enough bandwidth for new device state.\n");
1800 /* FIXME: can we go back to the old state? */
1802 case COMP_TRB_ERROR
:
1803 /* the HCD set up something wrong */
1804 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1806 "and endpoint is not disabled.\n");
1809 case COMP_INCOMPATIBLE_DEVICE_ERROR
:
1810 dev_warn(&udev
->dev
,
1811 "ERROR: Incompatible device for endpoint configure command.\n");
1815 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1816 "Successful Endpoint Configure command");
1820 xhci_err(xhci
, "ERROR: unexpected command completion code 0x%x.\n",
1828 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1829 struct usb_device
*udev
, u32
*cmd_status
)
1833 switch (*cmd_status
) {
1834 case COMP_COMMAND_ABORTED
:
1835 case COMP_COMMAND_RING_STOPPED
:
1836 xhci_warn(xhci
, "Timeout while waiting for evaluate context command\n");
1839 case COMP_PARAMETER_ERROR
:
1840 dev_warn(&udev
->dev
,
1841 "WARN: xHCI driver setup invalid evaluate context command.\n");
1844 case COMP_SLOT_NOT_ENABLED_ERROR
:
1845 dev_warn(&udev
->dev
,
1846 "WARN: slot not enabled for evaluate context command.\n");
1849 case COMP_CONTEXT_STATE_ERROR
:
1850 dev_warn(&udev
->dev
,
1851 "WARN: invalid context state for evaluate context command.\n");
1854 case COMP_INCOMPATIBLE_DEVICE_ERROR
:
1855 dev_warn(&udev
->dev
,
1856 "ERROR: Incompatible device for evaluate context command.\n");
1859 case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR
:
1860 /* Max Exit Latency too large error */
1861 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1865 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1866 "Successful evaluate context command");
1870 xhci_err(xhci
, "ERROR: unexpected command completion code 0x%x.\n",
1878 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1879 struct xhci_input_control_ctx
*ctrl_ctx
)
1881 u32 valid_add_flags
;
1882 u32 valid_drop_flags
;
1884 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1885 * (bit 1). The default control endpoint is added during the Address
1886 * Device command and is never removed until the slot is disabled.
1888 valid_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
) >> 2;
1889 valid_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
) >> 2;
1891 /* Use hweight32 to count the number of ones in the add flags, or
1892 * number of endpoints added. Don't count endpoints that are changed
1893 * (both added and dropped).
1895 return hweight32(valid_add_flags
) -
1896 hweight32(valid_add_flags
& valid_drop_flags
);
1899 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1900 struct xhci_input_control_ctx
*ctrl_ctx
)
1902 u32 valid_add_flags
;
1903 u32 valid_drop_flags
;
1905 valid_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
) >> 2;
1906 valid_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
) >> 2;
1908 return hweight32(valid_drop_flags
) -
1909 hweight32(valid_add_flags
& valid_drop_flags
);
1913 * We need to reserve the new number of endpoints before the configure endpoint
1914 * command completes. We can't subtract the dropped endpoints from the number
1915 * of active endpoints until the command completes because we can oversubscribe
1916 * the host in this case:
1918 * - the first configure endpoint command drops more endpoints than it adds
1919 * - a second configure endpoint command that adds more endpoints is queued
1920 * - the first configure endpoint command fails, so the config is unchanged
1921 * - the second command may succeed, even though there isn't enough resources
1923 * Must be called with xhci->lock held.
1925 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1926 struct xhci_input_control_ctx
*ctrl_ctx
)
1930 added_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1931 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1932 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1933 "Not enough ep ctxs: "
1934 "%u active, need to add %u, limit is %u.",
1935 xhci
->num_active_eps
, added_eps
,
1936 xhci
->limit_active_eps
);
1939 xhci
->num_active_eps
+= added_eps
;
1940 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1941 "Adding %u ep ctxs, %u now active.", added_eps
,
1942 xhci
->num_active_eps
);
1947 * The configure endpoint was failed by the xHC for some other reason, so we
1948 * need to revert the resources that failed configuration would have used.
1950 * Must be called with xhci->lock held.
1952 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1953 struct xhci_input_control_ctx
*ctrl_ctx
)
1957 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1958 xhci
->num_active_eps
-= num_failed_eps
;
1959 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1960 "Removing %u failed ep ctxs, %u now active.",
1962 xhci
->num_active_eps
);
1966 * Now that the command has completed, clean up the active endpoint count by
1967 * subtracting out the endpoints that were dropped (but not changed).
1969 * Must be called with xhci->lock held.
1971 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1972 struct xhci_input_control_ctx
*ctrl_ctx
)
1974 u32 num_dropped_eps
;
1976 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, ctrl_ctx
);
1977 xhci
->num_active_eps
-= num_dropped_eps
;
1978 if (num_dropped_eps
)
1979 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1980 "Removing %u dropped ep ctxs, %u now active.",
1982 xhci
->num_active_eps
);
1985 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
1987 switch (udev
->speed
) {
1989 case USB_SPEED_FULL
:
1991 case USB_SPEED_HIGH
:
1993 case USB_SPEED_SUPER
:
1994 case USB_SPEED_SUPER_PLUS
:
1996 case USB_SPEED_UNKNOWN
:
1997 case USB_SPEED_WIRELESS
:
1999 /* Should never happen */
2005 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
2007 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
2009 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2014 /* If we are changing a LS/FS device under a HS hub,
2015 * make sure (if we are activating a new TT) that the HS bus has enough
2016 * bandwidth for this new TT.
2018 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2019 struct xhci_virt_device
*virt_dev
,
2022 struct xhci_interval_bw_table
*bw_table
;
2023 struct xhci_tt_bw_info
*tt_info
;
2025 /* Find the bandwidth table for the root port this TT is attached to. */
2026 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2027 tt_info
= virt_dev
->tt_info
;
2028 /* If this TT already had active endpoints, the bandwidth for this TT
2029 * has already been added. Removing all periodic endpoints (and thus
2030 * making the TT enactive) will only decrease the bandwidth used.
2034 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2035 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2039 /* Not sure why we would have no new active endpoints...
2041 * Maybe because of an Evaluate Context change for a hub update or a
2042 * control endpoint 0 max packet size change?
2043 * FIXME: skip the bandwidth calculation in that case.
2048 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2049 struct xhci_virt_device
*virt_dev
)
2051 unsigned int bw_reserved
;
2053 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2054 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2057 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2058 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2065 * This algorithm is a very conservative estimate of the worst-case scheduling
2066 * scenario for any one interval. The hardware dynamically schedules the
2067 * packets, so we can't tell which microframe could be the limiting factor in
2068 * the bandwidth scheduling. This only takes into account periodic endpoints.
2070 * Obviously, we can't solve an NP complete problem to find the minimum worst
2071 * case scenario. Instead, we come up with an estimate that is no less than
2072 * the worst case bandwidth used for any one microframe, but may be an
2075 * We walk the requirements for each endpoint by interval, starting with the
2076 * smallest interval, and place packets in the schedule where there is only one
2077 * possible way to schedule packets for that interval. In order to simplify
2078 * this algorithm, we record the largest max packet size for each interval, and
2079 * assume all packets will be that size.
2081 * For interval 0, we obviously must schedule all packets for each interval.
2082 * The bandwidth for interval 0 is just the amount of data to be transmitted
2083 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2084 * the number of packets).
2086 * For interval 1, we have two possible microframes to schedule those packets
2087 * in. For this algorithm, if we can schedule the same number of packets for
2088 * each possible scheduling opportunity (each microframe), we will do so. The
2089 * remaining number of packets will be saved to be transmitted in the gaps in
2090 * the next interval's scheduling sequence.
2092 * As we move those remaining packets to be scheduled with interval 2 packets,
2093 * we have to double the number of remaining packets to transmit. This is
2094 * because the intervals are actually powers of 2, and we would be transmitting
2095 * the previous interval's packets twice in this interval. We also have to be
2096 * sure that when we look at the largest max packet size for this interval, we
2097 * also look at the largest max packet size for the remaining packets and take
2098 * the greater of the two.
2100 * The algorithm continues to evenly distribute packets in each scheduling
2101 * opportunity, and push the remaining packets out, until we get to the last
2102 * interval. Then those packets and their associated overhead are just added
2103 * to the bandwidth used.
2105 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2106 struct xhci_virt_device
*virt_dev
,
2109 unsigned int bw_reserved
;
2110 unsigned int max_bandwidth
;
2111 unsigned int bw_used
;
2112 unsigned int block_size
;
2113 struct xhci_interval_bw_table
*bw_table
;
2114 unsigned int packet_size
= 0;
2115 unsigned int overhead
= 0;
2116 unsigned int packets_transmitted
= 0;
2117 unsigned int packets_remaining
= 0;
2120 if (virt_dev
->udev
->speed
>= USB_SPEED_SUPER
)
2121 return xhci_check_ss_bw(xhci
, virt_dev
);
2123 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2124 max_bandwidth
= HS_BW_LIMIT
;
2125 /* Convert percent of bus BW reserved to blocks reserved */
2126 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2128 max_bandwidth
= FS_BW_LIMIT
;
2129 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2132 bw_table
= virt_dev
->bw_table
;
2133 /* We need to translate the max packet size and max ESIT payloads into
2134 * the units the hardware uses.
2136 block_size
= xhci_get_block_size(virt_dev
->udev
);
2138 /* If we are manipulating a LS/FS device under a HS hub, double check
2139 * that the HS bus has enough bandwidth if we are activing a new TT.
2141 if (virt_dev
->tt_info
) {
2142 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2143 "Recalculating BW for rootport %u",
2144 virt_dev
->real_port
);
2145 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2146 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2147 "newly activated TT.\n");
2150 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2151 "Recalculating BW for TT slot %u port %u",
2152 virt_dev
->tt_info
->slot_id
,
2153 virt_dev
->tt_info
->ttport
);
2155 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2156 "Recalculating BW for rootport %u",
2157 virt_dev
->real_port
);
2160 /* Add in how much bandwidth will be used for interval zero, or the
2161 * rounded max ESIT payload + number of packets * largest overhead.
2163 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2164 bw_table
->interval_bw
[0].num_packets
*
2165 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2167 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2168 unsigned int bw_added
;
2169 unsigned int largest_mps
;
2170 unsigned int interval_overhead
;
2173 * How many packets could we transmit in this interval?
2174 * If packets didn't fit in the previous interval, we will need
2175 * to transmit that many packets twice within this interval.
2177 packets_remaining
= 2 * packets_remaining
+
2178 bw_table
->interval_bw
[i
].num_packets
;
2180 /* Find the largest max packet size of this or the previous
2183 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2186 struct xhci_virt_ep
*virt_ep
;
2187 struct list_head
*ep_entry
;
2189 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2190 virt_ep
= list_entry(ep_entry
,
2191 struct xhci_virt_ep
, bw_endpoint_list
);
2192 /* Convert to blocks, rounding up */
2193 largest_mps
= DIV_ROUND_UP(
2194 virt_ep
->bw_info
.max_packet_size
,
2197 if (largest_mps
> packet_size
)
2198 packet_size
= largest_mps
;
2200 /* Use the larger overhead of this or the previous interval. */
2201 interval_overhead
= xhci_get_largest_overhead(
2202 &bw_table
->interval_bw
[i
]);
2203 if (interval_overhead
> overhead
)
2204 overhead
= interval_overhead
;
2206 /* How many packets can we evenly distribute across
2207 * (1 << (i + 1)) possible scheduling opportunities?
2209 packets_transmitted
= packets_remaining
>> (i
+ 1);
2211 /* Add in the bandwidth used for those scheduled packets */
2212 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2214 /* How many packets do we have remaining to transmit? */
2215 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2217 /* What largest max packet size should those packets have? */
2218 /* If we've transmitted all packets, don't carry over the
2219 * largest packet size.
2221 if (packets_remaining
== 0) {
2224 } else if (packets_transmitted
> 0) {
2225 /* Otherwise if we do have remaining packets, and we've
2226 * scheduled some packets in this interval, take the
2227 * largest max packet size from endpoints with this
2230 packet_size
= largest_mps
;
2231 overhead
= interval_overhead
;
2233 /* Otherwise carry over packet_size and overhead from the last
2234 * time we had a remainder.
2236 bw_used
+= bw_added
;
2237 if (bw_used
> max_bandwidth
) {
2238 xhci_warn(xhci
, "Not enough bandwidth. "
2239 "Proposed: %u, Max: %u\n",
2240 bw_used
, max_bandwidth
);
2245 * Ok, we know we have some packets left over after even-handedly
2246 * scheduling interval 15. We don't know which microframes they will
2247 * fit into, so we over-schedule and say they will be scheduled every
2250 if (packets_remaining
> 0)
2251 bw_used
+= overhead
+ packet_size
;
2253 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2254 unsigned int port_index
= virt_dev
->real_port
- 1;
2256 /* OK, we're manipulating a HS device attached to a
2257 * root port bandwidth domain. Include the number of active TTs
2258 * in the bandwidth used.
2260 bw_used
+= TT_HS_OVERHEAD
*
2261 xhci
->rh_bw
[port_index
].num_active_tts
;
2264 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2265 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2266 "Available: %u " "percent",
2267 bw_used
, max_bandwidth
, bw_reserved
,
2268 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2271 bw_used
+= bw_reserved
;
2272 if (bw_used
> max_bandwidth
) {
2273 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2274 bw_used
, max_bandwidth
);
2278 bw_table
->bw_used
= bw_used
;
2282 static bool xhci_is_async_ep(unsigned int ep_type
)
2284 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2285 ep_type
!= ISOC_IN_EP
&&
2286 ep_type
!= INT_IN_EP
);
2289 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2291 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2294 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2296 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2298 if (ep_bw
->ep_interval
== 0)
2299 return SS_OVERHEAD_BURST
+
2300 (ep_bw
->mult
* ep_bw
->num_packets
*
2301 (SS_OVERHEAD
+ mps
));
2302 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2303 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2304 1 << ep_bw
->ep_interval
);
2308 static void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2309 struct xhci_bw_info
*ep_bw
,
2310 struct xhci_interval_bw_table
*bw_table
,
2311 struct usb_device
*udev
,
2312 struct xhci_virt_ep
*virt_ep
,
2313 struct xhci_tt_bw_info
*tt_info
)
2315 struct xhci_interval_bw
*interval_bw
;
2316 int normalized_interval
;
2318 if (xhci_is_async_ep(ep_bw
->type
))
2321 if (udev
->speed
>= USB_SPEED_SUPER
) {
2322 if (xhci_is_sync_in_ep(ep_bw
->type
))
2323 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2324 xhci_get_ss_bw_consumed(ep_bw
);
2326 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2327 xhci_get_ss_bw_consumed(ep_bw
);
2331 /* SuperSpeed endpoints never get added to intervals in the table, so
2332 * this check is only valid for HS/FS/LS devices.
2334 if (list_empty(&virt_ep
->bw_endpoint_list
))
2336 /* For LS/FS devices, we need to translate the interval expressed in
2337 * microframes to frames.
2339 if (udev
->speed
== USB_SPEED_HIGH
)
2340 normalized_interval
= ep_bw
->ep_interval
;
2342 normalized_interval
= ep_bw
->ep_interval
- 3;
2344 if (normalized_interval
== 0)
2345 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2346 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2347 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2348 switch (udev
->speed
) {
2350 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2352 case USB_SPEED_FULL
:
2353 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2355 case USB_SPEED_HIGH
:
2356 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2358 case USB_SPEED_SUPER
:
2359 case USB_SPEED_SUPER_PLUS
:
2360 case USB_SPEED_UNKNOWN
:
2361 case USB_SPEED_WIRELESS
:
2362 /* Should never happen because only LS/FS/HS endpoints will get
2363 * added to the endpoint list.
2368 tt_info
->active_eps
-= 1;
2369 list_del_init(&virt_ep
->bw_endpoint_list
);
2372 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2373 struct xhci_bw_info
*ep_bw
,
2374 struct xhci_interval_bw_table
*bw_table
,
2375 struct usb_device
*udev
,
2376 struct xhci_virt_ep
*virt_ep
,
2377 struct xhci_tt_bw_info
*tt_info
)
2379 struct xhci_interval_bw
*interval_bw
;
2380 struct xhci_virt_ep
*smaller_ep
;
2381 int normalized_interval
;
2383 if (xhci_is_async_ep(ep_bw
->type
))
2386 if (udev
->speed
== USB_SPEED_SUPER
) {
2387 if (xhci_is_sync_in_ep(ep_bw
->type
))
2388 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2389 xhci_get_ss_bw_consumed(ep_bw
);
2391 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2392 xhci_get_ss_bw_consumed(ep_bw
);
2396 /* For LS/FS devices, we need to translate the interval expressed in
2397 * microframes to frames.
2399 if (udev
->speed
== USB_SPEED_HIGH
)
2400 normalized_interval
= ep_bw
->ep_interval
;
2402 normalized_interval
= ep_bw
->ep_interval
- 3;
2404 if (normalized_interval
== 0)
2405 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2406 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2407 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2408 switch (udev
->speed
) {
2410 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2412 case USB_SPEED_FULL
:
2413 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2415 case USB_SPEED_HIGH
:
2416 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2418 case USB_SPEED_SUPER
:
2419 case USB_SPEED_SUPER_PLUS
:
2420 case USB_SPEED_UNKNOWN
:
2421 case USB_SPEED_WIRELESS
:
2422 /* Should never happen because only LS/FS/HS endpoints will get
2423 * added to the endpoint list.
2429 tt_info
->active_eps
+= 1;
2430 /* Insert the endpoint into the list, largest max packet size first. */
2431 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2433 if (ep_bw
->max_packet_size
>=
2434 smaller_ep
->bw_info
.max_packet_size
) {
2435 /* Add the new ep before the smaller endpoint */
2436 list_add_tail(&virt_ep
->bw_endpoint_list
,
2437 &smaller_ep
->bw_endpoint_list
);
2441 /* Add the new endpoint at the end of the list. */
2442 list_add_tail(&virt_ep
->bw_endpoint_list
,
2443 &interval_bw
->endpoints
);
2446 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2447 struct xhci_virt_device
*virt_dev
,
2450 struct xhci_root_port_bw_info
*rh_bw_info
;
2451 if (!virt_dev
->tt_info
)
2454 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2455 if (old_active_eps
== 0 &&
2456 virt_dev
->tt_info
->active_eps
!= 0) {
2457 rh_bw_info
->num_active_tts
+= 1;
2458 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2459 } else if (old_active_eps
!= 0 &&
2460 virt_dev
->tt_info
->active_eps
== 0) {
2461 rh_bw_info
->num_active_tts
-= 1;
2462 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2466 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2467 struct xhci_virt_device
*virt_dev
,
2468 struct xhci_container_ctx
*in_ctx
)
2470 struct xhci_bw_info ep_bw_info
[31];
2472 struct xhci_input_control_ctx
*ctrl_ctx
;
2473 int old_active_eps
= 0;
2475 if (virt_dev
->tt_info
)
2476 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2478 ctrl_ctx
= xhci_get_input_control_ctx(in_ctx
);
2480 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2485 for (i
= 0; i
< 31; i
++) {
2486 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2489 /* Make a copy of the BW info in case we need to revert this */
2490 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2491 sizeof(ep_bw_info
[i
]));
2492 /* Drop the endpoint from the interval table if the endpoint is
2493 * being dropped or changed.
2495 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2496 xhci_drop_ep_from_interval_table(xhci
,
2497 &virt_dev
->eps
[i
].bw_info
,
2503 /* Overwrite the information stored in the endpoints' bw_info */
2504 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2505 for (i
= 0; i
< 31; i
++) {
2506 /* Add any changed or added endpoints to the interval table */
2507 if (EP_IS_ADDED(ctrl_ctx
, i
))
2508 xhci_add_ep_to_interval_table(xhci
,
2509 &virt_dev
->eps
[i
].bw_info
,
2516 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2517 /* Ok, this fits in the bandwidth we have.
2518 * Update the number of active TTs.
2520 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2524 /* We don't have enough bandwidth for this, revert the stored info. */
2525 for (i
= 0; i
< 31; i
++) {
2526 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2529 /* Drop the new copies of any added or changed endpoints from
2530 * the interval table.
2532 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2533 xhci_drop_ep_from_interval_table(xhci
,
2534 &virt_dev
->eps
[i
].bw_info
,
2540 /* Revert the endpoint back to its old information */
2541 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2542 sizeof(ep_bw_info
[i
]));
2543 /* Add any changed or dropped endpoints back into the table */
2544 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2545 xhci_add_ep_to_interval_table(xhci
,
2546 &virt_dev
->eps
[i
].bw_info
,
2556 /* Issue a configure endpoint command or evaluate context command
2557 * and wait for it to finish.
2559 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2560 struct usb_device
*udev
,
2561 struct xhci_command
*command
,
2562 bool ctx_change
, bool must_succeed
)
2565 unsigned long flags
;
2566 struct xhci_input_control_ctx
*ctrl_ctx
;
2567 struct xhci_virt_device
*virt_dev
;
2568 struct xhci_slot_ctx
*slot_ctx
;
2573 spin_lock_irqsave(&xhci
->lock
, flags
);
2575 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
2576 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2580 virt_dev
= xhci
->devs
[udev
->slot_id
];
2582 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
2584 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2585 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2590 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2591 xhci_reserve_host_resources(xhci
, ctrl_ctx
)) {
2592 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2593 xhci_warn(xhci
, "Not enough host resources, "
2594 "active endpoint contexts = %u\n",
2595 xhci
->num_active_eps
);
2598 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2599 xhci_reserve_bandwidth(xhci
, virt_dev
, command
->in_ctx
)) {
2600 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2601 xhci_free_host_resources(xhci
, ctrl_ctx
);
2602 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2603 xhci_warn(xhci
, "Not enough bandwidth\n");
2607 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
2608 trace_xhci_configure_endpoint(slot_ctx
);
2611 ret
= xhci_queue_configure_endpoint(xhci
, command
,
2612 command
->in_ctx
->dma
,
2613 udev
->slot_id
, must_succeed
);
2615 ret
= xhci_queue_evaluate_context(xhci
, command
,
2616 command
->in_ctx
->dma
,
2617 udev
->slot_id
, must_succeed
);
2619 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2620 xhci_free_host_resources(xhci
, ctrl_ctx
);
2621 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2622 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
2623 "FIXME allocate a new ring segment");
2626 xhci_ring_cmd_db(xhci
);
2627 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2629 /* Wait for the configure endpoint command to complete */
2630 wait_for_completion(command
->completion
);
2633 ret
= xhci_configure_endpoint_result(xhci
, udev
,
2636 ret
= xhci_evaluate_context_result(xhci
, udev
,
2639 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2640 spin_lock_irqsave(&xhci
->lock
, flags
);
2641 /* If the command failed, remove the reserved resources.
2642 * Otherwise, clean up the estimate to include dropped eps.
2645 xhci_free_host_resources(xhci
, ctrl_ctx
);
2647 xhci_finish_resource_reservation(xhci
, ctrl_ctx
);
2648 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2653 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd
*xhci
,
2654 struct xhci_virt_device
*vdev
, int i
)
2656 struct xhci_virt_ep
*ep
= &vdev
->eps
[i
];
2658 if (ep
->ep_state
& EP_HAS_STREAMS
) {
2659 xhci_warn(xhci
, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2660 xhci_get_endpoint_address(i
));
2661 xhci_free_stream_info(xhci
, ep
->stream_info
);
2662 ep
->stream_info
= NULL
;
2663 ep
->ep_state
&= ~EP_HAS_STREAMS
;
2667 /* Called after one or more calls to xhci_add_endpoint() or
2668 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2669 * to call xhci_reset_bandwidth().
2671 * Since we are in the middle of changing either configuration or
2672 * installing a new alt setting, the USB core won't allow URBs to be
2673 * enqueued for any endpoint on the old config or interface. Nothing
2674 * else should be touching the xhci->devs[slot_id] structure, so we
2675 * don't need to take the xhci->lock for manipulating that.
2677 static int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2681 struct xhci_hcd
*xhci
;
2682 struct xhci_virt_device
*virt_dev
;
2683 struct xhci_input_control_ctx
*ctrl_ctx
;
2684 struct xhci_slot_ctx
*slot_ctx
;
2685 struct xhci_command
*command
;
2687 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2690 xhci
= hcd_to_xhci(hcd
);
2691 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
2692 (xhci
->xhc_state
& XHCI_STATE_REMOVING
))
2695 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2696 virt_dev
= xhci
->devs
[udev
->slot_id
];
2698 command
= xhci_alloc_command(xhci
, false, true, GFP_KERNEL
);
2702 command
->in_ctx
= virt_dev
->in_ctx
;
2704 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2705 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
2707 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2710 goto command_cleanup
;
2712 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2713 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2714 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2716 /* Don't issue the command if there's no endpoints to update. */
2717 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2718 ctrl_ctx
->drop_flags
== 0) {
2720 goto command_cleanup
;
2722 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2723 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2724 for (i
= 31; i
>= 1; i
--) {
2725 __le32 le32
= cpu_to_le32(BIT(i
));
2727 if ((virt_dev
->eps
[i
-1].ring
&& !(ctrl_ctx
->drop_flags
& le32
))
2728 || (ctrl_ctx
->add_flags
& le32
) || i
== 1) {
2729 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
2730 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(i
));
2735 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
2738 /* Callee should call reset_bandwidth() */
2739 goto command_cleanup
;
2741 /* Free any rings that were dropped, but not changed. */
2742 for (i
= 1; i
< 31; i
++) {
2743 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2744 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1)))) {
2745 xhci_free_endpoint_ring(xhci
, virt_dev
, i
);
2746 xhci_check_bw_drop_ep_streams(xhci
, virt_dev
, i
);
2749 xhci_zero_in_ctx(xhci
, virt_dev
);
2751 * Install any rings for completely new endpoints or changed endpoints,
2752 * and free any old rings from changed endpoints.
2754 for (i
= 1; i
< 31; i
++) {
2755 if (!virt_dev
->eps
[i
].new_ring
)
2757 /* Only free the old ring if it exists.
2758 * It may not if this is the first add of an endpoint.
2760 if (virt_dev
->eps
[i
].ring
) {
2761 xhci_free_endpoint_ring(xhci
, virt_dev
, i
);
2763 xhci_check_bw_drop_ep_streams(xhci
, virt_dev
, i
);
2764 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2765 virt_dev
->eps
[i
].new_ring
= NULL
;
2768 kfree(command
->completion
);
2774 static void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2776 struct xhci_hcd
*xhci
;
2777 struct xhci_virt_device
*virt_dev
;
2780 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2783 xhci
= hcd_to_xhci(hcd
);
2785 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2786 virt_dev
= xhci
->devs
[udev
->slot_id
];
2787 /* Free any rings allocated for added endpoints */
2788 for (i
= 0; i
< 31; i
++) {
2789 if (virt_dev
->eps
[i
].new_ring
) {
2790 xhci_debugfs_remove_endpoint(xhci
, virt_dev
, i
);
2791 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2792 virt_dev
->eps
[i
].new_ring
= NULL
;
2795 xhci_zero_in_ctx(xhci
, virt_dev
);
2798 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2799 struct xhci_container_ctx
*in_ctx
,
2800 struct xhci_container_ctx
*out_ctx
,
2801 struct xhci_input_control_ctx
*ctrl_ctx
,
2802 u32 add_flags
, u32 drop_flags
)
2804 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2805 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2806 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2807 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2810 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2811 unsigned int slot_id
, unsigned int ep_index
,
2812 struct xhci_dequeue_state
*deq_state
)
2814 struct xhci_input_control_ctx
*ctrl_ctx
;
2815 struct xhci_container_ctx
*in_ctx
;
2816 struct xhci_ep_ctx
*ep_ctx
;
2820 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2821 ctrl_ctx
= xhci_get_input_control_ctx(in_ctx
);
2823 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2828 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2829 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2830 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2831 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2832 deq_state
->new_deq_ptr
);
2834 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2835 "reset ep command\n");
2836 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2837 deq_state
->new_deq_seg
,
2838 deq_state
->new_deq_ptr
);
2841 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2843 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2844 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2845 xhci
->devs
[slot_id
]->out_ctx
, ctrl_ctx
,
2846 added_ctxs
, added_ctxs
);
2849 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
, unsigned int ep_index
,
2850 unsigned int stream_id
, struct xhci_td
*td
)
2852 struct xhci_dequeue_state deq_state
;
2853 struct xhci_virt_ep
*ep
;
2854 struct usb_device
*udev
= td
->urb
->dev
;
2856 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2857 "Cleaning up stalled endpoint ring");
2858 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2859 /* We need to move the HW's dequeue pointer past this TD,
2860 * or it will attempt to resend it on the next doorbell ring.
2862 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2863 ep_index
, stream_id
, td
, &deq_state
);
2865 if (!deq_state
.new_deq_ptr
|| !deq_state
.new_deq_seg
)
2868 /* HW with the reset endpoint quirk will use the saved dequeue state to
2869 * issue a configure endpoint command later.
2871 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2872 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2873 "Queueing new dequeue state");
2874 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2875 ep_index
, &deq_state
);
2877 /* Better hope no one uses the input context between now and the
2878 * reset endpoint completion!
2879 * XXX: No idea how this hardware will react when stream rings
2882 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2883 "Setting up input context for "
2884 "configure endpoint command");
2885 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2886 ep_index
, &deq_state
);
2890 /* Called when clearing halted device. The core should have sent the control
2891 * message to clear the device halt condition. The host side of the halt should
2892 * already be cleared with a reset endpoint command issued when the STALL tx
2893 * event was received.
2895 * Context: in_interrupt
2898 static void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2899 struct usb_host_endpoint
*ep
)
2901 struct xhci_hcd
*xhci
;
2903 xhci
= hcd_to_xhci(hcd
);
2906 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2907 * The Reset Endpoint Command may only be issued to endpoints in the
2908 * Halted state. If software wishes reset the Data Toggle or Sequence
2909 * Number of an endpoint that isn't in the Halted state, then software
2910 * may issue a Configure Endpoint Command with the Drop and Add bits set
2911 * for the target endpoint. that is in the Stopped state.
2914 /* For now just print debug to follow the situation */
2915 xhci_dbg(xhci
, "Endpoint 0x%x ep reset callback called\n",
2916 ep
->desc
.bEndpointAddress
);
2919 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2920 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2921 unsigned int slot_id
)
2924 unsigned int ep_index
;
2925 unsigned int ep_state
;
2929 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2932 if (usb_ss_max_streams(&ep
->ss_ep_comp
) == 0) {
2933 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2934 " descriptor for ep 0x%x does not support streams\n",
2935 ep
->desc
.bEndpointAddress
);
2939 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2940 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2941 if (ep_state
& EP_HAS_STREAMS
||
2942 ep_state
& EP_GETTING_STREAMS
) {
2943 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2944 "already has streams set up.\n",
2945 ep
->desc
.bEndpointAddress
);
2946 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2947 "dynamic stream context array reallocation.\n");
2950 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2951 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2952 "endpoint 0x%x; URBs are pending.\n",
2953 ep
->desc
.bEndpointAddress
);
2959 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2960 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2962 unsigned int max_streams
;
2964 /* The stream context array size must be a power of two */
2965 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2967 * Find out how many primary stream array entries the host controller
2968 * supports. Later we may use secondary stream arrays (similar to 2nd
2969 * level page entries), but that's an optional feature for xHCI host
2970 * controllers. xHCs must support at least 4 stream IDs.
2972 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2973 if (*num_stream_ctxs
> max_streams
) {
2974 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2976 *num_stream_ctxs
= max_streams
;
2977 *num_streams
= max_streams
;
2981 /* Returns an error code if one of the endpoint already has streams.
2982 * This does not change any data structures, it only checks and gathers
2985 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
2986 struct usb_device
*udev
,
2987 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2988 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
2990 unsigned int max_streams
;
2991 unsigned int endpoint_flag
;
2995 for (i
= 0; i
< num_eps
; i
++) {
2996 ret
= xhci_check_streams_endpoint(xhci
, udev
,
2997 eps
[i
], udev
->slot_id
);
3001 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
3002 if (max_streams
< (*num_streams
- 1)) {
3003 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
3004 eps
[i
]->desc
.bEndpointAddress
,
3006 *num_streams
= max_streams
+1;
3009 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3010 if (*changed_ep_bitmask
& endpoint_flag
)
3012 *changed_ep_bitmask
|= endpoint_flag
;
3017 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
3018 struct usb_device
*udev
,
3019 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
3021 u32 changed_ep_bitmask
= 0;
3022 unsigned int slot_id
;
3023 unsigned int ep_index
;
3024 unsigned int ep_state
;
3027 slot_id
= udev
->slot_id
;
3028 if (!xhci
->devs
[slot_id
])
3031 for (i
= 0; i
< num_eps
; i
++) {
3032 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3033 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3034 /* Are streams already being freed for the endpoint? */
3035 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3036 xhci_warn(xhci
, "WARN Can't disable streams for "
3038 "streams are being disabled already\n",
3039 eps
[i
]->desc
.bEndpointAddress
);
3042 /* Are there actually any streams to free? */
3043 if (!(ep_state
& EP_HAS_STREAMS
) &&
3044 !(ep_state
& EP_GETTING_STREAMS
)) {
3045 xhci_warn(xhci
, "WARN Can't disable streams for "
3047 "streams are already disabled!\n",
3048 eps
[i
]->desc
.bEndpointAddress
);
3049 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3050 "with non-streams endpoint\n");
3053 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3055 return changed_ep_bitmask
;
3059 * The USB device drivers use this function (through the HCD interface in USB
3060 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3061 * coordinate mass storage command queueing across multiple endpoints (basically
3062 * a stream ID == a task ID).
3064 * Setting up streams involves allocating the same size stream context array
3065 * for each endpoint and issuing a configure endpoint command for all endpoints.
3067 * Don't allow the call to succeed if one endpoint only supports one stream
3068 * (which means it doesn't support streams at all).
3070 * Drivers may get less stream IDs than they asked for, if the host controller
3071 * hardware or endpoints claim they can't support the number of requested
3074 static int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3075 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3076 unsigned int num_streams
, gfp_t mem_flags
)
3079 struct xhci_hcd
*xhci
;
3080 struct xhci_virt_device
*vdev
;
3081 struct xhci_command
*config_cmd
;
3082 struct xhci_input_control_ctx
*ctrl_ctx
;
3083 unsigned int ep_index
;
3084 unsigned int num_stream_ctxs
;
3085 unsigned int max_packet
;
3086 unsigned long flags
;
3087 u32 changed_ep_bitmask
= 0;
3092 /* Add one to the number of streams requested to account for
3093 * stream 0 that is reserved for xHCI usage.
3096 xhci
= hcd_to_xhci(hcd
);
3097 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3100 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3101 if ((xhci
->quirks
& XHCI_BROKEN_STREAMS
) ||
3102 HCC_MAX_PSA(xhci
->hcc_params
) < 4) {
3103 xhci_dbg(xhci
, "xHCI controller does not support streams.\n");
3107 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3111 ctrl_ctx
= xhci_get_input_control_ctx(config_cmd
->in_ctx
);
3113 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3115 xhci_free_command(xhci
, config_cmd
);
3119 /* Check to make sure all endpoints are not already configured for
3120 * streams. While we're at it, find the maximum number of streams that
3121 * all the endpoints will support and check for duplicate endpoints.
3123 spin_lock_irqsave(&xhci
->lock
, flags
);
3124 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3125 num_eps
, &num_streams
, &changed_ep_bitmask
);
3127 xhci_free_command(xhci
, config_cmd
);
3128 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3131 if (num_streams
<= 1) {
3132 xhci_warn(xhci
, "WARN: endpoints can't handle "
3133 "more than one stream.\n");
3134 xhci_free_command(xhci
, config_cmd
);
3135 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3138 vdev
= xhci
->devs
[udev
->slot_id
];
3139 /* Mark each endpoint as being in transition, so
3140 * xhci_urb_enqueue() will reject all URBs.
3142 for (i
= 0; i
< num_eps
; i
++) {
3143 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3144 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3146 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3148 /* Setup internal data structures and allocate HW data structures for
3149 * streams (but don't install the HW structures in the input context
3150 * until we're sure all memory allocation succeeded).
3152 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3153 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3154 num_stream_ctxs
, num_streams
);
3156 for (i
= 0; i
< num_eps
; i
++) {
3157 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3158 max_packet
= usb_endpoint_maxp(&eps
[i
]->desc
);
3159 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3162 max_packet
, mem_flags
);
3163 if (!vdev
->eps
[ep_index
].stream_info
)
3165 /* Set maxPstreams in endpoint context and update deq ptr to
3166 * point to stream context array. FIXME
3170 /* Set up the input context for a configure endpoint command. */
3171 for (i
= 0; i
< num_eps
; i
++) {
3172 struct xhci_ep_ctx
*ep_ctx
;
3174 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3175 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3177 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3178 vdev
->out_ctx
, ep_index
);
3179 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3180 vdev
->eps
[ep_index
].stream_info
);
3182 /* Tell the HW to drop its old copy of the endpoint context info
3183 * and add the updated copy from the input context.
3185 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3186 vdev
->out_ctx
, ctrl_ctx
,
3187 changed_ep_bitmask
, changed_ep_bitmask
);
3189 /* Issue and wait for the configure endpoint command */
3190 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3193 /* xHC rejected the configure endpoint command for some reason, so we
3194 * leave the old ring intact and free our internal streams data
3200 spin_lock_irqsave(&xhci
->lock
, flags
);
3201 for (i
= 0; i
< num_eps
; i
++) {
3202 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3203 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3204 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3205 udev
->slot_id
, ep_index
);
3206 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3208 xhci_free_command(xhci
, config_cmd
);
3209 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3211 /* Subtract 1 for stream 0, which drivers can't use */
3212 return num_streams
- 1;
3215 /* If it didn't work, free the streams! */
3216 for (i
= 0; i
< num_eps
; i
++) {
3217 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3218 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3219 vdev
->eps
[ep_index
].stream_info
= NULL
;
3220 /* FIXME Unset maxPstreams in endpoint context and
3221 * update deq ptr to point to normal string ring.
3223 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3224 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3225 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3227 xhci_free_command(xhci
, config_cmd
);
3231 /* Transition the endpoint from using streams to being a "normal" endpoint
3234 * Modify the endpoint context state, submit a configure endpoint command,
3235 * and free all endpoint rings for streams if that completes successfully.
3237 static int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3238 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3242 struct xhci_hcd
*xhci
;
3243 struct xhci_virt_device
*vdev
;
3244 struct xhci_command
*command
;
3245 struct xhci_input_control_ctx
*ctrl_ctx
;
3246 unsigned int ep_index
;
3247 unsigned long flags
;
3248 u32 changed_ep_bitmask
;
3250 xhci
= hcd_to_xhci(hcd
);
3251 vdev
= xhci
->devs
[udev
->slot_id
];
3253 /* Set up a configure endpoint command to remove the streams rings */
3254 spin_lock_irqsave(&xhci
->lock
, flags
);
3255 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3256 udev
, eps
, num_eps
);
3257 if (changed_ep_bitmask
== 0) {
3258 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3262 /* Use the xhci_command structure from the first endpoint. We may have
3263 * allocated too many, but the driver may call xhci_free_streams() for
3264 * each endpoint it grouped into one call to xhci_alloc_streams().
3266 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3267 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3268 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
3270 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3271 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3276 for (i
= 0; i
< num_eps
; i
++) {
3277 struct xhci_ep_ctx
*ep_ctx
;
3279 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3280 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3281 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3282 EP_GETTING_NO_STREAMS
;
3284 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3285 vdev
->out_ctx
, ep_index
);
3286 xhci_setup_no_streams_ep_input_ctx(ep_ctx
,
3287 &vdev
->eps
[ep_index
]);
3289 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3290 vdev
->out_ctx
, ctrl_ctx
,
3291 changed_ep_bitmask
, changed_ep_bitmask
);
3292 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3294 /* Issue and wait for the configure endpoint command,
3295 * which must succeed.
3297 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3300 /* xHC rejected the configure endpoint command for some reason, so we
3301 * leave the streams rings intact.
3306 spin_lock_irqsave(&xhci
->lock
, flags
);
3307 for (i
= 0; i
< num_eps
; i
++) {
3308 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3309 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3310 vdev
->eps
[ep_index
].stream_info
= NULL
;
3311 /* FIXME Unset maxPstreams in endpoint context and
3312 * update deq ptr to point to normal string ring.
3314 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3315 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3317 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3323 * Deletes endpoint resources for endpoints that were active before a Reset
3324 * Device command, or a Disable Slot command. The Reset Device command leaves
3325 * the control endpoint intact, whereas the Disable Slot command deletes it.
3327 * Must be called with xhci->lock held.
3329 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3330 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3333 unsigned int num_dropped_eps
= 0;
3334 unsigned int drop_flags
= 0;
3336 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3337 if (virt_dev
->eps
[i
].ring
) {
3338 drop_flags
|= 1 << i
;
3342 xhci
->num_active_eps
-= num_dropped_eps
;
3343 if (num_dropped_eps
)
3344 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3345 "Dropped %u ep ctxs, flags = 0x%x, "
3347 num_dropped_eps
, drop_flags
,
3348 xhci
->num_active_eps
);
3352 * This submits a Reset Device Command, which will set the device state to 0,
3353 * set the device address to 0, and disable all the endpoints except the default
3354 * control endpoint. The USB core should come back and call
3355 * xhci_address_device(), and then re-set up the configuration. If this is
3356 * called because of a usb_reset_and_verify_device(), then the old alternate
3357 * settings will be re-installed through the normal bandwidth allocation
3360 * Wait for the Reset Device command to finish. Remove all structures
3361 * associated with the endpoints that were disabled. Clear the input device
3362 * structure? Reset the control endpoint 0 max packet size?
3364 * If the virt_dev to be reset does not exist or does not match the udev,
3365 * it means the device is lost, possibly due to the xHC restore error and
3366 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3367 * re-allocate the device.
3369 static int xhci_discover_or_reset_device(struct usb_hcd
*hcd
,
3370 struct usb_device
*udev
)
3373 unsigned long flags
;
3374 struct xhci_hcd
*xhci
;
3375 unsigned int slot_id
;
3376 struct xhci_virt_device
*virt_dev
;
3377 struct xhci_command
*reset_device_cmd
;
3378 int last_freed_endpoint
;
3379 struct xhci_slot_ctx
*slot_ctx
;
3380 int old_active_eps
= 0;
3382 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3385 xhci
= hcd_to_xhci(hcd
);
3386 slot_id
= udev
->slot_id
;
3387 virt_dev
= xhci
->devs
[slot_id
];
3389 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3390 "not exist. Re-allocate the device\n", slot_id
);
3391 ret
= xhci_alloc_dev(hcd
, udev
);
3398 if (virt_dev
->tt_info
)
3399 old_active_eps
= virt_dev
->tt_info
->active_eps
;
3401 if (virt_dev
->udev
!= udev
) {
3402 /* If the virt_dev and the udev does not match, this virt_dev
3403 * may belong to another udev.
3404 * Re-allocate the device.
3406 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3407 "not match the udev. Re-allocate the device\n",
3409 ret
= xhci_alloc_dev(hcd
, udev
);
3416 /* If device is not setup, there is no point in resetting it */
3417 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3418 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3419 SLOT_STATE_DISABLED
)
3422 trace_xhci_discover_or_reset_device(slot_ctx
);
3424 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3425 /* Allocate the command structure that holds the struct completion.
3426 * Assume we're in process context, since the normal device reset
3427 * process has to wait for the device anyway. Storage devices are
3428 * reset as part of error handling, so use GFP_NOIO instead of
3431 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3432 if (!reset_device_cmd
) {
3433 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3437 /* Attempt to submit the Reset Device command to the command ring */
3438 spin_lock_irqsave(&xhci
->lock
, flags
);
3440 ret
= xhci_queue_reset_device(xhci
, reset_device_cmd
, slot_id
);
3442 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3443 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3444 goto command_cleanup
;
3446 xhci_ring_cmd_db(xhci
);
3447 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3449 /* Wait for the Reset Device command to finish */
3450 wait_for_completion(reset_device_cmd
->completion
);
3452 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3453 * unless we tried to reset a slot ID that wasn't enabled,
3454 * or the device wasn't in the addressed or configured state.
3456 ret
= reset_device_cmd
->status
;
3458 case COMP_COMMAND_ABORTED
:
3459 case COMP_COMMAND_RING_STOPPED
:
3460 xhci_warn(xhci
, "Timeout waiting for reset device command\n");
3462 goto command_cleanup
;
3463 case COMP_SLOT_NOT_ENABLED_ERROR
: /* 0.95 completion for bad slot ID */
3464 case COMP_CONTEXT_STATE_ERROR
: /* 0.96 completion code for same thing */
3465 xhci_dbg(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3467 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3468 xhci_dbg(xhci
, "Not freeing device rings.\n");
3469 /* Don't treat this as an error. May change my mind later. */
3471 goto command_cleanup
;
3473 xhci_dbg(xhci
, "Successful reset device command.\n");
3476 if (xhci_is_vendor_info_code(xhci
, ret
))
3478 xhci_warn(xhci
, "Unknown completion code %u for "
3479 "reset device command.\n", ret
);
3481 goto command_cleanup
;
3484 /* Free up host controller endpoint resources */
3485 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3486 spin_lock_irqsave(&xhci
->lock
, flags
);
3487 /* Don't delete the default control endpoint resources */
3488 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3489 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3492 /* Everything but endpoint 0 is disabled, so free the rings. */
3493 last_freed_endpoint
= 1;
3494 for (i
= 1; i
< 31; i
++) {
3495 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3497 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3498 xhci_warn(xhci
, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3499 xhci_get_endpoint_address(i
));
3500 xhci_free_stream_info(xhci
, ep
->stream_info
);
3501 ep
->stream_info
= NULL
;
3502 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3506 xhci_debugfs_remove_endpoint(xhci
, virt_dev
, i
);
3507 xhci_free_endpoint_ring(xhci
, virt_dev
, i
);
3508 last_freed_endpoint
= i
;
3510 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3511 xhci_drop_ep_from_interval_table(xhci
,
3512 &virt_dev
->eps
[i
].bw_info
,
3517 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3519 /* If necessary, update the number of active TTs on this root port */
3520 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3524 xhci_free_command(xhci
, reset_device_cmd
);
3529 * At this point, the struct usb_device is about to go away, the device has
3530 * disconnected, and all traffic has been stopped and the endpoints have been
3531 * disabled. Free any HC data structures associated with that device.
3533 static void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3535 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3536 struct xhci_virt_device
*virt_dev
;
3537 struct xhci_slot_ctx
*slot_ctx
;
3540 #ifndef CONFIG_USB_DEFAULT_PERSIST
3542 * We called pm_runtime_get_noresume when the device was attached.
3543 * Decrement the counter here to allow controller to runtime suspend
3544 * if no devices remain.
3546 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3547 pm_runtime_put_noidle(hcd
->self
.controller
);
3550 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3551 /* If the host is halted due to driver unload, we still need to free the
3554 if (ret
<= 0 && ret
!= -ENODEV
)
3557 virt_dev
= xhci
->devs
[udev
->slot_id
];
3558 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3559 trace_xhci_free_dev(slot_ctx
);
3561 /* Stop any wayward timer functions (which may grab the lock) */
3562 for (i
= 0; i
< 31; i
++) {
3563 virt_dev
->eps
[i
].ep_state
&= ~EP_STOP_CMD_PENDING
;
3564 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3566 xhci_debugfs_remove_slot(xhci
, udev
->slot_id
);
3567 virt_dev
->udev
= NULL
;
3568 ret
= xhci_disable_slot(xhci
, udev
->slot_id
);
3570 xhci_free_virt_device(xhci
, udev
->slot_id
);
3573 int xhci_disable_slot(struct xhci_hcd
*xhci
, u32 slot_id
)
3575 struct xhci_command
*command
;
3576 unsigned long flags
;
3580 command
= xhci_alloc_command(xhci
, false, false, GFP_KERNEL
);
3584 spin_lock_irqsave(&xhci
->lock
, flags
);
3585 /* Don't disable the slot if the host controller is dead. */
3586 state
= readl(&xhci
->op_regs
->status
);
3587 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3588 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3589 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3594 ret
= xhci_queue_slot_control(xhci
, command
, TRB_DISABLE_SLOT
,
3597 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3601 xhci_ring_cmd_db(xhci
);
3602 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3607 * Checks if we have enough host controller resources for the default control
3610 * Must be called with xhci->lock held.
3612 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3614 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3615 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3616 "Not enough ep ctxs: "
3617 "%u active, need to add 1, limit is %u.",
3618 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3621 xhci
->num_active_eps
+= 1;
3622 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3623 "Adding 1 ep ctx, %u now active.",
3624 xhci
->num_active_eps
);
3630 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3631 * timed out, or allocating memory failed. Returns 1 on success.
3633 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3635 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3636 struct xhci_virt_device
*vdev
;
3637 struct xhci_slot_ctx
*slot_ctx
;
3638 unsigned long flags
;
3640 struct xhci_command
*command
;
3642 command
= xhci_alloc_command(xhci
, false, true, GFP_KERNEL
);
3646 spin_lock_irqsave(&xhci
->lock
, flags
);
3647 ret
= xhci_queue_slot_control(xhci
, command
, TRB_ENABLE_SLOT
, 0);
3649 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3650 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3651 xhci_free_command(xhci
, command
);
3654 xhci_ring_cmd_db(xhci
);
3655 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3657 wait_for_completion(command
->completion
);
3658 slot_id
= command
->slot_id
;
3660 if (!slot_id
|| command
->status
!= COMP_SUCCESS
) {
3661 xhci_err(xhci
, "Error while assigning device slot ID\n");
3662 xhci_err(xhci
, "Max number of devices this xHCI host supports is %u.\n",
3664 readl(&xhci
->cap_regs
->hcs_params1
)));
3665 xhci_free_command(xhci
, command
);
3669 xhci_free_command(xhci
, command
);
3671 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3672 spin_lock_irqsave(&xhci
->lock
, flags
);
3673 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3675 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3676 xhci_warn(xhci
, "Not enough host resources, "
3677 "active endpoint contexts = %u\n",
3678 xhci
->num_active_eps
);
3681 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3683 /* Use GFP_NOIO, since this function can be called from
3684 * xhci_discover_or_reset_device(), which may be called as part of
3685 * mass storage driver error handling.
3687 if (!xhci_alloc_virt_device(xhci
, slot_id
, udev
, GFP_NOIO
)) {
3688 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3691 vdev
= xhci
->devs
[slot_id
];
3692 slot_ctx
= xhci_get_slot_ctx(xhci
, vdev
->out_ctx
);
3693 trace_xhci_alloc_dev(slot_ctx
);
3695 udev
->slot_id
= slot_id
;
3697 xhci_debugfs_create_slot(xhci
, slot_id
);
3699 #ifndef CONFIG_USB_DEFAULT_PERSIST
3701 * If resetting upon resume, we can't put the controller into runtime
3702 * suspend if there is a device attached.
3704 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3705 pm_runtime_get_noresume(hcd
->self
.controller
);
3708 /* Is this a LS or FS device under a HS hub? */
3709 /* Hub or peripherial? */
3713 ret
= xhci_disable_slot(xhci
, udev
->slot_id
);
3715 xhci_free_virt_device(xhci
, udev
->slot_id
);
3721 * Issue an Address Device command and optionally send a corresponding
3722 * SetAddress request to the device.
3724 static int xhci_setup_device(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3725 enum xhci_setup_dev setup
)
3727 const char *act
= setup
== SETUP_CONTEXT_ONLY
? "context" : "address";
3728 unsigned long flags
;
3729 struct xhci_virt_device
*virt_dev
;
3731 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3732 struct xhci_slot_ctx
*slot_ctx
;
3733 struct xhci_input_control_ctx
*ctrl_ctx
;
3735 struct xhci_command
*command
= NULL
;
3737 mutex_lock(&xhci
->mutex
);
3739 if (xhci
->xhc_state
) { /* dying, removing or halted */
3744 if (!udev
->slot_id
) {
3745 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3746 "Bad Slot ID %d", udev
->slot_id
);
3751 virt_dev
= xhci
->devs
[udev
->slot_id
];
3753 if (WARN_ON(!virt_dev
)) {
3755 * In plug/unplug torture test with an NEC controller,
3756 * a zero-dereference was observed once due to virt_dev = 0.
3757 * Print useful debug rather than crash if it is observed again!
3759 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3764 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3765 trace_xhci_setup_device_slot(slot_ctx
);
3767 if (setup
== SETUP_CONTEXT_ONLY
) {
3768 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3769 SLOT_STATE_DEFAULT
) {
3770 xhci_dbg(xhci
, "Slot already in default state\n");
3775 command
= xhci_alloc_command(xhci
, false, true, GFP_KERNEL
);
3781 command
->in_ctx
= virt_dev
->in_ctx
;
3783 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3784 ctrl_ctx
= xhci_get_input_control_ctx(virt_dev
->in_ctx
);
3786 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3792 * If this is the first Set Address since device plug-in or
3793 * virt_device realloaction after a resume with an xHCI power loss,
3794 * then set up the slot context.
3796 if (!slot_ctx
->dev_info
)
3797 xhci_setup_addressable_virt_dev(xhci
, udev
);
3798 /* Otherwise, update the control endpoint ring enqueue pointer. */
3800 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3801 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3802 ctrl_ctx
->drop_flags
= 0;
3804 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3805 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3807 spin_lock_irqsave(&xhci
->lock
, flags
);
3808 trace_xhci_setup_device(virt_dev
);
3809 ret
= xhci_queue_address_device(xhci
, command
, virt_dev
->in_ctx
->dma
,
3810 udev
->slot_id
, setup
);
3812 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3813 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3814 "FIXME: allocate a command ring segment");
3817 xhci_ring_cmd_db(xhci
);
3818 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3820 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3821 wait_for_completion(command
->completion
);
3823 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3824 * the SetAddress() "recovery interval" required by USB and aborting the
3825 * command on a timeout.
3827 switch (command
->status
) {
3828 case COMP_COMMAND_ABORTED
:
3829 case COMP_COMMAND_RING_STOPPED
:
3830 xhci_warn(xhci
, "Timeout while waiting for setup device command\n");
3833 case COMP_CONTEXT_STATE_ERROR
:
3834 case COMP_SLOT_NOT_ENABLED_ERROR
:
3835 xhci_err(xhci
, "Setup ERROR: setup %s command for slot %d.\n",
3836 act
, udev
->slot_id
);
3839 case COMP_USB_TRANSACTION_ERROR
:
3840 dev_warn(&udev
->dev
, "Device not responding to setup %s.\n", act
);
3842 mutex_unlock(&xhci
->mutex
);
3843 ret
= xhci_disable_slot(xhci
, udev
->slot_id
);
3845 xhci_alloc_dev(hcd
, udev
);
3846 kfree(command
->completion
);
3849 case COMP_INCOMPATIBLE_DEVICE_ERROR
:
3850 dev_warn(&udev
->dev
,
3851 "ERROR: Incompatible device for setup %s command\n", act
);
3855 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3856 "Successful setup %s command", act
);
3860 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3861 act
, command
->status
);
3862 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
, 1);
3868 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3869 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3870 "Op regs DCBAA ptr = %#016llx", temp_64
);
3871 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3872 "Slot ID %d dcbaa entry @%p = %#016llx",
3874 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3875 (unsigned long long)
3876 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3877 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3878 "Output Context DMA address = %#08llx",
3879 (unsigned long long)virt_dev
->out_ctx
->dma
);
3880 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3881 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3883 * USB core uses address 1 for the roothubs, so we add one to the
3884 * address given back to us by the HC.
3886 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
,
3887 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3888 /* Zero the input context control for later use */
3889 ctrl_ctx
->add_flags
= 0;
3890 ctrl_ctx
->drop_flags
= 0;
3892 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3893 "Internal device address = %d",
3894 le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
);
3896 mutex_unlock(&xhci
->mutex
);
3898 kfree(command
->completion
);
3904 static int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3906 return xhci_setup_device(hcd
, udev
, SETUP_CONTEXT_ADDRESS
);
3909 static int xhci_enable_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3911 return xhci_setup_device(hcd
, udev
, SETUP_CONTEXT_ONLY
);
3915 * Transfer the port index into real index in the HW port status
3916 * registers. Caculate offset between the port's PORTSC register
3917 * and port status base. Divide the number of per port register
3918 * to get the real index. The raw port number bases 1.
3920 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3922 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3923 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3924 __le32 __iomem
*addr
;
3927 if (hcd
->speed
< HCD_USB3
)
3928 addr
= xhci
->usb2_ports
[port1
- 1];
3930 addr
= xhci
->usb3_ports
[port1
- 1];
3932 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3937 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3938 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3940 static int __maybe_unused
xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
3941 struct usb_device
*udev
, u16 max_exit_latency
)
3943 struct xhci_virt_device
*virt_dev
;
3944 struct xhci_command
*command
;
3945 struct xhci_input_control_ctx
*ctrl_ctx
;
3946 struct xhci_slot_ctx
*slot_ctx
;
3947 unsigned long flags
;
3950 spin_lock_irqsave(&xhci
->lock
, flags
);
3952 virt_dev
= xhci
->devs
[udev
->slot_id
];
3955 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3956 * xHC was re-initialized. Exit latency will be set later after
3957 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3960 if (!virt_dev
|| max_exit_latency
== virt_dev
->current_mel
) {
3961 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3965 /* Attempt to issue an Evaluate Context command to change the MEL. */
3966 command
= xhci
->lpm_command
;
3967 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
3969 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3970 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3975 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
3976 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3978 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
3979 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
3980 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
3981 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
3982 slot_ctx
->dev_state
= 0;
3984 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
3985 "Set up evaluate context for LPM MEL change.");
3987 /* Issue and wait for the evaluate context command. */
3988 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3992 spin_lock_irqsave(&xhci
->lock
, flags
);
3993 virt_dev
->current_mel
= max_exit_latency
;
3994 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4001 /* BESL to HIRD Encoding array for USB2 LPM */
4002 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4003 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4005 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4006 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
4007 struct usb_device
*udev
)
4009 int u2del
, besl
, besl_host
;
4010 int besl_device
= 0;
4013 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
4014 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4016 if (field
& USB_BESL_SUPPORT
) {
4017 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
4018 if (xhci_besl_encoding
[besl_host
] >= u2del
)
4021 /* Use baseline BESL value as default */
4022 if (field
& USB_BESL_BASELINE_VALID
)
4023 besl_device
= USB_GET_BESL_BASELINE(field
);
4024 else if (field
& USB_BESL_DEEP_VALID
)
4025 besl_device
= USB_GET_BESL_DEEP(field
);
4030 besl_host
= (u2del
- 51) / 75 + 1;
4033 besl
= besl_host
+ besl_device
;
4040 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4041 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device
*udev
)
4048 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4050 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4051 l1
= udev
->l1_params
.timeout
/ 256;
4053 /* device has preferred BESLD */
4054 if (field
& USB_BESL_DEEP_VALID
) {
4055 besld
= USB_GET_BESL_DEEP(field
);
4059 return PORT_BESLD(besld
) | PORT_L1_TIMEOUT(l1
) | PORT_HIRDM(hirdm
);
4062 static int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4063 struct usb_device
*udev
, int enable
)
4065 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4066 __le32 __iomem
**port_array
;
4067 __le32 __iomem
*pm_addr
, *hlpm_addr
;
4068 u32 pm_val
, hlpm_val
, field
;
4069 unsigned int port_num
;
4070 unsigned long flags
;
4071 int hird
, exit_latency
;
4074 if (hcd
->speed
>= HCD_USB3
|| !xhci
->hw_lpm_support
||
4078 if (!udev
->parent
|| udev
->parent
->parent
||
4079 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4082 if (udev
->usb2_hw_lpm_capable
!= 1)
4085 spin_lock_irqsave(&xhci
->lock
, flags
);
4087 port_array
= xhci
->usb2_ports
;
4088 port_num
= udev
->portnum
- 1;
4089 pm_addr
= port_array
[port_num
] + PORTPMSC
;
4090 pm_val
= readl(pm_addr
);
4091 hlpm_addr
= port_array
[port_num
] + PORTHLPMC
;
4092 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4094 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4095 enable
? "enable" : "disable", port_num
+ 1);
4097 if (enable
&& !(xhci
->quirks
& XHCI_HW_LPM_DISABLE
)) {
4098 /* Host supports BESL timeout instead of HIRD */
4099 if (udev
->usb2_hw_lpm_besl_capable
) {
4100 /* if device doesn't have a preferred BESL value use a
4101 * default one which works with mixed HIRD and BESL
4102 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4104 if ((field
& USB_BESL_SUPPORT
) &&
4105 (field
& USB_BESL_BASELINE_VALID
))
4106 hird
= USB_GET_BESL_BASELINE(field
);
4108 hird
= udev
->l1_params
.besl
;
4110 exit_latency
= xhci_besl_encoding
[hird
];
4111 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4113 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4114 * input context for link powermanagement evaluate
4115 * context commands. It is protected by hcd->bandwidth
4116 * mutex and is shared by all devices. We need to set
4117 * the max ext latency in USB 2 BESL LPM as well, so
4118 * use the same mutex and xhci_change_max_exit_latency()
4120 mutex_lock(hcd
->bandwidth_mutex
);
4121 ret
= xhci_change_max_exit_latency(xhci
, udev
,
4123 mutex_unlock(hcd
->bandwidth_mutex
);
4127 spin_lock_irqsave(&xhci
->lock
, flags
);
4129 hlpm_val
= xhci_calculate_usb2_hw_lpm_params(udev
);
4130 writel(hlpm_val
, hlpm_addr
);
4134 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4137 pm_val
&= ~PORT_HIRD_MASK
;
4138 pm_val
|= PORT_HIRD(hird
) | PORT_RWE
| PORT_L1DS(udev
->slot_id
);
4139 writel(pm_val
, pm_addr
);
4140 pm_val
= readl(pm_addr
);
4142 writel(pm_val
, pm_addr
);
4146 pm_val
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
| PORT_L1DS_MASK
);
4147 writel(pm_val
, pm_addr
);
4150 if (udev
->usb2_hw_lpm_besl_capable
) {
4151 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4152 mutex_lock(hcd
->bandwidth_mutex
);
4153 xhci_change_max_exit_latency(xhci
, udev
, 0);
4154 mutex_unlock(hcd
->bandwidth_mutex
);
4159 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4163 /* check if a usb2 port supports a given extened capability protocol
4164 * only USB2 ports extended protocol capability values are cached.
4165 * Return 1 if capability is supported
4167 static int xhci_check_usb2_port_capability(struct xhci_hcd
*xhci
, int port
,
4168 unsigned capability
)
4170 u32 port_offset
, port_count
;
4173 for (i
= 0; i
< xhci
->num_ext_caps
; i
++) {
4174 if (xhci
->ext_caps
[i
] & capability
) {
4175 /* port offsets starts at 1 */
4176 port_offset
= XHCI_EXT_PORT_OFF(xhci
->ext_caps
[i
]) - 1;
4177 port_count
= XHCI_EXT_PORT_COUNT(xhci
->ext_caps
[i
]);
4178 if (port
>= port_offset
&&
4179 port
< port_offset
+ port_count
)
4186 static int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4188 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4189 int portnum
= udev
->portnum
- 1;
4191 if (hcd
->speed
>= HCD_USB3
|| !xhci
->sw_lpm_support
||
4195 /* we only support lpm for non-hub device connected to root hub yet */
4196 if (!udev
->parent
|| udev
->parent
->parent
||
4197 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4200 if (xhci
->hw_lpm_support
== 1 &&
4201 xhci_check_usb2_port_capability(
4202 xhci
, portnum
, XHCI_HLC
)) {
4203 udev
->usb2_hw_lpm_capable
= 1;
4204 udev
->l1_params
.timeout
= XHCI_L1_TIMEOUT
;
4205 udev
->l1_params
.besl
= XHCI_DEFAULT_BESL
;
4206 if (xhci_check_usb2_port_capability(xhci
, portnum
,
4208 udev
->usb2_hw_lpm_besl_capable
= 1;
4214 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4216 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4217 static unsigned long long xhci_service_interval_to_ns(
4218 struct usb_endpoint_descriptor
*desc
)
4220 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4223 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4224 enum usb3_link_state state
)
4226 unsigned long long sel
;
4227 unsigned long long pel
;
4228 unsigned int max_sel_pel
;
4233 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4234 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4235 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4236 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4240 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4241 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4242 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4246 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4248 return USB3_LPM_DISABLED
;
4251 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4252 return USB3_LPM_DEVICE_INITIATED
;
4254 if (sel
> max_sel_pel
)
4255 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4256 "due to long SEL %llu ms\n",
4259 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4260 "due to long PEL %llu ms\n",
4262 return USB3_LPM_DISABLED
;
4265 /* The U1 timeout should be the maximum of the following values:
4266 * - For control endpoints, U1 system exit latency (SEL) * 3
4267 * - For bulk endpoints, U1 SEL * 5
4268 * - For interrupt endpoints:
4269 * - Notification EPs, U1 SEL * 3
4270 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4271 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4273 static unsigned long long xhci_calculate_intel_u1_timeout(
4274 struct usb_device
*udev
,
4275 struct usb_endpoint_descriptor
*desc
)
4277 unsigned long long timeout_ns
;
4281 ep_type
= usb_endpoint_type(desc
);
4283 case USB_ENDPOINT_XFER_CONTROL
:
4284 timeout_ns
= udev
->u1_params
.sel
* 3;
4286 case USB_ENDPOINT_XFER_BULK
:
4287 timeout_ns
= udev
->u1_params
.sel
* 5;
4289 case USB_ENDPOINT_XFER_INT
:
4290 intr_type
= usb_endpoint_interrupt_type(desc
);
4291 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4292 timeout_ns
= udev
->u1_params
.sel
* 3;
4295 /* Otherwise the calculation is the same as isoc eps */
4297 case USB_ENDPOINT_XFER_ISOC
:
4298 timeout_ns
= xhci_service_interval_to_ns(desc
);
4299 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4300 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4301 timeout_ns
= udev
->u1_params
.sel
* 2;
4310 /* Returns the hub-encoded U1 timeout value. */
4311 static u16
xhci_calculate_u1_timeout(struct xhci_hcd
*xhci
,
4312 struct usb_device
*udev
,
4313 struct usb_endpoint_descriptor
*desc
)
4315 unsigned long long timeout_ns
;
4317 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4318 timeout_ns
= xhci_calculate_intel_u1_timeout(udev
, desc
);
4320 timeout_ns
= udev
->u1_params
.sel
;
4322 /* The U1 timeout is encoded in 1us intervals.
4323 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4325 if (timeout_ns
== USB3_LPM_DISABLED
)
4328 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4330 /* If the necessary timeout value is bigger than what we can set in the
4331 * USB 3.0 hub, we have to disable hub-initiated U1.
4333 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4335 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4336 "due to long timeout %llu ms\n", timeout_ns
);
4337 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4340 /* The U2 timeout should be the maximum of:
4341 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4342 * - largest bInterval of any active periodic endpoint (to avoid going
4343 * into lower power link states between intervals).
4344 * - the U2 Exit Latency of the device
4346 static unsigned long long xhci_calculate_intel_u2_timeout(
4347 struct usb_device
*udev
,
4348 struct usb_endpoint_descriptor
*desc
)
4350 unsigned long long timeout_ns
;
4351 unsigned long long u2_del_ns
;
4353 timeout_ns
= 10 * 1000 * 1000;
4355 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4356 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4357 timeout_ns
= xhci_service_interval_to_ns(desc
);
4359 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4360 if (u2_del_ns
> timeout_ns
)
4361 timeout_ns
= u2_del_ns
;
4366 /* Returns the hub-encoded U2 timeout value. */
4367 static u16
xhci_calculate_u2_timeout(struct xhci_hcd
*xhci
,
4368 struct usb_device
*udev
,
4369 struct usb_endpoint_descriptor
*desc
)
4371 unsigned long long timeout_ns
;
4373 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4374 timeout_ns
= xhci_calculate_intel_u2_timeout(udev
, desc
);
4376 timeout_ns
= udev
->u2_params
.sel
;
4378 /* The U2 timeout is encoded in 256us intervals */
4379 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4380 /* If the necessary timeout value is bigger than what we can set in the
4381 * USB 3.0 hub, we have to disable hub-initiated U2.
4383 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4385 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4386 "due to long timeout %llu ms\n", timeout_ns
);
4387 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4390 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4391 struct usb_device
*udev
,
4392 struct usb_endpoint_descriptor
*desc
,
4393 enum usb3_link_state state
,
4396 if (state
== USB3_LPM_U1
)
4397 return xhci_calculate_u1_timeout(xhci
, udev
, desc
);
4398 else if (state
== USB3_LPM_U2
)
4399 return xhci_calculate_u2_timeout(xhci
, udev
, desc
);
4401 return USB3_LPM_DISABLED
;
4404 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4405 struct usb_device
*udev
,
4406 struct usb_endpoint_descriptor
*desc
,
4407 enum usb3_link_state state
,
4412 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4413 desc
, state
, timeout
);
4415 /* If we found we can't enable hub-initiated LPM, or
4416 * the U1 or U2 exit latency was too high to allow
4417 * device-initiated LPM as well, just stop searching.
4419 if (alt_timeout
== USB3_LPM_DISABLED
||
4420 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4421 *timeout
= alt_timeout
;
4424 if (alt_timeout
> *timeout
)
4425 *timeout
= alt_timeout
;
4429 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4430 struct usb_device
*udev
,
4431 struct usb_host_interface
*alt
,
4432 enum usb3_link_state state
,
4437 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4438 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4439 &alt
->endpoint
[j
].desc
, state
, timeout
))
4446 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4447 enum usb3_link_state state
)
4449 struct usb_device
*parent
;
4450 unsigned int num_hubs
;
4452 if (state
== USB3_LPM_U2
)
4455 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4456 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4457 parent
= parent
->parent
)
4463 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4464 " below second-tier hub.\n");
4465 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4466 "to decrease power consumption.\n");
4470 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4471 struct usb_device
*udev
,
4472 enum usb3_link_state state
)
4474 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4475 return xhci_check_intel_tier_policy(udev
, state
);
4480 /* Returns the U1 or U2 timeout that should be enabled.
4481 * If the tier check or timeout setting functions return with a non-zero exit
4482 * code, that means the timeout value has been finalized and we shouldn't look
4483 * at any more endpoints.
4485 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4486 struct usb_device
*udev
, enum usb3_link_state state
)
4488 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4489 struct usb_host_config
*config
;
4492 u16 timeout
= USB3_LPM_DISABLED
;
4494 if (state
== USB3_LPM_U1
)
4496 else if (state
== USB3_LPM_U2
)
4499 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4504 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4507 /* Gather some information about the currently installed configuration
4508 * and alternate interface settings.
4510 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4514 config
= udev
->actconfig
;
4518 for (i
= 0; i
< config
->desc
.bNumInterfaces
; i
++) {
4519 struct usb_driver
*driver
;
4520 struct usb_interface
*intf
= config
->interface
[i
];
4525 /* Check if any currently bound drivers want hub-initiated LPM
4528 if (intf
->dev
.driver
) {
4529 driver
= to_usb_driver(intf
->dev
.driver
);
4530 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4531 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4532 "at request of driver %s\n",
4533 state_name
, driver
->name
);
4534 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4538 /* Not sure how this could happen... */
4539 if (!intf
->cur_altsetting
)
4542 if (xhci_update_timeout_for_interface(xhci
, udev
,
4543 intf
->cur_altsetting
,
4550 static int calculate_max_exit_latency(struct usb_device
*udev
,
4551 enum usb3_link_state state_changed
,
4552 u16 hub_encoded_timeout
)
4554 unsigned long long u1_mel_us
= 0;
4555 unsigned long long u2_mel_us
= 0;
4556 unsigned long long mel_us
= 0;
4562 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4563 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4564 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4565 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4567 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4568 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4569 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4570 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4572 /* If U1 was already enabled and we're not disabling it,
4573 * or we're going to enable U1, account for the U1 max exit latency.
4575 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4577 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4578 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4580 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4582 if (u1_mel_us
> u2_mel_us
)
4586 /* xHCI host controller max exit latency field is only 16 bits wide. */
4587 if (mel_us
> MAX_EXIT
) {
4588 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4589 "is too big.\n", mel_us
);
4595 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4596 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4597 struct usb_device
*udev
, enum usb3_link_state state
)
4599 struct xhci_hcd
*xhci
;
4600 u16 hub_encoded_timeout
;
4604 xhci
= hcd_to_xhci(hcd
);
4605 /* The LPM timeout values are pretty host-controller specific, so don't
4606 * enable hub-initiated timeouts unless the vendor has provided
4607 * information about their timeout algorithm.
4609 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4610 !xhci
->devs
[udev
->slot_id
])
4611 return USB3_LPM_DISABLED
;
4613 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4614 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4616 /* Max Exit Latency is too big, disable LPM. */
4617 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4621 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4624 return hub_encoded_timeout
;
4627 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4628 struct usb_device
*udev
, enum usb3_link_state state
)
4630 struct xhci_hcd
*xhci
;
4633 xhci
= hcd_to_xhci(hcd
);
4634 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4635 !xhci
->devs
[udev
->slot_id
])
4638 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4639 return xhci_change_max_exit_latency(xhci
, udev
, mel
);
4641 #else /* CONFIG_PM */
4643 static int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4644 struct usb_device
*udev
, int enable
)
4649 static int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4654 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4655 struct usb_device
*udev
, enum usb3_link_state state
)
4657 return USB3_LPM_DISABLED
;
4660 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4661 struct usb_device
*udev
, enum usb3_link_state state
)
4665 #endif /* CONFIG_PM */
4667 /*-------------------------------------------------------------------------*/
4669 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4670 * internal data structures for the device.
4672 static int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4673 struct usb_tt
*tt
, gfp_t mem_flags
)
4675 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4676 struct xhci_virt_device
*vdev
;
4677 struct xhci_command
*config_cmd
;
4678 struct xhci_input_control_ctx
*ctrl_ctx
;
4679 struct xhci_slot_ctx
*slot_ctx
;
4680 unsigned long flags
;
4681 unsigned think_time
;
4684 /* Ignore root hubs */
4688 vdev
= xhci
->devs
[hdev
->slot_id
];
4690 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4694 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4698 ctrl_ctx
= xhci_get_input_control_ctx(config_cmd
->in_ctx
);
4700 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
4702 xhci_free_command(xhci
, config_cmd
);
4706 spin_lock_irqsave(&xhci
->lock
, flags
);
4707 if (hdev
->speed
== USB_SPEED_HIGH
&&
4708 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4709 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4710 xhci_free_command(xhci
, config_cmd
);
4711 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4715 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4716 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4717 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4718 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4720 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4721 * but it may be already set to 1 when setup an xHCI virtual
4722 * device, so clear it anyway.
4725 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4726 else if (hdev
->speed
== USB_SPEED_FULL
)
4727 slot_ctx
->dev_info
&= cpu_to_le32(~DEV_MTT
);
4729 if (xhci
->hci_version
> 0x95) {
4730 xhci_dbg(xhci
, "xHCI version %x needs hub "
4731 "TT think time and number of ports\n",
4732 (unsigned int) xhci
->hci_version
);
4733 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4734 /* Set TT think time - convert from ns to FS bit times.
4735 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4736 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4738 * xHCI 1.0: this field shall be 0 if the device is not a
4741 think_time
= tt
->think_time
;
4742 if (think_time
!= 0)
4743 think_time
= (think_time
/ 666) - 1;
4744 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4745 slot_ctx
->tt_info
|=
4746 cpu_to_le32(TT_THINK_TIME(think_time
));
4748 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4749 "TT think time or number of ports\n",
4750 (unsigned int) xhci
->hci_version
);
4752 slot_ctx
->dev_state
= 0;
4753 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4755 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4756 (xhci
->hci_version
> 0x95) ?
4757 "configure endpoint" : "evaluate context");
4759 /* Issue and wait for the configure endpoint or
4760 * evaluate context command.
4762 if (xhci
->hci_version
> 0x95)
4763 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4766 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4769 xhci_free_command(xhci
, config_cmd
);
4773 static int xhci_get_frame(struct usb_hcd
*hcd
)
4775 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4776 /* EHCI mods by the periodic size. Why? */
4777 return readl(&xhci
->run_regs
->microframe_index
) >> 3;
4780 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4782 struct xhci_hcd
*xhci
;
4784 * TODO: Check with DWC3 clients for sysdev according to
4787 struct device
*dev
= hcd
->self
.sysdev
;
4788 unsigned int minor_rev
;
4791 /* Accept arbitrarily long scatter-gather lists */
4792 hcd
->self
.sg_tablesize
= ~0;
4794 /* support to build packet from discontinuous buffers */
4795 hcd
->self
.no_sg_constraint
= 1;
4797 /* XHCI controllers don't stop the ep queue on short packets :| */
4798 hcd
->self
.no_stop_on_short
= 1;
4800 xhci
= hcd_to_xhci(hcd
);
4802 if (usb_hcd_is_primary_hcd(hcd
)) {
4803 xhci
->main_hcd
= hcd
;
4804 /* Mark the first roothub as being USB 2.0.
4805 * The xHCI driver will register the USB 3.0 roothub.
4807 hcd
->speed
= HCD_USB2
;
4808 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4810 * USB 2.0 roothub under xHCI has an integrated TT,
4811 * (rate matching hub) as opposed to having an OHCI/UHCI
4812 * companion controller.
4817 * Some 3.1 hosts return sbrn 0x30, use xhci supported protocol
4818 * minor revision instead of sbrn
4820 minor_rev
= xhci
->usb3_rhub
.min_rev
;
4822 hcd
->speed
= HCD_USB31
;
4823 hcd
->self
.root_hub
->speed
= USB_SPEED_SUPER_PLUS
;
4825 xhci_info(xhci
, "Host supports USB 3.%x %s SuperSpeed\n",
4827 minor_rev
? "Enhanced" : "");
4829 /* xHCI private pointer was set in xhci_pci_probe for the second
4830 * registered roothub.
4835 mutex_init(&xhci
->mutex
);
4836 xhci
->cap_regs
= hcd
->regs
;
4837 xhci
->op_regs
= hcd
->regs
+
4838 HC_LENGTH(readl(&xhci
->cap_regs
->hc_capbase
));
4839 xhci
->run_regs
= hcd
->regs
+
4840 (readl(&xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4841 /* Cache read-only capability registers */
4842 xhci
->hcs_params1
= readl(&xhci
->cap_regs
->hcs_params1
);
4843 xhci
->hcs_params2
= readl(&xhci
->cap_regs
->hcs_params2
);
4844 xhci
->hcs_params3
= readl(&xhci
->cap_regs
->hcs_params3
);
4845 xhci
->hcc_params
= readl(&xhci
->cap_regs
->hc_capbase
);
4846 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4847 xhci
->hcc_params
= readl(&xhci
->cap_regs
->hcc_params
);
4848 if (xhci
->hci_version
> 0x100)
4849 xhci
->hcc_params2
= readl(&xhci
->cap_regs
->hcc_params2
);
4850 xhci_print_registers(xhci
);
4852 xhci
->quirks
|= quirks
;
4854 get_quirks(dev
, xhci
);
4856 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4857 * success event after a short transfer. This quirk will ignore such
4860 if (xhci
->hci_version
> 0x96)
4861 xhci
->quirks
|= XHCI_SPURIOUS_SUCCESS
;
4863 /* Make sure the HC is halted. */
4864 retval
= xhci_halt(xhci
);
4868 xhci_dbg(xhci
, "Resetting HCD\n");
4869 /* Reset the internal HC memory state and registers. */
4870 retval
= xhci_reset(xhci
);
4873 xhci_dbg(xhci
, "Reset complete\n");
4876 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
4877 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
4878 * address memory pointers actually. So, this driver clears the AC64
4879 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
4880 * DMA_BIT_MASK(32)) in this xhci_gen_setup().
4882 if (xhci
->quirks
& XHCI_NO_64BIT_SUPPORT
)
4883 xhci
->hcc_params
&= ~BIT(0);
4885 /* Set dma_mask and coherent_dma_mask to 64-bits,
4886 * if xHC supports 64-bit addressing */
4887 if (HCC_64BIT_ADDR(xhci
->hcc_params
) &&
4888 !dma_set_mask(dev
, DMA_BIT_MASK(64))) {
4889 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4890 dma_set_coherent_mask(dev
, DMA_BIT_MASK(64));
4893 * This is to avoid error in cases where a 32-bit USB
4894 * controller is used on a 64-bit capable system.
4896 retval
= dma_set_mask(dev
, DMA_BIT_MASK(32));
4899 xhci_dbg(xhci
, "Enabling 32-bit DMA addresses.\n");
4900 dma_set_coherent_mask(dev
, DMA_BIT_MASK(32));
4903 xhci_dbg(xhci
, "Calling HCD init\n");
4904 /* Initialize HCD and host controller data structures. */
4905 retval
= xhci_init(hcd
);
4908 xhci_dbg(xhci
, "Called HCD init\n");
4910 xhci_info(xhci
, "hcc params 0x%08x hci version 0x%x quirks 0x%016llx\n",
4911 xhci
->hcc_params
, xhci
->hci_version
, xhci
->quirks
);
4915 EXPORT_SYMBOL_GPL(xhci_gen_setup
);
4917 static const struct hc_driver xhci_hc_driver
= {
4918 .description
= "xhci-hcd",
4919 .product_desc
= "xHCI Host Controller",
4920 .hcd_priv_size
= sizeof(struct xhci_hcd
),
4923 * generic hardware linkage
4926 .flags
= HCD_MEMORY
| HCD_USB3
| HCD_SHARED
,
4929 * basic lifecycle operations
4931 .reset
= NULL
, /* set in xhci_init_driver() */
4934 .shutdown
= xhci_shutdown
,
4937 * managing i/o requests and associated device resources
4939 .urb_enqueue
= xhci_urb_enqueue
,
4940 .urb_dequeue
= xhci_urb_dequeue
,
4941 .alloc_dev
= xhci_alloc_dev
,
4942 .free_dev
= xhci_free_dev
,
4943 .alloc_streams
= xhci_alloc_streams
,
4944 .free_streams
= xhci_free_streams
,
4945 .add_endpoint
= xhci_add_endpoint
,
4946 .drop_endpoint
= xhci_drop_endpoint
,
4947 .endpoint_reset
= xhci_endpoint_reset
,
4948 .check_bandwidth
= xhci_check_bandwidth
,
4949 .reset_bandwidth
= xhci_reset_bandwidth
,
4950 .address_device
= xhci_address_device
,
4951 .enable_device
= xhci_enable_device
,
4952 .update_hub_device
= xhci_update_hub_device
,
4953 .reset_device
= xhci_discover_or_reset_device
,
4956 * scheduling support
4958 .get_frame_number
= xhci_get_frame
,
4963 .hub_control
= xhci_hub_control
,
4964 .hub_status_data
= xhci_hub_status_data
,
4965 .bus_suspend
= xhci_bus_suspend
,
4966 .bus_resume
= xhci_bus_resume
,
4969 * call back when device connected and addressed
4971 .update_device
= xhci_update_device
,
4972 .set_usb2_hw_lpm
= xhci_set_usb2_hardware_lpm
,
4973 .enable_usb3_lpm_timeout
= xhci_enable_usb3_lpm_timeout
,
4974 .disable_usb3_lpm_timeout
= xhci_disable_usb3_lpm_timeout
,
4975 .find_raw_port_number
= xhci_find_raw_port_number
,
4978 void xhci_init_driver(struct hc_driver
*drv
,
4979 const struct xhci_driver_overrides
*over
)
4983 /* Copy the generic table to drv then apply the overrides */
4984 *drv
= xhci_hc_driver
;
4987 drv
->hcd_priv_size
+= over
->extra_priv_size
;
4989 drv
->reset
= over
->reset
;
4991 drv
->start
= over
->start
;
4994 EXPORT_SYMBOL_GPL(xhci_init_driver
);
4996 MODULE_DESCRIPTION(DRIVER_DESC
);
4997 MODULE_AUTHOR(DRIVER_AUTHOR
);
4998 MODULE_LICENSE("GPL");
5000 static int __init
xhci_hcd_init(void)
5003 * Check the compiler generated sizes of structures that must be laid
5004 * out in specific ways for hardware access.
5006 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
5007 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
5008 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
5009 /* xhci_device_control has eight fields, and also
5010 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5012 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
5013 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
5014 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
5015 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 8*32/8);
5016 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
5017 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5018 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
5023 xhci_debugfs_create_root();
5029 * If an init function is provided, an exit function must also be provided
5030 * to allow module unload.
5032 static void __exit
xhci_hcd_fini(void)
5034 xhci_debugfs_remove_root();
5037 module_init(xhci_hcd_init
);
5038 module_exit(xhci_hcd_fini
);