2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk
;
38 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
39 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 int handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
56 u32 mask
, u32 done
, int usec
)
61 result
= xhci_readl(xhci
, ptr
);
62 if (result
== ~(u32
)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd
*xhci
)
83 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
87 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
89 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd
*xhci
)
103 xhci_dbg(xhci
, "// Halt the HC\n");
106 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
107 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
109 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
110 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
112 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
118 * Set the run bit and wait for the host to be running.
120 static int xhci_start(struct xhci_hcd
*xhci
)
125 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
127 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
129 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
132 * Wait for the HCHalted Status bit to be 0 to indicate the host is
135 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
136 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
137 if (ret
== -ETIMEDOUT
)
138 xhci_err(xhci
, "Host took too long to start, "
139 "waited %u microseconds.\n",
142 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd
*xhci
)
159 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
160 if ((state
& STS_HALT
) == 0) {
161 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
165 xhci_dbg(xhci
, "// Reset the HC\n");
166 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
167 command
|= CMD_RESET
;
168 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
170 ret
= handshake(xhci
, &xhci
->op_regs
->command
,
171 CMD_RESET
, 0, 10 * 1000 * 1000);
175 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
177 * xHCI cannot write to any doorbells or operational registers other
178 * than status until the "Controller Not Ready" flag is cleared.
180 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
181 STS_CNR
, 0, 10 * 1000 * 1000);
183 for (i
= 0; i
< 2; ++i
) {
184 xhci
->bus_state
[i
].port_c_suspend
= 0;
185 xhci
->bus_state
[i
].suspended_ports
= 0;
186 xhci
->bus_state
[i
].resuming_ports
= 0;
193 static int xhci_free_msi(struct xhci_hcd
*xhci
)
197 if (!xhci
->msix_entries
)
200 for (i
= 0; i
< xhci
->msix_count
; i
++)
201 if (xhci
->msix_entries
[i
].vector
)
202 free_irq(xhci
->msix_entries
[i
].vector
,
210 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
213 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
215 ret
= pci_enable_msi(pdev
);
217 xhci_dbg(xhci
, "failed to allocate MSI entry\n");
221 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
222 0, "xhci_hcd", xhci_to_hcd(xhci
));
224 xhci_dbg(xhci
, "disable MSI interrupt\n");
225 pci_disable_msi(pdev
);
233 * free all IRQs request
235 static void xhci_free_irq(struct xhci_hcd
*xhci
)
237 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
240 /* return if using legacy interrupt */
241 if (xhci_to_hcd(xhci
)->irq
> 0)
244 ret
= xhci_free_msi(xhci
);
248 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
256 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
259 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
260 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
263 * calculate number of msi-x vectors supported.
264 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
265 * with max number of interrupters based on the xhci HCSPARAMS1.
266 * - num_online_cpus: maximum msi-x vectors per CPUs core.
267 * Add additional 1 vector to ensure always available interrupt.
269 xhci
->msix_count
= min(num_online_cpus() + 1,
270 HCS_MAX_INTRS(xhci
->hcs_params1
));
273 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
275 if (!xhci
->msix_entries
) {
276 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
280 for (i
= 0; i
< xhci
->msix_count
; i
++) {
281 xhci
->msix_entries
[i
].entry
= i
;
282 xhci
->msix_entries
[i
].vector
= 0;
285 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
287 xhci_dbg(xhci
, "Failed to enable MSI-X\n");
291 for (i
= 0; i
< xhci
->msix_count
; i
++) {
292 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
293 (irq_handler_t
)xhci_msi_irq
,
294 0, "xhci_hcd", xhci_to_hcd(xhci
));
299 hcd
->msix_enabled
= 1;
303 xhci_dbg(xhci
, "disable MSI-X interrupt\n");
305 pci_disable_msix(pdev
);
307 kfree(xhci
->msix_entries
);
308 xhci
->msix_entries
= NULL
;
312 /* Free any IRQs and disable MSI-X */
313 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
315 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
316 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
320 if (xhci
->msix_entries
) {
321 pci_disable_msix(pdev
);
322 kfree(xhci
->msix_entries
);
323 xhci
->msix_entries
= NULL
;
325 pci_disable_msi(pdev
);
328 hcd
->msix_enabled
= 0;
332 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
336 if (xhci
->msix_entries
) {
337 for (i
= 0; i
< xhci
->msix_count
; i
++)
338 synchronize_irq(xhci
->msix_entries
[i
].vector
);
342 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
344 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
345 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
349 * Some Fresco Logic host controllers advertise MSI, but fail to
350 * generate interrupts. Don't even try to enable MSI.
352 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
355 /* unregister the legacy interrupt */
357 free_irq(hcd
->irq
, hcd
);
360 ret
= xhci_setup_msix(xhci
);
362 /* fall back to msi*/
363 ret
= xhci_setup_msi(xhci
);
366 /* hcd->irq is 0, we have MSI */
370 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
374 /* fall back to legacy interrupt*/
375 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
376 hcd
->irq_descr
, hcd
);
378 xhci_err(xhci
, "request interrupt %d failed\n",
382 hcd
->irq
= pdev
->irq
;
388 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
393 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
397 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
403 static void compliance_mode_recovery(unsigned long arg
)
405 struct xhci_hcd
*xhci
;
410 xhci
= (struct xhci_hcd
*)arg
;
412 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
413 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
414 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
416 * Compliance Mode Detected. Letting USB Core
417 * handle the Warm Reset
419 xhci_dbg(xhci
, "Compliance Mode Detected->Port %d!\n",
421 xhci_dbg(xhci
, "Attempting Recovery routine!\n");
422 hcd
= xhci
->shared_hcd
;
424 if (hcd
->state
== HC_STATE_SUSPENDED
)
425 usb_hcd_resume_root_hub(hcd
);
427 usb_hcd_poll_rh_status(hcd
);
431 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
432 mod_timer(&xhci
->comp_mode_recovery_timer
,
433 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
437 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
438 * that causes ports behind that hardware to enter compliance mode sometimes.
439 * The quirk creates a timer that polls every 2 seconds the link state of
440 * each host controller's port and recovers it by issuing a Warm reset
441 * if Compliance mode is detected, otherwise the port will become "dead" (no
442 * device connections or disconnections will be detected anymore). Becasue no
443 * status event is generated when entering compliance mode (per xhci spec),
444 * this quirk is needed on systems that have the failing hardware installed.
446 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
448 xhci
->port_status_u0
= 0;
449 init_timer(&xhci
->comp_mode_recovery_timer
);
451 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
452 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
453 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
454 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
456 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
457 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
458 add_timer(&xhci
->comp_mode_recovery_timer
);
459 xhci_dbg(xhci
, "Compliance Mode Recovery Timer Initialized.\n");
463 * This function identifies the systems that have installed the SN65LVPE502CP
464 * USB3.0 re-driver and that need the Compliance Mode Quirk.
466 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
468 static bool compliance_mode_recovery_timer_quirk_check(void)
470 const char *dmi_product_name
, *dmi_sys_vendor
;
472 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
473 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
475 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
478 if (strstr(dmi_product_name
, "Z420") ||
479 strstr(dmi_product_name
, "Z620") ||
480 strstr(dmi_product_name
, "Z820"))
486 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
488 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
493 * Initialize memory for HCD and xHC (one-time init).
495 * Program the PAGESIZE register, initialize the device context array, create
496 * device contexts (?), set up a command ring segment (or two?), create event
497 * ring (one for now).
499 int xhci_init(struct usb_hcd
*hcd
)
501 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
504 xhci_dbg(xhci
, "xhci_init\n");
505 spin_lock_init(&xhci
->lock
);
506 if (xhci
->hci_version
== 0x95 && link_quirk
) {
507 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
508 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
510 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
512 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
513 xhci_dbg(xhci
, "Finished xhci_init\n");
515 /* Initializing Compliance Mode Recovery Data If Needed */
516 if (compliance_mode_recovery_timer_quirk_check()) {
517 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
518 compliance_mode_recovery_timer_init(xhci
);
524 /*-------------------------------------------------------------------------*/
527 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
528 static void xhci_event_ring_work(unsigned long arg
)
533 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
536 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
538 spin_lock_irqsave(&xhci
->lock
, flags
);
539 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
540 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
541 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
542 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
543 xhci_dbg(xhci
, "HW died, polling stopped.\n");
544 spin_unlock_irqrestore(&xhci
->lock
, flags
);
548 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
549 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
550 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
551 xhci
->error_bitmask
= 0;
552 xhci_dbg(xhci
, "Event ring:\n");
553 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
554 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
555 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
556 temp_64
&= ~ERST_PTR_MASK
;
557 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
558 xhci_dbg(xhci
, "Command ring:\n");
559 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
560 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
561 xhci_dbg_cmd_ptrs(xhci
);
562 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
565 for (j
= 0; j
< 31; ++j
) {
566 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
569 spin_unlock_irqrestore(&xhci
->lock
, flags
);
572 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
574 xhci_dbg(xhci
, "Quit polling the event ring.\n");
578 static int xhci_run_finished(struct xhci_hcd
*xhci
)
580 if (xhci_start(xhci
)) {
584 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
585 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
587 if (xhci
->quirks
& XHCI_NEC_HOST
)
588 xhci_ring_cmd_db(xhci
);
590 xhci_dbg(xhci
, "Finished xhci_run for USB3 roothub\n");
595 * Start the HC after it was halted.
597 * This function is called by the USB core when the HC driver is added.
598 * Its opposite is xhci_stop().
600 * xhci_init() must be called once before this function can be called.
601 * Reset the HC, enable device slot contexts, program DCBAAP, and
602 * set command ring pointer and event ring pointer.
604 * Setup MSI-X vectors and enable interrupts.
606 int xhci_run(struct usb_hcd
*hcd
)
611 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
613 /* Start the xHCI host controller running only after the USB 2.0 roothub
617 hcd
->uses_new_polling
= 1;
618 if (!usb_hcd_is_primary_hcd(hcd
))
619 return xhci_run_finished(xhci
);
621 xhci_dbg(xhci
, "xhci_run\n");
623 ret
= xhci_try_enable_msi(hcd
);
627 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
628 init_timer(&xhci
->event_ring_timer
);
629 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
630 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
631 /* Poll the event ring */
632 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
634 xhci_dbg(xhci
, "Setting event ring polling timer\n");
635 add_timer(&xhci
->event_ring_timer
);
638 xhci_dbg(xhci
, "Command ring memory map follows:\n");
639 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
640 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
641 xhci_dbg_cmd_ptrs(xhci
);
643 xhci_dbg(xhci
, "ERST memory map follows:\n");
644 xhci_dbg_erst(xhci
, &xhci
->erst
);
645 xhci_dbg(xhci
, "Event ring:\n");
646 xhci_debug_ring(xhci
, xhci
->event_ring
);
647 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
648 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
649 temp_64
&= ~ERST_PTR_MASK
;
650 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
652 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
653 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
654 temp
&= ~ER_IRQ_INTERVAL_MASK
;
656 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
658 /* Set the HCD state before we enable the irqs */
659 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
661 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
663 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
665 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
666 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
667 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
668 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
669 &xhci
->ir_set
->irq_pending
);
670 xhci_print_ir_set(xhci
, 0);
672 if (xhci
->quirks
& XHCI_NEC_HOST
)
673 xhci_queue_vendor_command(xhci
, 0, 0, 0,
674 TRB_TYPE(TRB_NEC_GET_FW
));
676 xhci_dbg(xhci
, "Finished xhci_run for USB2 roothub\n");
680 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
682 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
684 spin_lock_irq(&xhci
->lock
);
687 /* The shared_hcd is going to be deallocated shortly (the USB core only
688 * calls this function when allocation fails in usb_add_hcd(), or
689 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
691 xhci
->shared_hcd
= NULL
;
692 spin_unlock_irq(&xhci
->lock
);
698 * This function is called by the USB core when the HC driver is removed.
699 * Its opposite is xhci_run().
701 * Disable device contexts, disable IRQs, and quiesce the HC.
702 * Reset the HC, finish any completed transactions, and cleanup memory.
704 void xhci_stop(struct usb_hcd
*hcd
)
707 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
709 if (!usb_hcd_is_primary_hcd(hcd
)) {
710 xhci_only_stop_hcd(xhci
->shared_hcd
);
714 spin_lock_irq(&xhci
->lock
);
715 /* Make sure the xHC is halted for a USB3 roothub
716 * (xhci_stop() could be called as part of failed init).
720 spin_unlock_irq(&xhci
->lock
);
722 xhci_cleanup_msix(xhci
);
724 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
725 /* Tell the event ring poll function not to reschedule */
727 del_timer_sync(&xhci
->event_ring_timer
);
730 /* Deleting Compliance Mode Recovery Timer */
731 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
732 (!(xhci_all_ports_seen_u0(xhci
))))
733 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
735 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
738 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
739 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
740 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
741 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
742 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
743 &xhci
->ir_set
->irq_pending
);
744 xhci_print_ir_set(xhci
, 0);
746 xhci_dbg(xhci
, "cleaning up memory\n");
747 xhci_mem_cleanup(xhci
);
748 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
749 xhci_readl(xhci
, &xhci
->op_regs
->status
));
753 * Shutdown HC (not bus-specific)
755 * This is called when the machine is rebooting or halting. We assume that the
756 * machine will be powered off, and the HC's internal state will be reset.
757 * Don't bother to free memory.
759 * This will only ever be called with the main usb_hcd (the USB3 roothub).
761 void xhci_shutdown(struct usb_hcd
*hcd
)
763 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
765 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
766 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
768 spin_lock_irq(&xhci
->lock
);
770 spin_unlock_irq(&xhci
->lock
);
772 xhci_cleanup_msix(xhci
);
774 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
775 xhci_readl(xhci
, &xhci
->op_regs
->status
));
779 static void xhci_save_registers(struct xhci_hcd
*xhci
)
781 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
782 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
783 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
784 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
785 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
786 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
787 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
788 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
789 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
792 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
794 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
795 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
796 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
797 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
798 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
799 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
800 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
801 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
802 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
805 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
809 /* step 2: initialize command ring buffer */
810 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
811 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
812 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
813 xhci
->cmd_ring
->dequeue
) &
814 (u64
) ~CMD_RING_RSVD_BITS
) |
815 xhci
->cmd_ring
->cycle_state
;
816 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
817 (long unsigned long) val_64
);
818 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
822 * The whole command ring must be cleared to zero when we suspend the host.
824 * The host doesn't save the command ring pointer in the suspend well, so we
825 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
826 * aligned, because of the reserved bits in the command ring dequeue pointer
827 * register. Therefore, we can't just set the dequeue pointer back in the
828 * middle of the ring (TRBs are 16-byte aligned).
830 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
832 struct xhci_ring
*ring
;
833 struct xhci_segment
*seg
;
835 ring
= xhci
->cmd_ring
;
839 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
840 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
841 cpu_to_le32(~TRB_CYCLE
);
843 } while (seg
!= ring
->deq_seg
);
845 /* Reset the software enqueue and dequeue pointers */
846 ring
->deq_seg
= ring
->first_seg
;
847 ring
->dequeue
= ring
->first_seg
->trbs
;
848 ring
->enq_seg
= ring
->deq_seg
;
849 ring
->enqueue
= ring
->dequeue
;
851 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
853 * Ring is now zeroed, so the HW should look for change of ownership
854 * when the cycle bit is set to 1.
856 ring
->cycle_state
= 1;
859 * Reset the hardware dequeue pointer.
860 * Yes, this will need to be re-written after resume, but we're paranoid
861 * and want to make sure the hardware doesn't access bogus memory
862 * because, say, the BIOS or an SMI started the host without changing
863 * the command ring pointers.
865 xhci_set_cmd_ring_deq(xhci
);
869 * Stop HC (not bus-specific)
871 * This is called when the machine transition into S3/S4 mode.
874 int xhci_suspend(struct xhci_hcd
*xhci
)
877 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
880 spin_lock_irq(&xhci
->lock
);
881 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
882 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
883 /* step 1: stop endpoint */
884 /* skipped assuming that port suspend has done */
886 /* step 2: clear Run/Stop bit */
887 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
889 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
890 if (handshake(xhci
, &xhci
->op_regs
->status
,
891 STS_HALT
, STS_HALT
, 100*100)) {
892 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
893 spin_unlock_irq(&xhci
->lock
);
896 xhci_clear_command_ring(xhci
);
898 /* step 3: save registers */
899 xhci_save_registers(xhci
);
901 /* step 4: set CSS flag */
902 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
904 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
905 if (handshake(xhci
, &xhci
->op_regs
->status
, STS_SAVE
, 0, 10 * 1000)) {
906 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
907 spin_unlock_irq(&xhci
->lock
);
910 spin_unlock_irq(&xhci
->lock
);
913 * Deleting Compliance Mode Recovery Timer because the xHCI Host
914 * is about to be suspended.
916 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
917 (!(xhci_all_ports_seen_u0(xhci
)))) {
918 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
919 xhci_dbg(xhci
, "Compliance Mode Recovery Timer Deleted!\n");
922 /* step 5: remove core well power */
923 /* synchronize irq when using MSI-X */
924 xhci_msix_sync_irqs(xhci
);
930 * start xHC (not bus-specific)
932 * This is called when the machine transition from S3/S4 mode.
935 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
937 u32 command
, temp
= 0;
938 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
939 struct usb_hcd
*secondary_hcd
;
942 /* Wait a bit if either of the roothubs need to settle from the
943 * transition into bus suspend.
945 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
947 xhci
->bus_state
[1].next_statechange
))
950 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
951 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
953 spin_lock_irq(&xhci
->lock
);
954 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
958 /* step 1: restore register */
959 xhci_restore_registers(xhci
);
960 /* step 2: initialize command ring buffer */
961 xhci_set_cmd_ring_deq(xhci
);
962 /* step 3: restore state and start state*/
963 /* step 3: set CRS flag */
964 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
966 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
967 if (handshake(xhci
, &xhci
->op_regs
->status
,
968 STS_RESTORE
, 0, 10 * 1000)) {
969 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
970 spin_unlock_irq(&xhci
->lock
);
973 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
976 /* If restore operation fails, re-initialize the HC during resume */
977 if ((temp
& STS_SRE
) || hibernated
) {
978 /* Let the USB core know _both_ roothubs lost power. */
979 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
980 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
982 xhci_dbg(xhci
, "Stop HCD\n");
985 spin_unlock_irq(&xhci
->lock
);
986 xhci_cleanup_msix(xhci
);
988 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
989 /* Tell the event ring poll function not to reschedule */
991 del_timer_sync(&xhci
->event_ring_timer
);
994 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
995 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
996 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
997 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
998 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
999 &xhci
->ir_set
->irq_pending
);
1000 xhci_print_ir_set(xhci
, 0);
1002 xhci_dbg(xhci
, "cleaning up memory\n");
1003 xhci_mem_cleanup(xhci
);
1004 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1005 xhci_readl(xhci
, &xhci
->op_regs
->status
));
1007 /* USB core calls the PCI reinit and start functions twice:
1008 * first with the primary HCD, and then with the secondary HCD.
1009 * If we don't do the same, the host will never be started.
1011 if (!usb_hcd_is_primary_hcd(hcd
))
1012 secondary_hcd
= hcd
;
1014 secondary_hcd
= xhci
->shared_hcd
;
1016 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1017 retval
= xhci_init(hcd
->primary_hcd
);
1020 xhci_dbg(xhci
, "Start the primary HCD\n");
1021 retval
= xhci_run(hcd
->primary_hcd
);
1023 xhci_dbg(xhci
, "Start the secondary HCD\n");
1024 retval
= xhci_run(secondary_hcd
);
1026 hcd
->state
= HC_STATE_SUSPENDED
;
1027 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1031 /* step 4: set Run/Stop bit */
1032 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1034 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1035 handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1038 /* step 5: walk topology and initialize portsc,
1039 * portpmsc and portli
1041 /* this is done in bus_resume */
1043 /* step 6: restart each of the previously
1044 * Running endpoints by ringing their doorbells
1047 spin_unlock_irq(&xhci
->lock
);
1051 usb_hcd_resume_root_hub(hcd
);
1052 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1056 * If system is subject to the Quirk, Compliance Mode Timer needs to
1057 * be re-initialized Always after a system resume. Ports are subject
1058 * to suffer the Compliance Mode issue again. It doesn't matter if
1059 * ports have entered previously to U0 before system's suspension.
1061 if (xhci
->quirks
& XHCI_COMP_MODE_QUIRK
)
1062 compliance_mode_recovery_timer_init(xhci
);
1066 #endif /* CONFIG_PM */
1068 /*-------------------------------------------------------------------------*/
1071 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1072 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1073 * value to right shift 1 for the bitmask.
1075 * Index = (epnum * 2) + direction - 1,
1076 * where direction = 0 for OUT, 1 for IN.
1077 * For control endpoints, the IN index is used (OUT index is unused), so
1078 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1080 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1083 if (usb_endpoint_xfer_control(desc
))
1084 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1086 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1087 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1091 /* Find the flag for this endpoint (for use in the control context). Use the
1092 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1095 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1097 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1100 /* Find the flag for this endpoint (for use in the control context). Use the
1101 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1104 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1106 return 1 << (ep_index
+ 1);
1109 /* Compute the last valid endpoint context index. Basically, this is the
1110 * endpoint index plus one. For slot contexts with more than valid endpoint,
1111 * we find the most significant bit set in the added contexts flags.
1112 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1113 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1115 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1117 return fls(added_ctxs
) - 1;
1120 /* Returns 1 if the arguments are OK;
1121 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1123 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1124 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1126 struct xhci_hcd
*xhci
;
1127 struct xhci_virt_device
*virt_dev
;
1129 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1130 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
1134 if (!udev
->parent
) {
1135 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
1140 xhci
= hcd_to_xhci(hcd
);
1141 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1144 if (check_virt_dev
) {
1145 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1146 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
1151 virt_dev
= xhci
->devs
[udev
->slot_id
];
1152 if (virt_dev
->udev
!= udev
) {
1153 printk(KERN_DEBUG
"xHCI %s called with udev and "
1154 "virt_dev does not match\n", func
);
1162 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1163 struct usb_device
*udev
, struct xhci_command
*command
,
1164 bool ctx_change
, bool must_succeed
);
1167 * Full speed devices may have a max packet size greater than 8 bytes, but the
1168 * USB core doesn't know that until it reads the first 8 bytes of the
1169 * descriptor. If the usb_device's max packet size changes after that point,
1170 * we need to issue an evaluate context command and wait on it.
1172 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1173 unsigned int ep_index
, struct urb
*urb
)
1175 struct xhci_container_ctx
*in_ctx
;
1176 struct xhci_container_ctx
*out_ctx
;
1177 struct xhci_input_control_ctx
*ctrl_ctx
;
1178 struct xhci_ep_ctx
*ep_ctx
;
1179 int max_packet_size
;
1180 int hw_max_packet_size
;
1183 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1184 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1185 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1186 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1187 if (hw_max_packet_size
!= max_packet_size
) {
1188 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
1189 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
1191 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
1192 hw_max_packet_size
);
1193 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
1195 /* Set up the modified control endpoint 0 */
1196 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1197 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1198 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1199 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1200 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1201 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1203 /* Set up the input context flags for the command */
1204 /* FIXME: This won't work if a non-default control endpoint
1205 * changes max packet sizes.
1207 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1208 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1209 ctrl_ctx
->drop_flags
= 0;
1211 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1212 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1213 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1214 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1216 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1219 /* Clean up the input context for later use by bandwidth
1222 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1228 * non-error returns are a promise to giveback() the urb later
1229 * we drop ownership so next owner (or urb unlink) can get it
1231 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1233 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1234 struct xhci_td
*buffer
;
1235 unsigned long flags
;
1237 unsigned int slot_id
, ep_index
;
1238 struct urb_priv
*urb_priv
;
1241 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1242 true, true, __func__
) <= 0)
1245 slot_id
= urb
->dev
->slot_id
;
1246 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1248 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1249 if (!in_interrupt())
1250 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1255 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1256 size
= urb
->number_of_packets
;
1260 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1261 size
* sizeof(struct xhci_td
*), mem_flags
);
1265 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1271 for (i
= 0; i
< size
; i
++) {
1272 urb_priv
->td
[i
] = buffer
;
1276 urb_priv
->length
= size
;
1277 urb_priv
->td_cnt
= 0;
1278 urb
->hcpriv
= urb_priv
;
1280 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1281 /* Check to see if the max packet size for the default control
1282 * endpoint changed during FS device enumeration
1284 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1285 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1288 xhci_urb_free_priv(xhci
, urb_priv
);
1294 /* We have a spinlock and interrupts disabled, so we must pass
1295 * atomic context to this function, which may allocate memory.
1297 spin_lock_irqsave(&xhci
->lock
, flags
);
1298 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1300 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1304 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1305 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1306 spin_lock_irqsave(&xhci
->lock
, flags
);
1307 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1309 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1310 EP_GETTING_STREAMS
) {
1311 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1312 "is transitioning to using streams.\n");
1314 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1315 EP_GETTING_NO_STREAMS
) {
1316 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1317 "is transitioning to "
1318 "not having streams.\n");
1321 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1326 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1327 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1328 spin_lock_irqsave(&xhci
->lock
, flags
);
1329 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1331 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1335 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1337 spin_lock_irqsave(&xhci
->lock
, flags
);
1338 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1340 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1344 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1349 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1350 "non-responsive xHCI host.\n",
1351 urb
->ep
->desc
.bEndpointAddress
, urb
);
1354 xhci_urb_free_priv(xhci
, urb_priv
);
1356 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1360 /* Get the right ring for the given URB.
1361 * If the endpoint supports streams, boundary check the URB's stream ID.
1362 * If the endpoint doesn't support streams, return the singular endpoint ring.
1364 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1367 unsigned int slot_id
;
1368 unsigned int ep_index
;
1369 unsigned int stream_id
;
1370 struct xhci_virt_ep
*ep
;
1372 slot_id
= urb
->dev
->slot_id
;
1373 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1374 stream_id
= urb
->stream_id
;
1375 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1376 /* Common case: no streams */
1377 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1380 if (stream_id
== 0) {
1382 "WARN: Slot ID %u, ep index %u has streams, "
1383 "but URB has no stream ID.\n",
1388 if (stream_id
< ep
->stream_info
->num_streams
)
1389 return ep
->stream_info
->stream_rings
[stream_id
];
1392 "WARN: Slot ID %u, ep index %u has "
1393 "stream IDs 1 to %u allocated, "
1394 "but stream ID %u is requested.\n",
1396 ep
->stream_info
->num_streams
- 1,
1402 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1403 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1404 * should pick up where it left off in the TD, unless a Set Transfer Ring
1405 * Dequeue Pointer is issued.
1407 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1408 * the ring. Since the ring is a contiguous structure, they can't be physically
1409 * removed. Instead, there are two options:
1411 * 1) If the HC is in the middle of processing the URB to be canceled, we
1412 * simply move the ring's dequeue pointer past those TRBs using the Set
1413 * Transfer Ring Dequeue Pointer command. This will be the common case,
1414 * when drivers timeout on the last submitted URB and attempt to cancel.
1416 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1417 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1418 * HC will need to invalidate the any TRBs it has cached after the stop
1419 * endpoint command, as noted in the xHCI 0.95 errata.
1421 * 3) The TD may have completed by the time the Stop Endpoint Command
1422 * completes, so software needs to handle that case too.
1424 * This function should protect against the TD enqueueing code ringing the
1425 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1426 * It also needs to account for multiple cancellations on happening at the same
1427 * time for the same endpoint.
1429 * Note that this function can be called in any context, or so says
1430 * usb_hcd_unlink_urb()
1432 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1434 unsigned long flags
;
1437 struct xhci_hcd
*xhci
;
1438 struct urb_priv
*urb_priv
;
1440 unsigned int ep_index
;
1441 struct xhci_ring
*ep_ring
;
1442 struct xhci_virt_ep
*ep
;
1444 xhci
= hcd_to_xhci(hcd
);
1445 spin_lock_irqsave(&xhci
->lock
, flags
);
1446 /* Make sure the URB hasn't completed or been unlinked already */
1447 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1448 if (ret
|| !urb
->hcpriv
)
1450 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1451 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1452 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1453 urb_priv
= urb
->hcpriv
;
1454 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1455 td
= urb_priv
->td
[i
];
1456 if (!list_empty(&td
->td_list
))
1457 list_del_init(&td
->td_list
);
1458 if (!list_empty(&td
->cancelled_td_list
))
1459 list_del_init(&td
->cancelled_td_list
);
1462 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1463 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1464 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1465 xhci_urb_free_priv(xhci
, urb_priv
);
1468 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1469 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1470 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1471 "non-responsive xHCI host.\n",
1472 urb
->ep
->desc
.bEndpointAddress
, urb
);
1473 /* Let the stop endpoint command watchdog timer (which set this
1474 * state) finish cleaning up the endpoint TD lists. We must
1475 * have caught it in the middle of dropping a lock and giving
1481 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1482 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1483 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1489 urb_priv
= urb
->hcpriv
;
1490 i
= urb_priv
->td_cnt
;
1491 if (i
< urb_priv
->length
)
1492 xhci_dbg(xhci
, "Cancel URB %p, dev %s, ep 0x%x, "
1493 "starting at offset 0x%llx\n",
1494 urb
, urb
->dev
->devpath
,
1495 urb
->ep
->desc
.bEndpointAddress
,
1496 (unsigned long long) xhci_trb_virt_to_dma(
1497 urb_priv
->td
[i
]->start_seg
,
1498 urb_priv
->td
[i
]->first_trb
));
1500 for (; i
< urb_priv
->length
; i
++) {
1501 td
= urb_priv
->td
[i
];
1502 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1505 /* Queue a stop endpoint command, but only if this is
1506 * the first cancellation to be handled.
1508 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1509 ep
->ep_state
|= EP_HALT_PENDING
;
1510 ep
->stop_cmds_pending
++;
1511 ep
->stop_cmd_timer
.expires
= jiffies
+
1512 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1513 add_timer(&ep
->stop_cmd_timer
);
1514 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1515 xhci_ring_cmd_db(xhci
);
1518 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1522 /* Drop an endpoint from a new bandwidth configuration for this device.
1523 * Only one call to this function is allowed per endpoint before
1524 * check_bandwidth() or reset_bandwidth() must be called.
1525 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1526 * add the endpoint to the schedule with possibly new parameters denoted by a
1527 * different endpoint descriptor in usb_host_endpoint.
1528 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1531 * The USB core will not allow URBs to be queued to an endpoint that is being
1532 * disabled, so there's no need for mutual exclusion to protect
1533 * the xhci->devs[slot_id] structure.
1535 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1536 struct usb_host_endpoint
*ep
)
1538 struct xhci_hcd
*xhci
;
1539 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1540 struct xhci_input_control_ctx
*ctrl_ctx
;
1541 struct xhci_slot_ctx
*slot_ctx
;
1542 unsigned int last_ctx
;
1543 unsigned int ep_index
;
1544 struct xhci_ep_ctx
*ep_ctx
;
1546 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1549 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1552 xhci
= hcd_to_xhci(hcd
);
1553 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1556 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1557 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1558 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1559 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1560 __func__
, drop_flag
);
1564 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1565 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1566 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1567 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1568 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1569 /* If the HC already knows the endpoint is disabled,
1570 * or the HCD has noted it is disabled, ignore this request
1572 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1573 cpu_to_le32(EP_STATE_DISABLED
)) ||
1574 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1575 xhci_get_endpoint_flag(&ep
->desc
)) {
1576 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1581 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1582 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1584 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1585 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1587 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1588 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1589 /* Update the last valid endpoint context, if we deleted the last one */
1590 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1591 LAST_CTX(last_ctx
)) {
1592 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1593 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1595 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1597 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1599 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1600 (unsigned int) ep
->desc
.bEndpointAddress
,
1602 (unsigned int) new_drop_flags
,
1603 (unsigned int) new_add_flags
,
1604 (unsigned int) new_slot_info
);
1608 /* Add an endpoint to a new possible bandwidth configuration for this device.
1609 * Only one call to this function is allowed per endpoint before
1610 * check_bandwidth() or reset_bandwidth() must be called.
1611 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1612 * add the endpoint to the schedule with possibly new parameters denoted by a
1613 * different endpoint descriptor in usb_host_endpoint.
1614 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1617 * The USB core will not allow URBs to be queued to an endpoint until the
1618 * configuration or alt setting is installed in the device, so there's no need
1619 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1621 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1622 struct usb_host_endpoint
*ep
)
1624 struct xhci_hcd
*xhci
;
1625 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1626 unsigned int ep_index
;
1627 struct xhci_ep_ctx
*ep_ctx
;
1628 struct xhci_slot_ctx
*slot_ctx
;
1629 struct xhci_input_control_ctx
*ctrl_ctx
;
1631 unsigned int last_ctx
;
1632 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1633 struct xhci_virt_device
*virt_dev
;
1636 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1638 /* So we won't queue a reset ep command for a root hub */
1642 xhci
= hcd_to_xhci(hcd
);
1643 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1646 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1647 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1648 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1649 /* FIXME when we have to issue an evaluate endpoint command to
1650 * deal with ep0 max packet size changing once we get the
1653 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1654 __func__
, added_ctxs
);
1658 virt_dev
= xhci
->devs
[udev
->slot_id
];
1659 in_ctx
= virt_dev
->in_ctx
;
1660 out_ctx
= virt_dev
->out_ctx
;
1661 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1662 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1663 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1665 /* If this endpoint is already in use, and the upper layers are trying
1666 * to add it again without dropping it, reject the addition.
1668 if (virt_dev
->eps
[ep_index
].ring
&&
1669 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1670 xhci_get_endpoint_flag(&ep
->desc
))) {
1671 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1672 "without dropping it.\n",
1673 (unsigned int) ep
->desc
.bEndpointAddress
);
1677 /* If the HCD has already noted the endpoint is enabled,
1678 * ignore this request.
1680 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1681 xhci_get_endpoint_flag(&ep
->desc
)) {
1682 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1688 * Configuration and alternate setting changes must be done in
1689 * process context, not interrupt context (or so documenation
1690 * for usb_set_interface() and usb_set_configuration() claim).
1692 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1693 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1694 __func__
, ep
->desc
.bEndpointAddress
);
1698 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1699 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1701 /* If xhci_endpoint_disable() was called for this endpoint, but the
1702 * xHC hasn't been notified yet through the check_bandwidth() call,
1703 * this re-adds a new state for the endpoint from the new endpoint
1704 * descriptors. We must drop and re-add this endpoint, so we leave the
1707 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1709 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1710 /* Update the last valid endpoint context, if we just added one past */
1711 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1712 LAST_CTX(last_ctx
)) {
1713 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1714 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1716 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1718 /* Store the usb_device pointer for later use */
1721 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1722 (unsigned int) ep
->desc
.bEndpointAddress
,
1724 (unsigned int) new_drop_flags
,
1725 (unsigned int) new_add_flags
,
1726 (unsigned int) new_slot_info
);
1730 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1732 struct xhci_input_control_ctx
*ctrl_ctx
;
1733 struct xhci_ep_ctx
*ep_ctx
;
1734 struct xhci_slot_ctx
*slot_ctx
;
1737 /* When a device's add flag and drop flag are zero, any subsequent
1738 * configure endpoint command will leave that endpoint's state
1739 * untouched. Make sure we don't leave any old state in the input
1740 * endpoint contexts.
1742 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1743 ctrl_ctx
->drop_flags
= 0;
1744 ctrl_ctx
->add_flags
= 0;
1745 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1746 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1747 /* Endpoint 0 is always valid */
1748 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1749 for (i
= 1; i
< 31; ++i
) {
1750 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1751 ep_ctx
->ep_info
= 0;
1752 ep_ctx
->ep_info2
= 0;
1754 ep_ctx
->tx_info
= 0;
1758 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1759 struct usb_device
*udev
, u32
*cmd_status
)
1763 switch (*cmd_status
) {
1765 dev_warn(&udev
->dev
, "Not enough host controller resources "
1766 "for new device state.\n");
1768 /* FIXME: can we allocate more resources for the HC? */
1771 case COMP_2ND_BW_ERR
:
1772 dev_warn(&udev
->dev
, "Not enough bandwidth "
1773 "for new device state.\n");
1775 /* FIXME: can we go back to the old state? */
1778 /* the HCD set up something wrong */
1779 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1781 "and endpoint is not disabled.\n");
1785 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1786 "configure command.\n");
1790 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1794 xhci_err(xhci
, "ERROR: unexpected command completion "
1795 "code 0x%x.\n", *cmd_status
);
1802 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1803 struct usb_device
*udev
, u32
*cmd_status
)
1806 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1808 switch (*cmd_status
) {
1810 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1811 "context command.\n");
1815 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1816 "evaluate context command.\n");
1817 case COMP_CTX_STATE
:
1818 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1819 "evaluate context command.\n");
1820 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1824 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
1825 "context command.\n");
1829 /* Max Exit Latency too large error */
1830 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1834 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
1838 xhci_err(xhci
, "ERROR: unexpected command completion "
1839 "code 0x%x.\n", *cmd_status
);
1846 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1847 struct xhci_container_ctx
*in_ctx
)
1849 struct xhci_input_control_ctx
*ctrl_ctx
;
1850 u32 valid_add_flags
;
1851 u32 valid_drop_flags
;
1853 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1854 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1855 * (bit 1). The default control endpoint is added during the Address
1856 * Device command and is never removed until the slot is disabled.
1858 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1859 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1861 /* Use hweight32 to count the number of ones in the add flags, or
1862 * number of endpoints added. Don't count endpoints that are changed
1863 * (both added and dropped).
1865 return hweight32(valid_add_flags
) -
1866 hweight32(valid_add_flags
& valid_drop_flags
);
1869 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1870 struct xhci_container_ctx
*in_ctx
)
1872 struct xhci_input_control_ctx
*ctrl_ctx
;
1873 u32 valid_add_flags
;
1874 u32 valid_drop_flags
;
1876 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1877 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1878 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1880 return hweight32(valid_drop_flags
) -
1881 hweight32(valid_add_flags
& valid_drop_flags
);
1885 * We need to reserve the new number of endpoints before the configure endpoint
1886 * command completes. We can't subtract the dropped endpoints from the number
1887 * of active endpoints until the command completes because we can oversubscribe
1888 * the host in this case:
1890 * - the first configure endpoint command drops more endpoints than it adds
1891 * - a second configure endpoint command that adds more endpoints is queued
1892 * - the first configure endpoint command fails, so the config is unchanged
1893 * - the second command may succeed, even though there isn't enough resources
1895 * Must be called with xhci->lock held.
1897 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1898 struct xhci_container_ctx
*in_ctx
)
1902 added_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1903 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1904 xhci_dbg(xhci
, "Not enough ep ctxs: "
1905 "%u active, need to add %u, limit is %u.\n",
1906 xhci
->num_active_eps
, added_eps
,
1907 xhci
->limit_active_eps
);
1910 xhci
->num_active_eps
+= added_eps
;
1911 xhci_dbg(xhci
, "Adding %u ep ctxs, %u now active.\n", added_eps
,
1912 xhci
->num_active_eps
);
1917 * The configure endpoint was failed by the xHC for some other reason, so we
1918 * need to revert the resources that failed configuration would have used.
1920 * Must be called with xhci->lock held.
1922 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1923 struct xhci_container_ctx
*in_ctx
)
1927 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1928 xhci
->num_active_eps
-= num_failed_eps
;
1929 xhci_dbg(xhci
, "Removing %u failed ep ctxs, %u now active.\n",
1931 xhci
->num_active_eps
);
1935 * Now that the command has completed, clean up the active endpoint count by
1936 * subtracting out the endpoints that were dropped (but not changed).
1938 * Must be called with xhci->lock held.
1940 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1941 struct xhci_container_ctx
*in_ctx
)
1943 u32 num_dropped_eps
;
1945 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, in_ctx
);
1946 xhci
->num_active_eps
-= num_dropped_eps
;
1947 if (num_dropped_eps
)
1948 xhci_dbg(xhci
, "Removing %u dropped ep ctxs, %u now active.\n",
1950 xhci
->num_active_eps
);
1953 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
1955 switch (udev
->speed
) {
1957 case USB_SPEED_FULL
:
1959 case USB_SPEED_HIGH
:
1961 case USB_SPEED_SUPER
:
1963 case USB_SPEED_UNKNOWN
:
1964 case USB_SPEED_WIRELESS
:
1966 /* Should never happen */
1972 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
1974 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
1976 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
1981 /* If we are changing a LS/FS device under a HS hub,
1982 * make sure (if we are activating a new TT) that the HS bus has enough
1983 * bandwidth for this new TT.
1985 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
1986 struct xhci_virt_device
*virt_dev
,
1989 struct xhci_interval_bw_table
*bw_table
;
1990 struct xhci_tt_bw_info
*tt_info
;
1992 /* Find the bandwidth table for the root port this TT is attached to. */
1993 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
1994 tt_info
= virt_dev
->tt_info
;
1995 /* If this TT already had active endpoints, the bandwidth for this TT
1996 * has already been added. Removing all periodic endpoints (and thus
1997 * making the TT enactive) will only decrease the bandwidth used.
2001 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2002 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2006 /* Not sure why we would have no new active endpoints...
2008 * Maybe because of an Evaluate Context change for a hub update or a
2009 * control endpoint 0 max packet size change?
2010 * FIXME: skip the bandwidth calculation in that case.
2015 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2016 struct xhci_virt_device
*virt_dev
)
2018 unsigned int bw_reserved
;
2020 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2021 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2024 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2025 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2032 * This algorithm is a very conservative estimate of the worst-case scheduling
2033 * scenario for any one interval. The hardware dynamically schedules the
2034 * packets, so we can't tell which microframe could be the limiting factor in
2035 * the bandwidth scheduling. This only takes into account periodic endpoints.
2037 * Obviously, we can't solve an NP complete problem to find the minimum worst
2038 * case scenario. Instead, we come up with an estimate that is no less than
2039 * the worst case bandwidth used for any one microframe, but may be an
2042 * We walk the requirements for each endpoint by interval, starting with the
2043 * smallest interval, and place packets in the schedule where there is only one
2044 * possible way to schedule packets for that interval. In order to simplify
2045 * this algorithm, we record the largest max packet size for each interval, and
2046 * assume all packets will be that size.
2048 * For interval 0, we obviously must schedule all packets for each interval.
2049 * The bandwidth for interval 0 is just the amount of data to be transmitted
2050 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2051 * the number of packets).
2053 * For interval 1, we have two possible microframes to schedule those packets
2054 * in. For this algorithm, if we can schedule the same number of packets for
2055 * each possible scheduling opportunity (each microframe), we will do so. The
2056 * remaining number of packets will be saved to be transmitted in the gaps in
2057 * the next interval's scheduling sequence.
2059 * As we move those remaining packets to be scheduled with interval 2 packets,
2060 * we have to double the number of remaining packets to transmit. This is
2061 * because the intervals are actually powers of 2, and we would be transmitting
2062 * the previous interval's packets twice in this interval. We also have to be
2063 * sure that when we look at the largest max packet size for this interval, we
2064 * also look at the largest max packet size for the remaining packets and take
2065 * the greater of the two.
2067 * The algorithm continues to evenly distribute packets in each scheduling
2068 * opportunity, and push the remaining packets out, until we get to the last
2069 * interval. Then those packets and their associated overhead are just added
2070 * to the bandwidth used.
2072 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2073 struct xhci_virt_device
*virt_dev
,
2076 unsigned int bw_reserved
;
2077 unsigned int max_bandwidth
;
2078 unsigned int bw_used
;
2079 unsigned int block_size
;
2080 struct xhci_interval_bw_table
*bw_table
;
2081 unsigned int packet_size
= 0;
2082 unsigned int overhead
= 0;
2083 unsigned int packets_transmitted
= 0;
2084 unsigned int packets_remaining
= 0;
2087 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2088 return xhci_check_ss_bw(xhci
, virt_dev
);
2090 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2091 max_bandwidth
= HS_BW_LIMIT
;
2092 /* Convert percent of bus BW reserved to blocks reserved */
2093 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2095 max_bandwidth
= FS_BW_LIMIT
;
2096 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2099 bw_table
= virt_dev
->bw_table
;
2100 /* We need to translate the max packet size and max ESIT payloads into
2101 * the units the hardware uses.
2103 block_size
= xhci_get_block_size(virt_dev
->udev
);
2105 /* If we are manipulating a LS/FS device under a HS hub, double check
2106 * that the HS bus has enough bandwidth if we are activing a new TT.
2108 if (virt_dev
->tt_info
) {
2109 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2110 virt_dev
->real_port
);
2111 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2112 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2113 "newly activated TT.\n");
2116 xhci_dbg(xhci
, "Recalculating BW for TT slot %u port %u\n",
2117 virt_dev
->tt_info
->slot_id
,
2118 virt_dev
->tt_info
->ttport
);
2120 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2121 virt_dev
->real_port
);
2124 /* Add in how much bandwidth will be used for interval zero, or the
2125 * rounded max ESIT payload + number of packets * largest overhead.
2127 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2128 bw_table
->interval_bw
[0].num_packets
*
2129 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2131 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2132 unsigned int bw_added
;
2133 unsigned int largest_mps
;
2134 unsigned int interval_overhead
;
2137 * How many packets could we transmit in this interval?
2138 * If packets didn't fit in the previous interval, we will need
2139 * to transmit that many packets twice within this interval.
2141 packets_remaining
= 2 * packets_remaining
+
2142 bw_table
->interval_bw
[i
].num_packets
;
2144 /* Find the largest max packet size of this or the previous
2147 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2150 struct xhci_virt_ep
*virt_ep
;
2151 struct list_head
*ep_entry
;
2153 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2154 virt_ep
= list_entry(ep_entry
,
2155 struct xhci_virt_ep
, bw_endpoint_list
);
2156 /* Convert to blocks, rounding up */
2157 largest_mps
= DIV_ROUND_UP(
2158 virt_ep
->bw_info
.max_packet_size
,
2161 if (largest_mps
> packet_size
)
2162 packet_size
= largest_mps
;
2164 /* Use the larger overhead of this or the previous interval. */
2165 interval_overhead
= xhci_get_largest_overhead(
2166 &bw_table
->interval_bw
[i
]);
2167 if (interval_overhead
> overhead
)
2168 overhead
= interval_overhead
;
2170 /* How many packets can we evenly distribute across
2171 * (1 << (i + 1)) possible scheduling opportunities?
2173 packets_transmitted
= packets_remaining
>> (i
+ 1);
2175 /* Add in the bandwidth used for those scheduled packets */
2176 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2178 /* How many packets do we have remaining to transmit? */
2179 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2181 /* What largest max packet size should those packets have? */
2182 /* If we've transmitted all packets, don't carry over the
2183 * largest packet size.
2185 if (packets_remaining
== 0) {
2188 } else if (packets_transmitted
> 0) {
2189 /* Otherwise if we do have remaining packets, and we've
2190 * scheduled some packets in this interval, take the
2191 * largest max packet size from endpoints with this
2194 packet_size
= largest_mps
;
2195 overhead
= interval_overhead
;
2197 /* Otherwise carry over packet_size and overhead from the last
2198 * time we had a remainder.
2200 bw_used
+= bw_added
;
2201 if (bw_used
> max_bandwidth
) {
2202 xhci_warn(xhci
, "Not enough bandwidth. "
2203 "Proposed: %u, Max: %u\n",
2204 bw_used
, max_bandwidth
);
2209 * Ok, we know we have some packets left over after even-handedly
2210 * scheduling interval 15. We don't know which microframes they will
2211 * fit into, so we over-schedule and say they will be scheduled every
2214 if (packets_remaining
> 0)
2215 bw_used
+= overhead
+ packet_size
;
2217 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2218 unsigned int port_index
= virt_dev
->real_port
- 1;
2220 /* OK, we're manipulating a HS device attached to a
2221 * root port bandwidth domain. Include the number of active TTs
2222 * in the bandwidth used.
2224 bw_used
+= TT_HS_OVERHEAD
*
2225 xhci
->rh_bw
[port_index
].num_active_tts
;
2228 xhci_dbg(xhci
, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2229 "Available: %u " "percent\n",
2230 bw_used
, max_bandwidth
, bw_reserved
,
2231 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2234 bw_used
+= bw_reserved
;
2235 if (bw_used
> max_bandwidth
) {
2236 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2237 bw_used
, max_bandwidth
);
2241 bw_table
->bw_used
= bw_used
;
2245 static bool xhci_is_async_ep(unsigned int ep_type
)
2247 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2248 ep_type
!= ISOC_IN_EP
&&
2249 ep_type
!= INT_IN_EP
);
2252 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2254 return (ep_type
== ISOC_IN_EP
|| ep_type
!= INT_IN_EP
);
2257 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2259 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2261 if (ep_bw
->ep_interval
== 0)
2262 return SS_OVERHEAD_BURST
+
2263 (ep_bw
->mult
* ep_bw
->num_packets
*
2264 (SS_OVERHEAD
+ mps
));
2265 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2266 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2267 1 << ep_bw
->ep_interval
);
2271 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2272 struct xhci_bw_info
*ep_bw
,
2273 struct xhci_interval_bw_table
*bw_table
,
2274 struct usb_device
*udev
,
2275 struct xhci_virt_ep
*virt_ep
,
2276 struct xhci_tt_bw_info
*tt_info
)
2278 struct xhci_interval_bw
*interval_bw
;
2279 int normalized_interval
;
2281 if (xhci_is_async_ep(ep_bw
->type
))
2284 if (udev
->speed
== USB_SPEED_SUPER
) {
2285 if (xhci_is_sync_in_ep(ep_bw
->type
))
2286 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2287 xhci_get_ss_bw_consumed(ep_bw
);
2289 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2290 xhci_get_ss_bw_consumed(ep_bw
);
2294 /* SuperSpeed endpoints never get added to intervals in the table, so
2295 * this check is only valid for HS/FS/LS devices.
2297 if (list_empty(&virt_ep
->bw_endpoint_list
))
2299 /* For LS/FS devices, we need to translate the interval expressed in
2300 * microframes to frames.
2302 if (udev
->speed
== USB_SPEED_HIGH
)
2303 normalized_interval
= ep_bw
->ep_interval
;
2305 normalized_interval
= ep_bw
->ep_interval
- 3;
2307 if (normalized_interval
== 0)
2308 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2309 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2310 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2311 switch (udev
->speed
) {
2313 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2315 case USB_SPEED_FULL
:
2316 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2318 case USB_SPEED_HIGH
:
2319 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2321 case USB_SPEED_SUPER
:
2322 case USB_SPEED_UNKNOWN
:
2323 case USB_SPEED_WIRELESS
:
2324 /* Should never happen because only LS/FS/HS endpoints will get
2325 * added to the endpoint list.
2330 tt_info
->active_eps
-= 1;
2331 list_del_init(&virt_ep
->bw_endpoint_list
);
2334 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2335 struct xhci_bw_info
*ep_bw
,
2336 struct xhci_interval_bw_table
*bw_table
,
2337 struct usb_device
*udev
,
2338 struct xhci_virt_ep
*virt_ep
,
2339 struct xhci_tt_bw_info
*tt_info
)
2341 struct xhci_interval_bw
*interval_bw
;
2342 struct xhci_virt_ep
*smaller_ep
;
2343 int normalized_interval
;
2345 if (xhci_is_async_ep(ep_bw
->type
))
2348 if (udev
->speed
== USB_SPEED_SUPER
) {
2349 if (xhci_is_sync_in_ep(ep_bw
->type
))
2350 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2351 xhci_get_ss_bw_consumed(ep_bw
);
2353 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2354 xhci_get_ss_bw_consumed(ep_bw
);
2358 /* For LS/FS devices, we need to translate the interval expressed in
2359 * microframes to frames.
2361 if (udev
->speed
== USB_SPEED_HIGH
)
2362 normalized_interval
= ep_bw
->ep_interval
;
2364 normalized_interval
= ep_bw
->ep_interval
- 3;
2366 if (normalized_interval
== 0)
2367 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2368 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2369 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2370 switch (udev
->speed
) {
2372 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2374 case USB_SPEED_FULL
:
2375 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2377 case USB_SPEED_HIGH
:
2378 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2380 case USB_SPEED_SUPER
:
2381 case USB_SPEED_UNKNOWN
:
2382 case USB_SPEED_WIRELESS
:
2383 /* Should never happen because only LS/FS/HS endpoints will get
2384 * added to the endpoint list.
2390 tt_info
->active_eps
+= 1;
2391 /* Insert the endpoint into the list, largest max packet size first. */
2392 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2394 if (ep_bw
->max_packet_size
>=
2395 smaller_ep
->bw_info
.max_packet_size
) {
2396 /* Add the new ep before the smaller endpoint */
2397 list_add_tail(&virt_ep
->bw_endpoint_list
,
2398 &smaller_ep
->bw_endpoint_list
);
2402 /* Add the new endpoint at the end of the list. */
2403 list_add_tail(&virt_ep
->bw_endpoint_list
,
2404 &interval_bw
->endpoints
);
2407 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2408 struct xhci_virt_device
*virt_dev
,
2411 struct xhci_root_port_bw_info
*rh_bw_info
;
2412 if (!virt_dev
->tt_info
)
2415 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2416 if (old_active_eps
== 0 &&
2417 virt_dev
->tt_info
->active_eps
!= 0) {
2418 rh_bw_info
->num_active_tts
+= 1;
2419 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2420 } else if (old_active_eps
!= 0 &&
2421 virt_dev
->tt_info
->active_eps
== 0) {
2422 rh_bw_info
->num_active_tts
-= 1;
2423 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2427 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2428 struct xhci_virt_device
*virt_dev
,
2429 struct xhci_container_ctx
*in_ctx
)
2431 struct xhci_bw_info ep_bw_info
[31];
2433 struct xhci_input_control_ctx
*ctrl_ctx
;
2434 int old_active_eps
= 0;
2436 if (virt_dev
->tt_info
)
2437 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2439 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2441 for (i
= 0; i
< 31; i
++) {
2442 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2445 /* Make a copy of the BW info in case we need to revert this */
2446 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2447 sizeof(ep_bw_info
[i
]));
2448 /* Drop the endpoint from the interval table if the endpoint is
2449 * being dropped or changed.
2451 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2452 xhci_drop_ep_from_interval_table(xhci
,
2453 &virt_dev
->eps
[i
].bw_info
,
2459 /* Overwrite the information stored in the endpoints' bw_info */
2460 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2461 for (i
= 0; i
< 31; i
++) {
2462 /* Add any changed or added endpoints to the interval table */
2463 if (EP_IS_ADDED(ctrl_ctx
, i
))
2464 xhci_add_ep_to_interval_table(xhci
,
2465 &virt_dev
->eps
[i
].bw_info
,
2472 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2473 /* Ok, this fits in the bandwidth we have.
2474 * Update the number of active TTs.
2476 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2480 /* We don't have enough bandwidth for this, revert the stored info. */
2481 for (i
= 0; i
< 31; i
++) {
2482 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2485 /* Drop the new copies of any added or changed endpoints from
2486 * the interval table.
2488 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2489 xhci_drop_ep_from_interval_table(xhci
,
2490 &virt_dev
->eps
[i
].bw_info
,
2496 /* Revert the endpoint back to its old information */
2497 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2498 sizeof(ep_bw_info
[i
]));
2499 /* Add any changed or dropped endpoints back into the table */
2500 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2501 xhci_add_ep_to_interval_table(xhci
,
2502 &virt_dev
->eps
[i
].bw_info
,
2512 /* Issue a configure endpoint command or evaluate context command
2513 * and wait for it to finish.
2515 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2516 struct usb_device
*udev
,
2517 struct xhci_command
*command
,
2518 bool ctx_change
, bool must_succeed
)
2522 unsigned long flags
;
2523 struct xhci_container_ctx
*in_ctx
;
2524 struct completion
*cmd_completion
;
2526 struct xhci_virt_device
*virt_dev
;
2527 union xhci_trb
*cmd_trb
;
2529 spin_lock_irqsave(&xhci
->lock
, flags
);
2530 virt_dev
= xhci
->devs
[udev
->slot_id
];
2533 in_ctx
= command
->in_ctx
;
2535 in_ctx
= virt_dev
->in_ctx
;
2537 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2538 xhci_reserve_host_resources(xhci
, in_ctx
)) {
2539 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2540 xhci_warn(xhci
, "Not enough host resources, "
2541 "active endpoint contexts = %u\n",
2542 xhci
->num_active_eps
);
2545 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2546 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2547 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2548 xhci_free_host_resources(xhci
, in_ctx
);
2549 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2550 xhci_warn(xhci
, "Not enough bandwidth\n");
2555 cmd_completion
= command
->completion
;
2556 cmd_status
= &command
->status
;
2557 command
->command_trb
= xhci
->cmd_ring
->enqueue
;
2559 /* Enqueue pointer can be left pointing to the link TRB,
2560 * we must handle that
2562 if (TRB_TYPE_LINK_LE32(command
->command_trb
->link
.control
))
2563 command
->command_trb
=
2564 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
2566 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2568 cmd_completion
= &virt_dev
->cmd_completion
;
2569 cmd_status
= &virt_dev
->cmd_status
;
2571 init_completion(cmd_completion
);
2573 cmd_trb
= xhci
->cmd_ring
->dequeue
;
2575 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2576 udev
->slot_id
, must_succeed
);
2578 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2579 udev
->slot_id
, must_succeed
);
2582 list_del(&command
->cmd_list
);
2583 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2584 xhci_free_host_resources(xhci
, in_ctx
);
2585 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2586 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
2589 xhci_ring_cmd_db(xhci
);
2590 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2592 /* Wait for the configure endpoint command to complete */
2593 timeleft
= wait_for_completion_interruptible_timeout(
2595 XHCI_CMD_DEFAULT_TIMEOUT
);
2596 if (timeleft
<= 0) {
2597 xhci_warn(xhci
, "%s while waiting for %s command\n",
2598 timeleft
== 0 ? "Timeout" : "Signal",
2600 "configure endpoint" :
2601 "evaluate context");
2602 /* cancel the configure endpoint command */
2603 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2610 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2612 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2614 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2615 spin_lock_irqsave(&xhci
->lock
, flags
);
2616 /* If the command failed, remove the reserved resources.
2617 * Otherwise, clean up the estimate to include dropped eps.
2620 xhci_free_host_resources(xhci
, in_ctx
);
2622 xhci_finish_resource_reservation(xhci
, in_ctx
);
2623 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2628 /* Called after one or more calls to xhci_add_endpoint() or
2629 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2630 * to call xhci_reset_bandwidth().
2632 * Since we are in the middle of changing either configuration or
2633 * installing a new alt setting, the USB core won't allow URBs to be
2634 * enqueued for any endpoint on the old config or interface. Nothing
2635 * else should be touching the xhci->devs[slot_id] structure, so we
2636 * don't need to take the xhci->lock for manipulating that.
2638 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2642 struct xhci_hcd
*xhci
;
2643 struct xhci_virt_device
*virt_dev
;
2644 struct xhci_input_control_ctx
*ctrl_ctx
;
2645 struct xhci_slot_ctx
*slot_ctx
;
2647 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2650 xhci
= hcd_to_xhci(hcd
);
2651 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2654 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2655 virt_dev
= xhci
->devs
[udev
->slot_id
];
2657 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2658 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2659 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2660 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2661 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2663 /* Don't issue the command if there's no endpoints to update. */
2664 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2665 ctrl_ctx
->drop_flags
== 0)
2668 xhci_dbg(xhci
, "New Input Control Context:\n");
2669 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2670 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2671 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2673 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2676 /* Callee should call reset_bandwidth() */
2680 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2681 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2682 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2684 /* Free any rings that were dropped, but not changed. */
2685 for (i
= 1; i
< 31; ++i
) {
2686 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2687 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2688 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2690 xhci_zero_in_ctx(xhci
, virt_dev
);
2692 * Install any rings for completely new endpoints or changed endpoints,
2693 * and free or cache any old rings from changed endpoints.
2695 for (i
= 1; i
< 31; ++i
) {
2696 if (!virt_dev
->eps
[i
].new_ring
)
2698 /* Only cache or free the old ring if it exists.
2699 * It may not if this is the first add of an endpoint.
2701 if (virt_dev
->eps
[i
].ring
) {
2702 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2704 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2705 virt_dev
->eps
[i
].new_ring
= NULL
;
2711 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2713 struct xhci_hcd
*xhci
;
2714 struct xhci_virt_device
*virt_dev
;
2717 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2720 xhci
= hcd_to_xhci(hcd
);
2722 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2723 virt_dev
= xhci
->devs
[udev
->slot_id
];
2724 /* Free any rings allocated for added endpoints */
2725 for (i
= 0; i
< 31; ++i
) {
2726 if (virt_dev
->eps
[i
].new_ring
) {
2727 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2728 virt_dev
->eps
[i
].new_ring
= NULL
;
2731 xhci_zero_in_ctx(xhci
, virt_dev
);
2734 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2735 struct xhci_container_ctx
*in_ctx
,
2736 struct xhci_container_ctx
*out_ctx
,
2737 u32 add_flags
, u32 drop_flags
)
2739 struct xhci_input_control_ctx
*ctrl_ctx
;
2740 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2741 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2742 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2743 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2744 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2746 xhci_dbg(xhci
, "Input Context:\n");
2747 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2750 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2751 unsigned int slot_id
, unsigned int ep_index
,
2752 struct xhci_dequeue_state
*deq_state
)
2754 struct xhci_container_ctx
*in_ctx
;
2755 struct xhci_ep_ctx
*ep_ctx
;
2759 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2760 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2761 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2762 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2763 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2764 deq_state
->new_deq_ptr
);
2766 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2767 "reset ep command\n");
2768 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2769 deq_state
->new_deq_seg
,
2770 deq_state
->new_deq_ptr
);
2773 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2775 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2776 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2777 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
2780 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2781 struct usb_device
*udev
, unsigned int ep_index
)
2783 struct xhci_dequeue_state deq_state
;
2784 struct xhci_virt_ep
*ep
;
2786 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
2787 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2788 /* We need to move the HW's dequeue pointer past this TD,
2789 * or it will attempt to resend it on the next doorbell ring.
2791 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2792 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2795 /* HW with the reset endpoint quirk will use the saved dequeue state to
2796 * issue a configure endpoint command later.
2798 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2799 xhci_dbg(xhci
, "Queueing new dequeue state\n");
2800 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2801 ep_index
, ep
->stopped_stream
, &deq_state
);
2803 /* Better hope no one uses the input context between now and the
2804 * reset endpoint completion!
2805 * XXX: No idea how this hardware will react when stream rings
2808 xhci_dbg(xhci
, "Setting up input context for "
2809 "configure endpoint command\n");
2810 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2811 ep_index
, &deq_state
);
2815 /* Deal with stalled endpoints. The core should have sent the control message
2816 * to clear the halt condition. However, we need to make the xHCI hardware
2817 * reset its sequence number, since a device will expect a sequence number of
2818 * zero after the halt condition is cleared.
2819 * Context: in_interrupt
2821 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2822 struct usb_host_endpoint
*ep
)
2824 struct xhci_hcd
*xhci
;
2825 struct usb_device
*udev
;
2826 unsigned int ep_index
;
2827 unsigned long flags
;
2829 struct xhci_virt_ep
*virt_ep
;
2831 xhci
= hcd_to_xhci(hcd
);
2832 udev
= (struct usb_device
*) ep
->hcpriv
;
2833 /* Called with a root hub endpoint (or an endpoint that wasn't added
2834 * with xhci_add_endpoint()
2838 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2839 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2840 if (!virt_ep
->stopped_td
) {
2841 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
2842 ep
->desc
.bEndpointAddress
);
2845 if (usb_endpoint_xfer_control(&ep
->desc
)) {
2846 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
2850 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
2851 spin_lock_irqsave(&xhci
->lock
, flags
);
2852 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
2854 * Can't change the ring dequeue pointer until it's transitioned to the
2855 * stopped state, which is only upon a successful reset endpoint
2856 * command. Better hope that last command worked!
2859 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
2860 kfree(virt_ep
->stopped_td
);
2861 xhci_ring_cmd_db(xhci
);
2863 virt_ep
->stopped_td
= NULL
;
2864 virt_ep
->stopped_trb
= NULL
;
2865 virt_ep
->stopped_stream
= 0;
2866 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2869 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
2872 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2873 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2874 unsigned int slot_id
)
2877 unsigned int ep_index
;
2878 unsigned int ep_state
;
2882 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2885 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
2886 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2887 " descriptor for ep 0x%x does not support streams\n",
2888 ep
->desc
.bEndpointAddress
);
2892 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2893 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2894 if (ep_state
& EP_HAS_STREAMS
||
2895 ep_state
& EP_GETTING_STREAMS
) {
2896 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2897 "already has streams set up.\n",
2898 ep
->desc
.bEndpointAddress
);
2899 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2900 "dynamic stream context array reallocation.\n");
2903 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2904 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2905 "endpoint 0x%x; URBs are pending.\n",
2906 ep
->desc
.bEndpointAddress
);
2912 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2913 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2915 unsigned int max_streams
;
2917 /* The stream context array size must be a power of two */
2918 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2920 * Find out how many primary stream array entries the host controller
2921 * supports. Later we may use secondary stream arrays (similar to 2nd
2922 * level page entries), but that's an optional feature for xHCI host
2923 * controllers. xHCs must support at least 4 stream IDs.
2925 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2926 if (*num_stream_ctxs
> max_streams
) {
2927 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2929 *num_stream_ctxs
= max_streams
;
2930 *num_streams
= max_streams
;
2934 /* Returns an error code if one of the endpoint already has streams.
2935 * This does not change any data structures, it only checks and gathers
2938 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
2939 struct usb_device
*udev
,
2940 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2941 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
2943 unsigned int max_streams
;
2944 unsigned int endpoint_flag
;
2948 for (i
= 0; i
< num_eps
; i
++) {
2949 ret
= xhci_check_streams_endpoint(xhci
, udev
,
2950 eps
[i
], udev
->slot_id
);
2954 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
2955 if (max_streams
< (*num_streams
- 1)) {
2956 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
2957 eps
[i
]->desc
.bEndpointAddress
,
2959 *num_streams
= max_streams
+1;
2962 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
2963 if (*changed_ep_bitmask
& endpoint_flag
)
2965 *changed_ep_bitmask
|= endpoint_flag
;
2970 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
2971 struct usb_device
*udev
,
2972 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
2974 u32 changed_ep_bitmask
= 0;
2975 unsigned int slot_id
;
2976 unsigned int ep_index
;
2977 unsigned int ep_state
;
2980 slot_id
= udev
->slot_id
;
2981 if (!xhci
->devs
[slot_id
])
2984 for (i
= 0; i
< num_eps
; i
++) {
2985 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2986 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2987 /* Are streams already being freed for the endpoint? */
2988 if (ep_state
& EP_GETTING_NO_STREAMS
) {
2989 xhci_warn(xhci
, "WARN Can't disable streams for "
2991 "streams are being disabled already.",
2992 eps
[i
]->desc
.bEndpointAddress
);
2995 /* Are there actually any streams to free? */
2996 if (!(ep_state
& EP_HAS_STREAMS
) &&
2997 !(ep_state
& EP_GETTING_STREAMS
)) {
2998 xhci_warn(xhci
, "WARN Can't disable streams for "
3000 "streams are already disabled!",
3001 eps
[i
]->desc
.bEndpointAddress
);
3002 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3003 "with non-streams endpoint\n");
3006 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3008 return changed_ep_bitmask
;
3012 * The USB device drivers use this function (though the HCD interface in USB
3013 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3014 * coordinate mass storage command queueing across multiple endpoints (basically
3015 * a stream ID == a task ID).
3017 * Setting up streams involves allocating the same size stream context array
3018 * for each endpoint and issuing a configure endpoint command for all endpoints.
3020 * Don't allow the call to succeed if one endpoint only supports one stream
3021 * (which means it doesn't support streams at all).
3023 * Drivers may get less stream IDs than they asked for, if the host controller
3024 * hardware or endpoints claim they can't support the number of requested
3027 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3028 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3029 unsigned int num_streams
, gfp_t mem_flags
)
3032 struct xhci_hcd
*xhci
;
3033 struct xhci_virt_device
*vdev
;
3034 struct xhci_command
*config_cmd
;
3035 unsigned int ep_index
;
3036 unsigned int num_stream_ctxs
;
3037 unsigned long flags
;
3038 u32 changed_ep_bitmask
= 0;
3043 /* Add one to the number of streams requested to account for
3044 * stream 0 that is reserved for xHCI usage.
3047 xhci
= hcd_to_xhci(hcd
);
3048 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3051 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3053 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3057 /* Check to make sure all endpoints are not already configured for
3058 * streams. While we're at it, find the maximum number of streams that
3059 * all the endpoints will support and check for duplicate endpoints.
3061 spin_lock_irqsave(&xhci
->lock
, flags
);
3062 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3063 num_eps
, &num_streams
, &changed_ep_bitmask
);
3065 xhci_free_command(xhci
, config_cmd
);
3066 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3069 if (num_streams
<= 1) {
3070 xhci_warn(xhci
, "WARN: endpoints can't handle "
3071 "more than one stream.\n");
3072 xhci_free_command(xhci
, config_cmd
);
3073 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3076 vdev
= xhci
->devs
[udev
->slot_id
];
3077 /* Mark each endpoint as being in transition, so
3078 * xhci_urb_enqueue() will reject all URBs.
3080 for (i
= 0; i
< num_eps
; i
++) {
3081 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3082 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3084 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3086 /* Setup internal data structures and allocate HW data structures for
3087 * streams (but don't install the HW structures in the input context
3088 * until we're sure all memory allocation succeeded).
3090 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3091 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3092 num_stream_ctxs
, num_streams
);
3094 for (i
= 0; i
< num_eps
; i
++) {
3095 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3096 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3098 num_streams
, mem_flags
);
3099 if (!vdev
->eps
[ep_index
].stream_info
)
3101 /* Set maxPstreams in endpoint context and update deq ptr to
3102 * point to stream context array. FIXME
3106 /* Set up the input context for a configure endpoint command. */
3107 for (i
= 0; i
< num_eps
; i
++) {
3108 struct xhci_ep_ctx
*ep_ctx
;
3110 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3111 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3113 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3114 vdev
->out_ctx
, ep_index
);
3115 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3116 vdev
->eps
[ep_index
].stream_info
);
3118 /* Tell the HW to drop its old copy of the endpoint context info
3119 * and add the updated copy from the input context.
3121 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3122 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3124 /* Issue and wait for the configure endpoint command */
3125 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3128 /* xHC rejected the configure endpoint command for some reason, so we
3129 * leave the old ring intact and free our internal streams data
3135 spin_lock_irqsave(&xhci
->lock
, flags
);
3136 for (i
= 0; i
< num_eps
; i
++) {
3137 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3138 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3139 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3140 udev
->slot_id
, ep_index
);
3141 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3143 xhci_free_command(xhci
, config_cmd
);
3144 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3146 /* Subtract 1 for stream 0, which drivers can't use */
3147 return num_streams
- 1;
3150 /* If it didn't work, free the streams! */
3151 for (i
= 0; i
< num_eps
; i
++) {
3152 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3153 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3154 vdev
->eps
[ep_index
].stream_info
= NULL
;
3155 /* FIXME Unset maxPstreams in endpoint context and
3156 * update deq ptr to point to normal string ring.
3158 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3159 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3160 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3162 xhci_free_command(xhci
, config_cmd
);
3166 /* Transition the endpoint from using streams to being a "normal" endpoint
3169 * Modify the endpoint context state, submit a configure endpoint command,
3170 * and free all endpoint rings for streams if that completes successfully.
3172 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3173 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3177 struct xhci_hcd
*xhci
;
3178 struct xhci_virt_device
*vdev
;
3179 struct xhci_command
*command
;
3180 unsigned int ep_index
;
3181 unsigned long flags
;
3182 u32 changed_ep_bitmask
;
3184 xhci
= hcd_to_xhci(hcd
);
3185 vdev
= xhci
->devs
[udev
->slot_id
];
3187 /* Set up a configure endpoint command to remove the streams rings */
3188 spin_lock_irqsave(&xhci
->lock
, flags
);
3189 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3190 udev
, eps
, num_eps
);
3191 if (changed_ep_bitmask
== 0) {
3192 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3196 /* Use the xhci_command structure from the first endpoint. We may have
3197 * allocated too many, but the driver may call xhci_free_streams() for
3198 * each endpoint it grouped into one call to xhci_alloc_streams().
3200 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3201 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3202 for (i
= 0; i
< num_eps
; i
++) {
3203 struct xhci_ep_ctx
*ep_ctx
;
3205 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3206 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3207 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3208 EP_GETTING_NO_STREAMS
;
3210 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3211 vdev
->out_ctx
, ep_index
);
3212 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3213 &vdev
->eps
[ep_index
]);
3215 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3216 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3217 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3219 /* Issue and wait for the configure endpoint command,
3220 * which must succeed.
3222 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3225 /* xHC rejected the configure endpoint command for some reason, so we
3226 * leave the streams rings intact.
3231 spin_lock_irqsave(&xhci
->lock
, flags
);
3232 for (i
= 0; i
< num_eps
; i
++) {
3233 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3234 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3235 vdev
->eps
[ep_index
].stream_info
= NULL
;
3236 /* FIXME Unset maxPstreams in endpoint context and
3237 * update deq ptr to point to normal string ring.
3239 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3240 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3242 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3248 * Deletes endpoint resources for endpoints that were active before a Reset
3249 * Device command, or a Disable Slot command. The Reset Device command leaves
3250 * the control endpoint intact, whereas the Disable Slot command deletes it.
3252 * Must be called with xhci->lock held.
3254 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3255 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3258 unsigned int num_dropped_eps
= 0;
3259 unsigned int drop_flags
= 0;
3261 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3262 if (virt_dev
->eps
[i
].ring
) {
3263 drop_flags
|= 1 << i
;
3267 xhci
->num_active_eps
-= num_dropped_eps
;
3268 if (num_dropped_eps
)
3269 xhci_dbg(xhci
, "Dropped %u ep ctxs, flags = 0x%x, "
3271 num_dropped_eps
, drop_flags
,
3272 xhci
->num_active_eps
);
3276 * This submits a Reset Device Command, which will set the device state to 0,
3277 * set the device address to 0, and disable all the endpoints except the default
3278 * control endpoint. The USB core should come back and call
3279 * xhci_address_device(), and then re-set up the configuration. If this is
3280 * called because of a usb_reset_and_verify_device(), then the old alternate
3281 * settings will be re-installed through the normal bandwidth allocation
3284 * Wait for the Reset Device command to finish. Remove all structures
3285 * associated with the endpoints that were disabled. Clear the input device
3286 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3288 * If the virt_dev to be reset does not exist or does not match the udev,
3289 * it means the device is lost, possibly due to the xHC restore error and
3290 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3291 * re-allocate the device.
3293 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3296 unsigned long flags
;
3297 struct xhci_hcd
*xhci
;
3298 unsigned int slot_id
;
3299 struct xhci_virt_device
*virt_dev
;
3300 struct xhci_command
*reset_device_cmd
;
3302 int last_freed_endpoint
;
3303 struct xhci_slot_ctx
*slot_ctx
;
3304 int old_active_eps
= 0;
3306 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3309 xhci
= hcd_to_xhci(hcd
);
3310 slot_id
= udev
->slot_id
;
3311 virt_dev
= xhci
->devs
[slot_id
];
3313 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3314 "not exist. Re-allocate the device\n", slot_id
);
3315 ret
= xhci_alloc_dev(hcd
, udev
);
3322 if (virt_dev
->udev
!= udev
) {
3323 /* If the virt_dev and the udev does not match, this virt_dev
3324 * may belong to another udev.
3325 * Re-allocate the device.
3327 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3328 "not match the udev. Re-allocate the device\n",
3330 ret
= xhci_alloc_dev(hcd
, udev
);
3337 /* If device is not setup, there is no point in resetting it */
3338 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3339 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3340 SLOT_STATE_DISABLED
)
3343 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3344 /* Allocate the command structure that holds the struct completion.
3345 * Assume we're in process context, since the normal device reset
3346 * process has to wait for the device anyway. Storage devices are
3347 * reset as part of error handling, so use GFP_NOIO instead of
3350 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3351 if (!reset_device_cmd
) {
3352 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3356 /* Attempt to submit the Reset Device command to the command ring */
3357 spin_lock_irqsave(&xhci
->lock
, flags
);
3358 reset_device_cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
3360 /* Enqueue pointer can be left pointing to the link TRB,
3361 * we must handle that
3363 if (TRB_TYPE_LINK_LE32(reset_device_cmd
->command_trb
->link
.control
))
3364 reset_device_cmd
->command_trb
=
3365 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
3367 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3368 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3370 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3371 list_del(&reset_device_cmd
->cmd_list
);
3372 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3373 goto command_cleanup
;
3375 xhci_ring_cmd_db(xhci
);
3376 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3378 /* Wait for the Reset Device command to finish */
3379 timeleft
= wait_for_completion_interruptible_timeout(
3380 reset_device_cmd
->completion
,
3381 USB_CTRL_SET_TIMEOUT
);
3382 if (timeleft
<= 0) {
3383 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3384 timeleft
== 0 ? "Timeout" : "Signal");
3385 spin_lock_irqsave(&xhci
->lock
, flags
);
3386 /* The timeout might have raced with the event ring handler, so
3387 * only delete from the list if the item isn't poisoned.
3389 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3390 list_del(&reset_device_cmd
->cmd_list
);
3391 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3393 goto command_cleanup
;
3396 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3397 * unless we tried to reset a slot ID that wasn't enabled,
3398 * or the device wasn't in the addressed or configured state.
3400 ret
= reset_device_cmd
->status
;
3402 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3403 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3404 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3406 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3407 xhci_info(xhci
, "Not freeing device rings.\n");
3408 /* Don't treat this as an error. May change my mind later. */
3410 goto command_cleanup
;
3412 xhci_dbg(xhci
, "Successful reset device command.\n");
3415 if (xhci_is_vendor_info_code(xhci
, ret
))
3417 xhci_warn(xhci
, "Unknown completion code %u for "
3418 "reset device command.\n", ret
);
3420 goto command_cleanup
;
3423 /* Free up host controller endpoint resources */
3424 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3425 spin_lock_irqsave(&xhci
->lock
, flags
);
3426 /* Don't delete the default control endpoint resources */
3427 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3428 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3431 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3432 last_freed_endpoint
= 1;
3433 for (i
= 1; i
< 31; ++i
) {
3434 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3436 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3437 xhci_free_stream_info(xhci
, ep
->stream_info
);
3438 ep
->stream_info
= NULL
;
3439 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3443 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3444 last_freed_endpoint
= i
;
3446 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3447 xhci_drop_ep_from_interval_table(xhci
,
3448 &virt_dev
->eps
[i
].bw_info
,
3453 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3455 /* If necessary, update the number of active TTs on this root port */
3456 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3458 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3459 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3463 xhci_free_command(xhci
, reset_device_cmd
);
3468 * At this point, the struct usb_device is about to go away, the device has
3469 * disconnected, and all traffic has been stopped and the endpoints have been
3470 * disabled. Free any HC data structures associated with that device.
3472 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3474 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3475 struct xhci_virt_device
*virt_dev
;
3476 unsigned long flags
;
3480 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3481 /* If the host is halted due to driver unload, we still need to free the
3484 if (ret
<= 0 && ret
!= -ENODEV
)
3487 virt_dev
= xhci
->devs
[udev
->slot_id
];
3489 /* Stop any wayward timer functions (which may grab the lock) */
3490 for (i
= 0; i
< 31; ++i
) {
3491 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3492 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3495 if (udev
->usb2_hw_lpm_enabled
) {
3496 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3497 udev
->usb2_hw_lpm_enabled
= 0;
3500 spin_lock_irqsave(&xhci
->lock
, flags
);
3501 /* Don't disable the slot if the host controller is dead. */
3502 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3503 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3504 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3505 xhci_free_virt_device(xhci
, udev
->slot_id
);
3506 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3510 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3511 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3512 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3515 xhci_ring_cmd_db(xhci
);
3516 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3518 * Event command completion handler will free any data structures
3519 * associated with the slot. XXX Can free sleep?
3524 * Checks if we have enough host controller resources for the default control
3527 * Must be called with xhci->lock held.
3529 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3531 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3532 xhci_dbg(xhci
, "Not enough ep ctxs: "
3533 "%u active, need to add 1, limit is %u.\n",
3534 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3537 xhci
->num_active_eps
+= 1;
3538 xhci_dbg(xhci
, "Adding 1 ep ctx, %u now active.\n",
3539 xhci
->num_active_eps
);
3545 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3546 * timed out, or allocating memory failed. Returns 1 on success.
3548 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3550 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3551 unsigned long flags
;
3554 union xhci_trb
*cmd_trb
;
3556 spin_lock_irqsave(&xhci
->lock
, flags
);
3557 cmd_trb
= xhci
->cmd_ring
->dequeue
;
3558 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3560 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3561 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3564 xhci_ring_cmd_db(xhci
);
3565 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3567 /* XXX: how much time for xHC slot assignment? */
3568 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3569 XHCI_CMD_DEFAULT_TIMEOUT
);
3570 if (timeleft
<= 0) {
3571 xhci_warn(xhci
, "%s while waiting for a slot\n",
3572 timeleft
== 0 ? "Timeout" : "Signal");
3573 /* cancel the enable slot request */
3574 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3577 if (!xhci
->slot_id
) {
3578 xhci_err(xhci
, "Error while assigning device slot ID\n");
3582 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3583 spin_lock_irqsave(&xhci
->lock
, flags
);
3584 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3586 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3587 xhci_warn(xhci
, "Not enough host resources, "
3588 "active endpoint contexts = %u\n",
3589 xhci
->num_active_eps
);
3592 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3594 /* Use GFP_NOIO, since this function can be called from
3595 * xhci_discover_or_reset_device(), which may be called as part of
3596 * mass storage driver error handling.
3598 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3599 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3602 udev
->slot_id
= xhci
->slot_id
;
3603 /* Is this a LS or FS device under a HS hub? */
3604 /* Hub or peripherial? */
3608 /* Disable slot, if we can do it without mem alloc */
3609 spin_lock_irqsave(&xhci
->lock
, flags
);
3610 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3611 xhci_ring_cmd_db(xhci
);
3612 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3617 * Issue an Address Device command (which will issue a SetAddress request to
3619 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3620 * we should only issue and wait on one address command at the same time.
3622 * We add one to the device address issued by the hardware because the USB core
3623 * uses address 1 for the root hubs (even though they're not really devices).
3625 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3627 unsigned long flags
;
3629 struct xhci_virt_device
*virt_dev
;
3631 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3632 struct xhci_slot_ctx
*slot_ctx
;
3633 struct xhci_input_control_ctx
*ctrl_ctx
;
3635 union xhci_trb
*cmd_trb
;
3637 if (!udev
->slot_id
) {
3638 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
3642 virt_dev
= xhci
->devs
[udev
->slot_id
];
3644 if (WARN_ON(!virt_dev
)) {
3646 * In plug/unplug torture test with an NEC controller,
3647 * a zero-dereference was observed once due to virt_dev = 0.
3648 * Print useful debug rather than crash if it is observed again!
3650 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3655 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3657 * If this is the first Set Address since device plug-in or
3658 * virt_device realloaction after a resume with an xHCI power loss,
3659 * then set up the slot context.
3661 if (!slot_ctx
->dev_info
)
3662 xhci_setup_addressable_virt_dev(xhci
, udev
);
3663 /* Otherwise, update the control endpoint ring enqueue pointer. */
3665 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3666 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3667 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3668 ctrl_ctx
->drop_flags
= 0;
3670 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3671 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3673 spin_lock_irqsave(&xhci
->lock
, flags
);
3674 cmd_trb
= xhci
->cmd_ring
->dequeue
;
3675 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3678 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3679 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3682 xhci_ring_cmd_db(xhci
);
3683 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3685 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3686 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3687 XHCI_CMD_DEFAULT_TIMEOUT
);
3688 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3689 * the SetAddress() "recovery interval" required by USB and aborting the
3690 * command on a timeout.
3692 if (timeleft
<= 0) {
3693 xhci_warn(xhci
, "%s while waiting for address device command\n",
3694 timeleft
== 0 ? "Timeout" : "Signal");
3695 /* cancel the address device command */
3696 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3702 switch (virt_dev
->cmd_status
) {
3703 case COMP_CTX_STATE
:
3705 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3710 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3714 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3715 "device command.\n");
3719 xhci_dbg(xhci
, "Successful Address Device command\n");
3722 xhci_err(xhci
, "ERROR: unexpected command completion "
3723 "code 0x%x.\n", virt_dev
->cmd_status
);
3724 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3725 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3732 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3733 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
3734 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3736 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3737 (unsigned long long)
3738 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3739 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
3740 (unsigned long long)virt_dev
->out_ctx
->dma
);
3741 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3742 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3743 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3744 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3746 * USB core uses address 1 for the roothubs, so we add one to the
3747 * address given back to us by the HC.
3749 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3750 /* Use kernel assigned address for devices; store xHC assigned
3751 * address locally. */
3752 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3754 /* Zero the input context control for later use */
3755 ctrl_ctx
->add_flags
= 0;
3756 ctrl_ctx
->drop_flags
= 0;
3758 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
3763 #ifdef CONFIG_USB_SUSPEND
3765 /* BESL to HIRD Encoding array for USB2 LPM */
3766 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3767 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3769 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3770 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3771 struct usb_device
*udev
)
3773 int u2del
, besl
, besl_host
;
3774 int besl_device
= 0;
3777 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3778 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3780 if (field
& USB_BESL_SUPPORT
) {
3781 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3782 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3785 /* Use baseline BESL value as default */
3786 if (field
& USB_BESL_BASELINE_VALID
)
3787 besl_device
= USB_GET_BESL_BASELINE(field
);
3788 else if (field
& USB_BESL_DEEP_VALID
)
3789 besl_device
= USB_GET_BESL_DEEP(field
);
3794 besl_host
= (u2del
- 51) / 75 + 1;
3797 besl
= besl_host
+ besl_device
;
3804 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
3805 struct usb_device
*udev
)
3807 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3808 struct dev_info
*dev_info
;
3809 __le32 __iomem
**port_array
;
3810 __le32 __iomem
*addr
, *pm_addr
;
3812 unsigned int port_num
;
3813 unsigned long flags
;
3817 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
3821 /* we only support lpm for non-hub device connected to root hub yet */
3822 if (!udev
->parent
|| udev
->parent
->parent
||
3823 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3826 spin_lock_irqsave(&xhci
->lock
, flags
);
3828 /* Look for devices in lpm_failed_devs list */
3829 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
3830 le16_to_cpu(udev
->descriptor
.idProduct
);
3831 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
3832 if (dev_info
->dev_id
== dev_id
) {
3838 port_array
= xhci
->usb2_ports
;
3839 port_num
= udev
->portnum
- 1;
3841 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
3842 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
3848 * Test USB 2.0 software LPM.
3849 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3850 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3851 * in the June 2011 errata release.
3853 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
3855 * Set L1 Device Slot and HIRD/BESL.
3856 * Check device's USB 2.0 extension descriptor to determine whether
3857 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3859 pm_addr
= port_array
[port_num
] + 1;
3860 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3861 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
3862 xhci_writel(xhci
, temp
, pm_addr
);
3864 /* Set port link state to U2(L1) */
3865 addr
= port_array
[port_num
];
3866 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
3869 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3871 spin_lock_irqsave(&xhci
->lock
, flags
);
3873 /* Check L1 Status */
3874 ret
= handshake(xhci
, pm_addr
, PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
3875 if (ret
!= -ETIMEDOUT
) {
3876 /* enter L1 successfully */
3877 temp
= xhci_readl(xhci
, addr
);
3878 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
3882 temp
= xhci_readl(xhci
, pm_addr
);
3883 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
3884 port_num
, temp
& PORT_L1S_MASK
);
3888 /* Resume the port */
3889 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
3891 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3893 spin_lock_irqsave(&xhci
->lock
, flags
);
3896 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
3898 /* Check PORTSC to make sure the device is in the right state */
3900 temp
= xhci_readl(xhci
, addr
);
3901 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
3902 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
3903 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
3904 xhci_dbg(xhci
, "port L1 resume fail\n");
3910 /* Insert dev to lpm_failed_devs list */
3911 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
3913 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
3918 dev_info
->dev_id
= dev_id
;
3919 INIT_LIST_HEAD(&dev_info
->list
);
3920 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
3922 xhci_ring_device(xhci
, udev
->slot_id
);
3926 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3930 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
3931 struct usb_device
*udev
, int enable
)
3933 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3934 __le32 __iomem
**port_array
;
3935 __le32 __iomem
*pm_addr
;
3937 unsigned int port_num
;
3938 unsigned long flags
;
3941 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
3945 if (!udev
->parent
|| udev
->parent
->parent
||
3946 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3949 if (udev
->usb2_hw_lpm_capable
!= 1)
3952 spin_lock_irqsave(&xhci
->lock
, flags
);
3954 port_array
= xhci
->usb2_ports
;
3955 port_num
= udev
->portnum
- 1;
3956 pm_addr
= port_array
[port_num
] + 1;
3957 temp
= xhci_readl(xhci
, pm_addr
);
3959 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
3960 enable
? "enable" : "disable", port_num
);
3962 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3965 temp
&= ~PORT_HIRD_MASK
;
3966 temp
|= PORT_HIRD(hird
) | PORT_RWE
;
3967 xhci_writel(xhci
, temp
, pm_addr
);
3968 temp
= xhci_readl(xhci
, pm_addr
);
3970 xhci_writel(xhci
, temp
, pm_addr
);
3972 temp
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
3973 xhci_writel(xhci
, temp
, pm_addr
);
3976 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3980 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3982 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3985 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
3987 xhci_dbg(xhci
, "software LPM test succeed\n");
3988 if (xhci
->hw_lpm_support
== 1) {
3989 udev
->usb2_hw_lpm_capable
= 1;
3990 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
3992 udev
->usb2_hw_lpm_enabled
= 1;
4001 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4002 struct usb_device
*udev
, int enable
)
4007 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4012 #endif /* CONFIG_USB_SUSPEND */
4014 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4017 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4018 static unsigned long long xhci_service_interval_to_ns(
4019 struct usb_endpoint_descriptor
*desc
)
4021 return (1 << (desc
->bInterval
- 1)) * 125 * 1000;
4024 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4025 enum usb3_link_state state
)
4027 unsigned long long sel
;
4028 unsigned long long pel
;
4029 unsigned int max_sel_pel
;
4034 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4035 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4036 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4037 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4041 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4042 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4043 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4047 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4049 return USB3_LPM_DISABLED
;
4052 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4053 return USB3_LPM_DEVICE_INITIATED
;
4055 if (sel
> max_sel_pel
)
4056 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4057 "due to long SEL %llu ms\n",
4060 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4061 "due to long PEL %llu\n ms",
4063 return USB3_LPM_DISABLED
;
4066 /* Returns the hub-encoded U1 timeout value.
4067 * The U1 timeout should be the maximum of the following values:
4068 * - For control endpoints, U1 system exit latency (SEL) * 3
4069 * - For bulk endpoints, U1 SEL * 5
4070 * - For interrupt endpoints:
4071 * - Notification EPs, U1 SEL * 3
4072 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4073 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4075 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4076 struct usb_endpoint_descriptor
*desc
)
4078 unsigned long long timeout_ns
;
4082 ep_type
= usb_endpoint_type(desc
);
4084 case USB_ENDPOINT_XFER_CONTROL
:
4085 timeout_ns
= udev
->u1_params
.sel
* 3;
4087 case USB_ENDPOINT_XFER_BULK
:
4088 timeout_ns
= udev
->u1_params
.sel
* 5;
4090 case USB_ENDPOINT_XFER_INT
:
4091 intr_type
= usb_endpoint_interrupt_type(desc
);
4092 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4093 timeout_ns
= udev
->u1_params
.sel
* 3;
4096 /* Otherwise the calculation is the same as isoc eps */
4097 case USB_ENDPOINT_XFER_ISOC
:
4098 timeout_ns
= xhci_service_interval_to_ns(desc
);
4099 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4100 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4101 timeout_ns
= udev
->u1_params
.sel
* 2;
4107 /* The U1 timeout is encoded in 1us intervals. */
4108 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4109 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4110 if (timeout_ns
== USB3_LPM_DISABLED
)
4113 /* If the necessary timeout value is bigger than what we can set in the
4114 * USB 3.0 hub, we have to disable hub-initiated U1.
4116 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4118 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4119 "due to long timeout %llu ms\n", timeout_ns
);
4120 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4123 /* Returns the hub-encoded U2 timeout value.
4124 * The U2 timeout should be the maximum of:
4125 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4126 * - largest bInterval of any active periodic endpoint (to avoid going
4127 * into lower power link states between intervals).
4128 * - the U2 Exit Latency of the device
4130 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4131 struct usb_endpoint_descriptor
*desc
)
4133 unsigned long long timeout_ns
;
4134 unsigned long long u2_del_ns
;
4136 timeout_ns
= 10 * 1000 * 1000;
4138 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4139 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4140 timeout_ns
= xhci_service_interval_to_ns(desc
);
4142 u2_del_ns
= udev
->bos
->ss_cap
->bU2DevExitLat
* 1000;
4143 if (u2_del_ns
> timeout_ns
)
4144 timeout_ns
= u2_del_ns
;
4146 /* The U2 timeout is encoded in 256us intervals */
4147 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4148 /* If the necessary timeout value is bigger than what we can set in the
4149 * USB 3.0 hub, we have to disable hub-initiated U2.
4151 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4153 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4154 "due to long timeout %llu ms\n", timeout_ns
);
4155 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4158 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4159 struct usb_device
*udev
,
4160 struct usb_endpoint_descriptor
*desc
,
4161 enum usb3_link_state state
,
4164 if (state
== USB3_LPM_U1
) {
4165 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4166 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4168 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4169 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4172 return USB3_LPM_DISABLED
;
4175 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4176 struct usb_device
*udev
,
4177 struct usb_endpoint_descriptor
*desc
,
4178 enum usb3_link_state state
,
4183 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4184 desc
, state
, timeout
);
4186 /* If we found we can't enable hub-initiated LPM, or
4187 * the U1 or U2 exit latency was too high to allow
4188 * device-initiated LPM as well, just stop searching.
4190 if (alt_timeout
== USB3_LPM_DISABLED
||
4191 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4192 *timeout
= alt_timeout
;
4195 if (alt_timeout
> *timeout
)
4196 *timeout
= alt_timeout
;
4200 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4201 struct usb_device
*udev
,
4202 struct usb_host_interface
*alt
,
4203 enum usb3_link_state state
,
4208 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4209 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4210 &alt
->endpoint
[j
].desc
, state
, timeout
))
4217 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4218 enum usb3_link_state state
)
4220 struct usb_device
*parent
;
4221 unsigned int num_hubs
;
4223 if (state
== USB3_LPM_U2
)
4226 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4227 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4228 parent
= parent
->parent
)
4234 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4235 " below second-tier hub.\n");
4236 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4237 "to decrease power consumption.\n");
4241 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4242 struct usb_device
*udev
,
4243 enum usb3_link_state state
)
4245 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4246 return xhci_check_intel_tier_policy(udev
, state
);
4250 /* Returns the U1 or U2 timeout that should be enabled.
4251 * If the tier check or timeout setting functions return with a non-zero exit
4252 * code, that means the timeout value has been finalized and we shouldn't look
4253 * at any more endpoints.
4255 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4256 struct usb_device
*udev
, enum usb3_link_state state
)
4258 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4259 struct usb_host_config
*config
;
4262 u16 timeout
= USB3_LPM_DISABLED
;
4264 if (state
== USB3_LPM_U1
)
4266 else if (state
== USB3_LPM_U2
)
4269 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4274 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4277 /* Gather some information about the currently installed configuration
4278 * and alternate interface settings.
4280 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4284 config
= udev
->actconfig
;
4288 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4289 struct usb_driver
*driver
;
4290 struct usb_interface
*intf
= config
->interface
[i
];
4295 /* Check if any currently bound drivers want hub-initiated LPM
4298 if (intf
->dev
.driver
) {
4299 driver
= to_usb_driver(intf
->dev
.driver
);
4300 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4301 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4302 "at request of driver %s\n",
4303 state_name
, driver
->name
);
4304 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4308 /* Not sure how this could happen... */
4309 if (!intf
->cur_altsetting
)
4312 if (xhci_update_timeout_for_interface(xhci
, udev
,
4313 intf
->cur_altsetting
,
4321 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4322 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4324 static int xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
4325 struct usb_device
*udev
, u16 max_exit_latency
)
4327 struct xhci_virt_device
*virt_dev
;
4328 struct xhci_command
*command
;
4329 struct xhci_input_control_ctx
*ctrl_ctx
;
4330 struct xhci_slot_ctx
*slot_ctx
;
4331 unsigned long flags
;
4334 spin_lock_irqsave(&xhci
->lock
, flags
);
4335 if (max_exit_latency
== xhci
->devs
[udev
->slot_id
]->current_mel
) {
4336 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4340 /* Attempt to issue an Evaluate Context command to change the MEL. */
4341 virt_dev
= xhci
->devs
[udev
->slot_id
];
4342 command
= xhci
->lpm_command
;
4343 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
4344 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4346 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
4347 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4348 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
4349 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
4350 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
4352 xhci_dbg(xhci
, "Set up evaluate context for LPM MEL change.\n");
4353 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
4354 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
4356 /* Issue and wait for the evaluate context command. */
4357 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
4359 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
4360 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
4363 spin_lock_irqsave(&xhci
->lock
, flags
);
4364 virt_dev
->current_mel
= max_exit_latency
;
4365 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4370 static int calculate_max_exit_latency(struct usb_device
*udev
,
4371 enum usb3_link_state state_changed
,
4372 u16 hub_encoded_timeout
)
4374 unsigned long long u1_mel_us
= 0;
4375 unsigned long long u2_mel_us
= 0;
4376 unsigned long long mel_us
= 0;
4382 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4383 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4384 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4385 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4387 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4388 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4389 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4390 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4392 /* If U1 was already enabled and we're not disabling it,
4393 * or we're going to enable U1, account for the U1 max exit latency.
4395 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4397 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4398 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4400 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4402 if (u1_mel_us
> u2_mel_us
)
4406 /* xHCI host controller max exit latency field is only 16 bits wide. */
4407 if (mel_us
> MAX_EXIT
) {
4408 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4409 "is too big.\n", mel_us
);
4415 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4416 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4417 struct usb_device
*udev
, enum usb3_link_state state
)
4419 struct xhci_hcd
*xhci
;
4420 u16 hub_encoded_timeout
;
4424 xhci
= hcd_to_xhci(hcd
);
4425 /* The LPM timeout values are pretty host-controller specific, so don't
4426 * enable hub-initiated timeouts unless the vendor has provided
4427 * information about their timeout algorithm.
4429 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4430 !xhci
->devs
[udev
->slot_id
])
4431 return USB3_LPM_DISABLED
;
4433 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4434 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4436 /* Max Exit Latency is too big, disable LPM. */
4437 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4441 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4444 return hub_encoded_timeout
;
4447 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4448 struct usb_device
*udev
, enum usb3_link_state state
)
4450 struct xhci_hcd
*xhci
;
4454 xhci
= hcd_to_xhci(hcd
);
4455 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4456 !xhci
->devs
[udev
->slot_id
])
4459 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4460 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4465 #else /* CONFIG_PM */
4467 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4468 struct usb_device
*udev
, enum usb3_link_state state
)
4470 return USB3_LPM_DISABLED
;
4473 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4474 struct usb_device
*udev
, enum usb3_link_state state
)
4478 #endif /* CONFIG_PM */
4480 /*-------------------------------------------------------------------------*/
4482 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4483 * internal data structures for the device.
4485 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4486 struct usb_tt
*tt
, gfp_t mem_flags
)
4488 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4489 struct xhci_virt_device
*vdev
;
4490 struct xhci_command
*config_cmd
;
4491 struct xhci_input_control_ctx
*ctrl_ctx
;
4492 struct xhci_slot_ctx
*slot_ctx
;
4493 unsigned long flags
;
4494 unsigned think_time
;
4497 /* Ignore root hubs */
4501 vdev
= xhci
->devs
[hdev
->slot_id
];
4503 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4506 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4508 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4512 spin_lock_irqsave(&xhci
->lock
, flags
);
4513 if (hdev
->speed
== USB_SPEED_HIGH
&&
4514 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4515 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4516 xhci_free_command(xhci
, config_cmd
);
4517 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4521 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4522 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4523 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4524 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4525 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4527 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4528 if (xhci
->hci_version
> 0x95) {
4529 xhci_dbg(xhci
, "xHCI version %x needs hub "
4530 "TT think time and number of ports\n",
4531 (unsigned int) xhci
->hci_version
);
4532 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4533 /* Set TT think time - convert from ns to FS bit times.
4534 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4535 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4537 * xHCI 1.0: this field shall be 0 if the device is not a
4540 think_time
= tt
->think_time
;
4541 if (think_time
!= 0)
4542 think_time
= (think_time
/ 666) - 1;
4543 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4544 slot_ctx
->tt_info
|=
4545 cpu_to_le32(TT_THINK_TIME(think_time
));
4547 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4548 "TT think time or number of ports\n",
4549 (unsigned int) xhci
->hci_version
);
4551 slot_ctx
->dev_state
= 0;
4552 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4554 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4555 (xhci
->hci_version
> 0x95) ?
4556 "configure endpoint" : "evaluate context");
4557 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4558 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4560 /* Issue and wait for the configure endpoint or
4561 * evaluate context command.
4563 if (xhci
->hci_version
> 0x95)
4564 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4567 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4570 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4571 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4573 xhci_free_command(xhci
, config_cmd
);
4577 int xhci_get_frame(struct usb_hcd
*hcd
)
4579 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4580 /* EHCI mods by the periodic size. Why? */
4581 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4584 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4586 struct xhci_hcd
*xhci
;
4587 struct device
*dev
= hcd
->self
.controller
;
4591 /* Accept arbitrarily long scatter-gather lists */
4592 hcd
->self
.sg_tablesize
= ~0;
4593 /* XHCI controllers don't stop the ep queue on short packets :| */
4594 hcd
->self
.no_stop_on_short
= 1;
4596 if (usb_hcd_is_primary_hcd(hcd
)) {
4597 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4600 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4601 xhci
->main_hcd
= hcd
;
4602 /* Mark the first roothub as being USB 2.0.
4603 * The xHCI driver will register the USB 3.0 roothub.
4605 hcd
->speed
= HCD_USB2
;
4606 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4608 * USB 2.0 roothub under xHCI has an integrated TT,
4609 * (rate matching hub) as opposed to having an OHCI/UHCI
4610 * companion controller.
4614 /* xHCI private pointer was set in xhci_pci_probe for the second
4615 * registered roothub.
4617 xhci
= hcd_to_xhci(hcd
);
4618 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4619 if (HCC_64BIT_ADDR(temp
)) {
4620 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4621 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4623 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4628 xhci
->cap_regs
= hcd
->regs
;
4629 xhci
->op_regs
= hcd
->regs
+
4630 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4631 xhci
->run_regs
= hcd
->regs
+
4632 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4633 /* Cache read-only capability registers */
4634 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4635 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4636 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4637 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4638 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4639 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4640 xhci_print_registers(xhci
);
4642 get_quirks(dev
, xhci
);
4644 /* Make sure the HC is halted. */
4645 retval
= xhci_halt(xhci
);
4649 xhci_dbg(xhci
, "Resetting HCD\n");
4650 /* Reset the internal HC memory state and registers. */
4651 retval
= xhci_reset(xhci
);
4654 xhci_dbg(xhci
, "Reset complete\n");
4656 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4657 if (HCC_64BIT_ADDR(temp
)) {
4658 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4659 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4661 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4664 xhci_dbg(xhci
, "Calling HCD init\n");
4665 /* Initialize HCD and host controller data structures. */
4666 retval
= xhci_init(hcd
);
4669 xhci_dbg(xhci
, "Called HCD init\n");
4676 MODULE_DESCRIPTION(DRIVER_DESC
);
4677 MODULE_AUTHOR(DRIVER_AUTHOR
);
4678 MODULE_LICENSE("GPL");
4680 static int __init
xhci_hcd_init(void)
4684 retval
= xhci_register_pci();
4686 printk(KERN_DEBUG
"Problem registering PCI driver.");
4689 retval
= xhci_register_plat();
4691 printk(KERN_DEBUG
"Problem registering platform driver.");
4695 * Check the compiler generated sizes of structures that must be laid
4696 * out in specific ways for hardware access.
4698 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4699 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4700 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4701 /* xhci_device_control has eight fields, and also
4702 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4704 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4705 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4706 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4707 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4708 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4709 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4710 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4713 xhci_unregister_pci();
4716 module_init(xhci_hcd_init
);
4718 static void __exit
xhci_hcd_cleanup(void)
4720 xhci_unregister_pci();
4721 xhci_unregister_plat();
4723 module_exit(xhci_hcd_cleanup
);