1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
5 * Copyright (C) 2008 Intel Corp.
8 * Some code borrowed from the Linux EHCI driver.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software Foundation,
21 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/pci.h>
25 #include <linux/irq.h>
26 #include <linux/log2.h>
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/slab.h>
30 #include <linux/dmi.h>
31 #include <linux/dma-mapping.h>
34 #include "xhci-trace.h"
36 #include "xhci-debugfs.h"
38 #define DRIVER_AUTHOR "Sarah Sharp"
39 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
41 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
43 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
44 static int link_quirk
;
45 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
46 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
48 static unsigned int quirks
;
49 module_param(quirks
, uint
, S_IRUGO
);
50 MODULE_PARM_DESC(quirks
, "Bit flags for quirks to be enabled as default");
52 /* TODO: copied from ehci-hcd.c - can this be refactored? */
54 * xhci_handshake - spin reading hc until handshake completes or fails
55 * @ptr: address of hc register to be read
56 * @mask: bits to look at in result of read
57 * @done: value of those bits when handshake succeeds
58 * @usec: timeout in microseconds
60 * Returns negative errno, or zero on success
62 * Success happens when the "mask" bits have the specified value (hardware
63 * handshake done). There are two failure modes: "usec" have passed (major
64 * hardware flakeout), or the register reads as all-ones (hardware removed).
66 int xhci_handshake(void __iomem
*ptr
, u32 mask
, u32 done
, int usec
)
72 if (result
== ~(u32
)0) /* card removed */
84 * Disable interrupts and begin the xHCI halting process.
86 void xhci_quiesce(struct xhci_hcd
*xhci
)
93 halted
= readl(&xhci
->op_regs
->status
) & STS_HALT
;
97 cmd
= readl(&xhci
->op_regs
->command
);
99 writel(cmd
, &xhci
->op_regs
->command
);
103 * Force HC into halt state.
105 * Disable any IRQs and clear the run/stop bit.
106 * HC will complete any current and actively pipelined transactions, and
107 * should halt within 16 ms of the run/stop bit being cleared.
108 * Read HC Halted bit in the status register to see when the HC is finished.
110 int xhci_halt(struct xhci_hcd
*xhci
)
113 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Halt the HC");
116 ret
= xhci_handshake(&xhci
->op_regs
->status
,
117 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
119 xhci_warn(xhci
, "Host halt failed, %d\n", ret
);
122 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
123 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
128 * Set the run bit and wait for the host to be running.
130 int xhci_start(struct xhci_hcd
*xhci
)
135 temp
= readl(&xhci
->op_regs
->command
);
137 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Turn on HC, cmd = 0x%x.",
139 writel(temp
, &xhci
->op_regs
->command
);
142 * Wait for the HCHalted Status bit to be 0 to indicate the host is
145 ret
= xhci_handshake(&xhci
->op_regs
->status
,
146 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
147 if (ret
== -ETIMEDOUT
)
148 xhci_err(xhci
, "Host took too long to start, "
149 "waited %u microseconds.\n",
152 /* clear state flags. Including dying, halted or removing */
161 * This resets pipelines, timers, counters, state machines, etc.
162 * Transactions will be terminated immediately, and operational registers
163 * will be set to their defaults.
165 int xhci_reset(struct xhci_hcd
*xhci
)
171 state
= readl(&xhci
->op_regs
->status
);
173 if (state
== ~(u32
)0) {
174 xhci_warn(xhci
, "Host not accessible, reset failed.\n");
178 if ((state
& STS_HALT
) == 0) {
179 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
183 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Reset the HC");
184 command
= readl(&xhci
->op_regs
->command
);
185 command
|= CMD_RESET
;
186 writel(command
, &xhci
->op_regs
->command
);
188 /* Existing Intel xHCI controllers require a delay of 1 mS,
189 * after setting the CMD_RESET bit, and before accessing any
190 * HC registers. This allows the HC to complete the
191 * reset operation and be ready for HC register access.
192 * Without this delay, the subsequent HC register access,
193 * may result in a system hang very rarely.
195 if (xhci
->quirks
& XHCI_INTEL_HOST
)
198 ret
= xhci_handshake(&xhci
->op_regs
->command
,
199 CMD_RESET
, 0, 10 * 1000 * 1000);
203 if (xhci
->quirks
& XHCI_ASMEDIA_MODIFY_FLOWCONTROL
)
204 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
));
206 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
207 "Wait for controller to be ready for doorbell rings");
209 * xHCI cannot write to any doorbells or operational registers other
210 * than status until the "Controller Not Ready" flag is cleared.
212 ret
= xhci_handshake(&xhci
->op_regs
->status
,
213 STS_CNR
, 0, 10 * 1000 * 1000);
215 for (i
= 0; i
< 2; i
++) {
216 xhci
->bus_state
[i
].port_c_suspend
= 0;
217 xhci
->bus_state
[i
].suspended_ports
= 0;
218 xhci
->bus_state
[i
].resuming_ports
= 0;
225 #ifdef CONFIG_USB_PCI
229 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
233 * TODO:Check with MSI Soc for sysdev
235 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
237 ret
= pci_alloc_irq_vectors(pdev
, 1, 1, PCI_IRQ_MSI
);
239 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
240 "failed to allocate MSI entry");
244 ret
= request_irq(pdev
->irq
, xhci_msi_irq
,
245 0, "xhci_hcd", xhci_to_hcd(xhci
));
247 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
248 "disable MSI interrupt");
249 pci_free_irq_vectors(pdev
);
258 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
261 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
262 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
265 * calculate number of msi-x vectors supported.
266 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
267 * with max number of interrupters based on the xhci HCSPARAMS1.
268 * - num_online_cpus: maximum msi-x vectors per CPUs core.
269 * Add additional 1 vector to ensure always available interrupt.
271 xhci
->msix_count
= min(num_online_cpus() + 1,
272 HCS_MAX_INTRS(xhci
->hcs_params1
));
274 ret
= pci_alloc_irq_vectors(pdev
, xhci
->msix_count
, xhci
->msix_count
,
277 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
278 "Failed to enable MSI-X");
282 for (i
= 0; i
< xhci
->msix_count
; i
++) {
283 ret
= request_irq(pci_irq_vector(pdev
, i
), xhci_msi_irq
, 0,
284 "xhci_hcd", xhci_to_hcd(xhci
));
289 hcd
->msix_enabled
= 1;
293 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "disable MSI-X interrupt");
295 free_irq(pci_irq_vector(pdev
, i
), xhci_to_hcd(xhci
));
296 pci_free_irq_vectors(pdev
);
300 /* Free any IRQs and disable MSI-X */
301 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
303 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
304 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
306 if (xhci
->quirks
& XHCI_PLAT
)
309 /* return if using legacy interrupt */
313 if (hcd
->msix_enabled
) {
316 for (i
= 0; i
< xhci
->msix_count
; i
++)
317 free_irq(pci_irq_vector(pdev
, i
), xhci_to_hcd(xhci
));
319 free_irq(pci_irq_vector(pdev
, 0), xhci_to_hcd(xhci
));
322 pci_free_irq_vectors(pdev
);
323 hcd
->msix_enabled
= 0;
326 static void __maybe_unused
xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
328 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
330 if (hcd
->msix_enabled
) {
331 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
334 for (i
= 0; i
< xhci
->msix_count
; i
++)
335 synchronize_irq(pci_irq_vector(pdev
, i
));
339 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
341 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
342 struct pci_dev
*pdev
;
345 /* The xhci platform device has set up IRQs through usb_add_hcd. */
346 if (xhci
->quirks
& XHCI_PLAT
)
349 pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
351 * Some Fresco Logic host controllers advertise MSI, but fail to
352 * generate interrupts. Don't even try to enable MSI.
354 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
357 /* unregister the legacy interrupt */
359 free_irq(hcd
->irq
, hcd
);
362 ret
= xhci_setup_msix(xhci
);
364 /* fall back to msi*/
365 ret
= xhci_setup_msi(xhci
);
368 hcd
->msi_enabled
= 1;
373 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
378 if (!strlen(hcd
->irq_descr
))
379 snprintf(hcd
->irq_descr
, sizeof(hcd
->irq_descr
), "%s:usb%d",
380 hcd
->driver
->description
, hcd
->self
.busnum
);
382 /* fall back to legacy interrupt*/
383 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
384 hcd
->irq_descr
, hcd
);
386 xhci_err(xhci
, "request interrupt %d failed\n",
390 hcd
->irq
= pdev
->irq
;
396 static inline int xhci_try_enable_msi(struct usb_hcd
*hcd
)
401 static inline void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
405 static inline void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
411 static void compliance_mode_recovery(unsigned long arg
)
413 struct xhci_hcd
*xhci
;
418 xhci
= (struct xhci_hcd
*)arg
;
420 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
421 temp
= readl(xhci
->usb3_ports
[i
]);
422 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
424 * Compliance Mode Detected. Letting USB Core
425 * handle the Warm Reset
427 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
428 "Compliance mode detected->port %d",
430 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
431 "Attempting compliance mode recovery");
432 hcd
= xhci
->shared_hcd
;
434 if (hcd
->state
== HC_STATE_SUSPENDED
)
435 usb_hcd_resume_root_hub(hcd
);
437 usb_hcd_poll_rh_status(hcd
);
441 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
442 mod_timer(&xhci
->comp_mode_recovery_timer
,
443 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
447 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
448 * that causes ports behind that hardware to enter compliance mode sometimes.
449 * The quirk creates a timer that polls every 2 seconds the link state of
450 * each host controller's port and recovers it by issuing a Warm reset
451 * if Compliance mode is detected, otherwise the port will become "dead" (no
452 * device connections or disconnections will be detected anymore). Becasue no
453 * status event is generated when entering compliance mode (per xhci spec),
454 * this quirk is needed on systems that have the failing hardware installed.
456 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
458 xhci
->port_status_u0
= 0;
459 setup_timer(&xhci
->comp_mode_recovery_timer
,
460 compliance_mode_recovery
, (unsigned long)xhci
);
461 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
462 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
464 add_timer(&xhci
->comp_mode_recovery_timer
);
465 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
466 "Compliance mode recovery timer initialized");
470 * This function identifies the systems that have installed the SN65LVPE502CP
471 * USB3.0 re-driver and that need the Compliance Mode Quirk.
473 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
475 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
477 const char *dmi_product_name
, *dmi_sys_vendor
;
479 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
480 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
481 if (!dmi_product_name
|| !dmi_sys_vendor
)
484 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
487 if (strstr(dmi_product_name
, "Z420") ||
488 strstr(dmi_product_name
, "Z620") ||
489 strstr(dmi_product_name
, "Z820") ||
490 strstr(dmi_product_name
, "Z1 Workstation"))
496 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
498 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
503 * Initialize memory for HCD and xHC (one-time init).
505 * Program the PAGESIZE register, initialize the device context array, create
506 * device contexts (?), set up a command ring segment (or two?), create event
507 * ring (one for now).
509 static int xhci_init(struct usb_hcd
*hcd
)
511 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
514 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_init");
515 spin_lock_init(&xhci
->lock
);
516 if (xhci
->hci_version
== 0x95 && link_quirk
) {
517 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
518 "QUIRK: Not clearing Link TRB chain bits.");
519 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
521 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
522 "xHCI doesn't need link TRB QUIRK");
524 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
525 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "Finished xhci_init");
527 /* Initializing Compliance Mode Recovery Data If Needed */
528 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
529 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
530 compliance_mode_recovery_timer_init(xhci
);
536 /*-------------------------------------------------------------------------*/
539 static int xhci_run_finished(struct xhci_hcd
*xhci
)
541 if (xhci_start(xhci
)) {
545 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
546 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
548 if (xhci
->quirks
& XHCI_NEC_HOST
)
549 xhci_ring_cmd_db(xhci
);
551 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
552 "Finished xhci_run for USB3 roothub");
557 * Start the HC after it was halted.
559 * This function is called by the USB core when the HC driver is added.
560 * Its opposite is xhci_stop().
562 * xhci_init() must be called once before this function can be called.
563 * Reset the HC, enable device slot contexts, program DCBAAP, and
564 * set command ring pointer and event ring pointer.
566 * Setup MSI-X vectors and enable interrupts.
568 int xhci_run(struct usb_hcd
*hcd
)
573 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
575 /* Start the xHCI host controller running only after the USB 2.0 roothub
579 hcd
->uses_new_polling
= 1;
580 if (!usb_hcd_is_primary_hcd(hcd
))
581 return xhci_run_finished(xhci
);
583 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_run");
585 ret
= xhci_try_enable_msi(hcd
);
589 xhci_dbg_cmd_ptrs(xhci
);
591 xhci_dbg(xhci
, "ERST memory map follows:\n");
592 xhci_dbg_erst(xhci
, &xhci
->erst
);
593 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
594 temp_64
&= ~ERST_PTR_MASK
;
595 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
596 "ERST deq = 64'h%0lx", (long unsigned int) temp_64
);
598 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
599 "// Set the interrupt modulation register");
600 temp
= readl(&xhci
->ir_set
->irq_control
);
601 temp
&= ~ER_IRQ_INTERVAL_MASK
;
603 * the increment interval is 8 times as much as that defined
604 * in xHCI spec on MTK's controller
606 temp
|= (u32
) ((xhci
->quirks
& XHCI_MTK_HOST
) ? 20 : 160);
607 writel(temp
, &xhci
->ir_set
->irq_control
);
609 /* Set the HCD state before we enable the irqs */
610 temp
= readl(&xhci
->op_regs
->command
);
612 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
613 "// Enable interrupts, cmd = 0x%x.", temp
);
614 writel(temp
, &xhci
->op_regs
->command
);
616 temp
= readl(&xhci
->ir_set
->irq_pending
);
617 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
618 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
619 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
620 writel(ER_IRQ_ENABLE(temp
), &xhci
->ir_set
->irq_pending
);
621 xhci_print_ir_set(xhci
, 0);
623 if (xhci
->quirks
& XHCI_NEC_HOST
) {
624 struct xhci_command
*command
;
626 command
= xhci_alloc_command(xhci
, false, false, GFP_KERNEL
);
630 ret
= xhci_queue_vendor_command(xhci
, command
, 0, 0, 0,
631 TRB_TYPE(TRB_NEC_GET_FW
));
633 xhci_free_command(xhci
, command
);
635 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
636 "Finished xhci_run for USB2 roothub");
638 xhci_debugfs_init(xhci
);
642 EXPORT_SYMBOL_GPL(xhci_run
);
647 * This function is called by the USB core when the HC driver is removed.
648 * Its opposite is xhci_run().
650 * Disable device contexts, disable IRQs, and quiesce the HC.
651 * Reset the HC, finish any completed transactions, and cleanup memory.
653 static void xhci_stop(struct usb_hcd
*hcd
)
656 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
658 mutex_lock(&xhci
->mutex
);
660 /* Only halt host and free memory after both hcds are removed */
661 if (!usb_hcd_is_primary_hcd(hcd
)) {
662 /* usb core will free this hcd shortly, unset pointer */
663 xhci
->shared_hcd
= NULL
;
664 mutex_unlock(&xhci
->mutex
);
668 xhci_debugfs_exit(xhci
);
670 spin_lock_irq(&xhci
->lock
);
671 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
672 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
675 spin_unlock_irq(&xhci
->lock
);
677 xhci_cleanup_msix(xhci
);
679 /* Deleting Compliance Mode Recovery Timer */
680 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
681 (!(xhci_all_ports_seen_u0(xhci
)))) {
682 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
683 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
684 "%s: compliance mode recovery timer deleted",
688 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
691 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
692 "// Disabling event ring interrupts");
693 temp
= readl(&xhci
->op_regs
->status
);
694 writel((temp
& ~0x1fff) | STS_EINT
, &xhci
->op_regs
->status
);
695 temp
= readl(&xhci
->ir_set
->irq_pending
);
696 writel(ER_IRQ_DISABLE(temp
), &xhci
->ir_set
->irq_pending
);
697 xhci_print_ir_set(xhci
, 0);
699 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "cleaning up memory");
700 xhci_mem_cleanup(xhci
);
701 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
702 "xhci_stop completed - status = %x",
703 readl(&xhci
->op_regs
->status
));
704 mutex_unlock(&xhci
->mutex
);
708 * Shutdown HC (not bus-specific)
710 * This is called when the machine is rebooting or halting. We assume that the
711 * machine will be powered off, and the HC's internal state will be reset.
712 * Don't bother to free memory.
714 * This will only ever be called with the main usb_hcd (the USB3 roothub).
716 static void xhci_shutdown(struct usb_hcd
*hcd
)
718 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
720 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
721 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.sysdev
));
723 spin_lock_irq(&xhci
->lock
);
725 /* Workaround for spurious wakeups at shutdown with HSW */
726 if (xhci
->quirks
& XHCI_SPURIOUS_WAKEUP
)
728 spin_unlock_irq(&xhci
->lock
);
730 xhci_cleanup_msix(xhci
);
732 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
733 "xhci_shutdown completed - status = %x",
734 readl(&xhci
->op_regs
->status
));
736 /* Yet another workaround for spurious wakeups at shutdown with HSW */
737 if (xhci
->quirks
& XHCI_SPURIOUS_WAKEUP
)
738 pci_set_power_state(to_pci_dev(hcd
->self
.sysdev
), PCI_D3hot
);
742 static void xhci_save_registers(struct xhci_hcd
*xhci
)
744 xhci
->s3
.command
= readl(&xhci
->op_regs
->command
);
745 xhci
->s3
.dev_nt
= readl(&xhci
->op_regs
->dev_notification
);
746 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
747 xhci
->s3
.config_reg
= readl(&xhci
->op_regs
->config_reg
);
748 xhci
->s3
.erst_size
= readl(&xhci
->ir_set
->erst_size
);
749 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
750 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
751 xhci
->s3
.irq_pending
= readl(&xhci
->ir_set
->irq_pending
);
752 xhci
->s3
.irq_control
= readl(&xhci
->ir_set
->irq_control
);
755 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
757 writel(xhci
->s3
.command
, &xhci
->op_regs
->command
);
758 writel(xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
759 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
760 writel(xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
761 writel(xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
762 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
763 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
764 writel(xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
765 writel(xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
768 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
772 /* step 2: initialize command ring buffer */
773 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
774 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
775 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
776 xhci
->cmd_ring
->dequeue
) &
777 (u64
) ~CMD_RING_RSVD_BITS
) |
778 xhci
->cmd_ring
->cycle_state
;
779 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
780 "// Setting command ring address to 0x%llx",
781 (long unsigned long) val_64
);
782 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
786 * The whole command ring must be cleared to zero when we suspend the host.
788 * The host doesn't save the command ring pointer in the suspend well, so we
789 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
790 * aligned, because of the reserved bits in the command ring dequeue pointer
791 * register. Therefore, we can't just set the dequeue pointer back in the
792 * middle of the ring (TRBs are 16-byte aligned).
794 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
796 struct xhci_ring
*ring
;
797 struct xhci_segment
*seg
;
799 ring
= xhci
->cmd_ring
;
803 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
804 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
805 cpu_to_le32(~TRB_CYCLE
);
807 } while (seg
!= ring
->deq_seg
);
809 /* Reset the software enqueue and dequeue pointers */
810 ring
->deq_seg
= ring
->first_seg
;
811 ring
->dequeue
= ring
->first_seg
->trbs
;
812 ring
->enq_seg
= ring
->deq_seg
;
813 ring
->enqueue
= ring
->dequeue
;
815 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
817 * Ring is now zeroed, so the HW should look for change of ownership
818 * when the cycle bit is set to 1.
820 ring
->cycle_state
= 1;
823 * Reset the hardware dequeue pointer.
824 * Yes, this will need to be re-written after resume, but we're paranoid
825 * and want to make sure the hardware doesn't access bogus memory
826 * because, say, the BIOS or an SMI started the host without changing
827 * the command ring pointers.
829 xhci_set_cmd_ring_deq(xhci
);
832 static void xhci_disable_port_wake_on_bits(struct xhci_hcd
*xhci
)
835 __le32 __iomem
**port_array
;
839 spin_lock_irqsave(&xhci
->lock
, flags
);
841 /* disable usb3 ports Wake bits */
842 port_index
= xhci
->num_usb3_ports
;
843 port_array
= xhci
->usb3_ports
;
844 while (port_index
--) {
845 t1
= readl(port_array
[port_index
]);
846 t1
= xhci_port_state_to_neutral(t1
);
847 t2
= t1
& ~PORT_WAKE_BITS
;
849 writel(t2
, port_array
[port_index
]);
852 /* disable usb2 ports Wake bits */
853 port_index
= xhci
->num_usb2_ports
;
854 port_array
= xhci
->usb2_ports
;
855 while (port_index
--) {
856 t1
= readl(port_array
[port_index
]);
857 t1
= xhci_port_state_to_neutral(t1
);
858 t2
= t1
& ~PORT_WAKE_BITS
;
860 writel(t2
, port_array
[port_index
]);
863 spin_unlock_irqrestore(&xhci
->lock
, flags
);
867 * Stop HC (not bus-specific)
869 * This is called when the machine transition into S3/S4 mode.
872 int xhci_suspend(struct xhci_hcd
*xhci
, bool do_wakeup
)
875 unsigned int delay
= XHCI_MAX_HALT_USEC
;
876 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
882 if (hcd
->state
!= HC_STATE_SUSPENDED
||
883 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
886 /* Clear root port wake on bits if wakeup not allowed. */
888 xhci_disable_port_wake_on_bits(xhci
);
890 /* Don't poll the roothubs on bus suspend. */
891 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
892 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
893 del_timer_sync(&hcd
->rh_timer
);
894 clear_bit(HCD_FLAG_POLL_RH
, &xhci
->shared_hcd
->flags
);
895 del_timer_sync(&xhci
->shared_hcd
->rh_timer
);
897 spin_lock_irq(&xhci
->lock
);
898 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
899 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
900 /* step 1: stop endpoint */
901 /* skipped assuming that port suspend has done */
903 /* step 2: clear Run/Stop bit */
904 command
= readl(&xhci
->op_regs
->command
);
906 writel(command
, &xhci
->op_regs
->command
);
908 /* Some chips from Fresco Logic need an extraordinary delay */
909 delay
*= (xhci
->quirks
& XHCI_SLOW_SUSPEND
) ? 10 : 1;
911 if (xhci_handshake(&xhci
->op_regs
->status
,
912 STS_HALT
, STS_HALT
, delay
)) {
913 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
914 spin_unlock_irq(&xhci
->lock
);
917 xhci_clear_command_ring(xhci
);
919 /* step 3: save registers */
920 xhci_save_registers(xhci
);
922 /* step 4: set CSS flag */
923 command
= readl(&xhci
->op_regs
->command
);
925 writel(command
, &xhci
->op_regs
->command
);
926 if (xhci_handshake(&xhci
->op_regs
->status
,
927 STS_SAVE
, 0, 10 * 1000)) {
928 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
929 spin_unlock_irq(&xhci
->lock
);
932 spin_unlock_irq(&xhci
->lock
);
935 * Deleting Compliance Mode Recovery Timer because the xHCI Host
936 * is about to be suspended.
938 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
939 (!(xhci_all_ports_seen_u0(xhci
)))) {
940 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
941 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
942 "%s: compliance mode recovery timer deleted",
946 /* step 5: remove core well power */
947 /* synchronize irq when using MSI-X */
948 xhci_msix_sync_irqs(xhci
);
952 EXPORT_SYMBOL_GPL(xhci_suspend
);
955 * start xHC (not bus-specific)
957 * This is called when the machine transition from S3/S4 mode.
960 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
962 u32 command
, temp
= 0, status
;
963 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
964 struct usb_hcd
*secondary_hcd
;
966 bool comp_timer_running
= false;
971 /* Wait a bit if either of the roothubs need to settle from the
972 * transition into bus suspend.
974 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
976 xhci
->bus_state
[1].next_statechange
))
979 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
980 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
982 spin_lock_irq(&xhci
->lock
);
983 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
987 /* step 1: restore register */
988 xhci_restore_registers(xhci
);
989 /* step 2: initialize command ring buffer */
990 xhci_set_cmd_ring_deq(xhci
);
991 /* step 3: restore state and start state*/
992 /* step 3: set CRS flag */
993 command
= readl(&xhci
->op_regs
->command
);
995 writel(command
, &xhci
->op_regs
->command
);
996 if (xhci_handshake(&xhci
->op_regs
->status
,
997 STS_RESTORE
, 0, 10 * 1000)) {
998 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
999 spin_unlock_irq(&xhci
->lock
);
1002 temp
= readl(&xhci
->op_regs
->status
);
1005 /* If restore operation fails, re-initialize the HC during resume */
1006 if ((temp
& STS_SRE
) || hibernated
) {
1008 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
1009 !(xhci_all_ports_seen_u0(xhci
))) {
1010 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
1011 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1012 "Compliance Mode Recovery Timer deleted!");
1015 /* Let the USB core know _both_ roothubs lost power. */
1016 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
1017 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
1019 xhci_dbg(xhci
, "Stop HCD\n");
1022 spin_unlock_irq(&xhci
->lock
);
1023 xhci_cleanup_msix(xhci
);
1025 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
1026 temp
= readl(&xhci
->op_regs
->status
);
1027 writel((temp
& ~0x1fff) | STS_EINT
, &xhci
->op_regs
->status
);
1028 temp
= readl(&xhci
->ir_set
->irq_pending
);
1029 writel(ER_IRQ_DISABLE(temp
), &xhci
->ir_set
->irq_pending
);
1030 xhci_print_ir_set(xhci
, 0);
1032 xhci_dbg(xhci
, "cleaning up memory\n");
1033 xhci_mem_cleanup(xhci
);
1034 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1035 readl(&xhci
->op_regs
->status
));
1037 /* USB core calls the PCI reinit and start functions twice:
1038 * first with the primary HCD, and then with the secondary HCD.
1039 * If we don't do the same, the host will never be started.
1041 if (!usb_hcd_is_primary_hcd(hcd
))
1042 secondary_hcd
= hcd
;
1044 secondary_hcd
= xhci
->shared_hcd
;
1046 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1047 retval
= xhci_init(hcd
->primary_hcd
);
1050 comp_timer_running
= true;
1052 xhci_dbg(xhci
, "Start the primary HCD\n");
1053 retval
= xhci_run(hcd
->primary_hcd
);
1055 xhci_dbg(xhci
, "Start the secondary HCD\n");
1056 retval
= xhci_run(secondary_hcd
);
1058 hcd
->state
= HC_STATE_SUSPENDED
;
1059 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1063 /* step 4: set Run/Stop bit */
1064 command
= readl(&xhci
->op_regs
->command
);
1066 writel(command
, &xhci
->op_regs
->command
);
1067 xhci_handshake(&xhci
->op_regs
->status
, STS_HALT
,
1070 /* step 5: walk topology and initialize portsc,
1071 * portpmsc and portli
1073 /* this is done in bus_resume */
1075 /* step 6: restart each of the previously
1076 * Running endpoints by ringing their doorbells
1079 spin_unlock_irq(&xhci
->lock
);
1083 /* Resume root hubs only when have pending events. */
1084 status
= readl(&xhci
->op_regs
->status
);
1085 if (status
& STS_EINT
) {
1086 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1087 usb_hcd_resume_root_hub(hcd
);
1092 * If system is subject to the Quirk, Compliance Mode Timer needs to
1093 * be re-initialized Always after a system resume. Ports are subject
1094 * to suffer the Compliance Mode issue again. It doesn't matter if
1095 * ports have entered previously to U0 before system's suspension.
1097 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) && !comp_timer_running
)
1098 compliance_mode_recovery_timer_init(xhci
);
1100 if (xhci
->quirks
& XHCI_ASMEDIA_MODIFY_FLOWCONTROL
)
1101 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd
->self
.controller
));
1103 /* Re-enable port polling. */
1104 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1105 set_bit(HCD_FLAG_POLL_RH
, &xhci
->shared_hcd
->flags
);
1106 usb_hcd_poll_rh_status(xhci
->shared_hcd
);
1107 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1108 usb_hcd_poll_rh_status(hcd
);
1112 EXPORT_SYMBOL_GPL(xhci_resume
);
1113 #endif /* CONFIG_PM */
1115 /*-------------------------------------------------------------------------*/
1118 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1119 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1120 * value to right shift 1 for the bitmask.
1122 * Index = (epnum * 2) + direction - 1,
1123 * where direction = 0 for OUT, 1 for IN.
1124 * For control endpoints, the IN index is used (OUT index is unused), so
1125 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1127 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1130 if (usb_endpoint_xfer_control(desc
))
1131 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1133 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1134 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1138 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1139 * address from the XHCI endpoint index.
1141 unsigned int xhci_get_endpoint_address(unsigned int ep_index
)
1143 unsigned int number
= DIV_ROUND_UP(ep_index
, 2);
1144 unsigned int direction
= ep_index
% 2 ? USB_DIR_OUT
: USB_DIR_IN
;
1145 return direction
| number
;
1148 /* Find the flag for this endpoint (for use in the control context). Use the
1149 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1152 static unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1154 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1157 /* Find the flag for this endpoint (for use in the control context). Use the
1158 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1161 static unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1163 return 1 << (ep_index
+ 1);
1166 /* Compute the last valid endpoint context index. Basically, this is the
1167 * endpoint index plus one. For slot contexts with more than valid endpoint,
1168 * we find the most significant bit set in the added contexts flags.
1169 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1170 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1172 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1174 return fls(added_ctxs
) - 1;
1177 /* Returns 1 if the arguments are OK;
1178 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1180 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1181 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1183 struct xhci_hcd
*xhci
;
1184 struct xhci_virt_device
*virt_dev
;
1186 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1187 pr_debug("xHCI %s called with invalid args\n", func
);
1190 if (!udev
->parent
) {
1191 pr_debug("xHCI %s called for root hub\n", func
);
1195 xhci
= hcd_to_xhci(hcd
);
1196 if (check_virt_dev
) {
1197 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1198 xhci_dbg(xhci
, "xHCI %s called with unaddressed device\n",
1203 virt_dev
= xhci
->devs
[udev
->slot_id
];
1204 if (virt_dev
->udev
!= udev
) {
1205 xhci_dbg(xhci
, "xHCI %s called with udev and "
1206 "virt_dev does not match\n", func
);
1211 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1217 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1218 struct usb_device
*udev
, struct xhci_command
*command
,
1219 bool ctx_change
, bool must_succeed
);
1222 * Full speed devices may have a max packet size greater than 8 bytes, but the
1223 * USB core doesn't know that until it reads the first 8 bytes of the
1224 * descriptor. If the usb_device's max packet size changes after that point,
1225 * we need to issue an evaluate context command and wait on it.
1227 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1228 unsigned int ep_index
, struct urb
*urb
)
1230 struct xhci_container_ctx
*out_ctx
;
1231 struct xhci_input_control_ctx
*ctrl_ctx
;
1232 struct xhci_ep_ctx
*ep_ctx
;
1233 struct xhci_command
*command
;
1234 int max_packet_size
;
1235 int hw_max_packet_size
;
1238 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1239 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1240 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1241 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1242 if (hw_max_packet_size
!= max_packet_size
) {
1243 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1244 "Max Packet Size for ep 0 changed.");
1245 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1246 "Max packet size in usb_device = %d",
1248 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1249 "Max packet size in xHCI HW = %d",
1250 hw_max_packet_size
);
1251 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1252 "Issuing evaluate context command.");
1254 /* Set up the input context flags for the command */
1255 /* FIXME: This won't work if a non-default control endpoint
1256 * changes max packet sizes.
1259 command
= xhci_alloc_command(xhci
, false, true, GFP_KERNEL
);
1263 command
->in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1264 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
1266 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1269 goto command_cleanup
;
1271 /* Set up the modified control endpoint 0 */
1272 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1273 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1275 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
1276 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1277 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1279 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1280 ctrl_ctx
->drop_flags
= 0;
1282 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, command
,
1285 /* Clean up the input context for later use by bandwidth
1288 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1290 kfree(command
->completion
);
1297 * non-error returns are a promise to giveback() the urb later
1298 * we drop ownership so next owner (or urb unlink) can get it
1300 static int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1302 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1303 unsigned long flags
;
1305 unsigned int slot_id
, ep_index
, ep_state
;
1306 struct urb_priv
*urb_priv
;
1309 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1310 true, true, __func__
) <= 0)
1313 slot_id
= urb
->dev
->slot_id
;
1314 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1316 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1317 if (!in_interrupt())
1318 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1322 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1323 num_tds
= urb
->number_of_packets
;
1324 else if (usb_endpoint_is_bulk_out(&urb
->ep
->desc
) &&
1325 urb
->transfer_buffer_length
> 0 &&
1326 urb
->transfer_flags
& URB_ZERO_PACKET
&&
1327 !(urb
->transfer_buffer_length
% usb_endpoint_maxp(&urb
->ep
->desc
)))
1332 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1333 num_tds
* sizeof(struct xhci_td
), mem_flags
);
1337 urb_priv
->num_tds
= num_tds
;
1338 urb_priv
->num_tds_done
= 0;
1339 urb
->hcpriv
= urb_priv
;
1341 trace_xhci_urb_enqueue(urb
);
1343 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1344 /* Check to see if the max packet size for the default control
1345 * endpoint changed during FS device enumeration
1347 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1348 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1351 xhci_urb_free_priv(urb_priv
);
1358 spin_lock_irqsave(&xhci
->lock
, flags
);
1360 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
1361 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
1362 urb
->ep
->desc
.bEndpointAddress
, urb
);
1367 switch (usb_endpoint_type(&urb
->ep
->desc
)) {
1369 case USB_ENDPOINT_XFER_CONTROL
:
1370 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1373 case USB_ENDPOINT_XFER_BULK
:
1374 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
1375 if (ep_state
& (EP_GETTING_STREAMS
| EP_GETTING_NO_STREAMS
)) {
1376 xhci_warn(xhci
, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
1381 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1386 case USB_ENDPOINT_XFER_INT
:
1387 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1391 case USB_ENDPOINT_XFER_ISOC
:
1392 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1398 xhci_urb_free_priv(urb_priv
);
1401 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1406 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1407 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1408 * should pick up where it left off in the TD, unless a Set Transfer Ring
1409 * Dequeue Pointer is issued.
1411 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1412 * the ring. Since the ring is a contiguous structure, they can't be physically
1413 * removed. Instead, there are two options:
1415 * 1) If the HC is in the middle of processing the URB to be canceled, we
1416 * simply move the ring's dequeue pointer past those TRBs using the Set
1417 * Transfer Ring Dequeue Pointer command. This will be the common case,
1418 * when drivers timeout on the last submitted URB and attempt to cancel.
1420 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1421 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1422 * HC will need to invalidate the any TRBs it has cached after the stop
1423 * endpoint command, as noted in the xHCI 0.95 errata.
1425 * 3) The TD may have completed by the time the Stop Endpoint Command
1426 * completes, so software needs to handle that case too.
1428 * This function should protect against the TD enqueueing code ringing the
1429 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1430 * It also needs to account for multiple cancellations on happening at the same
1431 * time for the same endpoint.
1433 * Note that this function can be called in any context, or so says
1434 * usb_hcd_unlink_urb()
1436 static int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1438 unsigned long flags
;
1441 struct xhci_hcd
*xhci
;
1442 struct urb_priv
*urb_priv
;
1444 unsigned int ep_index
;
1445 struct xhci_ring
*ep_ring
;
1446 struct xhci_virt_ep
*ep
;
1447 struct xhci_command
*command
;
1448 struct xhci_virt_device
*vdev
;
1450 xhci
= hcd_to_xhci(hcd
);
1451 spin_lock_irqsave(&xhci
->lock
, flags
);
1453 trace_xhci_urb_dequeue(urb
);
1455 /* Make sure the URB hasn't completed or been unlinked already */
1456 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1460 /* give back URB now if we can't queue it for cancel */
1461 vdev
= xhci
->devs
[urb
->dev
->slot_id
];
1462 urb_priv
= urb
->hcpriv
;
1463 if (!vdev
|| !urb_priv
)
1466 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1467 ep
= &vdev
->eps
[ep_index
];
1468 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1469 if (!ep
|| !ep_ring
)
1472 /* If xHC is dead take it down and return ALL URBs in xhci_hc_died() */
1473 temp
= readl(&xhci
->op_regs
->status
);
1474 if (temp
== ~(u32
)0 || xhci
->xhc_state
& XHCI_STATE_DYING
) {
1479 if (xhci
->xhc_state
& XHCI_STATE_HALTED
) {
1480 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1481 "HC halted, freeing TD manually.");
1482 for (i
= urb_priv
->num_tds_done
;
1483 i
< urb_priv
->num_tds
;
1485 td
= &urb_priv
->td
[i
];
1486 if (!list_empty(&td
->td_list
))
1487 list_del_init(&td
->td_list
);
1488 if (!list_empty(&td
->cancelled_td_list
))
1489 list_del_init(&td
->cancelled_td_list
);
1494 i
= urb_priv
->num_tds_done
;
1495 if (i
< urb_priv
->num_tds
)
1496 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1497 "Cancel URB %p, dev %s, ep 0x%x, "
1498 "starting at offset 0x%llx",
1499 urb
, urb
->dev
->devpath
,
1500 urb
->ep
->desc
.bEndpointAddress
,
1501 (unsigned long long) xhci_trb_virt_to_dma(
1502 urb_priv
->td
[i
].start_seg
,
1503 urb_priv
->td
[i
].first_trb
));
1505 for (; i
< urb_priv
->num_tds
; i
++) {
1506 td
= &urb_priv
->td
[i
];
1507 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1510 /* Queue a stop endpoint command, but only if this is
1511 * the first cancellation to be handled.
1513 if (!(ep
->ep_state
& EP_STOP_CMD_PENDING
)) {
1514 command
= xhci_alloc_command(xhci
, false, false, GFP_ATOMIC
);
1519 ep
->ep_state
|= EP_STOP_CMD_PENDING
;
1520 ep
->stop_cmd_timer
.expires
= jiffies
+
1521 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1522 add_timer(&ep
->stop_cmd_timer
);
1523 xhci_queue_stop_endpoint(xhci
, command
, urb
->dev
->slot_id
,
1525 xhci_ring_cmd_db(xhci
);
1528 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1533 xhci_urb_free_priv(urb_priv
);
1534 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1535 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1536 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1540 /* Drop an endpoint from a new bandwidth configuration for this device.
1541 * Only one call to this function is allowed per endpoint before
1542 * check_bandwidth() or reset_bandwidth() must be called.
1543 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1544 * add the endpoint to the schedule with possibly new parameters denoted by a
1545 * different endpoint descriptor in usb_host_endpoint.
1546 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1549 * The USB core will not allow URBs to be queued to an endpoint that is being
1550 * disabled, so there's no need for mutual exclusion to protect
1551 * the xhci->devs[slot_id] structure.
1553 static int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1554 struct usb_host_endpoint
*ep
)
1556 struct xhci_hcd
*xhci
;
1557 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1558 struct xhci_input_control_ctx
*ctrl_ctx
;
1559 unsigned int ep_index
;
1560 struct xhci_ep_ctx
*ep_ctx
;
1562 u32 new_add_flags
, new_drop_flags
;
1565 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1568 xhci
= hcd_to_xhci(hcd
);
1569 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1572 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1573 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1574 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1575 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1576 __func__
, drop_flag
);
1580 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1581 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1582 ctrl_ctx
= xhci_get_input_control_ctx(in_ctx
);
1584 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1589 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1590 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1591 /* If the HC already knows the endpoint is disabled,
1592 * or the HCD has noted it is disabled, ignore this request
1594 if ((GET_EP_CTX_STATE(ep_ctx
) == EP_STATE_DISABLED
) ||
1595 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1596 xhci_get_endpoint_flag(&ep
->desc
)) {
1597 /* Do not warn when called after a usb_device_reset */
1598 if (xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ring
!= NULL
)
1599 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1604 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1605 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1607 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1608 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1610 xhci_debugfs_remove_endpoint(xhci
, xhci
->devs
[udev
->slot_id
], ep_index
);
1612 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1614 if (xhci
->quirks
& XHCI_MTK_HOST
)
1615 xhci_mtk_drop_ep_quirk(hcd
, udev
, ep
);
1617 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1618 (unsigned int) ep
->desc
.bEndpointAddress
,
1620 (unsigned int) new_drop_flags
,
1621 (unsigned int) new_add_flags
);
1625 /* Add an endpoint to a new possible bandwidth configuration for this device.
1626 * Only one call to this function is allowed per endpoint before
1627 * check_bandwidth() or reset_bandwidth() must be called.
1628 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1629 * add the endpoint to the schedule with possibly new parameters denoted by a
1630 * different endpoint descriptor in usb_host_endpoint.
1631 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1634 * The USB core will not allow URBs to be queued to an endpoint until the
1635 * configuration or alt setting is installed in the device, so there's no need
1636 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1638 static int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1639 struct usb_host_endpoint
*ep
)
1641 struct xhci_hcd
*xhci
;
1642 struct xhci_container_ctx
*in_ctx
;
1643 unsigned int ep_index
;
1644 struct xhci_input_control_ctx
*ctrl_ctx
;
1646 u32 new_add_flags
, new_drop_flags
;
1647 struct xhci_virt_device
*virt_dev
;
1650 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1652 /* So we won't queue a reset ep command for a root hub */
1656 xhci
= hcd_to_xhci(hcd
);
1657 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1660 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1661 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1662 /* FIXME when we have to issue an evaluate endpoint command to
1663 * deal with ep0 max packet size changing once we get the
1666 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1667 __func__
, added_ctxs
);
1671 virt_dev
= xhci
->devs
[udev
->slot_id
];
1672 in_ctx
= virt_dev
->in_ctx
;
1673 ctrl_ctx
= xhci_get_input_control_ctx(in_ctx
);
1675 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1680 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1681 /* If this endpoint is already in use, and the upper layers are trying
1682 * to add it again without dropping it, reject the addition.
1684 if (virt_dev
->eps
[ep_index
].ring
&&
1685 !(le32_to_cpu(ctrl_ctx
->drop_flags
) & added_ctxs
)) {
1686 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1687 "without dropping it.\n",
1688 (unsigned int) ep
->desc
.bEndpointAddress
);
1692 /* If the HCD has already noted the endpoint is enabled,
1693 * ignore this request.
1695 if (le32_to_cpu(ctrl_ctx
->add_flags
) & added_ctxs
) {
1696 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1702 * Configuration and alternate setting changes must be done in
1703 * process context, not interrupt context (or so documenation
1704 * for usb_set_interface() and usb_set_configuration() claim).
1706 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1707 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1708 __func__
, ep
->desc
.bEndpointAddress
);
1712 if (xhci
->quirks
& XHCI_MTK_HOST
) {
1713 ret
= xhci_mtk_add_ep_quirk(hcd
, udev
, ep
);
1715 xhci_ring_free(xhci
, virt_dev
->eps
[ep_index
].new_ring
);
1716 virt_dev
->eps
[ep_index
].new_ring
= NULL
;
1721 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1722 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1724 /* If xhci_endpoint_disable() was called for this endpoint, but the
1725 * xHC hasn't been notified yet through the check_bandwidth() call,
1726 * this re-adds a new state for the endpoint from the new endpoint
1727 * descriptors. We must drop and re-add this endpoint, so we leave the
1730 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1732 /* Store the usb_device pointer for later use */
1735 xhci_debugfs_create_endpoint(xhci
, virt_dev
, ep_index
);
1737 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1738 (unsigned int) ep
->desc
.bEndpointAddress
,
1740 (unsigned int) new_drop_flags
,
1741 (unsigned int) new_add_flags
);
1745 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1747 struct xhci_input_control_ctx
*ctrl_ctx
;
1748 struct xhci_ep_ctx
*ep_ctx
;
1749 struct xhci_slot_ctx
*slot_ctx
;
1752 ctrl_ctx
= xhci_get_input_control_ctx(virt_dev
->in_ctx
);
1754 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1759 /* When a device's add flag and drop flag are zero, any subsequent
1760 * configure endpoint command will leave that endpoint's state
1761 * untouched. Make sure we don't leave any old state in the input
1762 * endpoint contexts.
1764 ctrl_ctx
->drop_flags
= 0;
1765 ctrl_ctx
->add_flags
= 0;
1766 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1767 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1768 /* Endpoint 0 is always valid */
1769 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1770 for (i
= 1; i
< 31; i
++) {
1771 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1772 ep_ctx
->ep_info
= 0;
1773 ep_ctx
->ep_info2
= 0;
1775 ep_ctx
->tx_info
= 0;
1779 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1780 struct usb_device
*udev
, u32
*cmd_status
)
1784 switch (*cmd_status
) {
1785 case COMP_COMMAND_ABORTED
:
1786 case COMP_COMMAND_RING_STOPPED
:
1787 xhci_warn(xhci
, "Timeout while waiting for configure endpoint command\n");
1790 case COMP_RESOURCE_ERROR
:
1791 dev_warn(&udev
->dev
,
1792 "Not enough host controller resources for new device state.\n");
1794 /* FIXME: can we allocate more resources for the HC? */
1796 case COMP_BANDWIDTH_ERROR
:
1797 case COMP_SECONDARY_BANDWIDTH_ERROR
:
1798 dev_warn(&udev
->dev
,
1799 "Not enough bandwidth for new device state.\n");
1801 /* FIXME: can we go back to the old state? */
1803 case COMP_TRB_ERROR
:
1804 /* the HCD set up something wrong */
1805 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1807 "and endpoint is not disabled.\n");
1810 case COMP_INCOMPATIBLE_DEVICE_ERROR
:
1811 dev_warn(&udev
->dev
,
1812 "ERROR: Incompatible device for endpoint configure command.\n");
1816 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1817 "Successful Endpoint Configure command");
1821 xhci_err(xhci
, "ERROR: unexpected command completion code 0x%x.\n",
1829 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1830 struct usb_device
*udev
, u32
*cmd_status
)
1834 switch (*cmd_status
) {
1835 case COMP_COMMAND_ABORTED
:
1836 case COMP_COMMAND_RING_STOPPED
:
1837 xhci_warn(xhci
, "Timeout while waiting for evaluate context command\n");
1840 case COMP_PARAMETER_ERROR
:
1841 dev_warn(&udev
->dev
,
1842 "WARN: xHCI driver setup invalid evaluate context command.\n");
1845 case COMP_SLOT_NOT_ENABLED_ERROR
:
1846 dev_warn(&udev
->dev
,
1847 "WARN: slot not enabled for evaluate context command.\n");
1850 case COMP_CONTEXT_STATE_ERROR
:
1851 dev_warn(&udev
->dev
,
1852 "WARN: invalid context state for evaluate context command.\n");
1855 case COMP_INCOMPATIBLE_DEVICE_ERROR
:
1856 dev_warn(&udev
->dev
,
1857 "ERROR: Incompatible device for evaluate context command.\n");
1860 case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR
:
1861 /* Max Exit Latency too large error */
1862 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1866 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1867 "Successful evaluate context command");
1871 xhci_err(xhci
, "ERROR: unexpected command completion code 0x%x.\n",
1879 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1880 struct xhci_input_control_ctx
*ctrl_ctx
)
1882 u32 valid_add_flags
;
1883 u32 valid_drop_flags
;
1885 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1886 * (bit 1). The default control endpoint is added during the Address
1887 * Device command and is never removed until the slot is disabled.
1889 valid_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
) >> 2;
1890 valid_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
) >> 2;
1892 /* Use hweight32 to count the number of ones in the add flags, or
1893 * number of endpoints added. Don't count endpoints that are changed
1894 * (both added and dropped).
1896 return hweight32(valid_add_flags
) -
1897 hweight32(valid_add_flags
& valid_drop_flags
);
1900 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1901 struct xhci_input_control_ctx
*ctrl_ctx
)
1903 u32 valid_add_flags
;
1904 u32 valid_drop_flags
;
1906 valid_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
) >> 2;
1907 valid_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
) >> 2;
1909 return hweight32(valid_drop_flags
) -
1910 hweight32(valid_add_flags
& valid_drop_flags
);
1914 * We need to reserve the new number of endpoints before the configure endpoint
1915 * command completes. We can't subtract the dropped endpoints from the number
1916 * of active endpoints until the command completes because we can oversubscribe
1917 * the host in this case:
1919 * - the first configure endpoint command drops more endpoints than it adds
1920 * - a second configure endpoint command that adds more endpoints is queued
1921 * - the first configure endpoint command fails, so the config is unchanged
1922 * - the second command may succeed, even though there isn't enough resources
1924 * Must be called with xhci->lock held.
1926 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1927 struct xhci_input_control_ctx
*ctrl_ctx
)
1931 added_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1932 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1933 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1934 "Not enough ep ctxs: "
1935 "%u active, need to add %u, limit is %u.",
1936 xhci
->num_active_eps
, added_eps
,
1937 xhci
->limit_active_eps
);
1940 xhci
->num_active_eps
+= added_eps
;
1941 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1942 "Adding %u ep ctxs, %u now active.", added_eps
,
1943 xhci
->num_active_eps
);
1948 * The configure endpoint was failed by the xHC for some other reason, so we
1949 * need to revert the resources that failed configuration would have used.
1951 * Must be called with xhci->lock held.
1953 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1954 struct xhci_input_control_ctx
*ctrl_ctx
)
1958 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1959 xhci
->num_active_eps
-= num_failed_eps
;
1960 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1961 "Removing %u failed ep ctxs, %u now active.",
1963 xhci
->num_active_eps
);
1967 * Now that the command has completed, clean up the active endpoint count by
1968 * subtracting out the endpoints that were dropped (but not changed).
1970 * Must be called with xhci->lock held.
1972 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1973 struct xhci_input_control_ctx
*ctrl_ctx
)
1975 u32 num_dropped_eps
;
1977 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, ctrl_ctx
);
1978 xhci
->num_active_eps
-= num_dropped_eps
;
1979 if (num_dropped_eps
)
1980 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1981 "Removing %u dropped ep ctxs, %u now active.",
1983 xhci
->num_active_eps
);
1986 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
1988 switch (udev
->speed
) {
1990 case USB_SPEED_FULL
:
1992 case USB_SPEED_HIGH
:
1994 case USB_SPEED_SUPER
:
1995 case USB_SPEED_SUPER_PLUS
:
1997 case USB_SPEED_UNKNOWN
:
1998 case USB_SPEED_WIRELESS
:
2000 /* Should never happen */
2006 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
2008 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
2010 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2015 /* If we are changing a LS/FS device under a HS hub,
2016 * make sure (if we are activating a new TT) that the HS bus has enough
2017 * bandwidth for this new TT.
2019 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2020 struct xhci_virt_device
*virt_dev
,
2023 struct xhci_interval_bw_table
*bw_table
;
2024 struct xhci_tt_bw_info
*tt_info
;
2026 /* Find the bandwidth table for the root port this TT is attached to. */
2027 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2028 tt_info
= virt_dev
->tt_info
;
2029 /* If this TT already had active endpoints, the bandwidth for this TT
2030 * has already been added. Removing all periodic endpoints (and thus
2031 * making the TT enactive) will only decrease the bandwidth used.
2035 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2036 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2040 /* Not sure why we would have no new active endpoints...
2042 * Maybe because of an Evaluate Context change for a hub update or a
2043 * control endpoint 0 max packet size change?
2044 * FIXME: skip the bandwidth calculation in that case.
2049 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2050 struct xhci_virt_device
*virt_dev
)
2052 unsigned int bw_reserved
;
2054 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2055 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2058 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2059 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2066 * This algorithm is a very conservative estimate of the worst-case scheduling
2067 * scenario for any one interval. The hardware dynamically schedules the
2068 * packets, so we can't tell which microframe could be the limiting factor in
2069 * the bandwidth scheduling. This only takes into account periodic endpoints.
2071 * Obviously, we can't solve an NP complete problem to find the minimum worst
2072 * case scenario. Instead, we come up with an estimate that is no less than
2073 * the worst case bandwidth used for any one microframe, but may be an
2076 * We walk the requirements for each endpoint by interval, starting with the
2077 * smallest interval, and place packets in the schedule where there is only one
2078 * possible way to schedule packets for that interval. In order to simplify
2079 * this algorithm, we record the largest max packet size for each interval, and
2080 * assume all packets will be that size.
2082 * For interval 0, we obviously must schedule all packets for each interval.
2083 * The bandwidth for interval 0 is just the amount of data to be transmitted
2084 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2085 * the number of packets).
2087 * For interval 1, we have two possible microframes to schedule those packets
2088 * in. For this algorithm, if we can schedule the same number of packets for
2089 * each possible scheduling opportunity (each microframe), we will do so. The
2090 * remaining number of packets will be saved to be transmitted in the gaps in
2091 * the next interval's scheduling sequence.
2093 * As we move those remaining packets to be scheduled with interval 2 packets,
2094 * we have to double the number of remaining packets to transmit. This is
2095 * because the intervals are actually powers of 2, and we would be transmitting
2096 * the previous interval's packets twice in this interval. We also have to be
2097 * sure that when we look at the largest max packet size for this interval, we
2098 * also look at the largest max packet size for the remaining packets and take
2099 * the greater of the two.
2101 * The algorithm continues to evenly distribute packets in each scheduling
2102 * opportunity, and push the remaining packets out, until we get to the last
2103 * interval. Then those packets and their associated overhead are just added
2104 * to the bandwidth used.
2106 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2107 struct xhci_virt_device
*virt_dev
,
2110 unsigned int bw_reserved
;
2111 unsigned int max_bandwidth
;
2112 unsigned int bw_used
;
2113 unsigned int block_size
;
2114 struct xhci_interval_bw_table
*bw_table
;
2115 unsigned int packet_size
= 0;
2116 unsigned int overhead
= 0;
2117 unsigned int packets_transmitted
= 0;
2118 unsigned int packets_remaining
= 0;
2121 if (virt_dev
->udev
->speed
>= USB_SPEED_SUPER
)
2122 return xhci_check_ss_bw(xhci
, virt_dev
);
2124 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2125 max_bandwidth
= HS_BW_LIMIT
;
2126 /* Convert percent of bus BW reserved to blocks reserved */
2127 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2129 max_bandwidth
= FS_BW_LIMIT
;
2130 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2133 bw_table
= virt_dev
->bw_table
;
2134 /* We need to translate the max packet size and max ESIT payloads into
2135 * the units the hardware uses.
2137 block_size
= xhci_get_block_size(virt_dev
->udev
);
2139 /* If we are manipulating a LS/FS device under a HS hub, double check
2140 * that the HS bus has enough bandwidth if we are activing a new TT.
2142 if (virt_dev
->tt_info
) {
2143 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2144 "Recalculating BW for rootport %u",
2145 virt_dev
->real_port
);
2146 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2147 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2148 "newly activated TT.\n");
2151 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2152 "Recalculating BW for TT slot %u port %u",
2153 virt_dev
->tt_info
->slot_id
,
2154 virt_dev
->tt_info
->ttport
);
2156 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2157 "Recalculating BW for rootport %u",
2158 virt_dev
->real_port
);
2161 /* Add in how much bandwidth will be used for interval zero, or the
2162 * rounded max ESIT payload + number of packets * largest overhead.
2164 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2165 bw_table
->interval_bw
[0].num_packets
*
2166 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2168 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2169 unsigned int bw_added
;
2170 unsigned int largest_mps
;
2171 unsigned int interval_overhead
;
2174 * How many packets could we transmit in this interval?
2175 * If packets didn't fit in the previous interval, we will need
2176 * to transmit that many packets twice within this interval.
2178 packets_remaining
= 2 * packets_remaining
+
2179 bw_table
->interval_bw
[i
].num_packets
;
2181 /* Find the largest max packet size of this or the previous
2184 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2187 struct xhci_virt_ep
*virt_ep
;
2188 struct list_head
*ep_entry
;
2190 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2191 virt_ep
= list_entry(ep_entry
,
2192 struct xhci_virt_ep
, bw_endpoint_list
);
2193 /* Convert to blocks, rounding up */
2194 largest_mps
= DIV_ROUND_UP(
2195 virt_ep
->bw_info
.max_packet_size
,
2198 if (largest_mps
> packet_size
)
2199 packet_size
= largest_mps
;
2201 /* Use the larger overhead of this or the previous interval. */
2202 interval_overhead
= xhci_get_largest_overhead(
2203 &bw_table
->interval_bw
[i
]);
2204 if (interval_overhead
> overhead
)
2205 overhead
= interval_overhead
;
2207 /* How many packets can we evenly distribute across
2208 * (1 << (i + 1)) possible scheduling opportunities?
2210 packets_transmitted
= packets_remaining
>> (i
+ 1);
2212 /* Add in the bandwidth used for those scheduled packets */
2213 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2215 /* How many packets do we have remaining to transmit? */
2216 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2218 /* What largest max packet size should those packets have? */
2219 /* If we've transmitted all packets, don't carry over the
2220 * largest packet size.
2222 if (packets_remaining
== 0) {
2225 } else if (packets_transmitted
> 0) {
2226 /* Otherwise if we do have remaining packets, and we've
2227 * scheduled some packets in this interval, take the
2228 * largest max packet size from endpoints with this
2231 packet_size
= largest_mps
;
2232 overhead
= interval_overhead
;
2234 /* Otherwise carry over packet_size and overhead from the last
2235 * time we had a remainder.
2237 bw_used
+= bw_added
;
2238 if (bw_used
> max_bandwidth
) {
2239 xhci_warn(xhci
, "Not enough bandwidth. "
2240 "Proposed: %u, Max: %u\n",
2241 bw_used
, max_bandwidth
);
2246 * Ok, we know we have some packets left over after even-handedly
2247 * scheduling interval 15. We don't know which microframes they will
2248 * fit into, so we over-schedule and say they will be scheduled every
2251 if (packets_remaining
> 0)
2252 bw_used
+= overhead
+ packet_size
;
2254 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2255 unsigned int port_index
= virt_dev
->real_port
- 1;
2257 /* OK, we're manipulating a HS device attached to a
2258 * root port bandwidth domain. Include the number of active TTs
2259 * in the bandwidth used.
2261 bw_used
+= TT_HS_OVERHEAD
*
2262 xhci
->rh_bw
[port_index
].num_active_tts
;
2265 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2266 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2267 "Available: %u " "percent",
2268 bw_used
, max_bandwidth
, bw_reserved
,
2269 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2272 bw_used
+= bw_reserved
;
2273 if (bw_used
> max_bandwidth
) {
2274 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2275 bw_used
, max_bandwidth
);
2279 bw_table
->bw_used
= bw_used
;
2283 static bool xhci_is_async_ep(unsigned int ep_type
)
2285 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2286 ep_type
!= ISOC_IN_EP
&&
2287 ep_type
!= INT_IN_EP
);
2290 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2292 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2295 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2297 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2299 if (ep_bw
->ep_interval
== 0)
2300 return SS_OVERHEAD_BURST
+
2301 (ep_bw
->mult
* ep_bw
->num_packets
*
2302 (SS_OVERHEAD
+ mps
));
2303 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2304 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2305 1 << ep_bw
->ep_interval
);
2309 static void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2310 struct xhci_bw_info
*ep_bw
,
2311 struct xhci_interval_bw_table
*bw_table
,
2312 struct usb_device
*udev
,
2313 struct xhci_virt_ep
*virt_ep
,
2314 struct xhci_tt_bw_info
*tt_info
)
2316 struct xhci_interval_bw
*interval_bw
;
2317 int normalized_interval
;
2319 if (xhci_is_async_ep(ep_bw
->type
))
2322 if (udev
->speed
>= USB_SPEED_SUPER
) {
2323 if (xhci_is_sync_in_ep(ep_bw
->type
))
2324 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2325 xhci_get_ss_bw_consumed(ep_bw
);
2327 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2328 xhci_get_ss_bw_consumed(ep_bw
);
2332 /* SuperSpeed endpoints never get added to intervals in the table, so
2333 * this check is only valid for HS/FS/LS devices.
2335 if (list_empty(&virt_ep
->bw_endpoint_list
))
2337 /* For LS/FS devices, we need to translate the interval expressed in
2338 * microframes to frames.
2340 if (udev
->speed
== USB_SPEED_HIGH
)
2341 normalized_interval
= ep_bw
->ep_interval
;
2343 normalized_interval
= ep_bw
->ep_interval
- 3;
2345 if (normalized_interval
== 0)
2346 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2347 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2348 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2349 switch (udev
->speed
) {
2351 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2353 case USB_SPEED_FULL
:
2354 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2356 case USB_SPEED_HIGH
:
2357 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2359 case USB_SPEED_SUPER
:
2360 case USB_SPEED_SUPER_PLUS
:
2361 case USB_SPEED_UNKNOWN
:
2362 case USB_SPEED_WIRELESS
:
2363 /* Should never happen because only LS/FS/HS endpoints will get
2364 * added to the endpoint list.
2369 tt_info
->active_eps
-= 1;
2370 list_del_init(&virt_ep
->bw_endpoint_list
);
2373 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2374 struct xhci_bw_info
*ep_bw
,
2375 struct xhci_interval_bw_table
*bw_table
,
2376 struct usb_device
*udev
,
2377 struct xhci_virt_ep
*virt_ep
,
2378 struct xhci_tt_bw_info
*tt_info
)
2380 struct xhci_interval_bw
*interval_bw
;
2381 struct xhci_virt_ep
*smaller_ep
;
2382 int normalized_interval
;
2384 if (xhci_is_async_ep(ep_bw
->type
))
2387 if (udev
->speed
== USB_SPEED_SUPER
) {
2388 if (xhci_is_sync_in_ep(ep_bw
->type
))
2389 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2390 xhci_get_ss_bw_consumed(ep_bw
);
2392 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2393 xhci_get_ss_bw_consumed(ep_bw
);
2397 /* For LS/FS devices, we need to translate the interval expressed in
2398 * microframes to frames.
2400 if (udev
->speed
== USB_SPEED_HIGH
)
2401 normalized_interval
= ep_bw
->ep_interval
;
2403 normalized_interval
= ep_bw
->ep_interval
- 3;
2405 if (normalized_interval
== 0)
2406 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2407 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2408 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2409 switch (udev
->speed
) {
2411 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2413 case USB_SPEED_FULL
:
2414 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2416 case USB_SPEED_HIGH
:
2417 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2419 case USB_SPEED_SUPER
:
2420 case USB_SPEED_SUPER_PLUS
:
2421 case USB_SPEED_UNKNOWN
:
2422 case USB_SPEED_WIRELESS
:
2423 /* Should never happen because only LS/FS/HS endpoints will get
2424 * added to the endpoint list.
2430 tt_info
->active_eps
+= 1;
2431 /* Insert the endpoint into the list, largest max packet size first. */
2432 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2434 if (ep_bw
->max_packet_size
>=
2435 smaller_ep
->bw_info
.max_packet_size
) {
2436 /* Add the new ep before the smaller endpoint */
2437 list_add_tail(&virt_ep
->bw_endpoint_list
,
2438 &smaller_ep
->bw_endpoint_list
);
2442 /* Add the new endpoint at the end of the list. */
2443 list_add_tail(&virt_ep
->bw_endpoint_list
,
2444 &interval_bw
->endpoints
);
2447 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2448 struct xhci_virt_device
*virt_dev
,
2451 struct xhci_root_port_bw_info
*rh_bw_info
;
2452 if (!virt_dev
->tt_info
)
2455 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2456 if (old_active_eps
== 0 &&
2457 virt_dev
->tt_info
->active_eps
!= 0) {
2458 rh_bw_info
->num_active_tts
+= 1;
2459 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2460 } else if (old_active_eps
!= 0 &&
2461 virt_dev
->tt_info
->active_eps
== 0) {
2462 rh_bw_info
->num_active_tts
-= 1;
2463 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2467 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2468 struct xhci_virt_device
*virt_dev
,
2469 struct xhci_container_ctx
*in_ctx
)
2471 struct xhci_bw_info ep_bw_info
[31];
2473 struct xhci_input_control_ctx
*ctrl_ctx
;
2474 int old_active_eps
= 0;
2476 if (virt_dev
->tt_info
)
2477 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2479 ctrl_ctx
= xhci_get_input_control_ctx(in_ctx
);
2481 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2486 for (i
= 0; i
< 31; i
++) {
2487 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2490 /* Make a copy of the BW info in case we need to revert this */
2491 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2492 sizeof(ep_bw_info
[i
]));
2493 /* Drop the endpoint from the interval table if the endpoint is
2494 * being dropped or changed.
2496 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2497 xhci_drop_ep_from_interval_table(xhci
,
2498 &virt_dev
->eps
[i
].bw_info
,
2504 /* Overwrite the information stored in the endpoints' bw_info */
2505 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2506 for (i
= 0; i
< 31; i
++) {
2507 /* Add any changed or added endpoints to the interval table */
2508 if (EP_IS_ADDED(ctrl_ctx
, i
))
2509 xhci_add_ep_to_interval_table(xhci
,
2510 &virt_dev
->eps
[i
].bw_info
,
2517 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2518 /* Ok, this fits in the bandwidth we have.
2519 * Update the number of active TTs.
2521 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2525 /* We don't have enough bandwidth for this, revert the stored info. */
2526 for (i
= 0; i
< 31; i
++) {
2527 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2530 /* Drop the new copies of any added or changed endpoints from
2531 * the interval table.
2533 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2534 xhci_drop_ep_from_interval_table(xhci
,
2535 &virt_dev
->eps
[i
].bw_info
,
2541 /* Revert the endpoint back to its old information */
2542 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2543 sizeof(ep_bw_info
[i
]));
2544 /* Add any changed or dropped endpoints back into the table */
2545 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2546 xhci_add_ep_to_interval_table(xhci
,
2547 &virt_dev
->eps
[i
].bw_info
,
2557 /* Issue a configure endpoint command or evaluate context command
2558 * and wait for it to finish.
2560 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2561 struct usb_device
*udev
,
2562 struct xhci_command
*command
,
2563 bool ctx_change
, bool must_succeed
)
2566 unsigned long flags
;
2567 struct xhci_input_control_ctx
*ctrl_ctx
;
2568 struct xhci_virt_device
*virt_dev
;
2569 struct xhci_slot_ctx
*slot_ctx
;
2574 spin_lock_irqsave(&xhci
->lock
, flags
);
2576 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
2577 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2581 virt_dev
= xhci
->devs
[udev
->slot_id
];
2583 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
2585 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2586 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2591 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2592 xhci_reserve_host_resources(xhci
, ctrl_ctx
)) {
2593 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2594 xhci_warn(xhci
, "Not enough host resources, "
2595 "active endpoint contexts = %u\n",
2596 xhci
->num_active_eps
);
2599 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2600 xhci_reserve_bandwidth(xhci
, virt_dev
, command
->in_ctx
)) {
2601 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2602 xhci_free_host_resources(xhci
, ctrl_ctx
);
2603 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2604 xhci_warn(xhci
, "Not enough bandwidth\n");
2608 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
2609 trace_xhci_configure_endpoint(slot_ctx
);
2612 ret
= xhci_queue_configure_endpoint(xhci
, command
,
2613 command
->in_ctx
->dma
,
2614 udev
->slot_id
, must_succeed
);
2616 ret
= xhci_queue_evaluate_context(xhci
, command
,
2617 command
->in_ctx
->dma
,
2618 udev
->slot_id
, must_succeed
);
2620 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2621 xhci_free_host_resources(xhci
, ctrl_ctx
);
2622 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2623 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
2624 "FIXME allocate a new ring segment");
2627 xhci_ring_cmd_db(xhci
);
2628 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2630 /* Wait for the configure endpoint command to complete */
2631 wait_for_completion(command
->completion
);
2634 ret
= xhci_configure_endpoint_result(xhci
, udev
,
2637 ret
= xhci_evaluate_context_result(xhci
, udev
,
2640 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2641 spin_lock_irqsave(&xhci
->lock
, flags
);
2642 /* If the command failed, remove the reserved resources.
2643 * Otherwise, clean up the estimate to include dropped eps.
2646 xhci_free_host_resources(xhci
, ctrl_ctx
);
2648 xhci_finish_resource_reservation(xhci
, ctrl_ctx
);
2649 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2654 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd
*xhci
,
2655 struct xhci_virt_device
*vdev
, int i
)
2657 struct xhci_virt_ep
*ep
= &vdev
->eps
[i
];
2659 if (ep
->ep_state
& EP_HAS_STREAMS
) {
2660 xhci_warn(xhci
, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2661 xhci_get_endpoint_address(i
));
2662 xhci_free_stream_info(xhci
, ep
->stream_info
);
2663 ep
->stream_info
= NULL
;
2664 ep
->ep_state
&= ~EP_HAS_STREAMS
;
2668 /* Called after one or more calls to xhci_add_endpoint() or
2669 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2670 * to call xhci_reset_bandwidth().
2672 * Since we are in the middle of changing either configuration or
2673 * installing a new alt setting, the USB core won't allow URBs to be
2674 * enqueued for any endpoint on the old config or interface. Nothing
2675 * else should be touching the xhci->devs[slot_id] structure, so we
2676 * don't need to take the xhci->lock for manipulating that.
2678 static int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2682 struct xhci_hcd
*xhci
;
2683 struct xhci_virt_device
*virt_dev
;
2684 struct xhci_input_control_ctx
*ctrl_ctx
;
2685 struct xhci_slot_ctx
*slot_ctx
;
2686 struct xhci_command
*command
;
2688 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2691 xhci
= hcd_to_xhci(hcd
);
2692 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
2693 (xhci
->xhc_state
& XHCI_STATE_REMOVING
))
2696 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2697 virt_dev
= xhci
->devs
[udev
->slot_id
];
2699 command
= xhci_alloc_command(xhci
, false, true, GFP_KERNEL
);
2703 command
->in_ctx
= virt_dev
->in_ctx
;
2705 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2706 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
2708 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2711 goto command_cleanup
;
2713 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2714 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2715 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2717 /* Don't issue the command if there's no endpoints to update. */
2718 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2719 ctrl_ctx
->drop_flags
== 0) {
2721 goto command_cleanup
;
2723 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2724 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2725 for (i
= 31; i
>= 1; i
--) {
2726 __le32 le32
= cpu_to_le32(BIT(i
));
2728 if ((virt_dev
->eps
[i
-1].ring
&& !(ctrl_ctx
->drop_flags
& le32
))
2729 || (ctrl_ctx
->add_flags
& le32
) || i
== 1) {
2730 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
2731 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(i
));
2736 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
2739 /* Callee should call reset_bandwidth() */
2740 goto command_cleanup
;
2742 /* Free any rings that were dropped, but not changed. */
2743 for (i
= 1; i
< 31; i
++) {
2744 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2745 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1)))) {
2746 xhci_free_endpoint_ring(xhci
, virt_dev
, i
);
2747 xhci_check_bw_drop_ep_streams(xhci
, virt_dev
, i
);
2750 xhci_zero_in_ctx(xhci
, virt_dev
);
2752 * Install any rings for completely new endpoints or changed endpoints,
2753 * and free any old rings from changed endpoints.
2755 for (i
= 1; i
< 31; i
++) {
2756 if (!virt_dev
->eps
[i
].new_ring
)
2758 /* Only free the old ring if it exists.
2759 * It may not if this is the first add of an endpoint.
2761 if (virt_dev
->eps
[i
].ring
) {
2762 xhci_free_endpoint_ring(xhci
, virt_dev
, i
);
2764 xhci_check_bw_drop_ep_streams(xhci
, virt_dev
, i
);
2765 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2766 virt_dev
->eps
[i
].new_ring
= NULL
;
2769 kfree(command
->completion
);
2775 static void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2777 struct xhci_hcd
*xhci
;
2778 struct xhci_virt_device
*virt_dev
;
2781 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2784 xhci
= hcd_to_xhci(hcd
);
2786 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2787 virt_dev
= xhci
->devs
[udev
->slot_id
];
2788 /* Free any rings allocated for added endpoints */
2789 for (i
= 0; i
< 31; i
++) {
2790 if (virt_dev
->eps
[i
].new_ring
) {
2791 xhci_debugfs_remove_endpoint(xhci
, virt_dev
, i
);
2792 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2793 virt_dev
->eps
[i
].new_ring
= NULL
;
2796 xhci_zero_in_ctx(xhci
, virt_dev
);
2799 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2800 struct xhci_container_ctx
*in_ctx
,
2801 struct xhci_container_ctx
*out_ctx
,
2802 struct xhci_input_control_ctx
*ctrl_ctx
,
2803 u32 add_flags
, u32 drop_flags
)
2805 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2806 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2807 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2808 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2811 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2812 unsigned int slot_id
, unsigned int ep_index
,
2813 struct xhci_dequeue_state
*deq_state
)
2815 struct xhci_input_control_ctx
*ctrl_ctx
;
2816 struct xhci_container_ctx
*in_ctx
;
2817 struct xhci_ep_ctx
*ep_ctx
;
2821 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2822 ctrl_ctx
= xhci_get_input_control_ctx(in_ctx
);
2824 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2829 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2830 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2831 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2832 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2833 deq_state
->new_deq_ptr
);
2835 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2836 "reset ep command\n");
2837 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2838 deq_state
->new_deq_seg
,
2839 deq_state
->new_deq_ptr
);
2842 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2844 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2845 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2846 xhci
->devs
[slot_id
]->out_ctx
, ctrl_ctx
,
2847 added_ctxs
, added_ctxs
);
2850 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
, unsigned int ep_index
,
2851 unsigned int stream_id
, struct xhci_td
*td
)
2853 struct xhci_dequeue_state deq_state
;
2854 struct xhci_virt_ep
*ep
;
2855 struct usb_device
*udev
= td
->urb
->dev
;
2857 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2858 "Cleaning up stalled endpoint ring");
2859 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2860 /* We need to move the HW's dequeue pointer past this TD,
2861 * or it will attempt to resend it on the next doorbell ring.
2863 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2864 ep_index
, stream_id
, td
, &deq_state
);
2866 if (!deq_state
.new_deq_ptr
|| !deq_state
.new_deq_seg
)
2869 /* HW with the reset endpoint quirk will use the saved dequeue state to
2870 * issue a configure endpoint command later.
2872 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2873 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2874 "Queueing new dequeue state");
2875 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2876 ep_index
, &deq_state
);
2878 /* Better hope no one uses the input context between now and the
2879 * reset endpoint completion!
2880 * XXX: No idea how this hardware will react when stream rings
2883 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2884 "Setting up input context for "
2885 "configure endpoint command");
2886 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2887 ep_index
, &deq_state
);
2891 /* Called when clearing halted device. The core should have sent the control
2892 * message to clear the device halt condition. The host side of the halt should
2893 * already be cleared with a reset endpoint command issued when the STALL tx
2894 * event was received.
2896 * Context: in_interrupt
2899 static void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2900 struct usb_host_endpoint
*ep
)
2902 struct xhci_hcd
*xhci
;
2904 xhci
= hcd_to_xhci(hcd
);
2907 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2908 * The Reset Endpoint Command may only be issued to endpoints in the
2909 * Halted state. If software wishes reset the Data Toggle or Sequence
2910 * Number of an endpoint that isn't in the Halted state, then software
2911 * may issue a Configure Endpoint Command with the Drop and Add bits set
2912 * for the target endpoint. that is in the Stopped state.
2915 /* For now just print debug to follow the situation */
2916 xhci_dbg(xhci
, "Endpoint 0x%x ep reset callback called\n",
2917 ep
->desc
.bEndpointAddress
);
2920 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2921 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2922 unsigned int slot_id
)
2925 unsigned int ep_index
;
2926 unsigned int ep_state
;
2930 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2933 if (usb_ss_max_streams(&ep
->ss_ep_comp
) == 0) {
2934 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2935 " descriptor for ep 0x%x does not support streams\n",
2936 ep
->desc
.bEndpointAddress
);
2940 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2941 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2942 if (ep_state
& EP_HAS_STREAMS
||
2943 ep_state
& EP_GETTING_STREAMS
) {
2944 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2945 "already has streams set up.\n",
2946 ep
->desc
.bEndpointAddress
);
2947 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2948 "dynamic stream context array reallocation.\n");
2951 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2952 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2953 "endpoint 0x%x; URBs are pending.\n",
2954 ep
->desc
.bEndpointAddress
);
2960 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2961 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2963 unsigned int max_streams
;
2965 /* The stream context array size must be a power of two */
2966 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2968 * Find out how many primary stream array entries the host controller
2969 * supports. Later we may use secondary stream arrays (similar to 2nd
2970 * level page entries), but that's an optional feature for xHCI host
2971 * controllers. xHCs must support at least 4 stream IDs.
2973 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2974 if (*num_stream_ctxs
> max_streams
) {
2975 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2977 *num_stream_ctxs
= max_streams
;
2978 *num_streams
= max_streams
;
2982 /* Returns an error code if one of the endpoint already has streams.
2983 * This does not change any data structures, it only checks and gathers
2986 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
2987 struct usb_device
*udev
,
2988 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2989 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
2991 unsigned int max_streams
;
2992 unsigned int endpoint_flag
;
2996 for (i
= 0; i
< num_eps
; i
++) {
2997 ret
= xhci_check_streams_endpoint(xhci
, udev
,
2998 eps
[i
], udev
->slot_id
);
3002 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
3003 if (max_streams
< (*num_streams
- 1)) {
3004 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
3005 eps
[i
]->desc
.bEndpointAddress
,
3007 *num_streams
= max_streams
+1;
3010 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3011 if (*changed_ep_bitmask
& endpoint_flag
)
3013 *changed_ep_bitmask
|= endpoint_flag
;
3018 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
3019 struct usb_device
*udev
,
3020 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
3022 u32 changed_ep_bitmask
= 0;
3023 unsigned int slot_id
;
3024 unsigned int ep_index
;
3025 unsigned int ep_state
;
3028 slot_id
= udev
->slot_id
;
3029 if (!xhci
->devs
[slot_id
])
3032 for (i
= 0; i
< num_eps
; i
++) {
3033 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3034 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3035 /* Are streams already being freed for the endpoint? */
3036 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3037 xhci_warn(xhci
, "WARN Can't disable streams for "
3039 "streams are being disabled already\n",
3040 eps
[i
]->desc
.bEndpointAddress
);
3043 /* Are there actually any streams to free? */
3044 if (!(ep_state
& EP_HAS_STREAMS
) &&
3045 !(ep_state
& EP_GETTING_STREAMS
)) {
3046 xhci_warn(xhci
, "WARN Can't disable streams for "
3048 "streams are already disabled!\n",
3049 eps
[i
]->desc
.bEndpointAddress
);
3050 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3051 "with non-streams endpoint\n");
3054 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3056 return changed_ep_bitmask
;
3060 * The USB device drivers use this function (through the HCD interface in USB
3061 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3062 * coordinate mass storage command queueing across multiple endpoints (basically
3063 * a stream ID == a task ID).
3065 * Setting up streams involves allocating the same size stream context array
3066 * for each endpoint and issuing a configure endpoint command for all endpoints.
3068 * Don't allow the call to succeed if one endpoint only supports one stream
3069 * (which means it doesn't support streams at all).
3071 * Drivers may get less stream IDs than they asked for, if the host controller
3072 * hardware or endpoints claim they can't support the number of requested
3075 static int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3076 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3077 unsigned int num_streams
, gfp_t mem_flags
)
3080 struct xhci_hcd
*xhci
;
3081 struct xhci_virt_device
*vdev
;
3082 struct xhci_command
*config_cmd
;
3083 struct xhci_input_control_ctx
*ctrl_ctx
;
3084 unsigned int ep_index
;
3085 unsigned int num_stream_ctxs
;
3086 unsigned int max_packet
;
3087 unsigned long flags
;
3088 u32 changed_ep_bitmask
= 0;
3093 /* Add one to the number of streams requested to account for
3094 * stream 0 that is reserved for xHCI usage.
3097 xhci
= hcd_to_xhci(hcd
);
3098 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3101 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3102 if ((xhci
->quirks
& XHCI_BROKEN_STREAMS
) ||
3103 HCC_MAX_PSA(xhci
->hcc_params
) < 4) {
3104 xhci_dbg(xhci
, "xHCI controller does not support streams.\n");
3108 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3112 ctrl_ctx
= xhci_get_input_control_ctx(config_cmd
->in_ctx
);
3114 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3116 xhci_free_command(xhci
, config_cmd
);
3120 /* Check to make sure all endpoints are not already configured for
3121 * streams. While we're at it, find the maximum number of streams that
3122 * all the endpoints will support and check for duplicate endpoints.
3124 spin_lock_irqsave(&xhci
->lock
, flags
);
3125 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3126 num_eps
, &num_streams
, &changed_ep_bitmask
);
3128 xhci_free_command(xhci
, config_cmd
);
3129 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3132 if (num_streams
<= 1) {
3133 xhci_warn(xhci
, "WARN: endpoints can't handle "
3134 "more than one stream.\n");
3135 xhci_free_command(xhci
, config_cmd
);
3136 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3139 vdev
= xhci
->devs
[udev
->slot_id
];
3140 /* Mark each endpoint as being in transition, so
3141 * xhci_urb_enqueue() will reject all URBs.
3143 for (i
= 0; i
< num_eps
; i
++) {
3144 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3145 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3147 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3149 /* Setup internal data structures and allocate HW data structures for
3150 * streams (but don't install the HW structures in the input context
3151 * until we're sure all memory allocation succeeded).
3153 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3154 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3155 num_stream_ctxs
, num_streams
);
3157 for (i
= 0; i
< num_eps
; i
++) {
3158 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3159 max_packet
= usb_endpoint_maxp(&eps
[i
]->desc
);
3160 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3163 max_packet
, mem_flags
);
3164 if (!vdev
->eps
[ep_index
].stream_info
)
3166 /* Set maxPstreams in endpoint context and update deq ptr to
3167 * point to stream context array. FIXME
3171 /* Set up the input context for a configure endpoint command. */
3172 for (i
= 0; i
< num_eps
; i
++) {
3173 struct xhci_ep_ctx
*ep_ctx
;
3175 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3176 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3178 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3179 vdev
->out_ctx
, ep_index
);
3180 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3181 vdev
->eps
[ep_index
].stream_info
);
3183 /* Tell the HW to drop its old copy of the endpoint context info
3184 * and add the updated copy from the input context.
3186 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3187 vdev
->out_ctx
, ctrl_ctx
,
3188 changed_ep_bitmask
, changed_ep_bitmask
);
3190 /* Issue and wait for the configure endpoint command */
3191 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3194 /* xHC rejected the configure endpoint command for some reason, so we
3195 * leave the old ring intact and free our internal streams data
3201 spin_lock_irqsave(&xhci
->lock
, flags
);
3202 for (i
= 0; i
< num_eps
; i
++) {
3203 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3204 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3205 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3206 udev
->slot_id
, ep_index
);
3207 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3209 xhci_free_command(xhci
, config_cmd
);
3210 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3212 /* Subtract 1 for stream 0, which drivers can't use */
3213 return num_streams
- 1;
3216 /* If it didn't work, free the streams! */
3217 for (i
= 0; i
< num_eps
; i
++) {
3218 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3219 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3220 vdev
->eps
[ep_index
].stream_info
= NULL
;
3221 /* FIXME Unset maxPstreams in endpoint context and
3222 * update deq ptr to point to normal string ring.
3224 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3225 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3226 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3228 xhci_free_command(xhci
, config_cmd
);
3232 /* Transition the endpoint from using streams to being a "normal" endpoint
3235 * Modify the endpoint context state, submit a configure endpoint command,
3236 * and free all endpoint rings for streams if that completes successfully.
3238 static int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3239 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3243 struct xhci_hcd
*xhci
;
3244 struct xhci_virt_device
*vdev
;
3245 struct xhci_command
*command
;
3246 struct xhci_input_control_ctx
*ctrl_ctx
;
3247 unsigned int ep_index
;
3248 unsigned long flags
;
3249 u32 changed_ep_bitmask
;
3251 xhci
= hcd_to_xhci(hcd
);
3252 vdev
= xhci
->devs
[udev
->slot_id
];
3254 /* Set up a configure endpoint command to remove the streams rings */
3255 spin_lock_irqsave(&xhci
->lock
, flags
);
3256 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3257 udev
, eps
, num_eps
);
3258 if (changed_ep_bitmask
== 0) {
3259 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3263 /* Use the xhci_command structure from the first endpoint. We may have
3264 * allocated too many, but the driver may call xhci_free_streams() for
3265 * each endpoint it grouped into one call to xhci_alloc_streams().
3267 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3268 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3269 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
3271 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3272 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3277 for (i
= 0; i
< num_eps
; i
++) {
3278 struct xhci_ep_ctx
*ep_ctx
;
3280 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3281 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3282 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3283 EP_GETTING_NO_STREAMS
;
3285 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3286 vdev
->out_ctx
, ep_index
);
3287 xhci_setup_no_streams_ep_input_ctx(ep_ctx
,
3288 &vdev
->eps
[ep_index
]);
3290 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3291 vdev
->out_ctx
, ctrl_ctx
,
3292 changed_ep_bitmask
, changed_ep_bitmask
);
3293 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3295 /* Issue and wait for the configure endpoint command,
3296 * which must succeed.
3298 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3301 /* xHC rejected the configure endpoint command for some reason, so we
3302 * leave the streams rings intact.
3307 spin_lock_irqsave(&xhci
->lock
, flags
);
3308 for (i
= 0; i
< num_eps
; i
++) {
3309 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3310 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3311 vdev
->eps
[ep_index
].stream_info
= NULL
;
3312 /* FIXME Unset maxPstreams in endpoint context and
3313 * update deq ptr to point to normal string ring.
3315 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3316 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3318 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3324 * Deletes endpoint resources for endpoints that were active before a Reset
3325 * Device command, or a Disable Slot command. The Reset Device command leaves
3326 * the control endpoint intact, whereas the Disable Slot command deletes it.
3328 * Must be called with xhci->lock held.
3330 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3331 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3334 unsigned int num_dropped_eps
= 0;
3335 unsigned int drop_flags
= 0;
3337 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3338 if (virt_dev
->eps
[i
].ring
) {
3339 drop_flags
|= 1 << i
;
3343 xhci
->num_active_eps
-= num_dropped_eps
;
3344 if (num_dropped_eps
)
3345 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3346 "Dropped %u ep ctxs, flags = 0x%x, "
3348 num_dropped_eps
, drop_flags
,
3349 xhci
->num_active_eps
);
3353 * This submits a Reset Device Command, which will set the device state to 0,
3354 * set the device address to 0, and disable all the endpoints except the default
3355 * control endpoint. The USB core should come back and call
3356 * xhci_address_device(), and then re-set up the configuration. If this is
3357 * called because of a usb_reset_and_verify_device(), then the old alternate
3358 * settings will be re-installed through the normal bandwidth allocation
3361 * Wait for the Reset Device command to finish. Remove all structures
3362 * associated with the endpoints that were disabled. Clear the input device
3363 * structure? Reset the control endpoint 0 max packet size?
3365 * If the virt_dev to be reset does not exist or does not match the udev,
3366 * it means the device is lost, possibly due to the xHC restore error and
3367 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3368 * re-allocate the device.
3370 static int xhci_discover_or_reset_device(struct usb_hcd
*hcd
,
3371 struct usb_device
*udev
)
3374 unsigned long flags
;
3375 struct xhci_hcd
*xhci
;
3376 unsigned int slot_id
;
3377 struct xhci_virt_device
*virt_dev
;
3378 struct xhci_command
*reset_device_cmd
;
3379 int last_freed_endpoint
;
3380 struct xhci_slot_ctx
*slot_ctx
;
3381 int old_active_eps
= 0;
3383 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3386 xhci
= hcd_to_xhci(hcd
);
3387 slot_id
= udev
->slot_id
;
3388 virt_dev
= xhci
->devs
[slot_id
];
3390 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3391 "not exist. Re-allocate the device\n", slot_id
);
3392 ret
= xhci_alloc_dev(hcd
, udev
);
3399 if (virt_dev
->tt_info
)
3400 old_active_eps
= virt_dev
->tt_info
->active_eps
;
3402 if (virt_dev
->udev
!= udev
) {
3403 /* If the virt_dev and the udev does not match, this virt_dev
3404 * may belong to another udev.
3405 * Re-allocate the device.
3407 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3408 "not match the udev. Re-allocate the device\n",
3410 ret
= xhci_alloc_dev(hcd
, udev
);
3417 /* If device is not setup, there is no point in resetting it */
3418 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3419 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3420 SLOT_STATE_DISABLED
)
3423 trace_xhci_discover_or_reset_device(slot_ctx
);
3425 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3426 /* Allocate the command structure that holds the struct completion.
3427 * Assume we're in process context, since the normal device reset
3428 * process has to wait for the device anyway. Storage devices are
3429 * reset as part of error handling, so use GFP_NOIO instead of
3432 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3433 if (!reset_device_cmd
) {
3434 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3438 /* Attempt to submit the Reset Device command to the command ring */
3439 spin_lock_irqsave(&xhci
->lock
, flags
);
3441 ret
= xhci_queue_reset_device(xhci
, reset_device_cmd
, slot_id
);
3443 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3444 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3445 goto command_cleanup
;
3447 xhci_ring_cmd_db(xhci
);
3448 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3450 /* Wait for the Reset Device command to finish */
3451 wait_for_completion(reset_device_cmd
->completion
);
3453 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3454 * unless we tried to reset a slot ID that wasn't enabled,
3455 * or the device wasn't in the addressed or configured state.
3457 ret
= reset_device_cmd
->status
;
3459 case COMP_COMMAND_ABORTED
:
3460 case COMP_COMMAND_RING_STOPPED
:
3461 xhci_warn(xhci
, "Timeout waiting for reset device command\n");
3463 goto command_cleanup
;
3464 case COMP_SLOT_NOT_ENABLED_ERROR
: /* 0.95 completion for bad slot ID */
3465 case COMP_CONTEXT_STATE_ERROR
: /* 0.96 completion code for same thing */
3466 xhci_dbg(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3468 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3469 xhci_dbg(xhci
, "Not freeing device rings.\n");
3470 /* Don't treat this as an error. May change my mind later. */
3472 goto command_cleanup
;
3474 xhci_dbg(xhci
, "Successful reset device command.\n");
3477 if (xhci_is_vendor_info_code(xhci
, ret
))
3479 xhci_warn(xhci
, "Unknown completion code %u for "
3480 "reset device command.\n", ret
);
3482 goto command_cleanup
;
3485 /* Free up host controller endpoint resources */
3486 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3487 spin_lock_irqsave(&xhci
->lock
, flags
);
3488 /* Don't delete the default control endpoint resources */
3489 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3490 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3493 /* Everything but endpoint 0 is disabled, so free the rings. */
3494 last_freed_endpoint
= 1;
3495 for (i
= 1; i
< 31; i
++) {
3496 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3498 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3499 xhci_warn(xhci
, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3500 xhci_get_endpoint_address(i
));
3501 xhci_free_stream_info(xhci
, ep
->stream_info
);
3502 ep
->stream_info
= NULL
;
3503 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3507 xhci_debugfs_remove_endpoint(xhci
, virt_dev
, i
);
3508 xhci_free_endpoint_ring(xhci
, virt_dev
, i
);
3509 last_freed_endpoint
= i
;
3511 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3512 xhci_drop_ep_from_interval_table(xhci
,
3513 &virt_dev
->eps
[i
].bw_info
,
3518 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3520 /* If necessary, update the number of active TTs on this root port */
3521 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3525 xhci_free_command(xhci
, reset_device_cmd
);
3530 * At this point, the struct usb_device is about to go away, the device has
3531 * disconnected, and all traffic has been stopped and the endpoints have been
3532 * disabled. Free any HC data structures associated with that device.
3534 static void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3536 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3537 struct xhci_virt_device
*virt_dev
;
3538 struct xhci_slot_ctx
*slot_ctx
;
3541 xhci_debugfs_remove_slot(xhci
, udev
->slot_id
);
3543 #ifndef CONFIG_USB_DEFAULT_PERSIST
3545 * We called pm_runtime_get_noresume when the device was attached.
3546 * Decrement the counter here to allow controller to runtime suspend
3547 * if no devices remain.
3549 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3550 pm_runtime_put_noidle(hcd
->self
.controller
);
3553 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3554 /* If the host is halted due to driver unload, we still need to free the
3557 if (ret
<= 0 && ret
!= -ENODEV
)
3560 virt_dev
= xhci
->devs
[udev
->slot_id
];
3561 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3562 trace_xhci_free_dev(slot_ctx
);
3564 /* Stop any wayward timer functions (which may grab the lock) */
3565 for (i
= 0; i
< 31; i
++) {
3566 virt_dev
->eps
[i
].ep_state
&= ~EP_STOP_CMD_PENDING
;
3567 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3570 ret
= xhci_disable_slot(xhci
, udev
->slot_id
);
3572 xhci_free_virt_device(xhci
, udev
->slot_id
);
3575 int xhci_disable_slot(struct xhci_hcd
*xhci
, u32 slot_id
)
3577 struct xhci_command
*command
;
3578 unsigned long flags
;
3582 command
= xhci_alloc_command(xhci
, false, false, GFP_KERNEL
);
3586 spin_lock_irqsave(&xhci
->lock
, flags
);
3587 /* Don't disable the slot if the host controller is dead. */
3588 state
= readl(&xhci
->op_regs
->status
);
3589 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3590 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3591 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3596 ret
= xhci_queue_slot_control(xhci
, command
, TRB_DISABLE_SLOT
,
3599 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3603 xhci_ring_cmd_db(xhci
);
3604 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3609 * Checks if we have enough host controller resources for the default control
3612 * Must be called with xhci->lock held.
3614 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3616 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3617 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3618 "Not enough ep ctxs: "
3619 "%u active, need to add 1, limit is %u.",
3620 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3623 xhci
->num_active_eps
+= 1;
3624 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3625 "Adding 1 ep ctx, %u now active.",
3626 xhci
->num_active_eps
);
3632 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3633 * timed out, or allocating memory failed. Returns 1 on success.
3635 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3637 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3638 struct xhci_virt_device
*vdev
;
3639 struct xhci_slot_ctx
*slot_ctx
;
3640 unsigned long flags
;
3642 struct xhci_command
*command
;
3644 command
= xhci_alloc_command(xhci
, false, true, GFP_KERNEL
);
3648 spin_lock_irqsave(&xhci
->lock
, flags
);
3649 ret
= xhci_queue_slot_control(xhci
, command
, TRB_ENABLE_SLOT
, 0);
3651 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3652 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3653 xhci_free_command(xhci
, command
);
3656 xhci_ring_cmd_db(xhci
);
3657 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3659 wait_for_completion(command
->completion
);
3660 slot_id
= command
->slot_id
;
3662 if (!slot_id
|| command
->status
!= COMP_SUCCESS
) {
3663 xhci_err(xhci
, "Error while assigning device slot ID\n");
3664 xhci_err(xhci
, "Max number of devices this xHCI host supports is %u.\n",
3666 readl(&xhci
->cap_regs
->hcs_params1
)));
3667 xhci_free_command(xhci
, command
);
3671 xhci_free_command(xhci
, command
);
3673 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3674 spin_lock_irqsave(&xhci
->lock
, flags
);
3675 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3677 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3678 xhci_warn(xhci
, "Not enough host resources, "
3679 "active endpoint contexts = %u\n",
3680 xhci
->num_active_eps
);
3683 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3685 /* Use GFP_NOIO, since this function can be called from
3686 * xhci_discover_or_reset_device(), which may be called as part of
3687 * mass storage driver error handling.
3689 if (!xhci_alloc_virt_device(xhci
, slot_id
, udev
, GFP_NOIO
)) {
3690 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3693 vdev
= xhci
->devs
[slot_id
];
3694 slot_ctx
= xhci_get_slot_ctx(xhci
, vdev
->out_ctx
);
3695 trace_xhci_alloc_dev(slot_ctx
);
3697 udev
->slot_id
= slot_id
;
3699 xhci_debugfs_create_slot(xhci
, slot_id
);
3701 #ifndef CONFIG_USB_DEFAULT_PERSIST
3703 * If resetting upon resume, we can't put the controller into runtime
3704 * suspend if there is a device attached.
3706 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3707 pm_runtime_get_noresume(hcd
->self
.controller
);
3710 /* Is this a LS or FS device under a HS hub? */
3711 /* Hub or peripherial? */
3715 ret
= xhci_disable_slot(xhci
, udev
->slot_id
);
3717 xhci_free_virt_device(xhci
, udev
->slot_id
);
3723 * Issue an Address Device command and optionally send a corresponding
3724 * SetAddress request to the device.
3726 static int xhci_setup_device(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3727 enum xhci_setup_dev setup
)
3729 const char *act
= setup
== SETUP_CONTEXT_ONLY
? "context" : "address";
3730 unsigned long flags
;
3731 struct xhci_virt_device
*virt_dev
;
3733 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3734 struct xhci_slot_ctx
*slot_ctx
;
3735 struct xhci_input_control_ctx
*ctrl_ctx
;
3737 struct xhci_command
*command
= NULL
;
3739 mutex_lock(&xhci
->mutex
);
3741 if (xhci
->xhc_state
) { /* dying, removing or halted */
3746 if (!udev
->slot_id
) {
3747 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3748 "Bad Slot ID %d", udev
->slot_id
);
3753 virt_dev
= xhci
->devs
[udev
->slot_id
];
3755 if (WARN_ON(!virt_dev
)) {
3757 * In plug/unplug torture test with an NEC controller,
3758 * a zero-dereference was observed once due to virt_dev = 0.
3759 * Print useful debug rather than crash if it is observed again!
3761 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3766 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3767 trace_xhci_setup_device_slot(slot_ctx
);
3769 if (setup
== SETUP_CONTEXT_ONLY
) {
3770 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3771 SLOT_STATE_DEFAULT
) {
3772 xhci_dbg(xhci
, "Slot already in default state\n");
3777 command
= xhci_alloc_command(xhci
, false, true, GFP_KERNEL
);
3783 command
->in_ctx
= virt_dev
->in_ctx
;
3785 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3786 ctrl_ctx
= xhci_get_input_control_ctx(virt_dev
->in_ctx
);
3788 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3794 * If this is the first Set Address since device plug-in or
3795 * virt_device realloaction after a resume with an xHCI power loss,
3796 * then set up the slot context.
3798 if (!slot_ctx
->dev_info
)
3799 xhci_setup_addressable_virt_dev(xhci
, udev
);
3800 /* Otherwise, update the control endpoint ring enqueue pointer. */
3802 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3803 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3804 ctrl_ctx
->drop_flags
= 0;
3806 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3807 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3809 spin_lock_irqsave(&xhci
->lock
, flags
);
3810 trace_xhci_setup_device(virt_dev
);
3811 ret
= xhci_queue_address_device(xhci
, command
, virt_dev
->in_ctx
->dma
,
3812 udev
->slot_id
, setup
);
3814 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3815 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3816 "FIXME: allocate a command ring segment");
3819 xhci_ring_cmd_db(xhci
);
3820 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3822 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3823 wait_for_completion(command
->completion
);
3825 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3826 * the SetAddress() "recovery interval" required by USB and aborting the
3827 * command on a timeout.
3829 switch (command
->status
) {
3830 case COMP_COMMAND_ABORTED
:
3831 case COMP_COMMAND_RING_STOPPED
:
3832 xhci_warn(xhci
, "Timeout while waiting for setup device command\n");
3835 case COMP_CONTEXT_STATE_ERROR
:
3836 case COMP_SLOT_NOT_ENABLED_ERROR
:
3837 xhci_err(xhci
, "Setup ERROR: setup %s command for slot %d.\n",
3838 act
, udev
->slot_id
);
3841 case COMP_USB_TRANSACTION_ERROR
:
3842 dev_warn(&udev
->dev
, "Device not responding to setup %s.\n", act
);
3844 mutex_unlock(&xhci
->mutex
);
3845 ret
= xhci_disable_slot(xhci
, udev
->slot_id
);
3847 xhci_alloc_dev(hcd
, udev
);
3848 kfree(command
->completion
);
3851 case COMP_INCOMPATIBLE_DEVICE_ERROR
:
3852 dev_warn(&udev
->dev
,
3853 "ERROR: Incompatible device for setup %s command\n", act
);
3857 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3858 "Successful setup %s command", act
);
3862 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3863 act
, command
->status
);
3864 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
, 1);
3870 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3871 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3872 "Op regs DCBAA ptr = %#016llx", temp_64
);
3873 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3874 "Slot ID %d dcbaa entry @%p = %#016llx",
3876 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3877 (unsigned long long)
3878 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3879 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3880 "Output Context DMA address = %#08llx",
3881 (unsigned long long)virt_dev
->out_ctx
->dma
);
3882 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3883 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3885 * USB core uses address 1 for the roothubs, so we add one to the
3886 * address given back to us by the HC.
3888 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
,
3889 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3890 /* Zero the input context control for later use */
3891 ctrl_ctx
->add_flags
= 0;
3892 ctrl_ctx
->drop_flags
= 0;
3894 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3895 "Internal device address = %d",
3896 le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
);
3898 mutex_unlock(&xhci
->mutex
);
3900 kfree(command
->completion
);
3906 static int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3908 return xhci_setup_device(hcd
, udev
, SETUP_CONTEXT_ADDRESS
);
3911 static int xhci_enable_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3913 return xhci_setup_device(hcd
, udev
, SETUP_CONTEXT_ONLY
);
3917 * Transfer the port index into real index in the HW port status
3918 * registers. Caculate offset between the port's PORTSC register
3919 * and port status base. Divide the number of per port register
3920 * to get the real index. The raw port number bases 1.
3922 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3924 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3925 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3926 __le32 __iomem
*addr
;
3929 if (hcd
->speed
< HCD_USB3
)
3930 addr
= xhci
->usb2_ports
[port1
- 1];
3932 addr
= xhci
->usb3_ports
[port1
- 1];
3934 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3939 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3940 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3942 static int __maybe_unused
xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
3943 struct usb_device
*udev
, u16 max_exit_latency
)
3945 struct xhci_virt_device
*virt_dev
;
3946 struct xhci_command
*command
;
3947 struct xhci_input_control_ctx
*ctrl_ctx
;
3948 struct xhci_slot_ctx
*slot_ctx
;
3949 unsigned long flags
;
3952 spin_lock_irqsave(&xhci
->lock
, flags
);
3954 virt_dev
= xhci
->devs
[udev
->slot_id
];
3957 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3958 * xHC was re-initialized. Exit latency will be set later after
3959 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3962 if (!virt_dev
|| max_exit_latency
== virt_dev
->current_mel
) {
3963 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3967 /* Attempt to issue an Evaluate Context command to change the MEL. */
3968 command
= xhci
->lpm_command
;
3969 ctrl_ctx
= xhci_get_input_control_ctx(command
->in_ctx
);
3971 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3972 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3977 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
3978 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3980 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
3981 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
3982 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
3983 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
3984 slot_ctx
->dev_state
= 0;
3986 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
3987 "Set up evaluate context for LPM MEL change.");
3989 /* Issue and wait for the evaluate context command. */
3990 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3994 spin_lock_irqsave(&xhci
->lock
, flags
);
3995 virt_dev
->current_mel
= max_exit_latency
;
3996 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4003 /* BESL to HIRD Encoding array for USB2 LPM */
4004 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4005 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4007 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4008 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
4009 struct usb_device
*udev
)
4011 int u2del
, besl
, besl_host
;
4012 int besl_device
= 0;
4015 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
4016 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4018 if (field
& USB_BESL_SUPPORT
) {
4019 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
4020 if (xhci_besl_encoding
[besl_host
] >= u2del
)
4023 /* Use baseline BESL value as default */
4024 if (field
& USB_BESL_BASELINE_VALID
)
4025 besl_device
= USB_GET_BESL_BASELINE(field
);
4026 else if (field
& USB_BESL_DEEP_VALID
)
4027 besl_device
= USB_GET_BESL_DEEP(field
);
4032 besl_host
= (u2del
- 51) / 75 + 1;
4035 besl
= besl_host
+ besl_device
;
4042 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4043 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device
*udev
)
4050 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4052 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4053 l1
= udev
->l1_params
.timeout
/ 256;
4055 /* device has preferred BESLD */
4056 if (field
& USB_BESL_DEEP_VALID
) {
4057 besld
= USB_GET_BESL_DEEP(field
);
4061 return PORT_BESLD(besld
) | PORT_L1_TIMEOUT(l1
) | PORT_HIRDM(hirdm
);
4064 static int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4065 struct usb_device
*udev
, int enable
)
4067 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4068 __le32 __iomem
**port_array
;
4069 __le32 __iomem
*pm_addr
, *hlpm_addr
;
4070 u32 pm_val
, hlpm_val
, field
;
4071 unsigned int port_num
;
4072 unsigned long flags
;
4073 int hird
, exit_latency
;
4076 if (hcd
->speed
>= HCD_USB3
|| !xhci
->hw_lpm_support
||
4080 if (!udev
->parent
|| udev
->parent
->parent
||
4081 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4084 if (udev
->usb2_hw_lpm_capable
!= 1)
4087 spin_lock_irqsave(&xhci
->lock
, flags
);
4089 port_array
= xhci
->usb2_ports
;
4090 port_num
= udev
->portnum
- 1;
4091 pm_addr
= port_array
[port_num
] + PORTPMSC
;
4092 pm_val
= readl(pm_addr
);
4093 hlpm_addr
= port_array
[port_num
] + PORTHLPMC
;
4094 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4096 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4097 enable
? "enable" : "disable", port_num
+ 1);
4099 if (enable
&& !(xhci
->quirks
& XHCI_HW_LPM_DISABLE
)) {
4100 /* Host supports BESL timeout instead of HIRD */
4101 if (udev
->usb2_hw_lpm_besl_capable
) {
4102 /* if device doesn't have a preferred BESL value use a
4103 * default one which works with mixed HIRD and BESL
4104 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4106 if ((field
& USB_BESL_SUPPORT
) &&
4107 (field
& USB_BESL_BASELINE_VALID
))
4108 hird
= USB_GET_BESL_BASELINE(field
);
4110 hird
= udev
->l1_params
.besl
;
4112 exit_latency
= xhci_besl_encoding
[hird
];
4113 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4115 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4116 * input context for link powermanagement evaluate
4117 * context commands. It is protected by hcd->bandwidth
4118 * mutex and is shared by all devices. We need to set
4119 * the max ext latency in USB 2 BESL LPM as well, so
4120 * use the same mutex and xhci_change_max_exit_latency()
4122 mutex_lock(hcd
->bandwidth_mutex
);
4123 ret
= xhci_change_max_exit_latency(xhci
, udev
,
4125 mutex_unlock(hcd
->bandwidth_mutex
);
4129 spin_lock_irqsave(&xhci
->lock
, flags
);
4131 hlpm_val
= xhci_calculate_usb2_hw_lpm_params(udev
);
4132 writel(hlpm_val
, hlpm_addr
);
4136 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4139 pm_val
&= ~PORT_HIRD_MASK
;
4140 pm_val
|= PORT_HIRD(hird
) | PORT_RWE
| PORT_L1DS(udev
->slot_id
);
4141 writel(pm_val
, pm_addr
);
4142 pm_val
= readl(pm_addr
);
4144 writel(pm_val
, pm_addr
);
4148 pm_val
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
| PORT_L1DS_MASK
);
4149 writel(pm_val
, pm_addr
);
4152 if (udev
->usb2_hw_lpm_besl_capable
) {
4153 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4154 mutex_lock(hcd
->bandwidth_mutex
);
4155 xhci_change_max_exit_latency(xhci
, udev
, 0);
4156 mutex_unlock(hcd
->bandwidth_mutex
);
4161 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4165 /* check if a usb2 port supports a given extened capability protocol
4166 * only USB2 ports extended protocol capability values are cached.
4167 * Return 1 if capability is supported
4169 static int xhci_check_usb2_port_capability(struct xhci_hcd
*xhci
, int port
,
4170 unsigned capability
)
4172 u32 port_offset
, port_count
;
4175 for (i
= 0; i
< xhci
->num_ext_caps
; i
++) {
4176 if (xhci
->ext_caps
[i
] & capability
) {
4177 /* port offsets starts at 1 */
4178 port_offset
= XHCI_EXT_PORT_OFF(xhci
->ext_caps
[i
]) - 1;
4179 port_count
= XHCI_EXT_PORT_COUNT(xhci
->ext_caps
[i
]);
4180 if (port
>= port_offset
&&
4181 port
< port_offset
+ port_count
)
4188 static int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4190 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4191 int portnum
= udev
->portnum
- 1;
4193 if (hcd
->speed
>= HCD_USB3
|| !xhci
->sw_lpm_support
||
4197 /* we only support lpm for non-hub device connected to root hub yet */
4198 if (!udev
->parent
|| udev
->parent
->parent
||
4199 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4202 if (xhci
->hw_lpm_support
== 1 &&
4203 xhci_check_usb2_port_capability(
4204 xhci
, portnum
, XHCI_HLC
)) {
4205 udev
->usb2_hw_lpm_capable
= 1;
4206 udev
->l1_params
.timeout
= XHCI_L1_TIMEOUT
;
4207 udev
->l1_params
.besl
= XHCI_DEFAULT_BESL
;
4208 if (xhci_check_usb2_port_capability(xhci
, portnum
,
4210 udev
->usb2_hw_lpm_besl_capable
= 1;
4216 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4218 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4219 static unsigned long long xhci_service_interval_to_ns(
4220 struct usb_endpoint_descriptor
*desc
)
4222 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4225 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4226 enum usb3_link_state state
)
4228 unsigned long long sel
;
4229 unsigned long long pel
;
4230 unsigned int max_sel_pel
;
4235 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4236 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4237 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4238 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4242 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4243 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4244 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4248 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4250 return USB3_LPM_DISABLED
;
4253 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4254 return USB3_LPM_DEVICE_INITIATED
;
4256 if (sel
> max_sel_pel
)
4257 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4258 "due to long SEL %llu ms\n",
4261 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4262 "due to long PEL %llu ms\n",
4264 return USB3_LPM_DISABLED
;
4267 /* The U1 timeout should be the maximum of the following values:
4268 * - For control endpoints, U1 system exit latency (SEL) * 3
4269 * - For bulk endpoints, U1 SEL * 5
4270 * - For interrupt endpoints:
4271 * - Notification EPs, U1 SEL * 3
4272 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4273 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4275 static unsigned long long xhci_calculate_intel_u1_timeout(
4276 struct usb_device
*udev
,
4277 struct usb_endpoint_descriptor
*desc
)
4279 unsigned long long timeout_ns
;
4283 ep_type
= usb_endpoint_type(desc
);
4285 case USB_ENDPOINT_XFER_CONTROL
:
4286 timeout_ns
= udev
->u1_params
.sel
* 3;
4288 case USB_ENDPOINT_XFER_BULK
:
4289 timeout_ns
= udev
->u1_params
.sel
* 5;
4291 case USB_ENDPOINT_XFER_INT
:
4292 intr_type
= usb_endpoint_interrupt_type(desc
);
4293 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4294 timeout_ns
= udev
->u1_params
.sel
* 3;
4297 /* Otherwise the calculation is the same as isoc eps */
4299 case USB_ENDPOINT_XFER_ISOC
:
4300 timeout_ns
= xhci_service_interval_to_ns(desc
);
4301 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4302 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4303 timeout_ns
= udev
->u1_params
.sel
* 2;
4312 /* Returns the hub-encoded U1 timeout value. */
4313 static u16
xhci_calculate_u1_timeout(struct xhci_hcd
*xhci
,
4314 struct usb_device
*udev
,
4315 struct usb_endpoint_descriptor
*desc
)
4317 unsigned long long timeout_ns
;
4319 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4320 timeout_ns
= xhci_calculate_intel_u1_timeout(udev
, desc
);
4322 timeout_ns
= udev
->u1_params
.sel
;
4324 /* The U1 timeout is encoded in 1us intervals.
4325 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4327 if (timeout_ns
== USB3_LPM_DISABLED
)
4330 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4332 /* If the necessary timeout value is bigger than what we can set in the
4333 * USB 3.0 hub, we have to disable hub-initiated U1.
4335 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4337 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4338 "due to long timeout %llu ms\n", timeout_ns
);
4339 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4342 /* The U2 timeout should be the maximum of:
4343 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4344 * - largest bInterval of any active periodic endpoint (to avoid going
4345 * into lower power link states between intervals).
4346 * - the U2 Exit Latency of the device
4348 static unsigned long long xhci_calculate_intel_u2_timeout(
4349 struct usb_device
*udev
,
4350 struct usb_endpoint_descriptor
*desc
)
4352 unsigned long long timeout_ns
;
4353 unsigned long long u2_del_ns
;
4355 timeout_ns
= 10 * 1000 * 1000;
4357 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4358 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4359 timeout_ns
= xhci_service_interval_to_ns(desc
);
4361 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4362 if (u2_del_ns
> timeout_ns
)
4363 timeout_ns
= u2_del_ns
;
4368 /* Returns the hub-encoded U2 timeout value. */
4369 static u16
xhci_calculate_u2_timeout(struct xhci_hcd
*xhci
,
4370 struct usb_device
*udev
,
4371 struct usb_endpoint_descriptor
*desc
)
4373 unsigned long long timeout_ns
;
4375 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4376 timeout_ns
= xhci_calculate_intel_u2_timeout(udev
, desc
);
4378 timeout_ns
= udev
->u2_params
.sel
;
4380 /* The U2 timeout is encoded in 256us intervals */
4381 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4382 /* If the necessary timeout value is bigger than what we can set in the
4383 * USB 3.0 hub, we have to disable hub-initiated U2.
4385 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4387 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4388 "due to long timeout %llu ms\n", timeout_ns
);
4389 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4392 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4393 struct usb_device
*udev
,
4394 struct usb_endpoint_descriptor
*desc
,
4395 enum usb3_link_state state
,
4398 if (state
== USB3_LPM_U1
)
4399 return xhci_calculate_u1_timeout(xhci
, udev
, desc
);
4400 else if (state
== USB3_LPM_U2
)
4401 return xhci_calculate_u2_timeout(xhci
, udev
, desc
);
4403 return USB3_LPM_DISABLED
;
4406 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4407 struct usb_device
*udev
,
4408 struct usb_endpoint_descriptor
*desc
,
4409 enum usb3_link_state state
,
4414 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4415 desc
, state
, timeout
);
4417 /* If we found we can't enable hub-initiated LPM, or
4418 * the U1 or U2 exit latency was too high to allow
4419 * device-initiated LPM as well, just stop searching.
4421 if (alt_timeout
== USB3_LPM_DISABLED
||
4422 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4423 *timeout
= alt_timeout
;
4426 if (alt_timeout
> *timeout
)
4427 *timeout
= alt_timeout
;
4431 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4432 struct usb_device
*udev
,
4433 struct usb_host_interface
*alt
,
4434 enum usb3_link_state state
,
4439 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4440 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4441 &alt
->endpoint
[j
].desc
, state
, timeout
))
4448 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4449 enum usb3_link_state state
)
4451 struct usb_device
*parent
;
4452 unsigned int num_hubs
;
4454 if (state
== USB3_LPM_U2
)
4457 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4458 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4459 parent
= parent
->parent
)
4465 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4466 " below second-tier hub.\n");
4467 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4468 "to decrease power consumption.\n");
4472 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4473 struct usb_device
*udev
,
4474 enum usb3_link_state state
)
4476 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4477 return xhci_check_intel_tier_policy(udev
, state
);
4482 /* Returns the U1 or U2 timeout that should be enabled.
4483 * If the tier check or timeout setting functions return with a non-zero exit
4484 * code, that means the timeout value has been finalized and we shouldn't look
4485 * at any more endpoints.
4487 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4488 struct usb_device
*udev
, enum usb3_link_state state
)
4490 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4491 struct usb_host_config
*config
;
4494 u16 timeout
= USB3_LPM_DISABLED
;
4496 if (state
== USB3_LPM_U1
)
4498 else if (state
== USB3_LPM_U2
)
4501 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4506 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4509 /* Gather some information about the currently installed configuration
4510 * and alternate interface settings.
4512 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4516 config
= udev
->actconfig
;
4520 for (i
= 0; i
< config
->desc
.bNumInterfaces
; i
++) {
4521 struct usb_driver
*driver
;
4522 struct usb_interface
*intf
= config
->interface
[i
];
4527 /* Check if any currently bound drivers want hub-initiated LPM
4530 if (intf
->dev
.driver
) {
4531 driver
= to_usb_driver(intf
->dev
.driver
);
4532 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4533 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4534 "at request of driver %s\n",
4535 state_name
, driver
->name
);
4536 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4540 /* Not sure how this could happen... */
4541 if (!intf
->cur_altsetting
)
4544 if (xhci_update_timeout_for_interface(xhci
, udev
,
4545 intf
->cur_altsetting
,
4552 static int calculate_max_exit_latency(struct usb_device
*udev
,
4553 enum usb3_link_state state_changed
,
4554 u16 hub_encoded_timeout
)
4556 unsigned long long u1_mel_us
= 0;
4557 unsigned long long u2_mel_us
= 0;
4558 unsigned long long mel_us
= 0;
4564 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4565 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4566 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4567 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4569 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4570 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4571 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4572 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4574 /* If U1 was already enabled and we're not disabling it,
4575 * or we're going to enable U1, account for the U1 max exit latency.
4577 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4579 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4580 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4582 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4584 if (u1_mel_us
> u2_mel_us
)
4588 /* xHCI host controller max exit latency field is only 16 bits wide. */
4589 if (mel_us
> MAX_EXIT
) {
4590 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4591 "is too big.\n", mel_us
);
4597 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4598 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4599 struct usb_device
*udev
, enum usb3_link_state state
)
4601 struct xhci_hcd
*xhci
;
4602 u16 hub_encoded_timeout
;
4606 xhci
= hcd_to_xhci(hcd
);
4607 /* The LPM timeout values are pretty host-controller specific, so don't
4608 * enable hub-initiated timeouts unless the vendor has provided
4609 * information about their timeout algorithm.
4611 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4612 !xhci
->devs
[udev
->slot_id
])
4613 return USB3_LPM_DISABLED
;
4615 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4616 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4618 /* Max Exit Latency is too big, disable LPM. */
4619 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4623 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4626 return hub_encoded_timeout
;
4629 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4630 struct usb_device
*udev
, enum usb3_link_state state
)
4632 struct xhci_hcd
*xhci
;
4635 xhci
= hcd_to_xhci(hcd
);
4636 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4637 !xhci
->devs
[udev
->slot_id
])
4640 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4641 return xhci_change_max_exit_latency(xhci
, udev
, mel
);
4643 #else /* CONFIG_PM */
4645 static int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4646 struct usb_device
*udev
, int enable
)
4651 static int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4656 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4657 struct usb_device
*udev
, enum usb3_link_state state
)
4659 return USB3_LPM_DISABLED
;
4662 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4663 struct usb_device
*udev
, enum usb3_link_state state
)
4667 #endif /* CONFIG_PM */
4669 /*-------------------------------------------------------------------------*/
4671 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4672 * internal data structures for the device.
4674 static int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4675 struct usb_tt
*tt
, gfp_t mem_flags
)
4677 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4678 struct xhci_virt_device
*vdev
;
4679 struct xhci_command
*config_cmd
;
4680 struct xhci_input_control_ctx
*ctrl_ctx
;
4681 struct xhci_slot_ctx
*slot_ctx
;
4682 unsigned long flags
;
4683 unsigned think_time
;
4686 /* Ignore root hubs */
4690 vdev
= xhci
->devs
[hdev
->slot_id
];
4692 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4696 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4700 ctrl_ctx
= xhci_get_input_control_ctx(config_cmd
->in_ctx
);
4702 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
4704 xhci_free_command(xhci
, config_cmd
);
4708 spin_lock_irqsave(&xhci
->lock
, flags
);
4709 if (hdev
->speed
== USB_SPEED_HIGH
&&
4710 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4711 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4712 xhci_free_command(xhci
, config_cmd
);
4713 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4717 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4718 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4719 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4720 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4722 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4723 * but it may be already set to 1 when setup an xHCI virtual
4724 * device, so clear it anyway.
4727 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4728 else if (hdev
->speed
== USB_SPEED_FULL
)
4729 slot_ctx
->dev_info
&= cpu_to_le32(~DEV_MTT
);
4731 if (xhci
->hci_version
> 0x95) {
4732 xhci_dbg(xhci
, "xHCI version %x needs hub "
4733 "TT think time and number of ports\n",
4734 (unsigned int) xhci
->hci_version
);
4735 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4736 /* Set TT think time - convert from ns to FS bit times.
4737 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4738 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4740 * xHCI 1.0: this field shall be 0 if the device is not a
4743 think_time
= tt
->think_time
;
4744 if (think_time
!= 0)
4745 think_time
= (think_time
/ 666) - 1;
4746 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4747 slot_ctx
->tt_info
|=
4748 cpu_to_le32(TT_THINK_TIME(think_time
));
4750 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4751 "TT think time or number of ports\n",
4752 (unsigned int) xhci
->hci_version
);
4754 slot_ctx
->dev_state
= 0;
4755 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4757 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4758 (xhci
->hci_version
> 0x95) ?
4759 "configure endpoint" : "evaluate context");
4761 /* Issue and wait for the configure endpoint or
4762 * evaluate context command.
4764 if (xhci
->hci_version
> 0x95)
4765 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4768 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4771 xhci_free_command(xhci
, config_cmd
);
4775 static int xhci_get_frame(struct usb_hcd
*hcd
)
4777 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4778 /* EHCI mods by the periodic size. Why? */
4779 return readl(&xhci
->run_regs
->microframe_index
) >> 3;
4782 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4784 struct xhci_hcd
*xhci
;
4786 * TODO: Check with DWC3 clients for sysdev according to
4789 struct device
*dev
= hcd
->self
.sysdev
;
4792 /* Accept arbitrarily long scatter-gather lists */
4793 hcd
->self
.sg_tablesize
= ~0;
4795 /* support to build packet from discontinuous buffers */
4796 hcd
->self
.no_sg_constraint
= 1;
4798 /* XHCI controllers don't stop the ep queue on short packets :| */
4799 hcd
->self
.no_stop_on_short
= 1;
4801 xhci
= hcd_to_xhci(hcd
);
4803 if (usb_hcd_is_primary_hcd(hcd
)) {
4804 xhci
->main_hcd
= hcd
;
4805 /* Mark the first roothub as being USB 2.0.
4806 * The xHCI driver will register the USB 3.0 roothub.
4808 hcd
->speed
= HCD_USB2
;
4809 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4811 * USB 2.0 roothub under xHCI has an integrated TT,
4812 * (rate matching hub) as opposed to having an OHCI/UHCI
4813 * companion controller.
4817 /* Some 3.1 hosts return sbrn 0x30, can't rely on sbrn alone */
4818 if (xhci
->sbrn
== 0x31 || xhci
->usb3_rhub
.min_rev
>= 1) {
4819 xhci_info(xhci
, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4820 hcd
->speed
= HCD_USB31
;
4821 hcd
->self
.root_hub
->speed
= USB_SPEED_SUPER_PLUS
;
4823 /* xHCI private pointer was set in xhci_pci_probe for the second
4824 * registered roothub.
4829 mutex_init(&xhci
->mutex
);
4830 xhci
->cap_regs
= hcd
->regs
;
4831 xhci
->op_regs
= hcd
->regs
+
4832 HC_LENGTH(readl(&xhci
->cap_regs
->hc_capbase
));
4833 xhci
->run_regs
= hcd
->regs
+
4834 (readl(&xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4835 /* Cache read-only capability registers */
4836 xhci
->hcs_params1
= readl(&xhci
->cap_regs
->hcs_params1
);
4837 xhci
->hcs_params2
= readl(&xhci
->cap_regs
->hcs_params2
);
4838 xhci
->hcs_params3
= readl(&xhci
->cap_regs
->hcs_params3
);
4839 xhci
->hcc_params
= readl(&xhci
->cap_regs
->hc_capbase
);
4840 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4841 xhci
->hcc_params
= readl(&xhci
->cap_regs
->hcc_params
);
4842 if (xhci
->hci_version
> 0x100)
4843 xhci
->hcc_params2
= readl(&xhci
->cap_regs
->hcc_params2
);
4844 xhci_print_registers(xhci
);
4846 xhci
->quirks
|= quirks
;
4848 get_quirks(dev
, xhci
);
4850 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4851 * success event after a short transfer. This quirk will ignore such
4854 if (xhci
->hci_version
> 0x96)
4855 xhci
->quirks
|= XHCI_SPURIOUS_SUCCESS
;
4857 /* Make sure the HC is halted. */
4858 retval
= xhci_halt(xhci
);
4862 xhci_dbg(xhci
, "Resetting HCD\n");
4863 /* Reset the internal HC memory state and registers. */
4864 retval
= xhci_reset(xhci
);
4867 xhci_dbg(xhci
, "Reset complete\n");
4870 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
4871 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
4872 * address memory pointers actually. So, this driver clears the AC64
4873 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
4874 * DMA_BIT_MASK(32)) in this xhci_gen_setup().
4876 if (xhci
->quirks
& XHCI_NO_64BIT_SUPPORT
)
4877 xhci
->hcc_params
&= ~BIT(0);
4879 /* Set dma_mask and coherent_dma_mask to 64-bits,
4880 * if xHC supports 64-bit addressing */
4881 if (HCC_64BIT_ADDR(xhci
->hcc_params
) &&
4882 !dma_set_mask(dev
, DMA_BIT_MASK(64))) {
4883 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4884 dma_set_coherent_mask(dev
, DMA_BIT_MASK(64));
4887 * This is to avoid error in cases where a 32-bit USB
4888 * controller is used on a 64-bit capable system.
4890 retval
= dma_set_mask(dev
, DMA_BIT_MASK(32));
4893 xhci_dbg(xhci
, "Enabling 32-bit DMA addresses.\n");
4894 dma_set_coherent_mask(dev
, DMA_BIT_MASK(32));
4897 xhci_dbg(xhci
, "Calling HCD init\n");
4898 /* Initialize HCD and host controller data structures. */
4899 retval
= xhci_init(hcd
);
4902 xhci_dbg(xhci
, "Called HCD init\n");
4904 xhci_info(xhci
, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4905 xhci
->hcc_params
, xhci
->hci_version
, xhci
->quirks
);
4909 EXPORT_SYMBOL_GPL(xhci_gen_setup
);
4911 static const struct hc_driver xhci_hc_driver
= {
4912 .description
= "xhci-hcd",
4913 .product_desc
= "xHCI Host Controller",
4914 .hcd_priv_size
= sizeof(struct xhci_hcd
),
4917 * generic hardware linkage
4920 .flags
= HCD_MEMORY
| HCD_USB3
| HCD_SHARED
,
4923 * basic lifecycle operations
4925 .reset
= NULL
, /* set in xhci_init_driver() */
4928 .shutdown
= xhci_shutdown
,
4931 * managing i/o requests and associated device resources
4933 .urb_enqueue
= xhci_urb_enqueue
,
4934 .urb_dequeue
= xhci_urb_dequeue
,
4935 .alloc_dev
= xhci_alloc_dev
,
4936 .free_dev
= xhci_free_dev
,
4937 .alloc_streams
= xhci_alloc_streams
,
4938 .free_streams
= xhci_free_streams
,
4939 .add_endpoint
= xhci_add_endpoint
,
4940 .drop_endpoint
= xhci_drop_endpoint
,
4941 .endpoint_reset
= xhci_endpoint_reset
,
4942 .check_bandwidth
= xhci_check_bandwidth
,
4943 .reset_bandwidth
= xhci_reset_bandwidth
,
4944 .address_device
= xhci_address_device
,
4945 .enable_device
= xhci_enable_device
,
4946 .update_hub_device
= xhci_update_hub_device
,
4947 .reset_device
= xhci_discover_or_reset_device
,
4950 * scheduling support
4952 .get_frame_number
= xhci_get_frame
,
4957 .hub_control
= xhci_hub_control
,
4958 .hub_status_data
= xhci_hub_status_data
,
4959 .bus_suspend
= xhci_bus_suspend
,
4960 .bus_resume
= xhci_bus_resume
,
4963 * call back when device connected and addressed
4965 .update_device
= xhci_update_device
,
4966 .set_usb2_hw_lpm
= xhci_set_usb2_hardware_lpm
,
4967 .enable_usb3_lpm_timeout
= xhci_enable_usb3_lpm_timeout
,
4968 .disable_usb3_lpm_timeout
= xhci_disable_usb3_lpm_timeout
,
4969 .find_raw_port_number
= xhci_find_raw_port_number
,
4972 void xhci_init_driver(struct hc_driver
*drv
,
4973 const struct xhci_driver_overrides
*over
)
4977 /* Copy the generic table to drv then apply the overrides */
4978 *drv
= xhci_hc_driver
;
4981 drv
->hcd_priv_size
+= over
->extra_priv_size
;
4983 drv
->reset
= over
->reset
;
4985 drv
->start
= over
->start
;
4988 EXPORT_SYMBOL_GPL(xhci_init_driver
);
4990 MODULE_DESCRIPTION(DRIVER_DESC
);
4991 MODULE_AUTHOR(DRIVER_AUTHOR
);
4992 MODULE_LICENSE("GPL");
4994 static int __init
xhci_hcd_init(void)
4997 * Check the compiler generated sizes of structures that must be laid
4998 * out in specific ways for hardware access.
5000 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
5001 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
5002 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
5003 /* xhci_device_control has eight fields, and also
5004 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5006 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
5007 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
5008 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
5009 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 8*32/8);
5010 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
5011 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5012 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
5017 xhci_debugfs_create_root();
5023 * If an init function is provided, an exit function must also be provided
5024 * to allow module unload.
5026 static void __exit
xhci_hcd_fini(void)
5028 xhci_debugfs_remove_root();
5031 module_init(xhci_hcd_init
);
5032 module_exit(xhci_hcd_fini
);