1 // SPDX-License-Identifier: GPL-2.0
3 * mtu3.h - MediaTek USB3 DRD header
5 * Copyright (C) 2016 MediaTek Inc.
7 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
13 #include <linux/device.h>
14 #include <linux/dmapool.h>
15 #include <linux/extcon.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/phy/phy.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/usb.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <linux/usb/otg.h>
29 #include "mtu3_hw_regs.h"
32 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
33 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
34 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
36 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
37 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
38 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
40 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
41 #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
43 #define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
44 #define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
45 #define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
47 #define USB_QMU_TQCSR(epnum) (U3D_TXQCSR1 + (((epnum) - 1) * 0x10))
48 #define USB_QMU_TQSAR(epnum) (U3D_TXQSAR1 + (((epnum) - 1) * 0x10))
49 #define USB_QMU_TQCPR(epnum) (U3D_TXQCPR1 + (((epnum) - 1) * 0x10))
51 #define SSUSB_U3_CTRL(p) (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08))
52 #define SSUSB_U2_CTRL(p) (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08))
54 #define MTU3_DRIVER_NAME "mtu3"
55 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
57 #define MTU3_EP_ENABLED BIT(0)
58 #define MTU3_EP_STALL BIT(1)
59 #define MTU3_EP_WEDGE BIT(2)
60 #define MTU3_EP_BUSY BIT(3)
62 #define MTU3_U3_IP_SLOT_DEFAULT 2
63 #define MTU3_U2_IP_SLOT_DEFAULT 1
67 * from 0x1003 version, USB3 Gen2 is supported, two changes affect driver:
68 * 1. MAXPKT and MULTI bits layout of TXCSR1 and RXCSR1 are adjusted,
69 * but not backward compatible
70 * 2. QMU extend buffer length supported
72 #define MTU3_TRUNK_VERS_1003 0x1003
75 * Normally the device works on HS or SS, to simplify fifo management,
76 * devide fifo into some 512B parts, use bitmap to manage it; And
77 * 128 bits size of bitmap is large enough, that means it can manage
78 * up to 64KB fifo size.
79 * NOTE: MTU3_EP_FIFO_UNIT should be power of two
81 #define MTU3_EP_FIFO_UNIT (1 << 9)
82 #define MTU3_FIFO_BIT_SIZE 128
83 #define MTU3_U2_IP_EP0_FIFO_SIZE 64
86 * Maximum size of ep0 response buffer for ch9 requests,
87 * the SET_SEL request uses 6 so far, and GET_STATUS is 2
89 #define EP0_RESPONSE_BUF 6
91 /* device operated link and speed got from DEVICE_CONF register */
93 MTU3_SPEED_INACTIVE
= 0,
97 MTU3_SPEED_SUPER_PLUS
= 5,
101 * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
102 * without data stage.
103 * @MU3D_EP0_STATE_TX: IN data stage
104 * @MU3D_EP0_STATE_RX: OUT data stage
105 * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and
106 * waits for its completion interrupt
107 * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared
108 * after receives a SETUP.
110 enum mtu3_g_ep0_state
{
111 MU3D_EP0_STATE_SETUP
= 1,
114 MU3D_EP0_STATE_TX_END
,
115 MU3D_EP0_STATE_STALL
,
119 * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode
121 * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
123 * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
125 enum mtu3_dr_force_mode
{
126 MTU3_DR_FORCE_NONE
= 0,
128 MTU3_DR_FORCE_DEVICE
,
132 * @base: the base address of fifo
133 * @limit: the bitmap size in bits
134 * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
136 struct mtu3_fifo_info
{
139 DECLARE_BITMAP(bitmap
, MTU3_FIFO_BIT_SIZE
);
143 * General Purpose Descriptor (GPD):
144 * The format of TX GPD is a little different from RX one.
145 * And the size of GPD is 16 bytes.
148 * bit0: Hardware Own (HWO)
149 * bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
150 * bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1
151 * bit6: [EL] Zero Length Packet (ZLP), moved from @dw3_info[29]
152 * bit7: Interrupt On Completion (IOC)
153 * bit[31:16]: ([EL] bit[31:12]) allow data buffer length (RX ONLY),
154 * the buffer length of the data to receive
155 * bit[23:16]: ([EL] bit[31:24]) extension address (TX ONLY),
156 * lower 4 bits are extension bits of @buffer,
157 * upper 4 bits are extension bits of @next_gpd
158 * @next_gpd: Physical address of the next GPD
159 * @buffer: Physical address of the data buffer
161 * bit[15:0]: ([EL] bit[19:0]) data buffer length,
162 * (TX): the buffer length of the data to transmit
163 * (RX): The total length of data received
164 * bit[23:16]: ([EL] bit[31:24]) extension address (RX ONLY),
165 * lower 4 bits are extension bits of @buffer,
166 * upper 4 bits are extension bits of @next_gpd
167 * bit29: ([EL] abandoned) Zero Length Packet (ZLP) (TX ONLY)
177 * dma: physical base address of GPD segment
178 * start: virtual base address of GPD segment
179 * end: the last GPD element
180 * enqueue: the first empty GPD to use
181 * dequeue: the first completed GPD serviced by ISR
182 * NOTE: the size of GPD ring should be >= 2
184 struct mtu3_gpd_ring
{
186 struct qmu_gpd
*start
;
188 struct qmu_gpd
*enqueue
;
189 struct qmu_gpd
*dequeue
;
193 * @vbus: vbus 5V used by host mode
194 * @edev: external connector used to detect vbus and iddig changes
195 * @vbus_nb: notifier for vbus detection
196 * @vbus_work : work of vbus detection notifier, used to avoid sleep in
197 * notifier callback which is atomic context
198 * @vbus_event : event of vbus detecion notifier
199 * @id_nb : notifier for iddig(idpin) detection
200 * @id_work : work of iddig detection notifier
201 * @id_event : event of iddig detecion notifier
202 * @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
203 * @manual_drd_enabled: it's true when supports dual-role device by debugfs
204 * to switch host/device modes depending on user input.
206 struct otg_switch_mtk
{
207 struct regulator
*vbus
;
208 struct extcon_dev
*edev
;
209 struct notifier_block vbus_nb
;
210 struct work_struct vbus_work
;
211 unsigned long vbus_event
;
212 struct notifier_block id_nb
;
213 struct work_struct id_work
;
214 unsigned long id_event
;
216 bool manual_drd_enabled
;
220 * @mac_base: register base address of device MAC, exclude xHCI's
221 * @ippc_base: register base address of IP Power and Clock interface (IPPC)
222 * @vusb33: usb3.3V shared by device/host IP
223 * @sys_clk: system clock of mtu3, shared by device/host IP
224 * @ref_clk: reference clock
225 * @mcu_clk: mcu_bus_ck clock for AHB bus etc
226 * @dma_clk: dma_bus_ck clock for AXI bus etc
227 * @dr_mode: works in which mode:
228 * host only, device only or dual-role mode
229 * @u2_ports: number of usb2.0 host ports
230 * @u3_ports: number of usb3.0 host ports
231 * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to
232 * disable u3port0, bit1==1 to disable u3port1,... etc
233 * @dbgfs_root: only used when supports manual dual-role switch via debugfs
234 * @uwk_en: it's true when supports remote wakeup in host mode
235 * @uwk: syscon including usb wakeup glue layer between SSUSB IP and SPM
236 * @uwk_reg_base: the base address of the wakeup glue layer in @uwk
237 * @uwk_vers: the version of the wakeup glue layer
242 void __iomem
*mac_base
;
243 void __iomem
*ippc_base
;
246 /* common power & clock */
247 struct regulator
*vusb33
;
253 struct otg_switch_mtk otg_switch
;
254 enum usb_dr_mode dr_mode
;
259 struct dentry
*dbgfs_root
;
260 /* usb wakeup for host mode */
268 * @fifo_size: it is (@slot + 1) * @fifo_seg_size
269 * @fifo_seg_size: it is roundup_pow_of_two(@maxp)
283 struct mtu3_fifo_info
*fifo
;
285 struct list_head req_list
;
286 struct mtu3_gpd_ring gpd_ring
;
287 const struct usb_ss_ep_comp_descriptor
*comp_desc
;
288 const struct usb_endpoint_descriptor
*desc
;
295 struct mtu3_request
{
296 struct usb_request request
;
297 struct list_head list
;
304 static inline struct ssusb_mtk
*dev_to_ssusb(struct device
*dev
)
306 return dev_get_drvdata(dev
);
310 * struct mtu3 - device driver instance data.
311 * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only,
312 * MTU3_U3_IP_SLOT_DEFAULT for U3 IP
313 * @may_wakeup: means device's remote wakeup is enabled
314 * @is_self_powered: is reported in device status and the config descriptor
315 * @delayed_status: true when function drivers ask for delayed status
316 * @gen2cp: compatible with USB3 Gen2 IP
317 * @ep0_req: dummy request used while handling standard USB requests
318 * for GET_STATUS and SET_SEL
319 * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
323 struct ssusb_mtk
*ssusb
;
325 void __iomem
*mac_base
;
326 void __iomem
*ippc_base
;
329 struct mtu3_fifo_info tx_fifo
;
330 struct mtu3_fifo_info rx_fifo
;
332 struct mtu3_ep
*ep_array
;
333 struct mtu3_ep
*in_eps
;
334 struct mtu3_ep
*out_eps
;
340 struct dma_pool
*qmu_gpd_pool
;
341 enum mtu3_g_ep0_state ep0_state
;
342 struct usb_gadget g
; /* the gadget */
343 struct usb_gadget_driver
*gadget_driver
;
344 struct mtu3_request ep0_req
;
345 u8 setup_buf
[EP0_RESPONSE_BUF
];
348 unsigned is_active
:1;
349 unsigned may_wakeup
:1;
350 unsigned is_self_powered
:1;
351 unsigned test_mode
:1;
352 unsigned softconnect
:1;
353 unsigned u1_enable
:1;
354 unsigned u2_enable
:1;
356 unsigned delayed_status
:1;
364 static inline struct mtu3
*gadget_to_mtu3(struct usb_gadget
*g
)
366 return container_of(g
, struct mtu3
, g
);
369 static inline int is_first_entry(const struct list_head
*list
,
370 const struct list_head
*head
)
372 return list_is_last(head
, list
);
375 static inline struct mtu3_request
*to_mtu3_request(struct usb_request
*req
)
377 return req
? container_of(req
, struct mtu3_request
, request
) : NULL
;
380 static inline struct mtu3_ep
*to_mtu3_ep(struct usb_ep
*ep
)
382 return ep
? container_of(ep
, struct mtu3_ep
, ep
) : NULL
;
385 static inline struct mtu3_request
*next_request(struct mtu3_ep
*mep
)
387 return list_first_entry_or_null(&mep
->req_list
, struct mtu3_request
,
391 static inline void mtu3_writel(void __iomem
*base
, u32 offset
, u32 data
)
393 writel(data
, base
+ offset
);
396 static inline u32
mtu3_readl(void __iomem
*base
, u32 offset
)
398 return readl(base
+ offset
);
401 static inline void mtu3_setbits(void __iomem
*base
, u32 offset
, u32 bits
)
403 void __iomem
*addr
= base
+ offset
;
404 u32 tmp
= readl(addr
);
406 writel((tmp
| (bits
)), addr
);
409 static inline void mtu3_clrbits(void __iomem
*base
, u32 offset
, u32 bits
)
411 void __iomem
*addr
= base
+ offset
;
412 u32 tmp
= readl(addr
);
414 writel((tmp
& ~(bits
)), addr
);
417 int ssusb_check_clocks(struct ssusb_mtk
*ssusb
, u32 ex_clks
);
418 struct usb_request
*mtu3_alloc_request(struct usb_ep
*ep
, gfp_t gfp_flags
);
419 void mtu3_free_request(struct usb_ep
*ep
, struct usb_request
*req
);
420 void mtu3_req_complete(struct mtu3_ep
*mep
,
421 struct usb_request
*req
, int status
);
423 int mtu3_config_ep(struct mtu3
*mtu
, struct mtu3_ep
*mep
,
424 int interval
, int burst
, int mult
);
425 void mtu3_deconfig_ep(struct mtu3
*mtu
, struct mtu3_ep
*mep
);
426 void mtu3_ep_stall_set(struct mtu3_ep
*mep
, bool set
);
427 void mtu3_ep0_setup(struct mtu3
*mtu
);
428 void mtu3_start(struct mtu3
*mtu
);
429 void mtu3_stop(struct mtu3
*mtu
);
430 void mtu3_dev_on_off(struct mtu3
*mtu
, int is_on
);
432 int mtu3_gadget_setup(struct mtu3
*mtu
);
433 void mtu3_gadget_cleanup(struct mtu3
*mtu
);
434 void mtu3_gadget_reset(struct mtu3
*mtu
);
435 void mtu3_gadget_suspend(struct mtu3
*mtu
);
436 void mtu3_gadget_resume(struct mtu3
*mtu
);
437 void mtu3_gadget_disconnect(struct mtu3
*mtu
);
439 irqreturn_t
mtu3_ep0_isr(struct mtu3
*mtu
);
440 extern const struct usb_ep_ops mtu3_ep0_ops
;