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git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/usb/musb/blackfin.c
2 * MUSB OTG controller driver for Blackfin Processors
4 * Copyright 2006-2008 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/slab.h>
15 #include <linux/init.h>
16 #include <linux/list.h>
17 #include <linux/gpio.h>
20 #include <asm/cacheflush.h>
22 #include "musb_core.h"
26 * Load an endpoint's FIFO
28 void musb_write_fifo(struct musb_hw_ep
*hw_ep
, u16 len
, const u8
*src
)
30 void __iomem
*fifo
= hw_ep
->fifo
;
31 void __iomem
*epio
= hw_ep
->regs
;
32 u8 epnum
= hw_ep
->epnum
;
37 musb_writew(epio
, MUSB_TXCOUNT
, len
);
39 DBG(4, "TX ep%d fifo %p count %d buf %p, epio %p\n",
40 hw_ep
->epnum
, fifo
, len
, src
, epio
);
42 dump_fifo_data(src
, len
);
44 if (!ANOMALY_05000380
&& epnum
!= 0) {
45 flush_dcache_range((unsigned int)src
,
46 (unsigned int)(src
+ len
));
48 /* Setup DMA address register */
49 dma_reg
= (u16
) ((u32
) src
& 0xFFFF);
50 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_ADDR_LOW
), dma_reg
);
53 dma_reg
= (u16
) (((u32
) src
>> 16) & 0xFFFF);
54 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_ADDR_HIGH
), dma_reg
);
57 /* Setup DMA count register */
58 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_COUNT_LOW
), len
);
59 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_COUNT_HIGH
), 0);
63 dma_reg
= (epnum
<< 4) | DMA_ENA
| INT_ENA
| DIRECTION
;
64 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_CTRL
), dma_reg
);
67 /* Wait for compelete */
68 while (!(bfin_read_USB_DMA_INTERRUPT() & (1 << epnum
)))
71 /* acknowledge dma interrupt */
72 bfin_write_USB_DMA_INTERRUPT(1 << epnum
);
76 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_CTRL
), 0);
81 if (unlikely((unsigned long)src
& 0x01))
82 outsw_8((unsigned long)fifo
, src
,
83 len
& 0x01 ? (len
>> 1) + 1 : len
>> 1);
85 outsw((unsigned long)fifo
, src
,
86 len
& 0x01 ? (len
>> 1) + 1 : len
>> 1);
91 * Unload an endpoint's FIFO
93 void musb_read_fifo(struct musb_hw_ep
*hw_ep
, u16 len
, u8
*dst
)
95 void __iomem
*fifo
= hw_ep
->fifo
;
96 u8 epnum
= hw_ep
->epnum
;
99 if (ANOMALY_05000467
&& epnum
!= 0) {
101 invalidate_dcache_range((unsigned int)dst
,
102 (unsigned int)(dst
+ len
));
104 /* Setup DMA address register */
105 dma_reg
= (u16
) ((u32
) dst
& 0xFFFF);
106 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_ADDR_LOW
), dma_reg
);
109 dma_reg
= (u16
) (((u32
) dst
>> 16) & 0xFFFF);
110 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_ADDR_HIGH
), dma_reg
);
113 /* Setup DMA count register */
114 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_COUNT_LOW
), len
);
115 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_COUNT_HIGH
), 0);
119 dma_reg
= (epnum
<< 4) | DMA_ENA
| INT_ENA
;
120 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_CTRL
), dma_reg
);
123 /* Wait for compelete */
124 while (!(bfin_read_USB_DMA_INTERRUPT() & (1 << epnum
)))
127 /* acknowledge dma interrupt */
128 bfin_write_USB_DMA_INTERRUPT(1 << epnum
);
132 bfin_write16(USB_DMA_REG(epnum
, USB_DMAx_CTRL
), 0);
136 /* Read the last byte of packet with odd size from address fifo + 4
137 * to trigger 1 byte access to EP0 FIFO.
140 *dst
= (u8
)inw((unsigned long)fifo
+ 4);
142 if (unlikely((unsigned long)dst
& 0x01))
143 insw_8((unsigned long)fifo
, dst
, len
>> 1);
145 insw((unsigned long)fifo
, dst
, len
>> 1);
148 *(dst
+ len
- 1) = (u8
)inw((unsigned long)fifo
+ 4);
151 DBG(4, "%cX ep%d fifo %p count %d buf %p\n",
152 'R', hw_ep
->epnum
, fifo
, len
, dst
);
154 dump_fifo_data(dst
, len
);
157 static irqreturn_t
blackfin_interrupt(int irq
, void *__hci
)
160 irqreturn_t retval
= IRQ_NONE
;
161 struct musb
*musb
= __hci
;
163 spin_lock_irqsave(&musb
->lock
, flags
);
165 musb
->int_usb
= musb_readb(musb
->mregs
, MUSB_INTRUSB
);
166 musb
->int_tx
= musb_readw(musb
->mregs
, MUSB_INTRTX
);
167 musb
->int_rx
= musb_readw(musb
->mregs
, MUSB_INTRRX
);
169 if (musb
->int_usb
|| musb
->int_tx
|| musb
->int_rx
) {
170 musb_writeb(musb
->mregs
, MUSB_INTRUSB
, musb
->int_usb
);
171 musb_writew(musb
->mregs
, MUSB_INTRTX
, musb
->int_tx
);
172 musb_writew(musb
->mregs
, MUSB_INTRRX
, musb
->int_rx
);
173 retval
= musb_interrupt(musb
);
176 spin_unlock_irqrestore(&musb
->lock
, flags
);
178 /* REVISIT we sometimes get spurious IRQs on g_ep0
179 * not clear why... fall in BF54x too.
181 if (retval
!= IRQ_HANDLED
)
182 DBG(5, "spurious?\n");
187 static void musb_conn_timer_handler(unsigned long _musb
)
189 struct musb
*musb
= (void *)_musb
;
193 spin_lock_irqsave(&musb
->lock
, flags
);
194 switch (musb
->xceiv
->state
) {
195 case OTG_STATE_A_IDLE
:
196 case OTG_STATE_A_WAIT_BCON
:
197 /* Start a new session */
198 val
= musb_readw(musb
->mregs
, MUSB_DEVCTL
);
199 val
|= MUSB_DEVCTL_SESSION
;
200 musb_writew(musb
->mregs
, MUSB_DEVCTL
, val
);
202 val
= musb_readw(musb
->mregs
, MUSB_DEVCTL
);
203 if (!(val
& MUSB_DEVCTL_BDEVICE
)) {
204 gpio_set_value(musb
->config
->gpio_vrsel
, 1);
205 musb
->xceiv
->state
= OTG_STATE_A_WAIT_BCON
;
207 gpio_set_value(musb
->config
->gpio_vrsel
, 0);
209 /* Ignore VBUSERROR and SUSPEND IRQ */
210 val
= musb_readb(musb
->mregs
, MUSB_INTRUSBE
);
211 val
&= ~MUSB_INTR_VBUSERROR
;
212 musb_writeb(musb
->mregs
, MUSB_INTRUSBE
, val
);
214 val
= MUSB_INTR_SUSPEND
| MUSB_INTR_VBUSERROR
;
215 musb_writeb(musb
->mregs
, MUSB_INTRUSB
, val
);
217 val
= MUSB_POWER_HSENAB
;
218 musb_writeb(musb
->mregs
, MUSB_POWER
, val
);
220 mod_timer(&musb_conn_timer
, jiffies
+ TIMER_DELAY
);
224 DBG(1, "%s state not handled\n", otg_state_string(musb
));
227 spin_unlock_irqrestore(&musb
->lock
, flags
);
229 DBG(4, "state is %s\n", otg_state_string(musb
));
232 void musb_platform_enable(struct musb
*musb
)
234 if (is_host_enabled(musb
)) {
235 mod_timer(&musb_conn_timer
, jiffies
+ TIMER_DELAY
);
236 musb
->a_wait_bcon
= TIMER_DELAY
;
240 void musb_platform_disable(struct musb
*musb
)
244 static void bfin_vbus_power(struct musb
*musb
, int is_on
, int sleeping
)
248 static void bfin_set_vbus(struct musb
*musb
, int is_on
)
251 gpio_set_value(musb
->config
->gpio_vrsel
, 1);
253 gpio_set_value(musb
->config
->gpio_vrsel
, 0);
255 DBG(1, "VBUS %s, devctl %02x "
256 /* otg %3x conf %08x prcm %08x */ "\n",
257 otg_state_string(musb
),
258 musb_readb(musb
->mregs
, MUSB_DEVCTL
));
261 static int bfin_set_power(struct otg_transceiver
*x
, unsigned mA
)
266 void musb_platform_try_idle(struct musb
*musb
, unsigned long timeout
)
268 if (is_host_enabled(musb
))
269 mod_timer(&musb_conn_timer
, jiffies
+ TIMER_DELAY
);
272 int musb_platform_get_vbus_status(struct musb
*musb
)
277 int musb_platform_set_mode(struct musb
*musb
, u8 musb_mode
)
282 int __init
musb_platform_init(struct musb
*musb
)
286 * Rev 1.0 BF549 EZ-KITs require PE7 to be high for both DEVICE
287 * and OTG HOST modes, while rev 1.1 and greater require PE7 to
288 * be low for DEVICE mode and high for HOST mode. We set it high
289 * here because we are in host mode
292 if (gpio_request(musb
->config
->gpio_vrsel
, "USB_VRSEL")) {
293 printk(KERN_ERR
"Failed ro request USB_VRSEL GPIO_%d \n",
294 musb
->config
->gpio_vrsel
);
297 gpio_direction_output(musb
->config
->gpio_vrsel
, 0);
299 usb_nop_xceiv_register();
300 musb
->xceiv
= otg_get_transceiver();
304 if (ANOMALY_05000346
) {
305 bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value
);
309 if (ANOMALY_05000347
) {
310 bfin_write_USB_APHY_CNTRL(0x0);
314 /* Configure PLL oscillator register */
315 bfin_write_USB_PLLOSC_CTRL(0x30a8);
318 bfin_write_USB_SRP_CLKDIV((get_sclk()/1000) / 32 - 1);
321 bfin_write_USB_EP_NI0_RXMAXP(64);
324 bfin_write_USB_EP_NI0_TXMAXP(64);
327 /* Route INTRUSB/INTR_RX/INTR_TX to USB_INT0*/
328 bfin_write_USB_GLOBINTR(0x7);
331 bfin_write_USB_GLOBAL_CTL(GLOBAL_ENA
| EP1_TX_ENA
| EP2_TX_ENA
|
332 EP3_TX_ENA
| EP4_TX_ENA
| EP5_TX_ENA
|
333 EP6_TX_ENA
| EP7_TX_ENA
| EP1_RX_ENA
|
334 EP2_RX_ENA
| EP3_RX_ENA
| EP4_RX_ENA
|
335 EP5_RX_ENA
| EP6_RX_ENA
| EP7_RX_ENA
);
338 if (is_host_enabled(musb
)) {
339 musb
->board_set_vbus
= bfin_set_vbus
;
340 setup_timer(&musb_conn_timer
,
341 musb_conn_timer_handler
, (unsigned long) musb
);
343 if (is_peripheral_enabled(musb
))
344 musb
->xceiv
->set_power
= bfin_set_power
;
346 musb
->isr
= blackfin_interrupt
;
351 int musb_platform_suspend(struct musb
*musb
)
356 int musb_platform_resume(struct musb
*musb
)
362 int musb_platform_exit(struct musb
*musb
)
365 bfin_vbus_power(musb
, 0 /*off*/, 1);
366 gpio_free(musb
->config
->gpio_vrsel
);
367 musb_platform_suspend(musb
);