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1 /*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32 #include <linux/io.h>
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/module.h>
38 #include <linux/usb/usb_phy_generic.h>
39 #include <linux/platform_data/usb-omap.h>
40 #include <linux/sizes.h>
41
42 #include <linux/of.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
45 #include <linux/of_irq.h>
46 #include <linux/usb/of.h>
47
48 #include <linux/debugfs.h>
49
50 #include "musb_core.h"
51
52 static const struct of_device_id musb_dsps_of_match[];
53
54 /**
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
57 */
58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
59 { return __raw_readb(addr + offset); }
60
61 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
62 { return __raw_readl(addr + offset); }
63
64 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
65 { __raw_writeb(data, addr + offset); }
66
67 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
68 { __raw_writel(data, addr + offset); }
69
70 /**
71 * DSPS musb wrapper register offset.
72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
73 * musb ips.
74 */
75 struct dsps_musb_wrapper {
76 u16 revision;
77 u16 control;
78 u16 status;
79 u16 epintr_set;
80 u16 epintr_clear;
81 u16 epintr_status;
82 u16 coreintr_set;
83 u16 coreintr_clear;
84 u16 coreintr_status;
85 u16 phy_utmi;
86 u16 mode;
87 u16 tx_mode;
88 u16 rx_mode;
89
90 /* bit positions for control */
91 unsigned reset:5;
92
93 /* bit positions for interrupt */
94 unsigned usb_shift:5;
95 u32 usb_mask;
96 u32 usb_bitmap;
97 unsigned drvvbus:5;
98
99 unsigned txep_shift:5;
100 u32 txep_mask;
101 u32 txep_bitmap;
102
103 unsigned rxep_shift:5;
104 u32 rxep_mask;
105 u32 rxep_bitmap;
106
107 /* bit positions for phy_utmi */
108 unsigned otg_disable:5;
109
110 /* bit positions for mode */
111 unsigned iddig:5;
112 unsigned iddig_mux:5;
113 /* miscellaneous stuff */
114 u8 poll_seconds;
115 };
116
117 /*
118 * register shadow for suspend
119 */
120 struct dsps_context {
121 u32 control;
122 u32 epintr;
123 u32 coreintr;
124 u32 phy_utmi;
125 u32 mode;
126 u32 tx_mode;
127 u32 rx_mode;
128 };
129
130 /**
131 * DSPS glue structure.
132 */
133 struct dsps_glue {
134 struct device *dev;
135 struct platform_device *musb; /* child musb pdev */
136 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
137 struct timer_list timer; /* otg_workaround timer */
138 unsigned long last_timer; /* last timer data for each instance */
139
140 struct dsps_context context;
141 struct debugfs_regset32 regset;
142 struct dentry *dbgfs_root;
143 };
144
145 static const struct debugfs_reg32 dsps_musb_regs[] = {
146 { "revision", 0x00 },
147 { "control", 0x14 },
148 { "status", 0x18 },
149 { "eoi", 0x24 },
150 { "intr0_stat", 0x30 },
151 { "intr1_stat", 0x34 },
152 { "intr0_set", 0x38 },
153 { "intr1_set", 0x3c },
154 { "txmode", 0x70 },
155 { "rxmode", 0x74 },
156 { "autoreq", 0xd0 },
157 { "srpfixtime", 0xd4 },
158 { "tdown", 0xd8 },
159 { "phy_utmi", 0xe0 },
160 { "mode", 0xe8 },
161 };
162
163 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
164 {
165 struct device *dev = musb->controller;
166 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
167
168 if (timeout == 0)
169 timeout = jiffies + msecs_to_jiffies(3);
170
171 /* Never idle if active, or when VBUS timeout is not set as host */
172 if (musb->is_active || (musb->a_wait_bcon == 0 &&
173 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
174 dev_dbg(musb->controller, "%s active, deleting timer\n",
175 usb_otg_state_string(musb->xceiv->state));
176 del_timer(&glue->timer);
177 glue->last_timer = jiffies;
178 return;
179 }
180 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
181 return;
182
183 if (!musb->g.dev.driver)
184 return;
185
186 if (time_after(glue->last_timer, timeout) &&
187 timer_pending(&glue->timer)) {
188 dev_dbg(musb->controller,
189 "Longer idle timer already pending, ignoring...\n");
190 return;
191 }
192 glue->last_timer = timeout;
193
194 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
195 usb_otg_state_string(musb->xceiv->state),
196 jiffies_to_msecs(timeout - jiffies));
197 mod_timer(&glue->timer, timeout);
198 }
199
200 /**
201 * dsps_musb_enable - enable interrupts
202 */
203 static void dsps_musb_enable(struct musb *musb)
204 {
205 struct device *dev = musb->controller;
206 struct platform_device *pdev = to_platform_device(dev->parent);
207 struct dsps_glue *glue = platform_get_drvdata(pdev);
208 const struct dsps_musb_wrapper *wrp = glue->wrp;
209 void __iomem *reg_base = musb->ctrl_base;
210 u32 epmask, coremask;
211
212 /* Workaround: setup IRQs through both register sets. */
213 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
214 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
215 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
216
217 dsps_writel(reg_base, wrp->epintr_set, epmask);
218 dsps_writel(reg_base, wrp->coreintr_set, coremask);
219 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
220 dsps_writel(reg_base, wrp->coreintr_set,
221 (1 << wrp->drvvbus) << wrp->usb_shift);
222 dsps_musb_try_idle(musb, 0);
223 }
224
225 /**
226 * dsps_musb_disable - disable HDRC and flush interrupts
227 */
228 static void dsps_musb_disable(struct musb *musb)
229 {
230 struct device *dev = musb->controller;
231 struct platform_device *pdev = to_platform_device(dev->parent);
232 struct dsps_glue *glue = platform_get_drvdata(pdev);
233 const struct dsps_musb_wrapper *wrp = glue->wrp;
234 void __iomem *reg_base = musb->ctrl_base;
235
236 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
237 dsps_writel(reg_base, wrp->epintr_clear,
238 wrp->txep_bitmap | wrp->rxep_bitmap);
239 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
240 }
241
242 static void otg_timer(unsigned long _musb)
243 {
244 struct musb *musb = (void *)_musb;
245 void __iomem *mregs = musb->mregs;
246 struct device *dev = musb->controller;
247 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
248 const struct dsps_musb_wrapper *wrp = glue->wrp;
249 u8 devctl;
250 unsigned long flags;
251 int skip_session = 0;
252
253 /*
254 * We poll because DSPS IP's won't expose several OTG-critical
255 * status change events (from the transceiver) otherwise.
256 */
257 devctl = dsps_readb(mregs, MUSB_DEVCTL);
258 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
259 usb_otg_state_string(musb->xceiv->state));
260
261 spin_lock_irqsave(&musb->lock, flags);
262 switch (musb->xceiv->state) {
263 case OTG_STATE_A_WAIT_BCON:
264 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
265 skip_session = 1;
266 /* fall */
267
268 case OTG_STATE_A_IDLE:
269 case OTG_STATE_B_IDLE:
270 if (devctl & MUSB_DEVCTL_BDEVICE) {
271 musb->xceiv->state = OTG_STATE_B_IDLE;
272 MUSB_DEV_MODE(musb);
273 } else {
274 musb->xceiv->state = OTG_STATE_A_IDLE;
275 MUSB_HST_MODE(musb);
276 }
277 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
278 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
279 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
280 break;
281 case OTG_STATE_A_WAIT_VFALL:
282 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
283 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
284 MUSB_INTR_VBUSERROR << wrp->usb_shift);
285 break;
286 default:
287 break;
288 }
289 spin_unlock_irqrestore(&musb->lock, flags);
290 }
291
292 static irqreturn_t dsps_interrupt(int irq, void *hci)
293 {
294 struct musb *musb = hci;
295 void __iomem *reg_base = musb->ctrl_base;
296 struct device *dev = musb->controller;
297 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
298 const struct dsps_musb_wrapper *wrp = glue->wrp;
299 unsigned long flags;
300 irqreturn_t ret = IRQ_NONE;
301 u32 epintr, usbintr;
302
303 spin_lock_irqsave(&musb->lock, flags);
304
305 /* Get endpoint interrupts */
306 epintr = dsps_readl(reg_base, wrp->epintr_status);
307 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
308 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
309
310 if (epintr)
311 dsps_writel(reg_base, wrp->epintr_status, epintr);
312
313 /* Get usb core interrupts */
314 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
315 if (!usbintr && !epintr)
316 goto out;
317
318 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
319 if (usbintr)
320 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
321
322 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
323 usbintr, epintr);
324 /*
325 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
326 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
327 * switch appropriately between halves of the OTG state machine.
328 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
329 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
330 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
331 */
332 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) {
333 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
334
335 /*
336 * When a babble condition occurs, the musb controller removes
337 * the session and is no longer in host mode. Hence, all
338 * devices connected to its root hub get disconnected.
339 *
340 * Hand this error down to the musb core isr, so it can
341 * recover.
342 */
343 musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT;
344 musb->int_tx = musb->int_rx = 0;
345 }
346
347 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
348 int drvvbus = dsps_readl(reg_base, wrp->status);
349 void __iomem *mregs = musb->mregs;
350 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
351 int err;
352
353 err = musb->int_usb & MUSB_INTR_VBUSERROR;
354 if (err) {
355 /*
356 * The Mentor core doesn't debounce VBUS as needed
357 * to cope with device connect current spikes. This
358 * means it's not uncommon for bus-powered devices
359 * to get VBUS errors during enumeration.
360 *
361 * This is a workaround, but newer RTL from Mentor
362 * seems to allow a better one: "re"-starting sessions
363 * without waiting for VBUS to stop registering in
364 * devctl.
365 */
366 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
367 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
368 mod_timer(&glue->timer,
369 jiffies + wrp->poll_seconds * HZ);
370 WARNING("VBUS error workaround (delay coming)\n");
371 } else if (drvvbus) {
372 MUSB_HST_MODE(musb);
373 musb->xceiv->otg->default_a = 1;
374 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
375 del_timer(&glue->timer);
376 } else {
377 musb->is_active = 0;
378 MUSB_DEV_MODE(musb);
379 musb->xceiv->otg->default_a = 0;
380 musb->xceiv->state = OTG_STATE_B_IDLE;
381 }
382
383 /* NOTE: this must complete power-on within 100 ms. */
384 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
385 drvvbus ? "on" : "off",
386 usb_otg_state_string(musb->xceiv->state),
387 err ? " ERROR" : "",
388 devctl);
389 ret = IRQ_HANDLED;
390 }
391
392 if (musb->int_tx || musb->int_rx || musb->int_usb)
393 ret |= musb_interrupt(musb);
394
395 /* Poll for ID change in OTG port mode */
396 if (musb->xceiv->state == OTG_STATE_B_IDLE &&
397 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
398 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
399 out:
400 spin_unlock_irqrestore(&musb->lock, flags);
401
402 return ret;
403 }
404
405 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
406 {
407 struct dentry *root;
408 struct dentry *file;
409 char buf[128];
410
411 sprintf(buf, "%s.dsps", dev_name(musb->controller));
412 root = debugfs_create_dir(buf, NULL);
413 if (!root)
414 return -ENOMEM;
415 glue->dbgfs_root = root;
416
417 glue->regset.regs = dsps_musb_regs;
418 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
419 glue->regset.base = musb->ctrl_base;
420
421 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
422 if (!file) {
423 debugfs_remove_recursive(root);
424 return -ENOMEM;
425 }
426 return 0;
427 }
428
429 static int dsps_musb_init(struct musb *musb)
430 {
431 struct device *dev = musb->controller;
432 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
433 struct platform_device *parent = to_platform_device(dev->parent);
434 const struct dsps_musb_wrapper *wrp = glue->wrp;
435 void __iomem *reg_base;
436 struct resource *r;
437 u32 rev, val;
438 int ret;
439
440 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
441 if (!r)
442 return -EINVAL;
443
444 reg_base = devm_ioremap_resource(dev, r);
445 if (IS_ERR(reg_base))
446 return PTR_ERR(reg_base);
447 musb->ctrl_base = reg_base;
448
449 /* NOP driver needs change if supporting dual instance */
450 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
451 if (IS_ERR(musb->xceiv))
452 return PTR_ERR(musb->xceiv);
453
454 /* Returns zero if e.g. not clocked */
455 rev = dsps_readl(reg_base, wrp->revision);
456 if (!rev)
457 return -ENODEV;
458
459 usb_phy_init(musb->xceiv);
460 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
461
462 /* Reset the musb */
463 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
464
465 musb->isr = dsps_interrupt;
466
467 /* reset the otgdisable bit, needed for host mode to work */
468 val = dsps_readl(reg_base, wrp->phy_utmi);
469 val &= ~(1 << wrp->otg_disable);
470 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
471
472 ret = dsps_musb_dbg_init(musb, glue);
473 if (ret)
474 return ret;
475
476 return 0;
477 }
478
479 static int dsps_musb_exit(struct musb *musb)
480 {
481 struct device *dev = musb->controller;
482 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
483
484 del_timer_sync(&glue->timer);
485 usb_phy_shutdown(musb->xceiv);
486 debugfs_remove_recursive(glue->dbgfs_root);
487
488 return 0;
489 }
490
491 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
492 {
493 struct device *dev = musb->controller;
494 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
495 const struct dsps_musb_wrapper *wrp = glue->wrp;
496 void __iomem *ctrl_base = musb->ctrl_base;
497 void __iomem *base = musb->mregs;
498 u32 reg;
499
500 reg = dsps_readl(base, wrp->mode);
501
502 switch (mode) {
503 case MUSB_HOST:
504 reg &= ~(1 << wrp->iddig);
505
506 /*
507 * if we're setting mode to host-only or device-only, we're
508 * going to ignore whatever the PHY sends us and just force
509 * ID pin status by SW
510 */
511 reg |= (1 << wrp->iddig_mux);
512
513 dsps_writel(base, wrp->mode, reg);
514 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
515 break;
516 case MUSB_PERIPHERAL:
517 reg |= (1 << wrp->iddig);
518
519 /*
520 * if we're setting mode to host-only or device-only, we're
521 * going to ignore whatever the PHY sends us and just force
522 * ID pin status by SW
523 */
524 reg |= (1 << wrp->iddig_mux);
525
526 dsps_writel(base, wrp->mode, reg);
527 break;
528 case MUSB_OTG:
529 dsps_writel(base, wrp->phy_utmi, 0x02);
530 break;
531 default:
532 dev_err(glue->dev, "unsupported mode %d\n", mode);
533 return -EINVAL;
534 }
535
536 return 0;
537 }
538
539 static void dsps_musb_reset(struct musb *musb)
540 {
541 struct device *dev = musb->controller;
542 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
543 const struct dsps_musb_wrapper *wrp = glue->wrp;
544
545 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
546 udelay(100);
547 }
548
549 static struct musb_platform_ops dsps_ops = {
550 .init = dsps_musb_init,
551 .exit = dsps_musb_exit,
552
553 .enable = dsps_musb_enable,
554 .disable = dsps_musb_disable,
555
556 .try_idle = dsps_musb_try_idle,
557 .set_mode = dsps_musb_set_mode,
558 .reset = dsps_musb_reset,
559 };
560
561 static u64 musb_dmamask = DMA_BIT_MASK(32);
562
563 static int get_int_prop(struct device_node *dn, const char *s)
564 {
565 int ret;
566 u32 val;
567
568 ret = of_property_read_u32(dn, s, &val);
569 if (ret)
570 return 0;
571 return val;
572 }
573
574 static int get_musb_port_mode(struct device *dev)
575 {
576 enum usb_dr_mode mode;
577
578 mode = of_usb_get_dr_mode(dev->of_node);
579 switch (mode) {
580 case USB_DR_MODE_HOST:
581 return MUSB_PORT_MODE_HOST;
582
583 case USB_DR_MODE_PERIPHERAL:
584 return MUSB_PORT_MODE_GADGET;
585
586 case USB_DR_MODE_UNKNOWN:
587 case USB_DR_MODE_OTG:
588 default:
589 return MUSB_PORT_MODE_DUAL_ROLE;
590 }
591 }
592
593 static int dsps_create_musb_pdev(struct dsps_glue *glue,
594 struct platform_device *parent)
595 {
596 struct musb_hdrc_platform_data pdata;
597 struct resource resources[2];
598 struct resource *res;
599 struct device *dev = &parent->dev;
600 struct musb_hdrc_config *config;
601 struct platform_device *musb;
602 struct device_node *dn = parent->dev.of_node;
603 int ret;
604
605 memset(resources, 0, sizeof(resources));
606 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
607 if (!res) {
608 dev_err(dev, "failed to get memory.\n");
609 return -EINVAL;
610 }
611 resources[0] = *res;
612
613 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
614 if (!res) {
615 dev_err(dev, "failed to get irq.\n");
616 return -EINVAL;
617 }
618 resources[1] = *res;
619
620 /* allocate the child platform device */
621 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
622 if (!musb) {
623 dev_err(dev, "failed to allocate musb device\n");
624 return -ENOMEM;
625 }
626
627 musb->dev.parent = dev;
628 musb->dev.dma_mask = &musb_dmamask;
629 musb->dev.coherent_dma_mask = musb_dmamask;
630 musb->dev.of_node = of_node_get(dn);
631
632 glue->musb = musb;
633
634 ret = platform_device_add_resources(musb, resources,
635 ARRAY_SIZE(resources));
636 if (ret) {
637 dev_err(dev, "failed to add resources\n");
638 goto err;
639 }
640
641 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
642 if (!config) {
643 dev_err(dev, "failed to allocate musb hdrc config\n");
644 ret = -ENOMEM;
645 goto err;
646 }
647 pdata.config = config;
648 pdata.platform_ops = &dsps_ops;
649
650 config->num_eps = get_int_prop(dn, "mentor,num-eps");
651 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
652 config->host_port_deassert_reset_at_resume = 1;
653 pdata.mode = get_musb_port_mode(dev);
654 /* DT keeps this entry in mA, musb expects it as per USB spec */
655 pdata.power = get_int_prop(dn, "mentor,power") / 2;
656 config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
657
658 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
659 if (ret) {
660 dev_err(dev, "failed to add platform_data\n");
661 goto err;
662 }
663
664 ret = platform_device_add(musb);
665 if (ret) {
666 dev_err(dev, "failed to register musb device\n");
667 goto err;
668 }
669 return 0;
670
671 err:
672 platform_device_put(musb);
673 return ret;
674 }
675
676 static int dsps_probe(struct platform_device *pdev)
677 {
678 const struct of_device_id *match;
679 const struct dsps_musb_wrapper *wrp;
680 struct dsps_glue *glue;
681 int ret;
682
683 if (!strcmp(pdev->name, "musb-hdrc"))
684 return -ENODEV;
685
686 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
687 if (!match) {
688 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
689 return -EINVAL;
690 }
691 wrp = match->data;
692
693 /* allocate glue */
694 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
695 if (!glue) {
696 dev_err(&pdev->dev, "unable to allocate glue memory\n");
697 return -ENOMEM;
698 }
699
700 glue->dev = &pdev->dev;
701 glue->wrp = wrp;
702
703 platform_set_drvdata(pdev, glue);
704 pm_runtime_enable(&pdev->dev);
705
706 ret = pm_runtime_get_sync(&pdev->dev);
707 if (ret < 0) {
708 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
709 goto err2;
710 }
711
712 ret = dsps_create_musb_pdev(glue, pdev);
713 if (ret)
714 goto err3;
715
716 return 0;
717
718 err3:
719 pm_runtime_put(&pdev->dev);
720 err2:
721 pm_runtime_disable(&pdev->dev);
722 return ret;
723 }
724
725 static int dsps_remove(struct platform_device *pdev)
726 {
727 struct dsps_glue *glue = platform_get_drvdata(pdev);
728
729 platform_device_unregister(glue->musb);
730
731 /* disable usbss clocks */
732 pm_runtime_put(&pdev->dev);
733 pm_runtime_disable(&pdev->dev);
734
735 return 0;
736 }
737
738 static const struct dsps_musb_wrapper am33xx_driver_data = {
739 .revision = 0x00,
740 .control = 0x14,
741 .status = 0x18,
742 .epintr_set = 0x38,
743 .epintr_clear = 0x40,
744 .epintr_status = 0x30,
745 .coreintr_set = 0x3c,
746 .coreintr_clear = 0x44,
747 .coreintr_status = 0x34,
748 .phy_utmi = 0xe0,
749 .mode = 0xe8,
750 .tx_mode = 0x70,
751 .rx_mode = 0x74,
752 .reset = 0,
753 .otg_disable = 21,
754 .iddig = 8,
755 .iddig_mux = 7,
756 .usb_shift = 0,
757 .usb_mask = 0x1ff,
758 .usb_bitmap = (0x1ff << 0),
759 .drvvbus = 8,
760 .txep_shift = 0,
761 .txep_mask = 0xffff,
762 .txep_bitmap = (0xffff << 0),
763 .rxep_shift = 16,
764 .rxep_mask = 0xfffe,
765 .rxep_bitmap = (0xfffe << 16),
766 .poll_seconds = 2,
767 };
768
769 static const struct of_device_id musb_dsps_of_match[] = {
770 { .compatible = "ti,musb-am33xx",
771 .data = (void *) &am33xx_driver_data, },
772 { },
773 };
774 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
775
776 #ifdef CONFIG_PM_SLEEP
777 static int dsps_suspend(struct device *dev)
778 {
779 struct dsps_glue *glue = dev_get_drvdata(dev);
780 const struct dsps_musb_wrapper *wrp = glue->wrp;
781 struct musb *musb = platform_get_drvdata(glue->musb);
782 void __iomem *mbase = musb->ctrl_base;
783
784 glue->context.control = dsps_readl(mbase, wrp->control);
785 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
786 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
787 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
788 glue->context.mode = dsps_readl(mbase, wrp->mode);
789 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
790 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
791
792 return 0;
793 }
794
795 static int dsps_resume(struct device *dev)
796 {
797 struct dsps_glue *glue = dev_get_drvdata(dev);
798 const struct dsps_musb_wrapper *wrp = glue->wrp;
799 struct musb *musb = platform_get_drvdata(glue->musb);
800 void __iomem *mbase = musb->ctrl_base;
801
802 dsps_writel(mbase, wrp->control, glue->context.control);
803 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
804 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
805 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
806 dsps_writel(mbase, wrp->mode, glue->context.mode);
807 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
808 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
809
810 return 0;
811 }
812 #endif
813
814 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
815
816 static struct platform_driver dsps_usbss_driver = {
817 .probe = dsps_probe,
818 .remove = dsps_remove,
819 .driver = {
820 .name = "musb-dsps",
821 .pm = &dsps_pm_ops,
822 .of_match_table = musb_dsps_of_match,
823 },
824 };
825
826 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
827 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
828 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
829 MODULE_LICENSE("GPL v2");
830
831 module_platform_driver(dsps_usbss_driver);