2 * TUSB6010 USB 2.0 OTG Dual Role controller
4 * Copyright (C) 2006 Nokia Corporation
5 * Tony Lindgren <tony@atomide.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 * - Driver assumes that interface to external host (main CPU) is
13 * configured for NOR FLASH interface instead of VLYNQ serial
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/errno.h>
20 #include <linux/err.h>
21 #include <linux/init.h>
22 #include <linux/prefetch.h>
23 #include <linux/usb.h>
24 #include <linux/irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/dma-mapping.h>
28 #include "musb_core.h"
30 struct tusb6010_glue
{
32 struct platform_device
*musb
;
35 static void tusb_musb_set_vbus(struct musb
*musb
, int is_on
);
37 #define TUSB_REV_MAJOR(reg_val) ((reg_val >> 4) & 0xf)
38 #define TUSB_REV_MINOR(reg_val) (reg_val & 0xf)
41 * Checks the revision. We need to use the DMA register as 3.0 does not
42 * have correct versions for TUSB_PRCM_REV or TUSB_INT_CTRL_REV.
44 u8
tusb_get_revision(struct musb
*musb
)
46 void __iomem
*tbase
= musb
->ctrl_base
;
50 rev
= musb_readl(tbase
, TUSB_DMA_CTRL_REV
) & 0xff;
51 if (TUSB_REV_MAJOR(rev
) == 3) {
52 die_id
= TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase
,
54 if (die_id
>= TUSB_DIDR1_HI_REV_31
)
60 EXPORT_SYMBOL_GPL(tusb_get_revision
);
62 static int tusb_print_revision(struct musb
*musb
)
64 void __iomem
*tbase
= musb
->ctrl_base
;
67 rev
= tusb_get_revision(musb
);
69 pr_info("tusb: %s%i.%i %s%i.%i %s%i.%i %s%i.%i %s%i %s%i.%i\n",
71 TUSB_REV_MAJOR(musb_readl(tbase
, TUSB_PRCM_REV
)),
72 TUSB_REV_MINOR(musb_readl(tbase
, TUSB_PRCM_REV
)),
74 TUSB_REV_MAJOR(musb_readl(tbase
, TUSB_INT_CTRL_REV
)),
75 TUSB_REV_MINOR(musb_readl(tbase
, TUSB_INT_CTRL_REV
)),
77 TUSB_REV_MAJOR(musb_readl(tbase
, TUSB_GPIO_REV
)),
78 TUSB_REV_MINOR(musb_readl(tbase
, TUSB_GPIO_REV
)),
80 TUSB_REV_MAJOR(musb_readl(tbase
, TUSB_DMA_CTRL_REV
)),
81 TUSB_REV_MINOR(musb_readl(tbase
, TUSB_DMA_CTRL_REV
)),
83 TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase
, TUSB_DIDR1_HI
)),
85 TUSB_REV_MAJOR(rev
), TUSB_REV_MINOR(rev
));
87 return tusb_get_revision(musb
);
90 #define WBUS_QUIRK_MASK (TUSB_PHY_OTG_CTRL_TESTM2 | TUSB_PHY_OTG_CTRL_TESTM1 \
91 | TUSB_PHY_OTG_CTRL_TESTM0)
94 * Workaround for spontaneous WBUS wake-up issue #2 for tusb3.0.
95 * Disables power detection in PHY for the duration of idle.
97 static void tusb_wbus_quirk(struct musb
*musb
, int enabled
)
99 void __iomem
*tbase
= musb
->ctrl_base
;
100 static u32 phy_otg_ctrl
, phy_otg_ena
;
104 phy_otg_ctrl
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL
);
105 phy_otg_ena
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
);
106 tmp
= TUSB_PHY_OTG_CTRL_WRPROTECT
107 | phy_otg_ena
| WBUS_QUIRK_MASK
;
108 musb_writel(tbase
, TUSB_PHY_OTG_CTRL
, tmp
);
109 tmp
= phy_otg_ena
& ~WBUS_QUIRK_MASK
;
110 tmp
|= TUSB_PHY_OTG_CTRL_WRPROTECT
| TUSB_PHY_OTG_CTRL_TESTM2
;
111 musb_writel(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
, tmp
);
112 dev_dbg(musb
->controller
, "Enabled tusb wbus quirk ctrl %08x ena %08x\n",
113 musb_readl(tbase
, TUSB_PHY_OTG_CTRL
),
114 musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
));
115 } else if (musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
)
116 & TUSB_PHY_OTG_CTRL_TESTM2
) {
117 tmp
= TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ctrl
;
118 musb_writel(tbase
, TUSB_PHY_OTG_CTRL
, tmp
);
119 tmp
= TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ena
;
120 musb_writel(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
, tmp
);
121 dev_dbg(musb
->controller
, "Disabled tusb wbus quirk ctrl %08x ena %08x\n",
122 musb_readl(tbase
, TUSB_PHY_OTG_CTRL
),
123 musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
));
130 * TUSB 6010 may use a parallel bus that doesn't support byte ops;
131 * so both loading and unloading FIFOs need explicit byte counts.
135 tusb_fifo_write_unaligned(void __iomem
*fifo
, const u8
*buf
, u16 len
)
141 for (i
= 0; i
< (len
>> 2); i
++) {
142 memcpy(&val
, buf
, 4);
143 musb_writel(fifo
, 0, val
);
149 /* Write the rest 1 - 3 bytes to FIFO */
150 memcpy(&val
, buf
, len
);
151 musb_writel(fifo
, 0, val
);
155 static inline void tusb_fifo_read_unaligned(void __iomem
*fifo
,
156 void __iomem
*buf
, u16 len
)
162 for (i
= 0; i
< (len
>> 2); i
++) {
163 val
= musb_readl(fifo
, 0);
164 memcpy(buf
, &val
, 4);
170 /* Read the rest 1 - 3 bytes from FIFO */
171 val
= musb_readl(fifo
, 0);
172 memcpy(buf
, &val
, len
);
176 void musb_write_fifo(struct musb_hw_ep
*hw_ep
, u16 len
, const u8
*buf
)
178 struct musb
*musb
= hw_ep
->musb
;
179 void __iomem
*ep_conf
= hw_ep
->conf
;
180 void __iomem
*fifo
= hw_ep
->fifo
;
181 u8 epnum
= hw_ep
->epnum
;
185 dev_dbg(musb
->controller
, "%cX ep%d fifo %p count %d buf %p\n",
186 'T', epnum
, fifo
, len
, buf
);
189 musb_writel(ep_conf
, TUSB_EP_TX_OFFSET
,
190 TUSB_EP_CONFIG_XFR_SIZE(len
));
192 musb_writel(ep_conf
, 0, TUSB_EP0_CONFIG_DIR_TX
|
193 TUSB_EP0_CONFIG_XFR_SIZE(len
));
195 if (likely((0x01 & (unsigned long) buf
) == 0)) {
197 /* Best case is 32bit-aligned destination address */
198 if ((0x02 & (unsigned long) buf
) == 0) {
200 writesl(fifo
, buf
, len
>> 2);
201 buf
+= (len
& ~0x03);
209 /* Cannot use writesw, fifo is 32-bit */
210 for (i
= 0; i
< (len
>> 2); i
++) {
211 val
= (u32
)(*(u16
*)buf
);
213 val
|= (*(u16
*)buf
) << 16;
215 musb_writel(fifo
, 0, val
);
223 tusb_fifo_write_unaligned(fifo
, buf
, len
);
226 void musb_read_fifo(struct musb_hw_ep
*hw_ep
, u16 len
, u8
*buf
)
228 struct musb
*musb
= hw_ep
->musb
;
229 void __iomem
*ep_conf
= hw_ep
->conf
;
230 void __iomem
*fifo
= hw_ep
->fifo
;
231 u8 epnum
= hw_ep
->epnum
;
233 dev_dbg(musb
->controller
, "%cX ep%d fifo %p count %d buf %p\n",
234 'R', epnum
, fifo
, len
, buf
);
237 musb_writel(ep_conf
, TUSB_EP_RX_OFFSET
,
238 TUSB_EP_CONFIG_XFR_SIZE(len
));
240 musb_writel(ep_conf
, 0, TUSB_EP0_CONFIG_XFR_SIZE(len
));
242 if (likely((0x01 & (unsigned long) buf
) == 0)) {
244 /* Best case is 32bit-aligned destination address */
245 if ((0x02 & (unsigned long) buf
) == 0) {
247 readsl(fifo
, buf
, len
>> 2);
248 buf
+= (len
& ~0x03);
256 /* Cannot use readsw, fifo is 32-bit */
257 for (i
= 0; i
< (len
>> 2); i
++) {
258 val
= musb_readl(fifo
, 0);
259 *(u16
*)buf
= (u16
)(val
& 0xffff);
261 *(u16
*)buf
= (u16
)(val
>> 16);
270 tusb_fifo_read_unaligned(fifo
, buf
, len
);
273 static struct musb
*the_musb
;
275 /* This is used by gadget drivers, and OTG transceiver logic, allowing
276 * at most mA current to be drawn from VBUS during a Default-B session
277 * (that is, while VBUS exceeds 4.4V). In Default-A (including pure host
278 * mode), or low power Default-B sessions, something else supplies power.
279 * Caller must take care of locking.
281 static int tusb_draw_power(struct usb_phy
*x
, unsigned mA
)
283 struct musb
*musb
= the_musb
;
284 void __iomem
*tbase
= musb
->ctrl_base
;
287 /* tps65030 seems to consume max 100mA, with maybe 60mA available
288 * (measured on one board) for things other than tps and tusb.
290 * Boards sharing the CPU clock with CLKIN will need to prevent
291 * certain idle sleep states while the USB link is active.
293 * REVISIT we could use VBUS to supply only _one_ of { 1.5V, 3.3V }.
294 * The actual current usage would be very board-specific. For now,
295 * it's simpler to just use an aggregate (also board-specific).
297 if (x
->otg
->default_a
|| mA
< (musb
->min_power
<< 1))
300 reg
= musb_readl(tbase
, TUSB_PRCM_MNGMT
);
302 musb
->is_bus_powered
= 1;
303 reg
|= TUSB_PRCM_MNGMT_15_SW_EN
| TUSB_PRCM_MNGMT_33_SW_EN
;
305 musb
->is_bus_powered
= 0;
306 reg
&= ~(TUSB_PRCM_MNGMT_15_SW_EN
| TUSB_PRCM_MNGMT_33_SW_EN
);
308 musb_writel(tbase
, TUSB_PRCM_MNGMT
, reg
);
310 dev_dbg(musb
->controller
, "draw max %d mA VBUS\n", mA
);
314 /* workaround for issue 13: change clock during chip idle
315 * (to be fixed in rev3 silicon) ... symptoms include disconnect
316 * or looping suspend/resume cycles
318 static void tusb_set_clock_source(struct musb
*musb
, unsigned mode
)
320 void __iomem
*tbase
= musb
->ctrl_base
;
323 reg
= musb_readl(tbase
, TUSB_PRCM_CONF
);
324 reg
&= ~TUSB_PRCM_CONF_SYS_CLKSEL(0x3);
326 /* 0 = refclk (clkin, XI)
327 * 1 = PHY 60 MHz (internal PLL)
332 reg
|= TUSB_PRCM_CONF_SYS_CLKSEL(mode
& 0x3);
334 musb_writel(tbase
, TUSB_PRCM_CONF
, reg
);
336 /* FIXME tusb6010_platform_retime(mode == 0); */
340 * Idle TUSB6010 until next wake-up event; NOR access always wakes.
341 * Other code ensures that we idle unless we're connected _and_ the
342 * USB link is not suspended ... and tells us the relevant wakeup
343 * events. SW_EN for voltage is handled separately.
345 static void tusb_allow_idle(struct musb
*musb
, u32 wakeup_enables
)
347 void __iomem
*tbase
= musb
->ctrl_base
;
350 if ((wakeup_enables
& TUSB_PRCM_WBUS
)
351 && (tusb_get_revision(musb
) == TUSB_REV_30
))
352 tusb_wbus_quirk(musb
, 1);
354 tusb_set_clock_source(musb
, 0);
356 wakeup_enables
|= TUSB_PRCM_WNORCS
;
357 musb_writel(tbase
, TUSB_PRCM_WAKEUP_MASK
, ~wakeup_enables
);
359 /* REVISIT writeup of WID implies that if WID set and ID is grounded,
360 * TUSB_PHY_OTG_CTRL.TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP must be cleared.
361 * Presumably that's mostly to save power, hence WID is immaterial ...
364 reg
= musb_readl(tbase
, TUSB_PRCM_MNGMT
);
365 /* issue 4: when driving vbus, use hipower (vbus_det) comparator */
366 if (is_host_active(musb
)) {
367 reg
|= TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
;
368 reg
&= ~TUSB_PRCM_MNGMT_OTG_SESS_END_EN
;
370 reg
|= TUSB_PRCM_MNGMT_OTG_SESS_END_EN
;
371 reg
&= ~TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
;
373 reg
|= TUSB_PRCM_MNGMT_PM_IDLE
| TUSB_PRCM_MNGMT_DEV_IDLE
;
374 musb_writel(tbase
, TUSB_PRCM_MNGMT
, reg
);
376 dev_dbg(musb
->controller
, "idle, wake on %02x\n", wakeup_enables
);
380 * Updates cable VBUS status. Caller must take care of locking.
382 static int tusb_musb_vbus_status(struct musb
*musb
)
384 void __iomem
*tbase
= musb
->ctrl_base
;
385 u32 otg_stat
, prcm_mngmt
;
388 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
389 prcm_mngmt
= musb_readl(tbase
, TUSB_PRCM_MNGMT
);
391 /* Temporarily enable VBUS detection if it was disabled for
392 * suspend mode. Unless it's enabled otg_stat and devctl will
393 * not show correct VBUS state.
395 if (!(prcm_mngmt
& TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
)) {
396 u32 tmp
= prcm_mngmt
;
397 tmp
|= TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
;
398 musb_writel(tbase
, TUSB_PRCM_MNGMT
, tmp
);
399 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
400 musb_writel(tbase
, TUSB_PRCM_MNGMT
, prcm_mngmt
);
403 if (otg_stat
& TUSB_DEV_OTG_STAT_VBUS_VALID
)
409 static struct timer_list musb_idle_timer
;
411 static void musb_do_idle(unsigned long _musb
)
413 struct musb
*musb
= (void *)_musb
;
416 spin_lock_irqsave(&musb
->lock
, flags
);
418 switch (musb
->xceiv
->state
) {
419 case OTG_STATE_A_WAIT_BCON
:
420 if ((musb
->a_wait_bcon
!= 0)
421 && (musb
->idle_timeout
== 0
422 || time_after(jiffies
, musb
->idle_timeout
))) {
423 dev_dbg(musb
->controller
, "Nothing connected %s, turning off VBUS\n",
424 otg_state_string(musb
->xceiv
->state
));
427 case OTG_STATE_A_IDLE
:
428 tusb_musb_set_vbus(musb
, 0);
433 if (!musb
->is_active
) {
436 /* wait until khubd handles port change status */
437 if (is_host_active(musb
) && (musb
->port1_status
>> 16))
440 if (is_peripheral_enabled(musb
) && !musb
->gadget_driver
) {
443 wakeups
= TUSB_PRCM_WHOSTDISCON
446 if (is_otg_enabled(musb
))
447 wakeups
|= TUSB_PRCM_WID
;
449 tusb_allow_idle(musb
, wakeups
);
452 spin_unlock_irqrestore(&musb
->lock
, flags
);
456 * Maybe put TUSB6010 into idle mode mode depending on USB link status,
457 * like "disconnected" or "suspended". We'll be woken out of it by
458 * connect, resume, or disconnect.
460 * Needs to be called as the last function everywhere where there is
461 * register access to TUSB6010 because of NOR flash wake-up.
462 * Caller should own controller spinlock.
464 * Delay because peripheral enables D+ pullup 3msec after SE0, and
465 * we don't want to treat that full speed J as a wakeup event.
466 * ... peripherals must draw only suspend current after 10 msec.
468 static void tusb_musb_try_idle(struct musb
*musb
, unsigned long timeout
)
470 unsigned long default_timeout
= jiffies
+ msecs_to_jiffies(3);
471 static unsigned long last_timer
;
474 timeout
= default_timeout
;
476 /* Never idle if active, or when VBUS timeout is not set as host */
477 if (musb
->is_active
|| ((musb
->a_wait_bcon
== 0)
478 && (musb
->xceiv
->state
== OTG_STATE_A_WAIT_BCON
))) {
479 dev_dbg(musb
->controller
, "%s active, deleting timer\n",
480 otg_state_string(musb
->xceiv
->state
));
481 del_timer(&musb_idle_timer
);
482 last_timer
= jiffies
;
486 if (time_after(last_timer
, timeout
)) {
487 if (!timer_pending(&musb_idle_timer
))
488 last_timer
= timeout
;
490 dev_dbg(musb
->controller
, "Longer idle timer already pending, ignoring\n");
494 last_timer
= timeout
;
496 dev_dbg(musb
->controller
, "%s inactive, for idle timer for %lu ms\n",
497 otg_state_string(musb
->xceiv
->state
),
498 (unsigned long)jiffies_to_msecs(timeout
- jiffies
));
499 mod_timer(&musb_idle_timer
, timeout
);
502 /* ticks of 60 MHz clock */
503 #define DEVCLOCK 60000000
504 #define OTG_TIMER_MS(msecs) ((msecs) \
505 ? (TUSB_DEV_OTG_TIMER_VAL((DEVCLOCK/1000)*(msecs)) \
506 | TUSB_DEV_OTG_TIMER_ENABLE) \
509 static void tusb_musb_set_vbus(struct musb
*musb
, int is_on
)
511 void __iomem
*tbase
= musb
->ctrl_base
;
512 u32 conf
, prcm
, timer
;
514 struct usb_otg
*otg
= musb
->xceiv
->otg
;
516 /* HDRC controls CPEN, but beware current surges during device
517 * connect. They can trigger transient overcurrent conditions
518 * that must be ignored.
521 prcm
= musb_readl(tbase
, TUSB_PRCM_MNGMT
);
522 conf
= musb_readl(tbase
, TUSB_DEV_CONF
);
523 devctl
= musb_readb(musb
->mregs
, MUSB_DEVCTL
);
526 timer
= OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE
);
528 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
529 devctl
|= MUSB_DEVCTL_SESSION
;
531 conf
|= TUSB_DEV_CONF_USB_HOST_MODE
;
538 /* If ID pin is grounded, we want to be a_idle */
539 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
540 if (!(otg_stat
& TUSB_DEV_OTG_STAT_ID_STATUS
)) {
541 switch (musb
->xceiv
->state
) {
542 case OTG_STATE_A_WAIT_VRISE
:
543 case OTG_STATE_A_WAIT_BCON
:
544 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VFALL
;
546 case OTG_STATE_A_WAIT_VFALL
:
547 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
550 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
558 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
562 devctl
&= ~MUSB_DEVCTL_SESSION
;
563 conf
&= ~TUSB_DEV_CONF_USB_HOST_MODE
;
565 prcm
&= ~(TUSB_PRCM_MNGMT_15_SW_EN
| TUSB_PRCM_MNGMT_33_SW_EN
);
567 musb_writel(tbase
, TUSB_PRCM_MNGMT
, prcm
);
568 musb_writel(tbase
, TUSB_DEV_OTG_TIMER
, timer
);
569 musb_writel(tbase
, TUSB_DEV_CONF
, conf
);
570 musb_writeb(musb
->mregs
, MUSB_DEVCTL
, devctl
);
572 dev_dbg(musb
->controller
, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n",
573 otg_state_string(musb
->xceiv
->state
),
574 musb_readb(musb
->mregs
, MUSB_DEVCTL
),
575 musb_readl(tbase
, TUSB_DEV_OTG_STAT
),
580 * Sets the mode to OTG, peripheral or host by changing the ID detection.
581 * Caller must take care of locking.
583 * Note that if a mini-A cable is plugged in the ID line will stay down as
584 * the weak ID pull-up is not able to pull the ID up.
586 * REVISIT: It would be possible to add support for changing between host
587 * and peripheral modes in non-OTG configurations by reconfiguring hardware
588 * and then setting musb->board_mode. For now, only support OTG mode.
590 static int tusb_musb_set_mode(struct musb
*musb
, u8 musb_mode
)
592 void __iomem
*tbase
= musb
->ctrl_base
;
593 u32 otg_stat
, phy_otg_ctrl
, phy_otg_ena
, dev_conf
;
595 if (musb
->board_mode
!= MUSB_OTG
) {
596 ERR("Changing mode currently only supported in OTG mode\n");
600 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
601 phy_otg_ctrl
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL
);
602 phy_otg_ena
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
);
603 dev_conf
= musb_readl(tbase
, TUSB_DEV_CONF
);
607 case MUSB_HOST
: /* Disable PHY ID detect, ground ID */
608 phy_otg_ctrl
&= ~TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
609 phy_otg_ena
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
610 dev_conf
|= TUSB_DEV_CONF_ID_SEL
;
611 dev_conf
&= ~TUSB_DEV_CONF_SOFT_ID
;
613 case MUSB_PERIPHERAL
: /* Disable PHY ID detect, keep ID pull-up on */
614 phy_otg_ctrl
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
615 phy_otg_ena
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
616 dev_conf
|= (TUSB_DEV_CONF_ID_SEL
| TUSB_DEV_CONF_SOFT_ID
);
618 case MUSB_OTG
: /* Use PHY ID detection */
619 phy_otg_ctrl
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
620 phy_otg_ena
|= TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
621 dev_conf
&= ~(TUSB_DEV_CONF_ID_SEL
| TUSB_DEV_CONF_SOFT_ID
);
625 dev_dbg(musb
->controller
, "Trying to set mode %i\n", musb_mode
);
629 musb_writel(tbase
, TUSB_PHY_OTG_CTRL
,
630 TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ctrl
);
631 musb_writel(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
,
632 TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ena
);
633 musb_writel(tbase
, TUSB_DEV_CONF
, dev_conf
);
635 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
636 if ((musb_mode
== MUSB_PERIPHERAL
) &&
637 !(otg_stat
& TUSB_DEV_OTG_STAT_ID_STATUS
))
638 INFO("Cannot be peripheral with mini-A cable "
639 "otg_stat: %08x\n", otg_stat
);
644 static inline unsigned long
645 tusb_otg_ints(struct musb
*musb
, u32 int_src
, void __iomem
*tbase
)
647 u32 otg_stat
= musb_readl(tbase
, TUSB_DEV_OTG_STAT
);
648 unsigned long idle_timeout
= 0;
649 struct usb_otg
*otg
= musb
->xceiv
->otg
;
652 if ((int_src
& TUSB_INT_SRC_ID_STATUS_CHNG
)) {
655 if (is_otg_enabled(musb
))
656 default_a
= !(otg_stat
& TUSB_DEV_OTG_STAT_ID_STATUS
);
658 default_a
= is_host_enabled(musb
);
659 dev_dbg(musb
->controller
, "Default-%c\n", default_a
? 'A' : 'B');
660 otg
->default_a
= default_a
;
661 tusb_musb_set_vbus(musb
, default_a
);
663 /* Don't allow idling immediately */
665 idle_timeout
= jiffies
+ (HZ
* 3);
668 /* VBUS state change */
669 if (int_src
& TUSB_INT_SRC_VBUS_SENSE_CHNG
) {
671 /* B-dev state machine: no vbus ~= disconnect */
672 if ((is_otg_enabled(musb
) && !otg
->default_a
)
673 || !is_host_enabled(musb
)) {
674 /* ? musb_root_disconnect(musb); */
675 musb
->port1_status
&=
676 ~(USB_PORT_STAT_CONNECTION
677 | USB_PORT_STAT_ENABLE
678 | USB_PORT_STAT_LOW_SPEED
679 | USB_PORT_STAT_HIGH_SPEED
683 if (otg_stat
& TUSB_DEV_OTG_STAT_SESS_END
) {
684 dev_dbg(musb
->controller
, "Forcing disconnect (no interrupt)\n");
685 if (musb
->xceiv
->state
!= OTG_STATE_B_IDLE
) {
686 /* INTR_DISCONNECT can hide... */
687 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
688 musb
->int_usb
|= MUSB_INTR_DISCONNECT
;
692 dev_dbg(musb
->controller
, "vbus change, %s, otg %03x\n",
693 otg_state_string(musb
->xceiv
->state
), otg_stat
);
694 idle_timeout
= jiffies
+ (1 * HZ
);
695 schedule_work(&musb
->irq_work
);
697 } else /* A-dev state machine */ {
698 dev_dbg(musb
->controller
, "vbus change, %s, otg %03x\n",
699 otg_state_string(musb
->xceiv
->state
), otg_stat
);
701 switch (musb
->xceiv
->state
) {
702 case OTG_STATE_A_IDLE
:
703 dev_dbg(musb
->controller
, "Got SRP, turning on VBUS\n");
704 musb_platform_set_vbus(musb
, 1);
706 /* CONNECT can wake if a_wait_bcon is set */
707 if (musb
->a_wait_bcon
!= 0)
713 * OPT FS A TD.4.6 needs few seconds for
716 idle_timeout
= jiffies
+ (2 * HZ
);
719 case OTG_STATE_A_WAIT_VRISE
:
720 /* ignore; A-session-valid < VBUS_VALID/2,
721 * we monitor this with the timer
724 case OTG_STATE_A_WAIT_VFALL
:
725 /* REVISIT this irq triggers during short
726 * spikes caused by enumeration ...
728 if (musb
->vbuserr_retry
) {
729 musb
->vbuserr_retry
--;
730 tusb_musb_set_vbus(musb
, 1);
733 = VBUSERR_RETRY_COUNT
;
734 tusb_musb_set_vbus(musb
, 0);
743 /* OTG timer expiration */
744 if (int_src
& TUSB_INT_SRC_OTG_TIMEOUT
) {
747 dev_dbg(musb
->controller
, "%s timer, %03x\n",
748 otg_state_string(musb
->xceiv
->state
), otg_stat
);
750 switch (musb
->xceiv
->state
) {
751 case OTG_STATE_A_WAIT_VRISE
:
752 /* VBUS has probably been valid for a while now,
753 * but may well have bounced out of range a bit
755 devctl
= musb_readb(musb
->mregs
, MUSB_DEVCTL
);
756 if (otg_stat
& TUSB_DEV_OTG_STAT_VBUS_VALID
) {
757 if ((devctl
& MUSB_DEVCTL_VBUS
)
758 != MUSB_DEVCTL_VBUS
) {
759 dev_dbg(musb
->controller
, "devctl %02x\n", devctl
);
762 musb
->xceiv
->state
= OTG_STATE_A_WAIT_BCON
;
764 idle_timeout
= jiffies
765 + msecs_to_jiffies(musb
->a_wait_bcon
);
767 /* REVISIT report overcurrent to hub? */
768 ERR("vbus too slow, devctl %02x\n", devctl
);
769 tusb_musb_set_vbus(musb
, 0);
772 case OTG_STATE_A_WAIT_BCON
:
773 if (musb
->a_wait_bcon
!= 0)
774 idle_timeout
= jiffies
775 + msecs_to_jiffies(musb
->a_wait_bcon
);
777 case OTG_STATE_A_SUSPEND
:
779 case OTG_STATE_B_WAIT_ACON
:
785 schedule_work(&musb
->irq_work
);
790 static irqreturn_t
tusb_musb_interrupt(int irq
, void *__hci
)
792 struct musb
*musb
= __hci
;
793 void __iomem
*tbase
= musb
->ctrl_base
;
794 unsigned long flags
, idle_timeout
= 0;
795 u32 int_mask
, int_src
;
797 spin_lock_irqsave(&musb
->lock
, flags
);
799 /* Mask all interrupts to allow using both edge and level GPIO irq */
800 int_mask
= musb_readl(tbase
, TUSB_INT_MASK
);
801 musb_writel(tbase
, TUSB_INT_MASK
, ~TUSB_INT_MASK_RESERVED_BITS
);
803 int_src
= musb_readl(tbase
, TUSB_INT_SRC
) & ~TUSB_INT_SRC_RESERVED_BITS
;
804 dev_dbg(musb
->controller
, "TUSB IRQ %08x\n", int_src
);
806 musb
->int_usb
= (u8
) int_src
;
808 /* Acknowledge wake-up source interrupts */
809 if (int_src
& TUSB_INT_SRC_DEV_WAKEUP
) {
813 if (tusb_get_revision(musb
) == TUSB_REV_30
)
814 tusb_wbus_quirk(musb
, 0);
816 /* there are issues re-locking the PLL on wakeup ... */
818 /* work around issue 8 */
819 for (i
= 0xf7f7f7; i
> 0xf7f7f7 - 1000; i
--) {
820 musb_writel(tbase
, TUSB_SCRATCH_PAD
, 0);
821 musb_writel(tbase
, TUSB_SCRATCH_PAD
, i
);
822 reg
= musb_readl(tbase
, TUSB_SCRATCH_PAD
);
825 dev_dbg(musb
->controller
, "TUSB NOR not ready\n");
828 /* work around issue 13 (2nd half) */
829 tusb_set_clock_source(musb
, 1);
831 reg
= musb_readl(tbase
, TUSB_PRCM_WAKEUP_SOURCE
);
832 musb_writel(tbase
, TUSB_PRCM_WAKEUP_CLEAR
, reg
);
833 if (reg
& ~TUSB_PRCM_WNORCS
) {
835 schedule_work(&musb
->irq_work
);
837 dev_dbg(musb
->controller
, "wake %sactive %02x\n",
838 musb
->is_active
? "" : "in", reg
);
840 /* REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS */
843 if (int_src
& TUSB_INT_SRC_USB_IP_CONN
)
844 del_timer(&musb_idle_timer
);
846 /* OTG state change reports (annoyingly) not issued by Mentor core */
847 if (int_src
& (TUSB_INT_SRC_VBUS_SENSE_CHNG
848 | TUSB_INT_SRC_OTG_TIMEOUT
849 | TUSB_INT_SRC_ID_STATUS_CHNG
))
850 idle_timeout
= tusb_otg_ints(musb
, int_src
, tbase
);
852 /* TX dma callback must be handled here, RX dma callback is
853 * handled in tusb_omap_dma_cb.
855 if ((int_src
& TUSB_INT_SRC_TXRX_DMA_DONE
)) {
856 u32 dma_src
= musb_readl(tbase
, TUSB_DMA_INT_SRC
);
857 u32 real_dma_src
= musb_readl(tbase
, TUSB_DMA_INT_MASK
);
859 dev_dbg(musb
->controller
, "DMA IRQ %08x\n", dma_src
);
860 real_dma_src
= ~real_dma_src
& dma_src
;
861 if (tusb_dma_omap() && real_dma_src
) {
862 int tx_source
= (real_dma_src
& 0xffff);
865 for (i
= 1; i
<= 15; i
++) {
866 if (tx_source
& (1 << i
)) {
867 dev_dbg(musb
->controller
, "completing ep%i %s\n", i
, "tx");
868 musb_dma_completion(musb
, i
, 1);
872 musb_writel(tbase
, TUSB_DMA_INT_CLEAR
, dma_src
);
875 /* EP interrupts. In OCP mode tusb6010 mirrors the MUSB interrupts */
876 if (int_src
& (TUSB_INT_SRC_USB_IP_TX
| TUSB_INT_SRC_USB_IP_RX
)) {
877 u32 musb_src
= musb_readl(tbase
, TUSB_USBIP_INT_SRC
);
879 musb_writel(tbase
, TUSB_USBIP_INT_CLEAR
, musb_src
);
880 musb
->int_rx
= (((musb_src
>> 16) & 0xffff) << 1);
881 musb
->int_tx
= (musb_src
& 0xffff);
887 if (int_src
& (TUSB_INT_SRC_USB_IP_TX
| TUSB_INT_SRC_USB_IP_RX
| 0xff))
888 musb_interrupt(musb
);
890 /* Acknowledge TUSB interrupts. Clear only non-reserved bits */
891 musb_writel(tbase
, TUSB_INT_SRC_CLEAR
,
892 int_src
& ~TUSB_INT_MASK_RESERVED_BITS
);
894 tusb_musb_try_idle(musb
, idle_timeout
);
896 musb_writel(tbase
, TUSB_INT_MASK
, int_mask
);
897 spin_unlock_irqrestore(&musb
->lock
, flags
);
905 * Enables TUSB6010. Caller must take care of locking.
907 * - Check what is unnecessary in MGC_HdrcStart()
909 static void tusb_musb_enable(struct musb
*musb
)
911 void __iomem
*tbase
= musb
->ctrl_base
;
913 /* Setup TUSB6010 main interrupt mask. Enable all interrupts except SOF.
914 * REVISIT: Enable and deal with TUSB_INT_SRC_USB_IP_SOF */
915 musb_writel(tbase
, TUSB_INT_MASK
, TUSB_INT_SRC_USB_IP_SOF
);
917 /* Setup TUSB interrupt, disable DMA and GPIO interrupts */
918 musb_writel(tbase
, TUSB_USBIP_INT_MASK
, 0);
919 musb_writel(tbase
, TUSB_DMA_INT_MASK
, 0x7fffffff);
920 musb_writel(tbase
, TUSB_GPIO_INT_MASK
, 0x1ff);
922 /* Clear all subsystem interrups */
923 musb_writel(tbase
, TUSB_USBIP_INT_CLEAR
, 0x7fffffff);
924 musb_writel(tbase
, TUSB_DMA_INT_CLEAR
, 0x7fffffff);
925 musb_writel(tbase
, TUSB_GPIO_INT_CLEAR
, 0x1ff);
927 /* Acknowledge pending interrupt(s) */
928 musb_writel(tbase
, TUSB_INT_SRC_CLEAR
, ~TUSB_INT_MASK_RESERVED_BITS
);
930 /* Only 0 clock cycles for minimum interrupt de-assertion time and
931 * interrupt polarity active low seems to work reliably here */
932 musb_writel(tbase
, TUSB_INT_CTRL_CONF
,
933 TUSB_INT_CTRL_CONF_INT_RELCYC(0));
935 irq_set_irq_type(musb
->nIrq
, IRQ_TYPE_LEVEL_LOW
);
937 /* maybe force into the Default-A OTG state machine */
938 if (!(musb_readl(tbase
, TUSB_DEV_OTG_STAT
)
939 & TUSB_DEV_OTG_STAT_ID_STATUS
))
940 musb_writel(tbase
, TUSB_INT_SRC_SET
,
941 TUSB_INT_SRC_ID_STATUS_CHNG
);
943 if (is_dma_capable() && dma_off
)
944 printk(KERN_WARNING
"%s %s: dma not reactivated\n",
951 * Disables TUSB6010. Caller must take care of locking.
953 static void tusb_musb_disable(struct musb
*musb
)
955 void __iomem
*tbase
= musb
->ctrl_base
;
957 /* FIXME stop DMA, IRQs, timers, ... */
959 /* disable all IRQs */
960 musb_writel(tbase
, TUSB_INT_MASK
, ~TUSB_INT_MASK_RESERVED_BITS
);
961 musb_writel(tbase
, TUSB_USBIP_INT_MASK
, 0x7fffffff);
962 musb_writel(tbase
, TUSB_DMA_INT_MASK
, 0x7fffffff);
963 musb_writel(tbase
, TUSB_GPIO_INT_MASK
, 0x1ff);
965 del_timer(&musb_idle_timer
);
967 if (is_dma_capable() && !dma_off
) {
968 printk(KERN_WARNING
"%s %s: dma still active\n",
975 * Sets up TUSB6010 CPU interface specific signals and registers
976 * Note: Settings optimized for OMAP24xx
978 static void tusb_setup_cpu_interface(struct musb
*musb
)
980 void __iomem
*tbase
= musb
->ctrl_base
;
983 * Disable GPIO[5:0] pullups (used as output DMA requests)
984 * Don't disable GPIO[7:6] as they are needed for wake-up.
986 musb_writel(tbase
, TUSB_PULLUP_1_CTRL
, 0x0000003F);
988 /* Disable all pullups on NOR IF, DMAREQ0 and DMAREQ1 */
989 musb_writel(tbase
, TUSB_PULLUP_2_CTRL
, 0x01FFFFFF);
991 /* Turn GPIO[5:0] to DMAREQ[5:0] signals */
992 musb_writel(tbase
, TUSB_GPIO_CONF
, TUSB_GPIO_CONF_DMAREQ(0x3f));
994 /* Burst size 16x16 bits, all six DMA requests enabled, DMA request
995 * de-assertion time 2 system clocks p 62 */
996 musb_writel(tbase
, TUSB_DMA_REQ_CONF
,
997 TUSB_DMA_REQ_CONF_BURST_SIZE(2) |
998 TUSB_DMA_REQ_CONF_DMA_REQ_EN(0x3f) |
999 TUSB_DMA_REQ_CONF_DMA_REQ_ASSER(2));
1001 /* Set 0 wait count for synchronous burst access */
1002 musb_writel(tbase
, TUSB_WAIT_COUNT
, 1);
1005 static int tusb_musb_start(struct musb
*musb
)
1007 void __iomem
*tbase
= musb
->ctrl_base
;
1009 unsigned long flags
;
1012 if (musb
->board_set_power
)
1013 ret
= musb
->board_set_power(1);
1015 printk(KERN_ERR
"tusb: Cannot enable TUSB6010\n");
1019 spin_lock_irqsave(&musb
->lock
, flags
);
1021 if (musb_readl(tbase
, TUSB_PROD_TEST_RESET
) !=
1022 TUSB_PROD_TEST_RESET_VAL
) {
1023 printk(KERN_ERR
"tusb: Unable to detect TUSB6010\n");
1027 ret
= tusb_print_revision(musb
);
1029 printk(KERN_ERR
"tusb: Unsupported TUSB6010 revision %i\n",
1034 /* The uint bit for "USB non-PDR interrupt enable" has to be 1 when
1035 * NOR FLASH interface is used */
1036 musb_writel(tbase
, TUSB_VLYNQ_CTRL
, 8);
1038 /* Select PHY free running 60MHz as a system clock */
1039 tusb_set_clock_source(musb
, 1);
1041 /* VBus valid timer 1us, disable DFT/Debug and VLYNQ clocks for
1042 * power saving, enable VBus detect and session end comparators,
1043 * enable IDpullup, enable VBus charging */
1044 musb_writel(tbase
, TUSB_PRCM_MNGMT
,
1045 TUSB_PRCM_MNGMT_VBUS_VALID_TIMER(0xa) |
1046 TUSB_PRCM_MNGMT_VBUS_VALID_FLT_EN
|
1047 TUSB_PRCM_MNGMT_OTG_SESS_END_EN
|
1048 TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN
|
1049 TUSB_PRCM_MNGMT_OTG_ID_PULLUP
);
1050 tusb_setup_cpu_interface(musb
);
1052 /* simplify: always sense/pullup ID pins, as if in OTG mode */
1053 reg
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
);
1054 reg
|= TUSB_PHY_OTG_CTRL_WRPROTECT
| TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
1055 musb_writel(tbase
, TUSB_PHY_OTG_CTRL_ENABLE
, reg
);
1057 reg
= musb_readl(tbase
, TUSB_PHY_OTG_CTRL
);
1058 reg
|= TUSB_PHY_OTG_CTRL_WRPROTECT
| TUSB_PHY_OTG_CTRL_OTG_ID_PULLUP
;
1059 musb_writel(tbase
, TUSB_PHY_OTG_CTRL
, reg
);
1061 spin_unlock_irqrestore(&musb
->lock
, flags
);
1066 spin_unlock_irqrestore(&musb
->lock
, flags
);
1068 if (musb
->board_set_power
)
1069 musb
->board_set_power(0);
1074 static int tusb_musb_init(struct musb
*musb
)
1076 struct platform_device
*pdev
;
1077 struct resource
*mem
;
1078 void __iomem
*sync
= NULL
;
1081 usb_nop_xceiv_register();
1082 musb
->xceiv
= usb_get_phy(USB_PHY_TYPE_USB2
);
1083 if (IS_ERR_OR_NULL(musb
->xceiv
))
1086 pdev
= to_platform_device(musb
->controller
);
1088 /* dma address for async dma */
1089 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1090 musb
->async
= mem
->start
;
1092 /* dma address for sync dma */
1093 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
1095 pr_debug("no sync dma resource?\n");
1099 musb
->sync
= mem
->start
;
1101 sync
= ioremap(mem
->start
, resource_size(mem
));
1103 pr_debug("ioremap for sync failed\n");
1107 musb
->sync_va
= sync
;
1109 /* Offsets from base: VLYNQ at 0x000, MUSB regs at 0x400,
1110 * FIFOs at 0x600, TUSB at 0x800
1112 musb
->mregs
+= TUSB_BASE_OFFSET
;
1114 ret
= tusb_musb_start(musb
);
1116 printk(KERN_ERR
"Could not start tusb6010 (%d)\n",
1120 musb
->isr
= tusb_musb_interrupt
;
1122 if (is_peripheral_enabled(musb
)) {
1123 musb
->xceiv
->set_power
= tusb_draw_power
;
1127 setup_timer(&musb_idle_timer
, musb_do_idle
, (unsigned long) musb
);
1134 usb_put_phy(musb
->xceiv
);
1135 usb_nop_xceiv_unregister();
1140 static int tusb_musb_exit(struct musb
*musb
)
1142 del_timer_sync(&musb_idle_timer
);
1145 if (musb
->board_set_power
)
1146 musb
->board_set_power(0);
1148 iounmap(musb
->sync_va
);
1150 usb_put_phy(musb
->xceiv
);
1151 usb_nop_xceiv_unregister();
1155 static const struct musb_platform_ops tusb_ops
= {
1156 .init
= tusb_musb_init
,
1157 .exit
= tusb_musb_exit
,
1159 .enable
= tusb_musb_enable
,
1160 .disable
= tusb_musb_disable
,
1162 .set_mode
= tusb_musb_set_mode
,
1163 .try_idle
= tusb_musb_try_idle
,
1165 .vbus_status
= tusb_musb_vbus_status
,
1166 .set_vbus
= tusb_musb_set_vbus
,
1169 static u64 tusb_dmamask
= DMA_BIT_MASK(32);
1171 static int __devinit
tusb_probe(struct platform_device
*pdev
)
1173 struct musb_hdrc_platform_data
*pdata
= pdev
->dev
.platform_data
;
1174 struct platform_device
*musb
;
1175 struct tusb6010_glue
*glue
;
1179 glue
= kzalloc(sizeof(*glue
), GFP_KERNEL
);
1181 dev_err(&pdev
->dev
, "failed to allocate glue context\n");
1185 musb
= platform_device_alloc("musb-hdrc", -1);
1187 dev_err(&pdev
->dev
, "failed to allocate musb device\n");
1191 musb
->dev
.parent
= &pdev
->dev
;
1192 musb
->dev
.dma_mask
= &tusb_dmamask
;
1193 musb
->dev
.coherent_dma_mask
= tusb_dmamask
;
1195 glue
->dev
= &pdev
->dev
;
1198 pdata
->platform_ops
= &tusb_ops
;
1200 platform_set_drvdata(pdev
, glue
);
1202 ret
= platform_device_add_resources(musb
, pdev
->resource
,
1203 pdev
->num_resources
);
1205 dev_err(&pdev
->dev
, "failed to add resources\n");
1209 ret
= platform_device_add_data(musb
, pdata
, sizeof(*pdata
));
1211 dev_err(&pdev
->dev
, "failed to add platform_data\n");
1215 ret
= platform_device_add(musb
);
1217 dev_err(&pdev
->dev
, "failed to register musb device\n");
1224 platform_device_put(musb
);
1233 static int __devexit
tusb_remove(struct platform_device
*pdev
)
1235 struct tusb6010_glue
*glue
= platform_get_drvdata(pdev
);
1237 platform_device_del(glue
->musb
);
1238 platform_device_put(glue
->musb
);
1244 static struct platform_driver tusb_driver
= {
1245 .probe
= tusb_probe
,
1246 .remove
= __devexit_p(tusb_remove
),
1248 .name
= "musb-tusb",
1252 MODULE_DESCRIPTION("TUSB6010 MUSB Glue Layer");
1253 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
1254 MODULE_LICENSE("GPL v2");
1256 static int __init
tusb_init(void)
1258 return platform_driver_register(&tusb_driver
);
1260 module_init(tusb_init
);
1262 static void __exit
tusb_exit(void)
1264 platform_driver_unregister(&tusb_driver
);
1266 module_exit(tusb_exit
);