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1 /*
2 * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
3 *
4 * Author: Li Yang <LeoLi@freescale.com>
5 * Jerry Huang <Chang-Ming.Huang@freescale.com>
6 *
7 * Initialization based on code from Shlomi Gridish.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/slab.h>
28 #include <linux/proc_fs.h>
29 #include <linux/errno.h>
30 #include <linux/interrupt.h>
31 #include <linux/io.h>
32 #include <linux/timer.h>
33 #include <linux/usb.h>
34 #include <linux/device.h>
35 #include <linux/usb/ch9.h>
36 #include <linux/usb/gadget.h>
37 #include <linux/workqueue.h>
38 #include <linux/time.h>
39 #include <linux/fsl_devices.h>
40 #include <linux/platform_device.h>
41 #include <linux/uaccess.h>
42
43 #include <asm/unaligned.h>
44
45 #include "phy-fsl-usb.h"
46
47 #ifdef VERBOSE
48 #define VDBG(fmt, args...) pr_debug("[%s] " fmt, \
49 __func__, ## args)
50 #else
51 #define VDBG(stuff...) do {} while (0)
52 #endif
53
54 #define DRIVER_VERSION "Rev. 1.55"
55 #define DRIVER_AUTHOR "Jerry Huang/Li Yang"
56 #define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
57 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
58
59 static const char driver_name[] = "fsl-usb2-otg";
60
61 const pm_message_t otg_suspend_state = {
62 .event = 1,
63 };
64
65 #define HA_DATA_PULSE
66
67 static struct usb_dr_mmap *usb_dr_regs;
68 static struct fsl_otg *fsl_otg_dev;
69 static int srp_wait_done;
70
71 /* FSM timers */
72 struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
73 *b_ase0_brst_tmr, *b_se0_srp_tmr;
74
75 /* Driver specific timers */
76 struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
77 *b_srp_wait_tmr, *a_wait_enum_tmr;
78
79 static struct list_head active_timers;
80
81 static struct fsl_otg_config fsl_otg_initdata = {
82 .otg_port = 1,
83 };
84
85 #ifdef CONFIG_PPC32
86 static u32 _fsl_readl_be(const unsigned __iomem *p)
87 {
88 return in_be32(p);
89 }
90
91 static u32 _fsl_readl_le(const unsigned __iomem *p)
92 {
93 return in_le32(p);
94 }
95
96 static void _fsl_writel_be(u32 v, unsigned __iomem *p)
97 {
98 out_be32(p, v);
99 }
100
101 static void _fsl_writel_le(u32 v, unsigned __iomem *p)
102 {
103 out_le32(p, v);
104 }
105
106 static u32 (*_fsl_readl)(const unsigned __iomem *p);
107 static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
108
109 #define fsl_readl(p) (*_fsl_readl)((p))
110 #define fsl_writel(v, p) (*_fsl_writel)((v), (p))
111
112 #else
113 #define fsl_readl(addr) readl(addr)
114 #define fsl_writel(val, addr) writel(val, addr)
115 #endif /* CONFIG_PPC32 */
116
117 int write_ulpi(u8 addr, u8 data)
118 {
119 u32 temp;
120
121 temp = 0x60000000 | (addr << 16) | data;
122 fsl_writel(temp, &usb_dr_regs->ulpiview);
123 return 0;
124 }
125
126 /* -------------------------------------------------------------*/
127 /* Operations that will be called from OTG Finite State Machine */
128
129 /* Charge vbus for vbus pulsing in SRP */
130 void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
131 {
132 u32 tmp;
133
134 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
135
136 if (on)
137 /* stop discharging, start charging */
138 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
139 OTGSC_CTRL_VBUS_CHARGE;
140 else
141 /* stop charging */
142 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
143
144 fsl_writel(tmp, &usb_dr_regs->otgsc);
145 }
146
147 /* Discharge vbus through a resistor to ground */
148 void fsl_otg_dischrg_vbus(int on)
149 {
150 u32 tmp;
151
152 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
153
154 if (on)
155 /* stop charging, start discharging */
156 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
157 OTGSC_CTRL_VBUS_DISCHARGE;
158 else
159 /* stop discharging */
160 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
161
162 fsl_writel(tmp, &usb_dr_regs->otgsc);
163 }
164
165 /* A-device driver vbus, controlled through PP bit in PORTSC */
166 void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
167 {
168 u32 tmp;
169
170 if (on) {
171 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
172 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
173 } else {
174 tmp = fsl_readl(&usb_dr_regs->portsc) &
175 ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
176 fsl_writel(tmp, &usb_dr_regs->portsc);
177 }
178 }
179
180 /*
181 * Pull-up D+, signalling connect by periperal. Also used in
182 * data-line pulsing in SRP
183 */
184 void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
185 {
186 u32 tmp;
187
188 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
189
190 if (on)
191 tmp |= OTGSC_CTRL_DATA_PULSING;
192 else
193 tmp &= ~OTGSC_CTRL_DATA_PULSING;
194
195 fsl_writel(tmp, &usb_dr_regs->otgsc);
196 }
197
198 /*
199 * Generate SOF by host. This is controlled through suspend/resume the
200 * port. In host mode, controller will automatically send SOF.
201 * Suspend will block the data on the port.
202 */
203 void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
204 {
205 u32 tmp;
206
207 tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
208 if (on)
209 tmp |= PORTSC_PORT_FORCE_RESUME;
210 else
211 tmp |= PORTSC_PORT_SUSPEND;
212
213 fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
214
215 }
216
217 /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
218 void fsl_otg_start_pulse(struct otg_fsm *fsm)
219 {
220 u32 tmp;
221
222 srp_wait_done = 0;
223 #ifdef HA_DATA_PULSE
224 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
225 tmp |= OTGSC_HA_DATA_PULSE;
226 fsl_writel(tmp, &usb_dr_regs->otgsc);
227 #else
228 fsl_otg_loc_conn(1);
229 #endif
230
231 fsl_otg_add_timer(fsm, b_data_pulse_tmr);
232 }
233
234 void b_data_pulse_end(unsigned long foo)
235 {
236 #ifdef HA_DATA_PULSE
237 #else
238 fsl_otg_loc_conn(0);
239 #endif
240
241 /* Do VBUS pulse after data pulse */
242 fsl_otg_pulse_vbus();
243 }
244
245 void fsl_otg_pulse_vbus(void)
246 {
247 srp_wait_done = 0;
248 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
249 /* start the timer to end vbus charge */
250 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
251 }
252
253 void b_vbus_pulse_end(unsigned long foo)
254 {
255 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
256
257 /*
258 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
259 * we need to discharge the bus for a while to distinguish
260 * residual voltage of vbus pulsing and A device pull up
261 */
262 fsl_otg_dischrg_vbus(1);
263 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
264 }
265
266 void b_srp_end(unsigned long foo)
267 {
268 fsl_otg_dischrg_vbus(0);
269 srp_wait_done = 1;
270
271 if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) &&
272 fsl_otg_dev->fsm.b_sess_vld)
273 fsl_otg_dev->fsm.b_srp_done = 1;
274 }
275
276 /*
277 * Workaround for a_host suspending too fast. When a_bus_req=0,
278 * a_host will start by SRP. It needs to set b_hnp_enable before
279 * actually suspending to start HNP
280 */
281 void a_wait_enum(unsigned long foo)
282 {
283 VDBG("a_wait_enum timeout\n");
284 if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
285 fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
286 else
287 otg_statemachine(&fsl_otg_dev->fsm);
288 }
289
290 /* The timeout callback function to set time out bit */
291 void set_tmout(unsigned long indicator)
292 {
293 *(int *)indicator = 1;
294 }
295
296 /* Initialize timers */
297 int fsl_otg_init_timers(struct otg_fsm *fsm)
298 {
299 /* FSM used timers */
300 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
301 (unsigned long)&fsm->a_wait_vrise_tmout);
302 if (!a_wait_vrise_tmr)
303 return -ENOMEM;
304
305 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
306 (unsigned long)&fsm->a_wait_bcon_tmout);
307 if (!a_wait_bcon_tmr)
308 return -ENOMEM;
309
310 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
311 (unsigned long)&fsm->a_aidl_bdis_tmout);
312 if (!a_aidl_bdis_tmr)
313 return -ENOMEM;
314
315 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
316 (unsigned long)&fsm->b_ase0_brst_tmout);
317 if (!b_ase0_brst_tmr)
318 return -ENOMEM;
319
320 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
321 (unsigned long)&fsm->b_se0_srp);
322 if (!b_se0_srp_tmr)
323 return -ENOMEM;
324
325 b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
326 (unsigned long)&fsm->b_srp_done);
327 if (!b_srp_fail_tmr)
328 return -ENOMEM;
329
330 a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
331 (unsigned long)&fsm);
332 if (!a_wait_enum_tmr)
333 return -ENOMEM;
334
335 /* device driver used timers */
336 b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
337 if (!b_srp_wait_tmr)
338 return -ENOMEM;
339
340 b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
341 TB_DATA_PLS, 0);
342 if (!b_data_pulse_tmr)
343 return -ENOMEM;
344
345 b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
346 TB_VBUS_PLS, 0);
347 if (!b_vbus_pulse_tmr)
348 return -ENOMEM;
349
350 return 0;
351 }
352
353 /* Uninitialize timers */
354 void fsl_otg_uninit_timers(void)
355 {
356 /* FSM used timers */
357 kfree(a_wait_vrise_tmr);
358 kfree(a_wait_bcon_tmr);
359 kfree(a_aidl_bdis_tmr);
360 kfree(b_ase0_brst_tmr);
361 kfree(b_se0_srp_tmr);
362 kfree(b_srp_fail_tmr);
363 kfree(a_wait_enum_tmr);
364
365 /* device driver used timers */
366 kfree(b_srp_wait_tmr);
367 kfree(b_data_pulse_tmr);
368 kfree(b_vbus_pulse_tmr);
369 }
370
371 static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
372 {
373 struct fsl_otg_timer *timer;
374
375 /* REVISIT: use array of pointers to timers instead */
376 switch (t) {
377 case A_WAIT_VRISE:
378 timer = a_wait_vrise_tmr;
379 break;
380 case A_WAIT_BCON:
381 timer = a_wait_vrise_tmr;
382 break;
383 case A_AIDL_BDIS:
384 timer = a_wait_vrise_tmr;
385 break;
386 case B_ASE0_BRST:
387 timer = a_wait_vrise_tmr;
388 break;
389 case B_SE0_SRP:
390 timer = a_wait_vrise_tmr;
391 break;
392 case B_SRP_FAIL:
393 timer = a_wait_vrise_tmr;
394 break;
395 case A_WAIT_ENUM:
396 timer = a_wait_vrise_tmr;
397 break;
398 default:
399 timer = NULL;
400 }
401
402 return timer;
403 }
404
405 /* Add timer to timer list */
406 void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
407 {
408 struct fsl_otg_timer *timer = gtimer;
409 struct fsl_otg_timer *tmp_timer;
410
411 /*
412 * Check if the timer is already in the active list,
413 * if so update timer count
414 */
415 list_for_each_entry(tmp_timer, &active_timers, list)
416 if (tmp_timer == timer) {
417 timer->count = timer->expires;
418 return;
419 }
420 timer->count = timer->expires;
421 list_add_tail(&timer->list, &active_timers);
422 }
423
424 static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
425 {
426 struct fsl_otg_timer *timer;
427
428 timer = fsl_otg_get_timer(t);
429 if (!timer)
430 return;
431
432 fsl_otg_add_timer(fsm, timer);
433 }
434
435 /* Remove timer from the timer list; clear timeout status */
436 void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
437 {
438 struct fsl_otg_timer *timer = gtimer;
439 struct fsl_otg_timer *tmp_timer, *del_tmp;
440
441 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
442 if (tmp_timer == timer)
443 list_del(&timer->list);
444 }
445
446 static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
447 {
448 struct fsl_otg_timer *timer;
449
450 timer = fsl_otg_get_timer(t);
451 if (!timer)
452 return;
453
454 fsl_otg_del_timer(fsm, timer);
455 }
456
457 /* Reset controller, not reset the bus */
458 void otg_reset_controller(void)
459 {
460 u32 command;
461
462 command = fsl_readl(&usb_dr_regs->usbcmd);
463 command |= (1 << 1);
464 fsl_writel(command, &usb_dr_regs->usbcmd);
465 while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
466 ;
467 }
468
469 /* Call suspend/resume routines in host driver */
470 int fsl_otg_start_host(struct otg_fsm *fsm, int on)
471 {
472 struct usb_otg *otg = fsm->otg;
473 struct device *dev;
474 struct fsl_otg *otg_dev =
475 container_of(otg->usb_phy, struct fsl_otg, phy);
476 u32 retval = 0;
477
478 if (!otg->host)
479 return -ENODEV;
480 dev = otg->host->controller;
481
482 /*
483 * Update a_vbus_vld state as a_vbus_vld int is disabled
484 * in device mode
485 */
486 fsm->a_vbus_vld =
487 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
488 if (on) {
489 /* start fsl usb host controller */
490 if (otg_dev->host_working)
491 goto end;
492 else {
493 otg_reset_controller();
494 VDBG("host on......\n");
495 if (dev->driver->pm && dev->driver->pm->resume) {
496 retval = dev->driver->pm->resume(dev);
497 if (fsm->id) {
498 /* default-b */
499 fsl_otg_drv_vbus(fsm, 1);
500 /*
501 * Workaround: b_host can't driver
502 * vbus, but PP in PORTSC needs to
503 * be 1 for host to work.
504 * So we set drv_vbus bit in
505 * transceiver to 0 thru ULPI.
506 */
507 write_ulpi(0x0c, 0x20);
508 }
509 }
510
511 otg_dev->host_working = 1;
512 }
513 } else {
514 /* stop fsl usb host controller */
515 if (!otg_dev->host_working)
516 goto end;
517 else {
518 VDBG("host off......\n");
519 if (dev && dev->driver) {
520 if (dev->driver->pm && dev->driver->pm->suspend)
521 retval = dev->driver->pm->suspend(dev);
522 if (fsm->id)
523 /* default-b */
524 fsl_otg_drv_vbus(fsm, 0);
525 }
526 otg_dev->host_working = 0;
527 }
528 }
529 end:
530 return retval;
531 }
532
533 /*
534 * Call suspend and resume function in udc driver
535 * to stop and start udc driver.
536 */
537 int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
538 {
539 struct usb_otg *otg = fsm->otg;
540 struct device *dev;
541
542 if (!otg->gadget || !otg->gadget->dev.parent)
543 return -ENODEV;
544
545 VDBG("gadget %s\n", on ? "on" : "off");
546 dev = otg->gadget->dev.parent;
547
548 if (on) {
549 if (dev->driver->resume)
550 dev->driver->resume(dev);
551 } else {
552 if (dev->driver->suspend)
553 dev->driver->suspend(dev, otg_suspend_state);
554 }
555
556 return 0;
557 }
558
559 /*
560 * Called by initialization code of host driver. Register host controller
561 * to the OTG. Suspend host for OTG role detection.
562 */
563 static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
564 {
565 struct fsl_otg *otg_dev;
566
567 if (!otg)
568 return -ENODEV;
569
570 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
571 if (otg_dev != fsl_otg_dev)
572 return -ENODEV;
573
574 otg->host = host;
575
576 otg_dev->fsm.a_bus_drop = 0;
577 otg_dev->fsm.a_bus_req = 1;
578
579 if (host) {
580 VDBG("host off......\n");
581
582 otg->host->otg_port = fsl_otg_initdata.otg_port;
583 otg->host->is_b_host = otg_dev->fsm.id;
584 /*
585 * must leave time for hub_wq to finish its thing
586 * before yanking the host driver out from under it,
587 * so suspend the host after a short delay.
588 */
589 otg_dev->host_working = 1;
590 schedule_delayed_work(&otg_dev->otg_event, 100);
591 return 0;
592 } else {
593 /* host driver going away */
594 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
595 OTGSC_STS_USB_ID)) {
596 /* Mini-A cable connected */
597 struct otg_fsm *fsm = &otg_dev->fsm;
598
599 otg->state = OTG_STATE_UNDEFINED;
600 fsm->protocol = PROTO_UNDEF;
601 }
602 }
603
604 otg_dev->host_working = 0;
605
606 otg_statemachine(&otg_dev->fsm);
607
608 return 0;
609 }
610
611 /* Called by initialization code of udc. Register udc to OTG. */
612 static int fsl_otg_set_peripheral(struct usb_otg *otg,
613 struct usb_gadget *gadget)
614 {
615 struct fsl_otg *otg_dev;
616
617 if (!otg)
618 return -ENODEV;
619
620 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
621 VDBG("otg_dev 0x%x\n", (int)otg_dev);
622 VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
623 if (otg_dev != fsl_otg_dev)
624 return -ENODEV;
625
626 if (!gadget) {
627 if (!otg->default_a)
628 otg->gadget->ops->vbus_draw(otg->gadget, 0);
629 usb_gadget_vbus_disconnect(otg->gadget);
630 otg->gadget = 0;
631 otg_dev->fsm.b_bus_req = 0;
632 otg_statemachine(&otg_dev->fsm);
633 return 0;
634 }
635
636 otg->gadget = gadget;
637 otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
638
639 otg_dev->fsm.b_bus_req = 1;
640
641 /* start the gadget right away if the ID pin says Mini-B */
642 pr_debug("ID pin=%d\n", otg_dev->fsm.id);
643 if (otg_dev->fsm.id == 1) {
644 fsl_otg_start_host(&otg_dev->fsm, 0);
645 otg_drv_vbus(&otg_dev->fsm, 0);
646 fsl_otg_start_gadget(&otg_dev->fsm, 1);
647 }
648
649 return 0;
650 }
651
652 /*
653 * Delayed pin detect interrupt processing.
654 *
655 * When the Mini-A cable is disconnected from the board,
656 * the pin-detect interrupt happens before the disconnect
657 * interrupts for the connected device(s). In order to
658 * process the disconnect interrupt(s) prior to switching
659 * roles, the pin-detect interrupts are delayed, and handled
660 * by this routine.
661 */
662 static void fsl_otg_event(struct work_struct *work)
663 {
664 struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
665 struct otg_fsm *fsm = &og->fsm;
666
667 if (fsm->id) { /* switch to gadget */
668 fsl_otg_start_host(fsm, 0);
669 otg_drv_vbus(fsm, 0);
670 fsl_otg_start_gadget(fsm, 1);
671 }
672 }
673
674 /* B-device start SRP */
675 static int fsl_otg_start_srp(struct usb_otg *otg)
676 {
677 struct fsl_otg *otg_dev;
678
679 if (!otg || otg->state != OTG_STATE_B_IDLE)
680 return -ENODEV;
681
682 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
683 if (otg_dev != fsl_otg_dev)
684 return -ENODEV;
685
686 otg_dev->fsm.b_bus_req = 1;
687 otg_statemachine(&otg_dev->fsm);
688
689 return 0;
690 }
691
692 /* A_host suspend will call this function to start hnp */
693 static int fsl_otg_start_hnp(struct usb_otg *otg)
694 {
695 struct fsl_otg *otg_dev;
696
697 if (!otg)
698 return -ENODEV;
699
700 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
701 if (otg_dev != fsl_otg_dev)
702 return -ENODEV;
703
704 pr_debug("start_hnp...\n");
705
706 /* clear a_bus_req to enter a_suspend state */
707 otg_dev->fsm.a_bus_req = 0;
708 otg_statemachine(&otg_dev->fsm);
709
710 return 0;
711 }
712
713 /*
714 * Interrupt handler. OTG/host/peripheral share the same int line.
715 * OTG driver clears OTGSC interrupts and leaves USB interrupts
716 * intact. It needs to have knowledge of some USB interrupts
717 * such as port change.
718 */
719 irqreturn_t fsl_otg_isr(int irq, void *dev_id)
720 {
721 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
722 struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
723 u32 otg_int_src, otg_sc;
724
725 otg_sc = fsl_readl(&usb_dr_regs->otgsc);
726 otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
727
728 /* Only clear otg interrupts */
729 fsl_writel(otg_sc, &usb_dr_regs->otgsc);
730
731 /*FIXME: ID change not generate when init to 0 */
732 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
733 otg->default_a = (fsm->id == 0);
734
735 /* process OTG interrupts */
736 if (otg_int_src) {
737 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
738 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
739 otg->default_a = (fsm->id == 0);
740 /* clear conn information */
741 if (fsm->id)
742 fsm->b_conn = 0;
743 else
744 fsm->a_conn = 0;
745
746 if (otg->host)
747 otg->host->is_b_host = fsm->id;
748 if (otg->gadget)
749 otg->gadget->is_a_peripheral = !fsm->id;
750 VDBG("ID int (ID is %d)\n", fsm->id);
751
752 if (fsm->id) { /* switch to gadget */
753 schedule_delayed_work(
754 &((struct fsl_otg *)dev_id)->otg_event,
755 100);
756 } else { /* switch to host */
757 cancel_delayed_work(&
758 ((struct fsl_otg *)dev_id)->
759 otg_event);
760 fsl_otg_start_gadget(fsm, 0);
761 otg_drv_vbus(fsm, 1);
762 fsl_otg_start_host(fsm, 1);
763 }
764 return IRQ_HANDLED;
765 }
766 }
767 return IRQ_NONE;
768 }
769
770 static struct otg_fsm_ops fsl_otg_ops = {
771 .chrg_vbus = fsl_otg_chrg_vbus,
772 .drv_vbus = fsl_otg_drv_vbus,
773 .loc_conn = fsl_otg_loc_conn,
774 .loc_sof = fsl_otg_loc_sof,
775 .start_pulse = fsl_otg_start_pulse,
776
777 .add_timer = fsl_otg_fsm_add_timer,
778 .del_timer = fsl_otg_fsm_del_timer,
779
780 .start_host = fsl_otg_start_host,
781 .start_gadget = fsl_otg_start_gadget,
782 };
783
784 /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
785 static int fsl_otg_conf(struct platform_device *pdev)
786 {
787 struct fsl_otg *fsl_otg_tc;
788 int status;
789
790 if (fsl_otg_dev)
791 return 0;
792
793 /* allocate space to fsl otg device */
794 fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
795 if (!fsl_otg_tc)
796 return -ENOMEM;
797
798 fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
799 if (!fsl_otg_tc->phy.otg) {
800 kfree(fsl_otg_tc);
801 return -ENOMEM;
802 }
803
804 INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
805
806 INIT_LIST_HEAD(&active_timers);
807 status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
808 if (status) {
809 pr_info("Couldn't init OTG timers\n");
810 goto err;
811 }
812 mutex_init(&fsl_otg_tc->fsm.lock);
813
814 /* Set OTG state machine operations */
815 fsl_otg_tc->fsm.ops = &fsl_otg_ops;
816
817 /* initialize the otg structure */
818 fsl_otg_tc->phy.label = DRIVER_DESC;
819 fsl_otg_tc->phy.dev = &pdev->dev;
820
821 fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
822 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
823 fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
824 fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
825 fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
826
827 fsl_otg_dev = fsl_otg_tc;
828
829 /* Store the otg transceiver */
830 status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
831 if (status) {
832 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
833 goto err;
834 }
835
836 return 0;
837 err:
838 fsl_otg_uninit_timers();
839 kfree(fsl_otg_tc->phy.otg);
840 kfree(fsl_otg_tc);
841 return status;
842 }
843
844 /* OTG Initialization */
845 int usb_otg_start(struct platform_device *pdev)
846 {
847 struct fsl_otg *p_otg;
848 struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
849 struct otg_fsm *fsm;
850 int status;
851 struct resource *res;
852 u32 temp;
853 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
854
855 p_otg = container_of(otg_trans, struct fsl_otg, phy);
856 fsm = &p_otg->fsm;
857
858 /* Initialize the state machine structure with default values */
859 SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
860 fsm->otg = p_otg->phy.otg;
861
862 /* We don't require predefined MEM/IRQ resource index */
863 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
864 if (!res)
865 return -ENXIO;
866
867 /* We don't request_mem_region here to enable resource sharing
868 * with host/device */
869
870 usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
871 p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
872 pdata->regs = (void *)usb_dr_regs;
873
874 if (pdata->init && pdata->init(pdev) != 0)
875 return -EINVAL;
876
877 if (pdata->big_endian_mmio) {
878 _fsl_readl = _fsl_readl_be;
879 _fsl_writel = _fsl_writel_be;
880 } else {
881 _fsl_readl = _fsl_readl_le;
882 _fsl_writel = _fsl_writel_le;
883 }
884
885 /* request irq */
886 p_otg->irq = platform_get_irq(pdev, 0);
887 status = request_irq(p_otg->irq, fsl_otg_isr,
888 IRQF_SHARED, driver_name, p_otg);
889 if (status) {
890 dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
891 p_otg->irq, status);
892 iounmap(p_otg->dr_mem_map);
893 kfree(p_otg->phy.otg);
894 kfree(p_otg);
895 return status;
896 }
897
898 /* stop the controller */
899 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
900 temp &= ~USB_CMD_RUN_STOP;
901 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
902
903 /* reset the controller */
904 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
905 temp |= USB_CMD_CTRL_RESET;
906 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
907
908 /* wait reset completed */
909 while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
910 ;
911
912 /* configure the VBUSHS as IDLE(both host and device) */
913 temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
914 fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
915
916 /* configure PHY interface */
917 temp = fsl_readl(&p_otg->dr_mem_map->portsc);
918 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
919 switch (pdata->phy_mode) {
920 case FSL_USB2_PHY_ULPI:
921 temp |= PORTSC_PTS_ULPI;
922 break;
923 case FSL_USB2_PHY_UTMI_WIDE:
924 temp |= PORTSC_PTW_16BIT;
925 /* fall through */
926 case FSL_USB2_PHY_UTMI:
927 temp |= PORTSC_PTS_UTMI;
928 /* fall through */
929 default:
930 break;
931 }
932 fsl_writel(temp, &p_otg->dr_mem_map->portsc);
933
934 if (pdata->have_sysif_regs) {
935 /* configure control enable IO output, big endian register */
936 temp = __raw_readl(&p_otg->dr_mem_map->control);
937 temp |= USB_CTRL_IOENB;
938 __raw_writel(temp, &p_otg->dr_mem_map->control);
939 }
940
941 /* disable all interrupt and clear all OTGSC status */
942 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
943 temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
944 temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
945 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
946
947 /*
948 * The identification (id) input is FALSE when a Mini-A plug is inserted
949 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
950 * Also: record initial state of ID pin
951 */
952 if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
953 p_otg->phy.otg->state = OTG_STATE_UNDEFINED;
954 p_otg->fsm.id = 1;
955 } else {
956 p_otg->phy.otg->state = OTG_STATE_A_IDLE;
957 p_otg->fsm.id = 0;
958 }
959
960 pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
961
962 /* enable OTG ID pin interrupt */
963 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
964 temp |= OTGSC_INTR_USB_ID_EN;
965 temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
966 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
967
968 return 0;
969 }
970
971 /*
972 * state file in sysfs
973 */
974 static int show_fsl_usb2_otg_state(struct device *dev,
975 struct device_attribute *attr, char *buf)
976 {
977 struct otg_fsm *fsm = &fsl_otg_dev->fsm;
978 char *next = buf;
979 unsigned size = PAGE_SIZE;
980 int t;
981
982 mutex_lock(&fsm->lock);
983
984 /* basic driver infomation */
985 t = scnprintf(next, size,
986 DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
987 DRIVER_VERSION);
988 size -= t;
989 next += t;
990
991 /* Registers */
992 t = scnprintf(next, size,
993 "OTGSC: 0x%08x\n"
994 "PORTSC: 0x%08x\n"
995 "USBMODE: 0x%08x\n"
996 "USBCMD: 0x%08x\n"
997 "USBSTS: 0x%08x\n"
998 "USBINTR: 0x%08x\n",
999 fsl_readl(&usb_dr_regs->otgsc),
1000 fsl_readl(&usb_dr_regs->portsc),
1001 fsl_readl(&usb_dr_regs->usbmode),
1002 fsl_readl(&usb_dr_regs->usbcmd),
1003 fsl_readl(&usb_dr_regs->usbsts),
1004 fsl_readl(&usb_dr_regs->usbintr));
1005 size -= t;
1006 next += t;
1007
1008 /* State */
1009 t = scnprintf(next, size,
1010 "OTG state: %s\n\n",
1011 usb_otg_state_string(fsl_otg_dev->phy.otg->state));
1012 size -= t;
1013 next += t;
1014
1015 /* State Machine Variables */
1016 t = scnprintf(next, size,
1017 "a_bus_req: %d\n"
1018 "b_bus_req: %d\n"
1019 "a_bus_resume: %d\n"
1020 "a_bus_suspend: %d\n"
1021 "a_conn: %d\n"
1022 "a_sess_vld: %d\n"
1023 "a_srp_det: %d\n"
1024 "a_vbus_vld: %d\n"
1025 "b_bus_resume: %d\n"
1026 "b_bus_suspend: %d\n"
1027 "b_conn: %d\n"
1028 "b_se0_srp: %d\n"
1029 "b_ssend_srp: %d\n"
1030 "b_sess_vld: %d\n"
1031 "id: %d\n",
1032 fsm->a_bus_req,
1033 fsm->b_bus_req,
1034 fsm->a_bus_resume,
1035 fsm->a_bus_suspend,
1036 fsm->a_conn,
1037 fsm->a_sess_vld,
1038 fsm->a_srp_det,
1039 fsm->a_vbus_vld,
1040 fsm->b_bus_resume,
1041 fsm->b_bus_suspend,
1042 fsm->b_conn,
1043 fsm->b_se0_srp,
1044 fsm->b_ssend_srp,
1045 fsm->b_sess_vld,
1046 fsm->id);
1047 size -= t;
1048 next += t;
1049
1050 mutex_unlock(&fsm->lock);
1051
1052 return PAGE_SIZE - size;
1053 }
1054
1055 static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
1056
1057
1058 /* Char driver interface to control some OTG input */
1059
1060 /*
1061 * Handle some ioctl command, such as get otg
1062 * status and set host suspend
1063 */
1064 static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
1065 unsigned long arg)
1066 {
1067 u32 retval = 0;
1068
1069 switch (cmd) {
1070 case GET_OTG_STATUS:
1071 retval = fsl_otg_dev->host_working;
1072 break;
1073
1074 case SET_A_SUSPEND_REQ:
1075 fsl_otg_dev->fsm.a_suspend_req_inf = arg;
1076 break;
1077
1078 case SET_A_BUS_DROP:
1079 fsl_otg_dev->fsm.a_bus_drop = arg;
1080 break;
1081
1082 case SET_A_BUS_REQ:
1083 fsl_otg_dev->fsm.a_bus_req = arg;
1084 break;
1085
1086 case SET_B_BUS_REQ:
1087 fsl_otg_dev->fsm.b_bus_req = arg;
1088 break;
1089
1090 default:
1091 break;
1092 }
1093
1094 otg_statemachine(&fsl_otg_dev->fsm);
1095
1096 return retval;
1097 }
1098
1099 static int fsl_otg_open(struct inode *inode, struct file *file)
1100 {
1101 return 0;
1102 }
1103
1104 static int fsl_otg_release(struct inode *inode, struct file *file)
1105 {
1106 return 0;
1107 }
1108
1109 static const struct file_operations otg_fops = {
1110 .owner = THIS_MODULE,
1111 .llseek = NULL,
1112 .read = NULL,
1113 .write = NULL,
1114 .unlocked_ioctl = fsl_otg_ioctl,
1115 .open = fsl_otg_open,
1116 .release = fsl_otg_release,
1117 };
1118
1119 static int fsl_otg_probe(struct platform_device *pdev)
1120 {
1121 int ret;
1122
1123 if (!dev_get_platdata(&pdev->dev))
1124 return -ENODEV;
1125
1126 /* configure the OTG */
1127 ret = fsl_otg_conf(pdev);
1128 if (ret) {
1129 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
1130 return ret;
1131 }
1132
1133 /* start OTG */
1134 ret = usb_otg_start(pdev);
1135 if (ret) {
1136 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
1137 return ret;
1138 }
1139
1140 ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
1141 if (ret) {
1142 dev_err(&pdev->dev, "unable to register FSL OTG device\n");
1143 return ret;
1144 }
1145
1146 ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1147 if (ret)
1148 dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
1149
1150 return ret;
1151 }
1152
1153 static int fsl_otg_remove(struct platform_device *pdev)
1154 {
1155 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
1156
1157 usb_remove_phy(&fsl_otg_dev->phy);
1158 free_irq(fsl_otg_dev->irq, fsl_otg_dev);
1159
1160 iounmap((void *)usb_dr_regs);
1161
1162 fsl_otg_uninit_timers();
1163 kfree(fsl_otg_dev->phy.otg);
1164 kfree(fsl_otg_dev);
1165
1166 device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1167
1168 unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
1169
1170 if (pdata->exit)
1171 pdata->exit(pdev);
1172
1173 return 0;
1174 }
1175
1176 struct platform_driver fsl_otg_driver = {
1177 .probe = fsl_otg_probe,
1178 .remove = fsl_otg_remove,
1179 .driver = {
1180 .name = driver_name,
1181 .owner = THIS_MODULE,
1182 },
1183 };
1184
1185 module_platform_driver(fsl_otg_driver);
1186
1187 MODULE_DESCRIPTION(DRIVER_INFO);
1188 MODULE_AUTHOR(DRIVER_AUTHOR);
1189 MODULE_LICENSE("GPL");