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1 /*
2 * Driver for AT91/AT32 LCD Controller
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
22 #include <linux/platform_data/atmel.h>
23 #include <linux/of.h>
24 #include <linux/of_device.h>
25 #include <linux/of_gpio.h>
26 #include <video/of_display_timing.h>
27 #include <video/videomode.h>
28
29 #include <mach/cpu.h>
30 #include <asm/gpio.h>
31
32 #include <video/atmel_lcdc.h>
33
34 struct atmel_lcdfb_config {
35 bool have_alt_pixclock;
36 bool have_hozval;
37 bool have_intensity_bit;
38 };
39
40 /* LCD Controller info data structure, stored in device platform_data */
41 struct atmel_lcdfb_info {
42 spinlock_t lock;
43 struct fb_info *info;
44 void __iomem *mmio;
45 int irq_base;
46 struct work_struct task;
47
48 unsigned int smem_len;
49 struct platform_device *pdev;
50 struct clk *bus_clk;
51 struct clk *lcdc_clk;
52
53 struct backlight_device *backlight;
54 u8 bl_power;
55 u8 saved_lcdcon;
56
57 u32 pseudo_palette[16];
58 bool have_intensity_bit;
59
60 struct atmel_lcdfb_pdata pdata;
61
62 struct atmel_lcdfb_config *config;
63 };
64
65 struct atmel_lcdfb_power_ctrl_gpio {
66 int gpio;
67 int active_low;
68
69 struct list_head list;
70 };
71
72 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
73 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
74
75 /* configurable parameters */
76 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
77 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
78 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
79
80 static struct atmel_lcdfb_config at91sam9261_config = {
81 .have_hozval = true,
82 .have_intensity_bit = true,
83 };
84
85 static struct atmel_lcdfb_config at91sam9263_config = {
86 .have_intensity_bit = true,
87 };
88
89 static struct atmel_lcdfb_config at91sam9g10_config = {
90 .have_hozval = true,
91 };
92
93 static struct atmel_lcdfb_config at91sam9g45_config = {
94 .have_alt_pixclock = true,
95 };
96
97 static struct atmel_lcdfb_config at91sam9g45es_config = {
98 };
99
100 static struct atmel_lcdfb_config at91sam9rl_config = {
101 .have_intensity_bit = true,
102 };
103
104 static struct atmel_lcdfb_config at32ap_config = {
105 .have_hozval = true,
106 };
107
108 static const struct platform_device_id atmel_lcdfb_devtypes[] = {
109 {
110 .name = "at91sam9261-lcdfb",
111 .driver_data = (unsigned long)&at91sam9261_config,
112 }, {
113 .name = "at91sam9263-lcdfb",
114 .driver_data = (unsigned long)&at91sam9263_config,
115 }, {
116 .name = "at91sam9g10-lcdfb",
117 .driver_data = (unsigned long)&at91sam9g10_config,
118 }, {
119 .name = "at91sam9g45-lcdfb",
120 .driver_data = (unsigned long)&at91sam9g45_config,
121 }, {
122 .name = "at91sam9g45es-lcdfb",
123 .driver_data = (unsigned long)&at91sam9g45es_config,
124 }, {
125 .name = "at91sam9rl-lcdfb",
126 .driver_data = (unsigned long)&at91sam9rl_config,
127 }, {
128 .name = "at32ap-lcdfb",
129 .driver_data = (unsigned long)&at32ap_config,
130 }, {
131 /* terminator */
132 }
133 };
134
135 static struct atmel_lcdfb_config *
136 atmel_lcdfb_get_config(struct platform_device *pdev)
137 {
138 unsigned long data;
139
140 data = platform_get_device_id(pdev)->driver_data;
141
142 return (struct atmel_lcdfb_config *)data;
143 }
144
145 #if defined(CONFIG_ARCH_AT91)
146 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
147 | FBINFO_PARTIAL_PAN_OK \
148 | FBINFO_HWACCEL_YPAN)
149
150 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
151 struct fb_var_screeninfo *var,
152 struct fb_info *info)
153 {
154
155 }
156 #elif defined(CONFIG_AVR32)
157 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
158 | FBINFO_PARTIAL_PAN_OK \
159 | FBINFO_HWACCEL_XPAN \
160 | FBINFO_HWACCEL_YPAN)
161
162 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
163 struct fb_var_screeninfo *var,
164 struct fb_info *info)
165 {
166 u32 dma2dcfg;
167 u32 pixeloff;
168
169 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
170
171 dma2dcfg = (info->var.xres_virtual - info->var.xres)
172 * info->var.bits_per_pixel / 8;
173 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
174 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
175
176 /* Update configuration */
177 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
178 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
179 | ATMEL_LCDC_DMAUPDT);
180 }
181 #endif
182
183 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
184 | ATMEL_LCDC_POL_POSITIVE
185 | ATMEL_LCDC_ENA_PWMENABLE;
186
187 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
188
189 /* some bl->props field just changed */
190 static int atmel_bl_update_status(struct backlight_device *bl)
191 {
192 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
193 int power = sinfo->bl_power;
194 int brightness = bl->props.brightness;
195
196 /* REVISIT there may be a meaningful difference between
197 * fb_blank and power ... there seem to be some cases
198 * this doesn't handle correctly.
199 */
200 if (bl->props.fb_blank != sinfo->bl_power)
201 power = bl->props.fb_blank;
202 else if (bl->props.power != sinfo->bl_power)
203 power = bl->props.power;
204
205 if (brightness < 0 && power == FB_BLANK_UNBLANK)
206 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
207 else if (power != FB_BLANK_UNBLANK)
208 brightness = 0;
209
210 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
211 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
212 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
213 brightness ? contrast_ctr : 0);
214 else
215 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
216
217 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
218
219 return 0;
220 }
221
222 static int atmel_bl_get_brightness(struct backlight_device *bl)
223 {
224 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
225
226 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
227 }
228
229 static const struct backlight_ops atmel_lcdc_bl_ops = {
230 .update_status = atmel_bl_update_status,
231 .get_brightness = atmel_bl_get_brightness,
232 };
233
234 static void init_backlight(struct atmel_lcdfb_info *sinfo)
235 {
236 struct backlight_properties props;
237 struct backlight_device *bl;
238
239 sinfo->bl_power = FB_BLANK_UNBLANK;
240
241 if (sinfo->backlight)
242 return;
243
244 memset(&props, 0, sizeof(struct backlight_properties));
245 props.type = BACKLIGHT_RAW;
246 props.max_brightness = 0xff;
247 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
248 &atmel_lcdc_bl_ops, &props);
249 if (IS_ERR(bl)) {
250 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
251 PTR_ERR(bl));
252 return;
253 }
254 sinfo->backlight = bl;
255
256 bl->props.power = FB_BLANK_UNBLANK;
257 bl->props.fb_blank = FB_BLANK_UNBLANK;
258 bl->props.brightness = atmel_bl_get_brightness(bl);
259 }
260
261 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
262 {
263 if (!sinfo->backlight)
264 return;
265
266 if (sinfo->backlight->ops) {
267 sinfo->backlight->props.power = FB_BLANK_POWERDOWN;
268 sinfo->backlight->ops->update_status(sinfo->backlight);
269 }
270 backlight_device_unregister(sinfo->backlight);
271 }
272
273 #else
274
275 static void init_backlight(struct atmel_lcdfb_info *sinfo)
276 {
277 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
278 }
279
280 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
281 {
282 }
283
284 #endif
285
286 static void init_contrast(struct atmel_lcdfb_info *sinfo)
287 {
288 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
289
290 /* contrast pwm can be 'inverted' */
291 if (pdata->lcdcon_pol_negative)
292 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
293
294 /* have some default contrast/backlight settings */
295 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
296 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
297
298 if (pdata->lcdcon_is_backlight)
299 init_backlight(sinfo);
300 }
301
302 static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)
303 {
304 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
305
306 if (pdata->atmel_lcdfb_power_control)
307 pdata->atmel_lcdfb_power_control(pdata, on);
308 }
309
310 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
311 .type = FB_TYPE_PACKED_PIXELS,
312 .visual = FB_VISUAL_TRUECOLOR,
313 .xpanstep = 0,
314 .ypanstep = 1,
315 .ywrapstep = 0,
316 .accel = FB_ACCEL_NONE,
317 };
318
319 static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
320 unsigned long xres)
321 {
322 unsigned long lcdcon2;
323 unsigned long value;
324
325 if (!sinfo->config->have_hozval)
326 return xres;
327
328 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
329 value = xres;
330 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
331 /* STN display */
332 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
333 value *= 3;
334 }
335 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
336 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
337 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
338 value = DIV_ROUND_UP(value, 4);
339 else
340 value = DIV_ROUND_UP(value, 8);
341 }
342
343 return value;
344 }
345
346 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
347 {
348 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
349
350 /* Turn off the LCD controller and the DMA controller */
351 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
352 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
353
354 /* Wait for the LCDC core to become idle */
355 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
356 msleep(10);
357
358 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
359 }
360
361 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
362 {
363 atmel_lcdfb_stop_nowait(sinfo);
364
365 /* Wait for DMA engine to become idle... */
366 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
367 msleep(10);
368 }
369
370 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
371 {
372 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
373
374 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);
375 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
376 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
377 | ATMEL_LCDC_PWR);
378 }
379
380 static void atmel_lcdfb_update_dma(struct fb_info *info,
381 struct fb_var_screeninfo *var)
382 {
383 struct atmel_lcdfb_info *sinfo = info->par;
384 struct fb_fix_screeninfo *fix = &info->fix;
385 unsigned long dma_addr;
386
387 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
388 + var->xoffset * info->var.bits_per_pixel / 8);
389
390 dma_addr &= ~3UL;
391
392 /* Set framebuffer DMA base address and pixel offset */
393 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
394
395 atmel_lcdfb_update_dma2d(sinfo, var, info);
396 }
397
398 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
399 {
400 struct fb_info *info = sinfo->info;
401
402 dma_free_writecombine(info->device, info->fix.smem_len,
403 info->screen_base, info->fix.smem_start);
404 }
405
406 /**
407 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
408 * @sinfo: the frame buffer to allocate memory for
409 *
410 * This function is called only from the atmel_lcdfb_probe()
411 * so no locking by fb_info->mm_lock around smem_len setting is needed.
412 */
413 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
414 {
415 struct fb_info *info = sinfo->info;
416 struct fb_var_screeninfo *var = &info->var;
417 unsigned int smem_len;
418
419 smem_len = (var->xres_virtual * var->yres_virtual
420 * ((var->bits_per_pixel + 7) / 8));
421 info->fix.smem_len = max(smem_len, sinfo->smem_len);
422
423 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
424 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
425
426 if (!info->screen_base) {
427 return -ENOMEM;
428 }
429
430 memset(info->screen_base, 0, info->fix.smem_len);
431
432 return 0;
433 }
434
435 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
436 struct fb_info *info)
437 {
438 struct fb_videomode varfbmode;
439 const struct fb_videomode *fbmode = NULL;
440
441 fb_var_to_videomode(&varfbmode, var);
442 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
443 if (fbmode)
444 fb_videomode_to_var(var, fbmode);
445 return fbmode;
446 }
447
448
449 /**
450 * atmel_lcdfb_check_var - Validates a var passed in.
451 * @var: frame buffer variable screen structure
452 * @info: frame buffer structure that represents a single frame buffer
453 *
454 * Checks to see if the hardware supports the state requested by
455 * var passed in. This function does not alter the hardware
456 * state!!! This means the data stored in struct fb_info and
457 * struct atmel_lcdfb_info do not change. This includes the var
458 * inside of struct fb_info. Do NOT change these. This function
459 * can be called on its own if we intent to only test a mode and
460 * not actually set it. The stuff in modedb.c is a example of
461 * this. If the var passed in is slightly off by what the
462 * hardware can support then we alter the var PASSED in to what
463 * we can do. If the hardware doesn't support mode change a
464 * -EINVAL will be returned by the upper layers. You don't need
465 * to implement this function then. If you hardware doesn't
466 * support changing the resolution then this function is not
467 * needed. In this case the driver would just provide a var that
468 * represents the static state the screen is in.
469 *
470 * Returns negative errno on error, or zero on success.
471 */
472 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
473 struct fb_info *info)
474 {
475 struct device *dev = info->device;
476 struct atmel_lcdfb_info *sinfo = info->par;
477 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
478 unsigned long clk_value_khz;
479
480 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
481
482 dev_dbg(dev, "%s:\n", __func__);
483
484 if (!(var->pixclock && var->bits_per_pixel)) {
485 /* choose a suitable mode if possible */
486 if (!atmel_lcdfb_choose_mode(var, info)) {
487 dev_err(dev, "needed value not specified\n");
488 return -EINVAL;
489 }
490 }
491
492 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
493 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
494 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
495 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
496
497 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
498 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
499 return -EINVAL;
500 }
501
502 /* Do not allow to have real resoulution larger than virtual */
503 if (var->xres > var->xres_virtual)
504 var->xres_virtual = var->xres;
505
506 if (var->yres > var->yres_virtual)
507 var->yres_virtual = var->yres;
508
509 /* Force same alignment for each line */
510 var->xres = (var->xres + 3) & ~3UL;
511 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
512
513 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
514 var->transp.msb_right = 0;
515 var->transp.offset = var->transp.length = 0;
516 var->xoffset = var->yoffset = 0;
517
518 if (info->fix.smem_len) {
519 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
520 * ((var->bits_per_pixel + 7) / 8));
521 if (smem_len > info->fix.smem_len) {
522 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
523 info->fix.smem_len, smem_len);
524 return -EINVAL;
525 }
526 }
527
528 /* Saturate vertical and horizontal timings at maximum values */
529 var->vsync_len = min_t(u32, var->vsync_len,
530 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
531 var->upper_margin = min_t(u32, var->upper_margin,
532 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
533 var->lower_margin = min_t(u32, var->lower_margin,
534 ATMEL_LCDC_VFP);
535 var->right_margin = min_t(u32, var->right_margin,
536 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
537 var->hsync_len = min_t(u32, var->hsync_len,
538 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
539 var->left_margin = min_t(u32, var->left_margin,
540 ATMEL_LCDC_HBP + 1);
541
542 /* Some parameters can't be zero */
543 var->vsync_len = max_t(u32, var->vsync_len, 1);
544 var->right_margin = max_t(u32, var->right_margin, 1);
545 var->hsync_len = max_t(u32, var->hsync_len, 1);
546 var->left_margin = max_t(u32, var->left_margin, 1);
547
548 switch (var->bits_per_pixel) {
549 case 1:
550 case 2:
551 case 4:
552 case 8:
553 var->red.offset = var->green.offset = var->blue.offset = 0;
554 var->red.length = var->green.length = var->blue.length
555 = var->bits_per_pixel;
556 break;
557 case 16:
558 /* Older SOCs use IBGR:555 rather than BGR:565. */
559 if (sinfo->config->have_intensity_bit)
560 var->green.length = 5;
561 else
562 var->green.length = 6;
563
564 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
565 /* RGB:5X5 mode */
566 var->red.offset = var->green.length + 5;
567 var->blue.offset = 0;
568 } else {
569 /* BGR:5X5 mode */
570 var->red.offset = 0;
571 var->blue.offset = var->green.length + 5;
572 }
573 var->green.offset = 5;
574 var->red.length = var->blue.length = 5;
575 break;
576 case 32:
577 var->transp.offset = 24;
578 var->transp.length = 8;
579 /* fall through */
580 case 24:
581 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
582 /* RGB:888 mode */
583 var->red.offset = 16;
584 var->blue.offset = 0;
585 } else {
586 /* BGR:888 mode */
587 var->red.offset = 0;
588 var->blue.offset = 16;
589 }
590 var->green.offset = 8;
591 var->red.length = var->green.length = var->blue.length = 8;
592 break;
593 default:
594 dev_err(dev, "color depth %d not supported\n",
595 var->bits_per_pixel);
596 return -EINVAL;
597 }
598
599 return 0;
600 }
601
602 /*
603 * LCD reset sequence
604 */
605 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
606 {
607 might_sleep();
608
609 atmel_lcdfb_stop(sinfo);
610 atmel_lcdfb_start(sinfo);
611 }
612
613 /**
614 * atmel_lcdfb_set_par - Alters the hardware state.
615 * @info: frame buffer structure that represents a single frame buffer
616 *
617 * Using the fb_var_screeninfo in fb_info we set the resolution
618 * of the this particular framebuffer. This function alters the
619 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
620 * not alter var in fb_info since we are using that data. This
621 * means we depend on the data in var inside fb_info to be
622 * supported by the hardware. atmel_lcdfb_check_var is always called
623 * before atmel_lcdfb_set_par to ensure this. Again if you can't
624 * change the resolution you don't need this function.
625 *
626 */
627 static int atmel_lcdfb_set_par(struct fb_info *info)
628 {
629 struct atmel_lcdfb_info *sinfo = info->par;
630 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
631 unsigned long hozval_linesz;
632 unsigned long value;
633 unsigned long clk_value_khz;
634 unsigned long bits_per_line;
635 unsigned long pix_factor = 2;
636
637 might_sleep();
638
639 dev_dbg(info->device, "%s:\n", __func__);
640 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
641 info->var.xres, info->var.yres,
642 info->var.xres_virtual, info->var.yres_virtual);
643
644 atmel_lcdfb_stop_nowait(sinfo);
645
646 if (info->var.bits_per_pixel == 1)
647 info->fix.visual = FB_VISUAL_MONO01;
648 else if (info->var.bits_per_pixel <= 8)
649 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
650 else
651 info->fix.visual = FB_VISUAL_TRUECOLOR;
652
653 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
654 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
655
656 /* Re-initialize the DMA engine... */
657 dev_dbg(info->device, " * update DMA engine\n");
658 atmel_lcdfb_update_dma(info, &info->var);
659
660 /* ...set frame size and burst length = 8 words (?) */
661 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
662 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
663 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
664
665 /* Now, the LCDC core... */
666
667 /* Set pixel clock */
668 if (sinfo->config->have_alt_pixclock)
669 pix_factor = 1;
670
671 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
672
673 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
674
675 if (value < pix_factor) {
676 dev_notice(info->device, "Bypassing pixel clock divider\n");
677 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
678 } else {
679 value = (value / pix_factor) - 1;
680 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
681 value);
682 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
683 value << ATMEL_LCDC_CLKVAL_OFFSET);
684 info->var.pixclock =
685 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
686 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
687 PICOS2KHZ(info->var.pixclock));
688 }
689
690
691 /* Initialize control register 2 */
692 value = pdata->default_lcdcon2;
693
694 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
695 value |= ATMEL_LCDC_INVLINE_INVERTED;
696 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
697 value |= ATMEL_LCDC_INVFRAME_INVERTED;
698
699 switch (info->var.bits_per_pixel) {
700 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
701 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
702 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
703 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
704 case 15: /* fall through */
705 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
706 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
707 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
708 default: BUG(); break;
709 }
710 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
711 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
712
713 /* Vertical timing */
714 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
715 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
716 value |= info->var.lower_margin;
717 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
718 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
719
720 /* Horizontal timing */
721 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
722 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
723 value |= (info->var.left_margin - 1);
724 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
725 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
726
727 /* Horizontal value (aka line size) */
728 hozval_linesz = compute_hozval(sinfo, info->var.xres);
729
730 /* Display size */
731 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
732 value |= info->var.yres - 1;
733 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
734 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
735
736 /* FIFO Threshold: Use formula from data sheet */
737 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
738 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
739
740 /* Toggle LCD_MODE every frame */
741 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
742
743 /* Disable all interrupts */
744 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
745 /* Enable FIFO & DMA errors */
746 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
747
748 /* ...wait for DMA engine to become idle... */
749 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
750 msleep(10);
751
752 atmel_lcdfb_start(sinfo);
753
754 dev_dbg(info->device, " * DONE\n");
755
756 return 0;
757 }
758
759 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
760 {
761 chan &= 0xffff;
762 chan >>= 16 - bf->length;
763 return chan << bf->offset;
764 }
765
766 /**
767 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
768 * @regno: Which register in the CLUT we are programming
769 * @red: The red value which can be up to 16 bits wide
770 * @green: The green value which can be up to 16 bits wide
771 * @blue: The blue value which can be up to 16 bits wide.
772 * @transp: If supported the alpha value which can be up to 16 bits wide.
773 * @info: frame buffer info structure
774 *
775 * Set a single color register. The values supplied have a 16 bit
776 * magnitude which needs to be scaled in this function for the hardware.
777 * Things to take into consideration are how many color registers, if
778 * any, are supported with the current color visual. With truecolor mode
779 * no color palettes are supported. Here a pseudo palette is created
780 * which we store the value in pseudo_palette in struct fb_info. For
781 * pseudocolor mode we have a limited color palette. To deal with this
782 * we can program what color is displayed for a particular pixel value.
783 * DirectColor is similar in that we can program each color field. If
784 * we have a static colormap we don't need to implement this function.
785 *
786 * Returns negative errno on error, or zero on success. In an
787 * ideal world, this would have been the case, but as it turns
788 * out, the other drivers return 1 on failure, so that's what
789 * we're going to do.
790 */
791 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
792 unsigned int green, unsigned int blue,
793 unsigned int transp, struct fb_info *info)
794 {
795 struct atmel_lcdfb_info *sinfo = info->par;
796 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
797 unsigned int val;
798 u32 *pal;
799 int ret = 1;
800
801 if (info->var.grayscale)
802 red = green = blue = (19595 * red + 38470 * green
803 + 7471 * blue) >> 16;
804
805 switch (info->fix.visual) {
806 case FB_VISUAL_TRUECOLOR:
807 if (regno < 16) {
808 pal = info->pseudo_palette;
809
810 val = chan_to_field(red, &info->var.red);
811 val |= chan_to_field(green, &info->var.green);
812 val |= chan_to_field(blue, &info->var.blue);
813
814 pal[regno] = val;
815 ret = 0;
816 }
817 break;
818
819 case FB_VISUAL_PSEUDOCOLOR:
820 if (regno < 256) {
821 if (sinfo->config->have_intensity_bit) {
822 /* old style I+BGR:555 */
823 val = ((red >> 11) & 0x001f);
824 val |= ((green >> 6) & 0x03e0);
825 val |= ((blue >> 1) & 0x7c00);
826
827 /*
828 * TODO: intensity bit. Maybe something like
829 * ~(red[10] ^ green[10] ^ blue[10]) & 1
830 */
831 } else {
832 /* new style BGR:565 / RGB:565 */
833 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
834 val = ((blue >> 11) & 0x001f);
835 val |= ((red >> 0) & 0xf800);
836 } else {
837 val = ((red >> 11) & 0x001f);
838 val |= ((blue >> 0) & 0xf800);
839 }
840
841 val |= ((green >> 5) & 0x07e0);
842 }
843
844 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
845 ret = 0;
846 }
847 break;
848
849 case FB_VISUAL_MONO01:
850 if (regno < 2) {
851 val = (regno == 0) ? 0x00 : 0x1F;
852 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
853 ret = 0;
854 }
855 break;
856
857 }
858
859 return ret;
860 }
861
862 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
863 struct fb_info *info)
864 {
865 dev_dbg(info->device, "%s\n", __func__);
866
867 atmel_lcdfb_update_dma(info, var);
868
869 return 0;
870 }
871
872 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
873 {
874 struct atmel_lcdfb_info *sinfo = info->par;
875
876 switch (blank_mode) {
877 case FB_BLANK_UNBLANK:
878 case FB_BLANK_NORMAL:
879 atmel_lcdfb_start(sinfo);
880 break;
881 case FB_BLANK_VSYNC_SUSPEND:
882 case FB_BLANK_HSYNC_SUSPEND:
883 break;
884 case FB_BLANK_POWERDOWN:
885 atmel_lcdfb_stop(sinfo);
886 break;
887 default:
888 return -EINVAL;
889 }
890
891 /* let fbcon do a soft blank for us */
892 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
893 }
894
895 static struct fb_ops atmel_lcdfb_ops = {
896 .owner = THIS_MODULE,
897 .fb_check_var = atmel_lcdfb_check_var,
898 .fb_set_par = atmel_lcdfb_set_par,
899 .fb_setcolreg = atmel_lcdfb_setcolreg,
900 .fb_blank = atmel_lcdfb_blank,
901 .fb_pan_display = atmel_lcdfb_pan_display,
902 .fb_fillrect = cfb_fillrect,
903 .fb_copyarea = cfb_copyarea,
904 .fb_imageblit = cfb_imageblit,
905 };
906
907 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
908 {
909 struct fb_info *info = dev_id;
910 struct atmel_lcdfb_info *sinfo = info->par;
911 u32 status;
912
913 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
914 if (status & ATMEL_LCDC_UFLWI) {
915 dev_warn(info->device, "FIFO underflow %#x\n", status);
916 /* reset DMA and FIFO to avoid screen shifting */
917 schedule_work(&sinfo->task);
918 }
919 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
920 return IRQ_HANDLED;
921 }
922
923 /*
924 * LCD controller task (to reset the LCD)
925 */
926 static void atmel_lcdfb_task(struct work_struct *work)
927 {
928 struct atmel_lcdfb_info *sinfo =
929 container_of(work, struct atmel_lcdfb_info, task);
930
931 atmel_lcdfb_reset(sinfo);
932 }
933
934 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
935 {
936 struct fb_info *info = sinfo->info;
937 int ret = 0;
938
939 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
940
941 dev_info(info->device,
942 "%luKiB frame buffer at %08lx (mapped at %p)\n",
943 (unsigned long)info->fix.smem_len / 1024,
944 (unsigned long)info->fix.smem_start,
945 info->screen_base);
946
947 /* Allocate colormap */
948 ret = fb_alloc_cmap(&info->cmap, 256, 0);
949 if (ret < 0)
950 dev_err(info->device, "Alloc color map failed\n");
951
952 return ret;
953 }
954
955 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
956 {
957 clk_prepare_enable(sinfo->bus_clk);
958 clk_prepare_enable(sinfo->lcdc_clk);
959 }
960
961 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
962 {
963 clk_disable_unprepare(sinfo->bus_clk);
964 clk_disable_unprepare(sinfo->lcdc_clk);
965 }
966
967 #ifdef CONFIG_OF
968 static const struct of_device_id atmel_lcdfb_dt_ids[] = {
969 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },
970 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },
971 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },
972 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },
973 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },
974 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },
975 { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, },
976 { /* sentinel */ }
977 };
978
979 MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids);
980
981 static const char *atmel_lcdfb_wiring_modes[] = {
982 [ATMEL_LCDC_WIRING_BGR] = "BRG",
983 [ATMEL_LCDC_WIRING_RGB] = "RGB",
984 };
985
986 const int atmel_lcdfb_get_of_wiring_modes(struct device_node *np)
987 {
988 const char *mode;
989 int err, i;
990
991 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode);
992 if (err < 0)
993 return ATMEL_LCDC_WIRING_BGR;
994
995 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++)
996 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i]))
997 return i;
998
999 return -ENODEV;
1000 }
1001
1002 static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on)
1003 {
1004 struct atmel_lcdfb_power_ctrl_gpio *og;
1005
1006 list_for_each_entry(og, &pdata->pwr_gpios, list)
1007 gpio_set_value(og->gpio, on);
1008 }
1009
1010 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
1011 {
1012 struct fb_info *info = sinfo->info;
1013 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
1014 struct fb_var_screeninfo *var = &info->var;
1015 struct device *dev = &sinfo->pdev->dev;
1016 struct device_node *np =dev->of_node;
1017 struct device_node *display_np;
1018 struct device_node *timings_np;
1019 struct display_timings *timings;
1020 enum of_gpio_flags flags;
1021 struct atmel_lcdfb_power_ctrl_gpio *og;
1022 bool is_gpio_power = false;
1023 int ret = -ENOENT;
1024 int i, gpio;
1025
1026 sinfo->config = (struct atmel_lcdfb_config*)
1027 of_match_device(atmel_lcdfb_dt_ids, dev)->data;
1028
1029 display_np = of_parse_phandle(np, "display", 0);
1030 if (!display_np) {
1031 dev_err(dev, "failed to find display phandle\n");
1032 return -ENOENT;
1033 }
1034
1035 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel);
1036 if (ret < 0) {
1037 dev_err(dev, "failed to get property bits-per-pixel\n");
1038 goto put_display_node;
1039 }
1040
1041 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time);
1042 if (ret < 0) {
1043 dev_err(dev, "failed to get property atmel,guard-time\n");
1044 goto put_display_node;
1045 }
1046
1047 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2);
1048 if (ret < 0) {
1049 dev_err(dev, "failed to get property atmel,lcdcon2\n");
1050 goto put_display_node;
1051 }
1052
1053 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon);
1054 if (ret < 0) {
1055 dev_err(dev, "failed to get property bits-per-pixel\n");
1056 goto put_display_node;
1057 }
1058
1059 ret = -ENOMEM;
1060 for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) {
1061 gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio",
1062 i, &flags);
1063 if (gpio < 0)
1064 continue;
1065
1066 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);
1067 if (!og)
1068 goto put_display_node;
1069
1070 og->gpio = gpio;
1071 og->active_low = flags & OF_GPIO_ACTIVE_LOW;
1072 is_gpio_power = true;
1073 ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio");
1074 if (ret) {
1075 dev_err(dev, "request gpio %d failed\n", gpio);
1076 goto put_display_node;
1077 }
1078
1079 ret = gpio_direction_output(gpio, og->active_low);
1080 if (ret) {
1081 dev_err(dev, "set direction output gpio %d failed\n", gpio);
1082 goto put_display_node;
1083 }
1084 }
1085
1086 if (is_gpio_power)
1087 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio;
1088
1089 ret = atmel_lcdfb_get_of_wiring_modes(display_np);
1090 if (ret < 0) {
1091 dev_err(dev, "invalid atmel,lcd-wiring-mode\n");
1092 goto put_display_node;
1093 }
1094 pdata->lcd_wiring_mode = ret;
1095
1096 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight");
1097
1098 timings = of_get_display_timings(display_np);
1099 if (!timings) {
1100 dev_err(dev, "failed to get display timings\n");
1101 goto put_display_node;
1102 }
1103
1104 timings_np = of_find_node_by_name(display_np, "display-timings");
1105 if (!timings_np) {
1106 dev_err(dev, "failed to find display-timings node\n");
1107 goto put_display_node;
1108 }
1109
1110 for (i = 0; i < of_get_child_count(timings_np); i++) {
1111 struct videomode vm;
1112 struct fb_videomode fb_vm;
1113
1114 ret = videomode_from_timings(timings, &vm, i);
1115 if (ret < 0)
1116 goto put_timings_node;
1117 ret = fb_videomode_from_videomode(&vm, &fb_vm);
1118 if (ret < 0)
1119 goto put_timings_node;
1120
1121 fb_add_videomode(&fb_vm, &info->modelist);
1122 }
1123
1124 return 0;
1125
1126 put_timings_node:
1127 of_node_put(timings_np);
1128 put_display_node:
1129 of_node_put(display_np);
1130 return ret;
1131 }
1132 #else
1133 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
1134 {
1135 return 0;
1136 }
1137 #endif
1138
1139 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
1140 {
1141 struct device *dev = &pdev->dev;
1142 struct fb_info *info;
1143 struct atmel_lcdfb_info *sinfo;
1144 struct atmel_lcdfb_pdata *pdata = NULL;
1145 struct resource *regs = NULL;
1146 struct resource *map = NULL;
1147 struct fb_modelist *modelist;
1148 int ret;
1149
1150 dev_dbg(dev, "%s BEGIN\n", __func__);
1151
1152 ret = -ENOMEM;
1153 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
1154 if (!info) {
1155 dev_err(dev, "cannot allocate memory\n");
1156 goto out;
1157 }
1158
1159 sinfo = info->par;
1160 sinfo->pdev = pdev;
1161 sinfo->info = info;
1162
1163 INIT_LIST_HEAD(&info->modelist);
1164
1165 if (pdev->dev.of_node) {
1166 ret = atmel_lcdfb_of_init(sinfo);
1167 if (ret)
1168 goto free_info;
1169 } else if (dev_get_platdata(dev)) {
1170 struct fb_monspecs *monspecs;
1171 int i;
1172
1173 pdata = dev_get_platdata(dev);
1174 monspecs = pdata->default_monspecs;
1175 sinfo->pdata = *pdata;
1176
1177 for (i = 0; i < monspecs->modedb_len; i++)
1178 fb_add_videomode(&monspecs->modedb[i], &info->modelist);
1179
1180 sinfo->config = atmel_lcdfb_get_config(pdev);
1181
1182 info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
1183 memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs));
1184 } else {
1185 dev_err(dev, "cannot get default configuration\n");
1186 goto free_info;
1187 }
1188
1189 if (!sinfo->config)
1190 goto free_info;
1191
1192 strcpy(info->fix.id, sinfo->pdev->name);
1193 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
1194 info->pseudo_palette = sinfo->pseudo_palette;
1195 info->fbops = &atmel_lcdfb_ops;
1196
1197 info->fix = atmel_lcdfb_fix;
1198
1199 /* Enable LCDC Clocks */
1200 sinfo->bus_clk = clk_get(dev, "hclk");
1201 if (IS_ERR(sinfo->bus_clk)) {
1202 ret = PTR_ERR(sinfo->bus_clk);
1203 goto free_info;
1204 }
1205 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
1206 if (IS_ERR(sinfo->lcdc_clk)) {
1207 ret = PTR_ERR(sinfo->lcdc_clk);
1208 goto put_bus_clk;
1209 }
1210 atmel_lcdfb_start_clock(sinfo);
1211
1212 modelist = list_first_entry(&info->modelist,
1213 struct fb_modelist, list);
1214 fb_videomode_to_var(&info->var, &modelist->mode);
1215
1216 atmel_lcdfb_check_var(&info->var, info);
1217
1218 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1219 if (!regs) {
1220 dev_err(dev, "resources unusable\n");
1221 ret = -ENXIO;
1222 goto stop_clk;
1223 }
1224
1225 sinfo->irq_base = platform_get_irq(pdev, 0);
1226 if (sinfo->irq_base < 0) {
1227 dev_err(dev, "unable to get irq\n");
1228 ret = sinfo->irq_base;
1229 goto stop_clk;
1230 }
1231
1232 /* Initialize video memory */
1233 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1234 if (map) {
1235 /* use a pre-allocated memory buffer */
1236 info->fix.smem_start = map->start;
1237 info->fix.smem_len = resource_size(map);
1238 if (!request_mem_region(info->fix.smem_start,
1239 info->fix.smem_len, pdev->name)) {
1240 ret = -EBUSY;
1241 goto stop_clk;
1242 }
1243
1244 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
1245 if (!info->screen_base) {
1246 ret = -ENOMEM;
1247 goto release_intmem;
1248 }
1249
1250 /*
1251 * Don't clear the framebuffer -- someone may have set
1252 * up a splash image.
1253 */
1254 } else {
1255 /* allocate memory buffer */
1256 ret = atmel_lcdfb_alloc_video_memory(sinfo);
1257 if (ret < 0) {
1258 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
1259 goto stop_clk;
1260 }
1261 }
1262
1263 /* LCDC registers */
1264 info->fix.mmio_start = regs->start;
1265 info->fix.mmio_len = resource_size(regs);
1266
1267 if (!request_mem_region(info->fix.mmio_start,
1268 info->fix.mmio_len, pdev->name)) {
1269 ret = -EBUSY;
1270 goto free_fb;
1271 }
1272
1273 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
1274 if (!sinfo->mmio) {
1275 dev_err(dev, "cannot map LCDC registers\n");
1276 ret = -ENOMEM;
1277 goto release_mem;
1278 }
1279
1280 /* Initialize PWM for contrast or backlight ("off") */
1281 init_contrast(sinfo);
1282
1283 /* interrupt */
1284 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
1285 if (ret) {
1286 dev_err(dev, "request_irq failed: %d\n", ret);
1287 goto unmap_mmio;
1288 }
1289
1290 /* Some operations on the LCDC might sleep and
1291 * require a preemptible task context */
1292 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
1293
1294 ret = atmel_lcdfb_init_fbinfo(sinfo);
1295 if (ret < 0) {
1296 dev_err(dev, "init fbinfo failed: %d\n", ret);
1297 goto unregister_irqs;
1298 }
1299
1300 dev_set_drvdata(dev, info);
1301
1302 /*
1303 * Tell the world that we're ready to go
1304 */
1305 ret = register_framebuffer(info);
1306 if (ret < 0) {
1307 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1308 goto reset_drvdata;
1309 }
1310
1311 /* Power up the LCDC screen */
1312 atmel_lcdfb_power_control(sinfo, 1);
1313
1314 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1315 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1316
1317 return 0;
1318
1319 reset_drvdata:
1320 dev_set_drvdata(dev, NULL);
1321 fb_dealloc_cmap(&info->cmap);
1322 unregister_irqs:
1323 cancel_work_sync(&sinfo->task);
1324 free_irq(sinfo->irq_base, info);
1325 unmap_mmio:
1326 exit_backlight(sinfo);
1327 iounmap(sinfo->mmio);
1328 release_mem:
1329 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1330 free_fb:
1331 if (map)
1332 iounmap(info->screen_base);
1333 else
1334 atmel_lcdfb_free_video_memory(sinfo);
1335
1336 release_intmem:
1337 if (map)
1338 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1339 stop_clk:
1340 atmel_lcdfb_stop_clock(sinfo);
1341 clk_put(sinfo->lcdc_clk);
1342 put_bus_clk:
1343 clk_put(sinfo->bus_clk);
1344 free_info:
1345 framebuffer_release(info);
1346 out:
1347 dev_dbg(dev, "%s FAILED\n", __func__);
1348 return ret;
1349 }
1350
1351 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1352 {
1353 struct device *dev = &pdev->dev;
1354 struct fb_info *info = dev_get_drvdata(dev);
1355 struct atmel_lcdfb_info *sinfo;
1356 struct atmel_lcdfb_pdata *pdata;
1357
1358 if (!info || !info->par)
1359 return 0;
1360 sinfo = info->par;
1361 pdata = &sinfo->pdata;
1362
1363 cancel_work_sync(&sinfo->task);
1364 exit_backlight(sinfo);
1365 atmel_lcdfb_power_control(sinfo, 0);
1366 unregister_framebuffer(info);
1367 atmel_lcdfb_stop_clock(sinfo);
1368 clk_put(sinfo->lcdc_clk);
1369 clk_put(sinfo->bus_clk);
1370 fb_dealloc_cmap(&info->cmap);
1371 free_irq(sinfo->irq_base, info);
1372 iounmap(sinfo->mmio);
1373 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1374 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1375 iounmap(info->screen_base);
1376 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1377 } else {
1378 atmel_lcdfb_free_video_memory(sinfo);
1379 }
1380
1381 framebuffer_release(info);
1382
1383 return 0;
1384 }
1385
1386 #ifdef CONFIG_PM
1387
1388 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1389 {
1390 struct fb_info *info = platform_get_drvdata(pdev);
1391 struct atmel_lcdfb_info *sinfo = info->par;
1392
1393 /*
1394 * We don't want to handle interrupts while the clock is
1395 * stopped. It may take forever.
1396 */
1397 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1398
1399 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1400 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1401 atmel_lcdfb_power_control(sinfo, 0);
1402 atmel_lcdfb_stop(sinfo);
1403 atmel_lcdfb_stop_clock(sinfo);
1404
1405 return 0;
1406 }
1407
1408 static int atmel_lcdfb_resume(struct platform_device *pdev)
1409 {
1410 struct fb_info *info = platform_get_drvdata(pdev);
1411 struct atmel_lcdfb_info *sinfo = info->par;
1412
1413 atmel_lcdfb_start_clock(sinfo);
1414 atmel_lcdfb_start(sinfo);
1415 atmel_lcdfb_power_control(sinfo, 1);
1416 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1417
1418 /* Enable FIFO & DMA errors */
1419 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1420 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1421
1422 return 0;
1423 }
1424
1425 #else
1426 #define atmel_lcdfb_suspend NULL
1427 #define atmel_lcdfb_resume NULL
1428 #endif
1429
1430 static struct platform_driver atmel_lcdfb_driver = {
1431 .remove = __exit_p(atmel_lcdfb_remove),
1432 .suspend = atmel_lcdfb_suspend,
1433 .resume = atmel_lcdfb_resume,
1434 .id_table = atmel_lcdfb_devtypes,
1435 .driver = {
1436 .name = "atmel_lcdfb",
1437 .owner = THIS_MODULE,
1438 .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids),
1439 },
1440 };
1441
1442 module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
1443
1444 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1445 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1446 MODULE_LICENSE("GPL");