1 /* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
8 * Driver layout based loosely on tgafb.c, see that file for credits.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/string.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
23 #include <asm/oplib.h>
32 static int cg6_setcolreg(unsigned, unsigned, unsigned, unsigned,
33 unsigned, struct fb_info
*);
34 static int cg6_blank(int, struct fb_info
*);
36 static void cg6_imageblit(struct fb_info
*, const struct fb_image
*);
37 static void cg6_fillrect(struct fb_info
*, const struct fb_fillrect
*);
38 static int cg6_sync(struct fb_info
*);
39 static int cg6_mmap(struct fb_info
*, struct file
*, struct vm_area_struct
*);
40 static int cg6_ioctl(struct inode
*, struct file
*, unsigned int,
41 unsigned long, struct fb_info
*);
44 * Frame buffer operations
47 static struct fb_ops cg6_ops
= {
49 .fb_setcolreg
= cg6_setcolreg
,
50 .fb_blank
= cg6_blank
,
51 .fb_fillrect
= cg6_fillrect
,
52 .fb_copyarea
= cfb_copyarea
,
53 .fb_imageblit
= cg6_imageblit
,
56 .fb_ioctl
= cg6_ioctl
,
59 /* Offset of interesting structures in the OBIO space */
61 * Brooktree is the video dac and is funny to program on the cg6.
62 * (it's even funnier on the cg3)
63 * The FBC could be the frame buffer control
64 * The FHC could is the frame buffer hardware control.
66 #define CG6_ROM_OFFSET 0x0UL
67 #define CG6_BROOKTREE_OFFSET 0x200000UL
68 #define CG6_DHC_OFFSET 0x240000UL
69 #define CG6_ALT_OFFSET 0x280000UL
70 #define CG6_FHC_OFFSET 0x300000UL
71 #define CG6_THC_OFFSET 0x301000UL
72 #define CG6_FBC_OFFSET 0x700000UL
73 #define CG6_TEC_OFFSET 0x701000UL
74 #define CG6_RAM_OFFSET 0x800000UL
77 #define CG6_FHC_FBID_SHIFT 24
78 #define CG6_FHC_FBID_MASK 255
79 #define CG6_FHC_REV_SHIFT 20
80 #define CG6_FHC_REV_MASK 15
81 #define CG6_FHC_FROP_DISABLE (1 << 19)
82 #define CG6_FHC_ROW_DISABLE (1 << 18)
83 #define CG6_FHC_SRC_DISABLE (1 << 17)
84 #define CG6_FHC_DST_DISABLE (1 << 16)
85 #define CG6_FHC_RESET (1 << 15)
86 #define CG6_FHC_LITTLE_ENDIAN (1 << 13)
87 #define CG6_FHC_RES_MASK (3 << 11)
88 #define CG6_FHC_1024 (0 << 11)
89 #define CG6_FHC_1152 (1 << 11)
90 #define CG6_FHC_1280 (2 << 11)
91 #define CG6_FHC_1600 (3 << 11)
92 #define CG6_FHC_CPU_MASK (3 << 9)
93 #define CG6_FHC_CPU_SPARC (0 << 9)
94 #define CG6_FHC_CPU_68020 (1 << 9)
95 #define CG6_FHC_CPU_386 (2 << 9)
96 #define CG6_FHC_TEST (1 << 8)
97 #define CG6_FHC_TEST_X_SHIFT 4
98 #define CG6_FHC_TEST_X_MASK 15
99 #define CG6_FHC_TEST_Y_SHIFT 0
100 #define CG6_FHC_TEST_Y_MASK 15
102 /* FBC mode definitions */
103 #define CG6_FBC_BLIT_IGNORE 0x00000000
104 #define CG6_FBC_BLIT_NOSRC 0x00100000
105 #define CG6_FBC_BLIT_SRC 0x00200000
106 #define CG6_FBC_BLIT_ILLEGAL 0x00300000
107 #define CG6_FBC_BLIT_MASK 0x00300000
109 #define CG6_FBC_VBLANK 0x00080000
111 #define CG6_FBC_MODE_IGNORE 0x00000000
112 #define CG6_FBC_MODE_COLOR8 0x00020000
113 #define CG6_FBC_MODE_COLOR1 0x00040000
114 #define CG6_FBC_MODE_HRMONO 0x00060000
115 #define CG6_FBC_MODE_MASK 0x00060000
117 #define CG6_FBC_DRAW_IGNORE 0x00000000
118 #define CG6_FBC_DRAW_RENDER 0x00008000
119 #define CG6_FBC_DRAW_PICK 0x00010000
120 #define CG6_FBC_DRAW_ILLEGAL 0x00018000
121 #define CG6_FBC_DRAW_MASK 0x00018000
123 #define CG6_FBC_BWRITE0_IGNORE 0x00000000
124 #define CG6_FBC_BWRITE0_ENABLE 0x00002000
125 #define CG6_FBC_BWRITE0_DISABLE 0x00004000
126 #define CG6_FBC_BWRITE0_ILLEGAL 0x00006000
127 #define CG6_FBC_BWRITE0_MASK 0x00006000
129 #define CG6_FBC_BWRITE1_IGNORE 0x00000000
130 #define CG6_FBC_BWRITE1_ENABLE 0x00000800
131 #define CG6_FBC_BWRITE1_DISABLE 0x00001000
132 #define CG6_FBC_BWRITE1_ILLEGAL 0x00001800
133 #define CG6_FBC_BWRITE1_MASK 0x00001800
135 #define CG6_FBC_BREAD_IGNORE 0x00000000
136 #define CG6_FBC_BREAD_0 0x00000200
137 #define CG6_FBC_BREAD_1 0x00000400
138 #define CG6_FBC_BREAD_ILLEGAL 0x00000600
139 #define CG6_FBC_BREAD_MASK 0x00000600
141 #define CG6_FBC_BDISP_IGNORE 0x00000000
142 #define CG6_FBC_BDISP_0 0x00000080
143 #define CG6_FBC_BDISP_1 0x00000100
144 #define CG6_FBC_BDISP_ILLEGAL 0x00000180
145 #define CG6_FBC_BDISP_MASK 0x00000180
147 #define CG6_FBC_INDEX_MOD 0x00000040
148 #define CG6_FBC_INDEX_MASK 0x00000030
150 /* THC definitions */
151 #define CG6_THC_MISC_REV_SHIFT 16
152 #define CG6_THC_MISC_REV_MASK 15
153 #define CG6_THC_MISC_RESET (1 << 12)
154 #define CG6_THC_MISC_VIDEO (1 << 10)
155 #define CG6_THC_MISC_SYNC (1 << 9)
156 #define CG6_THC_MISC_VSYNC (1 << 8)
157 #define CG6_THC_MISC_SYNC_ENAB (1 << 7)
158 #define CG6_THC_MISC_CURS_RES (1 << 6)
159 #define CG6_THC_MISC_INT_ENAB (1 << 5)
160 #define CG6_THC_MISC_INT (1 << 4)
161 #define CG6_THC_MISC_INIT 0x9f
163 /* The contents are unknown */
165 volatile int tec_matrix
;
166 volatile int tec_clip
;
167 volatile int tec_vdc
;
172 volatile uint thc_hs
; /* hsync timing */
173 volatile uint thc_hsdvs
;
174 volatile uint thc_hd
;
175 volatile uint thc_vs
; /* vsync timing */
176 volatile uint thc_vd
;
177 volatile uint thc_refresh
;
178 volatile uint thc_misc
;
180 volatile uint thc_cursxy
; /* cursor x,y position (16 bits each) */
181 volatile uint thc_cursmask
[32]; /* cursor mask bits */
182 volatile uint thc_cursbits
[32]; /* what to show where mask enabled */
195 volatile u32 x0
, y0
, z0
, color0
;
196 volatile u32 x1
, y1
, z1
, color1
;
197 volatile u32 x2
, y2
, z2
, color2
;
198 volatile u32 x3
, y3
, z3
, color3
;
199 volatile u32 offx
, offy
;
201 volatile u32 incx
, incy
;
203 volatile u32 clipminx
, clipminy
;
205 volatile u32 clipmaxx
, clipmaxy
;
213 volatile u32 patalign
;
214 volatile u32 pattern
[8];
216 volatile u32 apointx
, apointy
, apointz
;
218 volatile u32 rpointx
, rpointy
, rpointz
;
220 volatile u32 pointr
, pointg
, pointb
, pointa
;
221 volatile u32 alinex
, aliney
, alinez
;
223 volatile u32 rlinex
, rliney
, rlinez
;
225 volatile u32 liner
, lineg
, lineb
, linea
;
226 volatile u32 atrix
, atriy
, atriz
;
228 volatile u32 rtrix
, rtriy
, rtriz
;
230 volatile u32 trir
, trig
, trib
, tria
;
231 volatile u32 aquadx
, aquady
, aquadz
;
233 volatile u32 rquadx
, rquady
, rquadz
;
235 volatile u32 quadr
, quadg
, quadb
, quada
;
236 volatile u32 arectx
, arecty
, arectz
;
238 volatile u32 rrectx
, rrecty
, rrectz
;
240 volatile u32 rectr
, rectg
, rectb
, recta
;
245 volatile u32 color_map
;
246 volatile u32 control
;
252 struct bt_regs __iomem
*bt
;
253 struct cg6_fbc __iomem
*fbc
;
254 struct cg6_thc __iomem
*thc
;
255 struct cg6_tec __iomem
*tec
;
256 volatile u32 __iomem
*fhc
;
259 #define CG6_FLAG_BLANKED 0x00000001
261 unsigned long physbase
;
262 unsigned long fbsize
;
264 struct sbus_dev
*sdev
;
265 struct list_head list
;
268 static int cg6_sync(struct fb_info
*info
)
270 struct cg6_par
*par
= (struct cg6_par
*) info
->par
;
271 struct cg6_fbc __iomem
*fbc
= par
->fbc
;
275 if (!(sbus_readl(&fbc
->s
) & 0x10000000))
278 } while (--limit
> 0);
284 * cg6_fillrect - REQUIRED function. Can use generic routines if
285 * non acclerated hardware and packed pixel based.
286 * Draws a rectangle on the screen.
288 * @info: frame buffer structure that represents a single frame buffer
289 * @rect: structure defining the rectagle and operation.
291 static void cg6_fillrect(struct fb_info
*info
, const struct fb_fillrect
*rect
)
293 struct cg6_par
*par
= (struct cg6_par
*) info
->par
;
294 struct cg6_fbc __iomem
*fbc
= par
->fbc
;
298 /* XXX doesn't handle ROP_XOR */
300 spin_lock_irqsave(&par
->lock
, flags
);
302 sbus_writel(rect
->color
, &fbc
->fg
);
303 sbus_writel(~(u32
)0, &fbc
->pixelm
);
304 sbus_writel(0xea80ff00, &fbc
->alu
);
305 sbus_writel(0, &fbc
->s
);
306 sbus_writel(0, &fbc
->clip
);
307 sbus_writel(~(u32
)0, &fbc
->pm
);
308 sbus_writel(rect
->dy
, &fbc
->arecty
);
309 sbus_writel(rect
->dx
, &fbc
->arectx
);
310 sbus_writel(rect
->dy
+ rect
->height
, &fbc
->arecty
);
311 sbus_writel(rect
->dx
+ rect
->width
, &fbc
->arectx
);
313 val
= sbus_readl(&fbc
->draw
);
314 } while (val
< 0 && (val
& 0x20000000));
315 spin_unlock_irqrestore(&par
->lock
, flags
);
319 * cg6_imageblit - REQUIRED function. Can use generic routines if
320 * non acclerated hardware and packed pixel based.
321 * Copies a image from system memory to the screen.
323 * @info: frame buffer structure that represents a single frame buffer
324 * @image: structure defining the image.
326 static void cg6_imageblit(struct fb_info
*info
, const struct fb_image
*image
)
328 struct cg6_par
*par
= (struct cg6_par
*) info
->par
;
329 struct cg6_fbc __iomem
*fbc
= par
->fbc
;
330 const u8
*data
= image
->data
;
335 if (image
->depth
> 1) {
336 cfb_imageblit(info
, image
);
340 spin_lock_irqsave(&par
->lock
, flags
);
344 sbus_writel(image
->fg_color
, &fbc
->fg
);
345 sbus_writel(image
->bg_color
, &fbc
->bg
);
346 sbus_writel(0x140000, &fbc
->mode
);
347 sbus_writel(0xe880fc30, &fbc
->alu
);
348 sbus_writel(~(u32
)0, &fbc
->pixelm
);
349 sbus_writel(0, &fbc
->s
);
350 sbus_writel(0, &fbc
->clip
);
351 sbus_writel(0xff, &fbc
->pm
);
352 sbus_writel(32, &fbc
->incx
);
353 sbus_writel(0, &fbc
->incy
);
357 for (i
= 0; i
< image
->height
; i
++) {
358 width
= image
->width
;
360 while (width
>= 32) {
363 sbus_writel(y
, &fbc
->y0
);
364 sbus_writel(x
, &fbc
->x0
);
365 sbus_writel(x
+ 32 - 1, &fbc
->x1
);
367 val
= ((u32
)data
[0] << 24) |
368 ((u32
)data
[1] << 16) |
369 ((u32
)data
[2] << 8) |
371 sbus_writel(val
, &fbc
->font
);
380 sbus_writel(y
, &fbc
->y0
);
381 sbus_writel(x
, &fbc
->x0
);
382 sbus_writel(x
+ width
- 1, &fbc
->x1
);
384 val
= (u32
) data
[0] << 24;
386 } else if (width
<= 16) {
387 val
= ((u32
) data
[0] << 24) |
388 ((u32
) data
[1] << 16);
391 val
= ((u32
) data
[0] << 24) |
392 ((u32
) data
[1] << 16) |
393 ((u32
) data
[2] << 8);
396 sbus_writel(val
, &fbc
->font
);
403 spin_unlock_irqrestore(&par
->lock
, flags
);
407 * cg6_setcolreg - Optional function. Sets a color register.
408 * @regno: boolean, 0 copy local, 1 get_user() function
409 * @red: frame buffer colormap structure
410 * @green: The green value which can be up to 16 bits wide
411 * @blue: The blue value which can be up to 16 bits wide.
412 * @transp: If supported the alpha value which can be up to 16 bits wide.
413 * @info: frame buffer info structure
415 static int cg6_setcolreg(unsigned regno
,
416 unsigned red
, unsigned green
, unsigned blue
,
417 unsigned transp
, struct fb_info
*info
)
419 struct cg6_par
*par
= (struct cg6_par
*) info
->par
;
420 struct bt_regs __iomem
*bt
= par
->bt
;
430 spin_lock_irqsave(&par
->lock
, flags
);
432 sbus_writel((u32
)regno
<< 24, &bt
->addr
);
433 sbus_writel((u32
)red
<< 24, &bt
->color_map
);
434 sbus_writel((u32
)green
<< 24, &bt
->color_map
);
435 sbus_writel((u32
)blue
<< 24, &bt
->color_map
);
437 spin_unlock_irqrestore(&par
->lock
, flags
);
443 * cg6_blank - Optional function. Blanks the display.
444 * @blank_mode: the blank mode we want.
445 * @info: frame buffer structure that represents a single frame buffer
448 cg6_blank(int blank
, struct fb_info
*info
)
450 struct cg6_par
*par
= (struct cg6_par
*) info
->par
;
451 struct cg6_thc __iomem
*thc
= par
->thc
;
455 spin_lock_irqsave(&par
->lock
, flags
);
458 case FB_BLANK_UNBLANK
: /* Unblanking */
459 val
= sbus_readl(&thc
->thc_misc
);
460 val
|= CG6_THC_MISC_VIDEO
;
461 sbus_writel(val
, &thc
->thc_misc
);
462 par
->flags
&= ~CG6_FLAG_BLANKED
;
465 case FB_BLANK_NORMAL
: /* Normal blanking */
466 case FB_BLANK_VSYNC_SUSPEND
: /* VESA blank (vsync off) */
467 case FB_BLANK_HSYNC_SUSPEND
: /* VESA blank (hsync off) */
468 case FB_BLANK_POWERDOWN
: /* Poweroff */
469 val
= sbus_readl(&thc
->thc_misc
);
470 val
&= ~CG6_THC_MISC_VIDEO
;
471 sbus_writel(val
, &thc
->thc_misc
);
472 par
->flags
|= CG6_FLAG_BLANKED
;
476 spin_unlock_irqrestore(&par
->lock
, flags
);
481 static struct sbus_mmap_map cg6_mmap_map
[] = {
484 .poff
= CG6_FBC_OFFSET
,
489 .poff
= CG6_TEC_OFFSET
,
494 .poff
= CG6_BROOKTREE_OFFSET
,
499 .poff
= CG6_FHC_OFFSET
,
504 .poff
= CG6_THC_OFFSET
,
509 .poff
= CG6_ROM_OFFSET
,
514 .poff
= CG6_RAM_OFFSET
,
515 .size
= SBUS_MMAP_FBSIZE(1)
519 .poff
= CG6_DHC_OFFSET
,
525 static int cg6_mmap(struct fb_info
*info
, struct file
*file
, struct vm_area_struct
*vma
)
527 struct cg6_par
*par
= (struct cg6_par
*)info
->par
;
529 return sbusfb_mmap_helper(cg6_mmap_map
,
530 par
->physbase
, par
->fbsize
,
531 par
->sdev
->reg_addrs
[0].which_io
,
535 static int cg6_ioctl(struct inode
*inode
, struct file
*file
, unsigned int cmd
,
536 unsigned long arg
, struct fb_info
*info
)
538 struct cg6_par
*par
= (struct cg6_par
*) info
->par
;
540 return sbusfb_ioctl_helper(cmd
, arg
, info
,
541 FBTYPE_SUNFAST_COLOR
, 8, par
->fbsize
);
549 cg6_init_fix(struct fb_info
*info
, int linebytes
)
551 struct cg6_par
*par
= (struct cg6_par
*)info
->par
;
552 const char *cg6_cpu_name
, *cg6_card_name
;
555 conf
= sbus_readl(par
->fhc
);
556 switch(conf
& CG6_FHC_CPU_MASK
) {
557 case CG6_FHC_CPU_SPARC
:
558 cg6_cpu_name
= "sparc";
560 case CG6_FHC_CPU_68020
:
561 cg6_cpu_name
= "68020";
564 cg6_cpu_name
= "i386";
567 if (((conf
>> CG6_FHC_REV_SHIFT
) & CG6_FHC_REV_MASK
) >= 11) {
568 if (par
->fbsize
<= 0x100000) {
569 cg6_card_name
= "TGX";
571 cg6_card_name
= "TGX+";
574 if (par
->fbsize
<= 0x100000) {
575 cg6_card_name
= "GX";
577 cg6_card_name
= "GX+";
581 sprintf(info
->fix
.id
, "%s %s", cg6_card_name
, cg6_cpu_name
);
582 info
->fix
.id
[sizeof(info
->fix
.id
)-1] = 0;
584 info
->fix
.type
= FB_TYPE_PACKED_PIXELS
;
585 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
587 info
->fix
.line_length
= linebytes
;
589 info
->fix
.accel
= FB_ACCEL_SUN_CGSIX
;
592 /* Initialize Brooktree DAC */
593 static void cg6_bt_init(struct cg6_par
*par
)
595 struct bt_regs __iomem
*bt
= par
->bt
;
597 sbus_writel(0x04 << 24, &bt
->addr
); /* color planes */
598 sbus_writel(0xff << 24, &bt
->control
);
599 sbus_writel(0x05 << 24, &bt
->addr
);
600 sbus_writel(0x00 << 24, &bt
->control
);
601 sbus_writel(0x06 << 24, &bt
->addr
); /* overlay plane */
602 sbus_writel(0x73 << 24, &bt
->control
);
603 sbus_writel(0x07 << 24, &bt
->addr
);
604 sbus_writel(0x00 << 24, &bt
->control
);
607 static void cg6_chip_init(struct fb_info
*info
)
609 struct cg6_par
*par
= (struct cg6_par
*) info
->par
;
610 struct cg6_tec __iomem
*tec
= par
->tec
;
611 struct cg6_fbc __iomem
*fbc
= par
->fbc
;
612 u32 rev
, conf
, mode
, tmp
;
615 /* Turn off stuff in the Transform Engine. */
616 sbus_writel(0, &tec
->tec_matrix
);
617 sbus_writel(0, &tec
->tec_clip
);
618 sbus_writel(0, &tec
->tec_vdc
);
620 /* Take care of bugs in old revisions. */
621 rev
= (sbus_readl(par
->fhc
) >> CG6_FHC_REV_SHIFT
) & CG6_FHC_REV_MASK
;
623 conf
= (sbus_readl(par
->fhc
) & CG6_FHC_RES_MASK
) |
624 CG6_FHC_CPU_68020
| CG6_FHC_TEST
|
625 (11 << CG6_FHC_TEST_X_SHIFT
) |
626 (11 << CG6_FHC_TEST_Y_SHIFT
);
628 conf
|= CG6_FHC_DST_DISABLE
;
629 sbus_writel(conf
, par
->fhc
);
632 /* Set things in the FBC. Bad things appear to happen if we do
633 * back to back store/loads on the mode register, so copy it
635 mode
= sbus_readl(&fbc
->mode
);
637 i
= sbus_readl(&fbc
->s
);
638 } while (i
& 0x10000000);
639 mode
&= ~(CG6_FBC_BLIT_MASK
| CG6_FBC_MODE_MASK
|
640 CG6_FBC_DRAW_MASK
| CG6_FBC_BWRITE0_MASK
|
641 CG6_FBC_BWRITE1_MASK
| CG6_FBC_BREAD_MASK
|
643 mode
|= (CG6_FBC_BLIT_SRC
| CG6_FBC_MODE_COLOR8
|
644 CG6_FBC_DRAW_RENDER
| CG6_FBC_BWRITE0_ENABLE
|
645 CG6_FBC_BWRITE1_DISABLE
| CG6_FBC_BREAD_0
|
647 sbus_writel(mode
, &fbc
->mode
);
649 sbus_writel(0, &fbc
->clip
);
650 sbus_writel(0, &fbc
->offx
);
651 sbus_writel(0, &fbc
->offy
);
652 sbus_writel(0, &fbc
->clipminx
);
653 sbus_writel(0, &fbc
->clipminy
);
654 sbus_writel(info
->var
.xres
- 1, &fbc
->clipmaxx
);
655 sbus_writel(info
->var
.yres
- 1, &fbc
->clipmaxy
);
657 /* Disable cursor in Brooktree DAC. */
658 sbus_writel(0x06 << 24, &par
->bt
->addr
);
659 tmp
= sbus_readl(&par
->bt
->control
);
660 tmp
&= ~(0x03 << 24);
661 sbus_writel(tmp
, &par
->bt
->control
);
667 struct list_head list
;
669 static LIST_HEAD(cg6_list
);
671 static void cg6_init_one(struct sbus_dev
*sdev
)
673 struct all_info
*all
;
676 all
= kmalloc(sizeof(*all
), GFP_KERNEL
);
678 printk(KERN_ERR
"cg6: Cannot allocate memory.\n");
681 memset(all
, 0, sizeof(*all
));
683 INIT_LIST_HEAD(&all
->list
);
685 spin_lock_init(&all
->par
.lock
);
686 all
->par
.sdev
= sdev
;
688 all
->par
.physbase
= sdev
->reg_addrs
[0].phys_addr
;
690 sbusfb_fill_var(&all
->info
.var
, sdev
->prom_node
, 8);
691 all
->info
.var
.red
.length
= 8;
692 all
->info
.var
.green
.length
= 8;
693 all
->info
.var
.blue
.length
= 8;
695 linebytes
= prom_getintdefault(sdev
->prom_node
, "linebytes",
697 all
->par
.fbsize
= PAGE_ALIGN(linebytes
* all
->info
.var
.yres
);
698 if (prom_getbool(sdev
->prom_node
, "dblbuf"))
699 all
->par
.fbsize
*= 4;
701 all
->par
.fbc
= sbus_ioremap(&sdev
->resource
[0], CG6_FBC_OFFSET
,
703 all
->par
.tec
= sbus_ioremap(&sdev
->resource
[0], CG6_TEC_OFFSET
,
704 sizeof(struct cg6_tec
), "cgsix tec");
705 all
->par
.thc
= sbus_ioremap(&sdev
->resource
[0], CG6_THC_OFFSET
,
706 sizeof(struct cg6_thc
), "cgsix thc");
707 all
->par
.bt
= sbus_ioremap(&sdev
->resource
[0], CG6_BROOKTREE_OFFSET
,
708 sizeof(struct bt_regs
), "cgsix dac");
709 all
->par
.fhc
= sbus_ioremap(&sdev
->resource
[0], CG6_FHC_OFFSET
,
710 sizeof(u32
), "cgsix fhc");
712 all
->info
.flags
= FBINFO_DEFAULT
| FBINFO_HWACCEL_IMAGEBLIT
|
713 FBINFO_HWACCEL_COPYAREA
| FBINFO_HWACCEL_FILLRECT
;
714 all
->info
.fbops
= &cg6_ops
;
715 #ifdef CONFIG_SPARC32
716 all
->info
.screen_base
= (char __iomem
*)
717 prom_getintdefault(sdev
->prom_node
, "address", 0);
719 if (!all
->info
.screen_base
)
720 all
->info
.screen_base
=
721 sbus_ioremap(&sdev
->resource
[0], CG6_RAM_OFFSET
,
722 all
->par
.fbsize
, "cgsix ram");
723 all
->info
.par
= &all
->par
;
725 all
->info
.var
.accel_flags
= FB_ACCELF_TEXT
;
727 cg6_bt_init(&all
->par
);
728 cg6_chip_init(&all
->info
);
729 cg6_blank(0, &all
->info
);
731 if (fb_alloc_cmap(&all
->info
.cmap
, 256, 0)) {
732 printk(KERN_ERR
"cg6: Could not allocate color map.\n");
737 fb_set_cmap(&all
->info
.cmap
, &all
->info
);
738 cg6_init_fix(&all
->info
, linebytes
);
740 if (register_framebuffer(&all
->info
) < 0) {
741 printk(KERN_ERR
"cg6: Could not register framebuffer.\n");
742 fb_dealloc_cmap(&all
->info
.cmap
);
747 list_add(&all
->list
, &cg6_list
);
749 printk("cg6: CGsix [%s] at %lx:%lx\n",
751 (long) sdev
->reg_addrs
[0].which_io
,
752 (long) sdev
->reg_addrs
[0].phys_addr
);
755 int __init
cg6_init(void)
757 struct sbus_bus
*sbus
;
758 struct sbus_dev
*sdev
;
760 if (fb_get_options("cg6fb", NULL
))
763 for_all_sbusdev(sdev
, sbus
) {
764 if (!strcmp(sdev
->prom_name
, "cgsix") ||
765 !strcmp(sdev
->prom_name
, "cgthree+"))
772 void __exit
cg6_exit(void)
774 struct list_head
*pos
, *tmp
;
776 list_for_each_safe(pos
, tmp
, &cg6_list
) {
777 struct all_info
*all
= list_entry(pos
, typeof(*all
), list
);
779 unregister_framebuffer(&all
->info
);
780 fb_dealloc_cmap(&all
->info
.cmap
);
788 /* No cmdline options yet... */
792 module_init(cg6_init
);
795 module_exit(cg6_exit
);
798 MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets");
799 MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
800 MODULE_LICENSE("GPL");