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Merge branch 'next-samsung' of git://git.fluff.org/bjdooks/linux
[mirror_ubuntu-kernels.git] / drivers / video / matrox / matroxfb_base.c
1 /*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writing this driver)
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
102 #include <linux/version.h>
103
104 #define __OLD_VIDIOC_
105
106 #include "matroxfb_base.h"
107 #include "matroxfb_misc.h"
108 #include "matroxfb_accel.h"
109 #include "matroxfb_DAC1064.h"
110 #include "matroxfb_Ti3026.h"
111 #include "matroxfb_maven.h"
112 #include "matroxfb_crtc2.h"
113 #include "matroxfb_g450.h"
114 #include <linux/matroxfb.h>
115 #include <linux/interrupt.h>
116 #include <linux/slab.h>
117 #include <linux/uaccess.h>
118
119 #ifdef CONFIG_PPC_PMAC
120 #include <asm/machdep.h>
121 unsigned char nvram_read_byte(int);
122 static int default_vmode = VMODE_NVRAM;
123 static int default_cmode = CMODE_NVRAM;
124 #endif
125
126 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
127
128 /* --------------------------------------------------------------------- */
129
130 /*
131 * card parameters
132 */
133
134 /* --------------------------------------------------------------------- */
135
136 static struct fb_var_screeninfo vesafb_defined = {
137 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
138 0,0, /* virtual -> visible no offset */
139 8, /* depth -> load bits_per_pixel */
140 0, /* greyscale ? */
141 {0,0,0}, /* R */
142 {0,0,0}, /* G */
143 {0,0,0}, /* B */
144 {0,0,0}, /* transparency */
145 0, /* standard pixel format */
146 FB_ACTIVATE_NOW,
147 -1,-1,
148 FB_ACCELF_TEXT, /* accel flags */
149 39721L,48L,16L,33L,10L,
150 96L,2L,~0, /* No sync info */
151 FB_VMODE_NONINTERLACED,
152 0, {0,0,0,0,0}
153 };
154
155
156
157 /* --------------------------------------------------------------------- */
158 static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
159 {
160 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
161
162 /* Make sure that displays are compatible */
163 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
164 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
165 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
166 ) {
167 switch (minfo->fbcon.var.bits_per_pixel) {
168 case 16:
169 case 32:
170 pos = pos * 8;
171 if (info->interlaced) {
172 mga_outl(0x3C2C, pos);
173 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
174 } else {
175 mga_outl(0x3C28, pos);
176 }
177 break;
178 }
179 }
180 }
181
182 static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
183 {
184 if (minfo->crtc1.panpos >= 0) {
185 unsigned long flags;
186 int panpos;
187
188 matroxfb_DAC_lock_irqsave(flags);
189 panpos = minfo->crtc1.panpos;
190 if (panpos >= 0) {
191 unsigned int extvga_reg;
192
193 minfo->crtc1.panpos = -1; /* No update pending anymore */
194 extvga_reg = mga_inb(M_EXTVGA_INDEX);
195 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
196 if (extvga_reg != 0x00) {
197 mga_outb(M_EXTVGA_INDEX, extvga_reg);
198 }
199 }
200 matroxfb_DAC_unlock_irqrestore(flags);
201 }
202 }
203
204 static irqreturn_t matrox_irq(int irq, void *dev_id)
205 {
206 u_int32_t status;
207 int handled = 0;
208 struct matrox_fb_info *minfo = dev_id;
209
210 status = mga_inl(M_STATUS);
211
212 if (status & 0x20) {
213 mga_outl(M_ICLEAR, 0x20);
214 minfo->crtc1.vsync.cnt++;
215 matroxfb_crtc1_panpos(minfo);
216 wake_up_interruptible(&minfo->crtc1.vsync.wait);
217 handled = 1;
218 }
219 if (status & 0x200) {
220 mga_outl(M_ICLEAR, 0x200);
221 minfo->crtc2.vsync.cnt++;
222 wake_up_interruptible(&minfo->crtc2.vsync.wait);
223 handled = 1;
224 }
225 return IRQ_RETVAL(handled);
226 }
227
228 int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
229 {
230 u_int32_t bm;
231
232 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
233 bm = 0x220;
234 else
235 bm = 0x020;
236
237 if (!test_and_set_bit(0, &minfo->irq_flags)) {
238 if (request_irq(minfo->pcidev->irq, matrox_irq,
239 IRQF_SHARED, "matroxfb", minfo)) {
240 clear_bit(0, &minfo->irq_flags);
241 return -EINVAL;
242 }
243 /* Clear any pending field interrupts */
244 mga_outl(M_ICLEAR, bm);
245 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
246 } else if (reenable) {
247 u_int32_t ien;
248
249 ien = mga_inl(M_IEN);
250 if ((ien & bm) != bm) {
251 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
252 mga_outl(M_IEN, ien | bm);
253 }
254 }
255 return 0;
256 }
257
258 static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
259 {
260 if (test_and_clear_bit(0, &minfo->irq_flags)) {
261 /* Flush pending pan-at-vbl request... */
262 matroxfb_crtc1_panpos(minfo);
263 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
264 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
265 else
266 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
267 free_irq(minfo->pcidev->irq, minfo);
268 }
269 }
270
271 int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
272 {
273 struct matrox_vsync *vs;
274 unsigned int cnt;
275 int ret;
276
277 switch (crtc) {
278 case 0:
279 vs = &minfo->crtc1.vsync;
280 break;
281 case 1:
282 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
283 return -ENODEV;
284 }
285 vs = &minfo->crtc2.vsync;
286 break;
287 default:
288 return -ENODEV;
289 }
290 ret = matroxfb_enable_irq(minfo, 0);
291 if (ret) {
292 return ret;
293 }
294
295 cnt = vs->cnt;
296 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
297 if (ret < 0) {
298 return ret;
299 }
300 if (ret == 0) {
301 matroxfb_enable_irq(minfo, 1);
302 return -ETIMEDOUT;
303 }
304 return 0;
305 }
306
307 /* --------------------------------------------------------------------- */
308
309 static void matrox_pan_var(struct matrox_fb_info *minfo,
310 struct fb_var_screeninfo *var)
311 {
312 unsigned int pos;
313 unsigned short p0, p1, p2;
314 unsigned int p3;
315 int vbl;
316 unsigned long flags;
317
318 CRITFLAGS
319
320 DBG(__func__)
321
322 if (minfo->dead)
323 return;
324
325 minfo->fbcon.var.xoffset = var->xoffset;
326 minfo->fbcon.var.yoffset = var->yoffset;
327 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
328 pos += minfo->curr.ydstorg.chunks;
329 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
330 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
331 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
332 p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
333
334 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
335 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
336
337 CRITBEGIN
338
339 matroxfb_DAC_lock_irqsave(flags);
340 mga_setr(M_CRTC_INDEX, 0x0D, p0);
341 mga_setr(M_CRTC_INDEX, 0x0C, p1);
342 if (minfo->devflags.support32MB)
343 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
344 if (vbl) {
345 minfo->crtc1.panpos = p2;
346 } else {
347 /* Abort any pending change */
348 minfo->crtc1.panpos = -1;
349 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
350 }
351 matroxfb_DAC_unlock_irqrestore(flags);
352
353 update_crtc2(minfo, pos);
354
355 CRITEND
356 }
357
358 static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
359 {
360 /* Currently we are holding big kernel lock on all dead & usecount updates.
361 * Destroy everything after all users release it. Especially do not unregister
362 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
363 * for device unplugged when in use.
364 * In future we should point mmio.vbase & video.vbase somewhere where we can
365 * write data without causing too much damage...
366 */
367
368 minfo->dead = 1;
369 if (minfo->usecount) {
370 /* destroy it later */
371 return;
372 }
373 matroxfb_unregister_device(minfo);
374 unregister_framebuffer(&minfo->fbcon);
375 matroxfb_g450_shutdown(minfo);
376 #ifdef CONFIG_MTRR
377 if (minfo->mtrr.vram_valid)
378 mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len);
379 #endif
380 mga_iounmap(minfo->mmio.vbase);
381 mga_iounmap(minfo->video.vbase);
382 release_mem_region(minfo->video.base, minfo->video.len_maximum);
383 release_mem_region(minfo->mmio.base, 16384);
384 kfree(minfo);
385 }
386
387 /*
388 * Open/Release the frame buffer device
389 */
390
391 static int matroxfb_open(struct fb_info *info, int user)
392 {
393 struct matrox_fb_info *minfo = info2minfo(info);
394
395 DBG_LOOP(__func__)
396
397 if (minfo->dead) {
398 return -ENXIO;
399 }
400 minfo->usecount++;
401 if (user) {
402 minfo->userusecount++;
403 }
404 return(0);
405 }
406
407 static int matroxfb_release(struct fb_info *info, int user)
408 {
409 struct matrox_fb_info *minfo = info2minfo(info);
410
411 DBG_LOOP(__func__)
412
413 if (user) {
414 if (0 == --minfo->userusecount) {
415 matroxfb_disable_irq(minfo);
416 }
417 }
418 if (!(--minfo->usecount) && minfo->dead) {
419 matroxfb_remove(minfo, 0);
420 }
421 return(0);
422 }
423
424 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
425 struct fb_info* info) {
426 struct matrox_fb_info *minfo = info2minfo(info);
427
428 DBG(__func__)
429
430 matrox_pan_var(minfo, var);
431 return 0;
432 }
433
434 static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
435 int bpp)
436 {
437 int bppshft2;
438
439 DBG(__func__)
440
441 bppshft2 = bpp;
442 if (!bppshft2) {
443 return 8;
444 }
445 if (isInterleave(minfo))
446 bppshft2 >>= 1;
447 if (minfo->devflags.video64bits)
448 bppshft2 >>= 1;
449 return bppshft2;
450 }
451
452 static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
453 int xres, int bpp)
454 {
455 int over;
456 int rounding;
457
458 DBG(__func__)
459
460 switch (bpp) {
461 case 0: return xres;
462 case 4: rounding = 128;
463 break;
464 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
465 break;
466 case 16: rounding = 32;
467 break;
468 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
469 break;
470 default: rounding = 16;
471 /* on G400, 16 really does not work */
472 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
473 rounding = 32;
474 break;
475 }
476 if (isInterleave(minfo)) {
477 rounding *= 2;
478 }
479 over = xres % rounding;
480 if (over)
481 xres += rounding-over;
482 return xres;
483 }
484
485 static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
486 int bpp)
487 {
488 const int* width;
489 int xres_new;
490
491 DBG(__func__)
492
493 if (!bpp) return xres;
494
495 width = minfo->capable.vxres;
496
497 if (minfo->devflags.precise_width) {
498 while (*width) {
499 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
500 break;
501 }
502 width++;
503 }
504 xres_new = *width;
505 } else {
506 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
507 }
508 return xres_new;
509 }
510
511 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
512
513 DBG(__func__)
514
515 switch (var->bits_per_pixel) {
516 case 4:
517 return 16; /* pseudocolor... 16 entries HW palette */
518 case 8:
519 return 256; /* pseudocolor... 256 entries HW palette */
520 case 16:
521 return 16; /* directcolor... 16 entries SW palette */
522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523 case 24:
524 return 16; /* directcolor... 16 entries SW palette */
525 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
526 case 32:
527 return 16; /* directcolor... 16 entries SW palette */
528 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
529 }
530 return 16; /* return something reasonable... or panic()? */
531 }
532
533 static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
534 struct fb_var_screeninfo *var, int *visual,
535 int *video_cmap_len, unsigned int* ydstorg)
536 {
537 struct RGBT {
538 unsigned char bpp;
539 struct {
540 unsigned char offset,
541 length;
542 } red,
543 green,
544 blue,
545 transp;
546 signed char visual;
547 };
548 static const struct RGBT table[]= {
549 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
550 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
551 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
552 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
553 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
554 };
555 struct RGBT const *rgbt;
556 unsigned int bpp = var->bits_per_pixel;
557 unsigned int vramlen;
558 unsigned int memlen;
559
560 DBG(__func__)
561
562 switch (bpp) {
563 case 4: if (!minfo->capable.cfb4) return -EINVAL;
564 break;
565 case 8: break;
566 case 16: break;
567 case 24: break;
568 case 32: break;
569 default: return -EINVAL;
570 }
571 *ydstorg = 0;
572 vramlen = minfo->video.len_usable;
573 if (var->yres_virtual < var->yres)
574 var->yres_virtual = var->yres;
575 if (var->xres_virtual < var->xres)
576 var->xres_virtual = var->xres;
577
578 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
579 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
580 if (memlen > vramlen) {
581 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
582 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
583 }
584 /* There is hardware bug that no line can cross 4MB boundary */
585 /* give up for CFB24, it is impossible to easy workaround it */
586 /* for other try to do something */
587 if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
588 if (bpp == 24) {
589 /* sorry */
590 } else {
591 unsigned int linelen;
592 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
593 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
594 unsigned int max_yres;
595
596 while (m1) {
597 int t;
598
599 while (m2 >= m1) m2 -= m1;
600 t = m1;
601 m1 = m2;
602 m2 = t;
603 }
604 m2 = linelen * PAGE_SIZE / m2;
605 *ydstorg = m2 = 0x400000 % m2;
606 max_yres = (vramlen - m2) / linelen;
607 if (var->yres_virtual > max_yres)
608 var->yres_virtual = max_yres;
609 }
610 }
611 /* YDSTLEN contains only signed 16bit value */
612 if (var->yres_virtual > 32767)
613 var->yres_virtual = 32767;
614 /* we must round yres/xres down, we already rounded y/xres_virtual up
615 if it was possible. We should return -EINVAL, but I disagree */
616 if (var->yres_virtual < var->yres)
617 var->yres = var->yres_virtual;
618 if (var->xres_virtual < var->xres)
619 var->xres = var->xres_virtual;
620 if (var->xoffset + var->xres > var->xres_virtual)
621 var->xoffset = var->xres_virtual - var->xres;
622 if (var->yoffset + var->yres > var->yres_virtual)
623 var->yoffset = var->yres_virtual - var->yres;
624
625 if (bpp == 16 && var->green.length == 5) {
626 bpp--; /* an artifical value - 15 */
627 }
628
629 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
630 #define SETCLR(clr)\
631 var->clr.offset = rgbt->clr.offset;\
632 var->clr.length = rgbt->clr.length
633 SETCLR(red);
634 SETCLR(green);
635 SETCLR(blue);
636 SETCLR(transp);
637 #undef SETCLR
638 *visual = rgbt->visual;
639
640 if (bpp > 8)
641 dprintk("matroxfb: truecolor: "
642 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
643 var->transp.length, var->red.length, var->green.length, var->blue.length,
644 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
645
646 *video_cmap_len = matroxfb_get_cmap_len(var);
647 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
648 var->xres_virtual, var->yres_virtual);
649 return 0;
650 }
651
652 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
653 unsigned blue, unsigned transp,
654 struct fb_info *fb_info)
655 {
656 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
657
658 DBG(__func__)
659
660 /*
661 * Set a single color register. The values supplied are
662 * already rounded down to the hardware's capabilities
663 * (according to the entries in the `var' structure). Return
664 * != 0 for invalid regno.
665 */
666
667 if (regno >= minfo->curr.cmap_len)
668 return 1;
669
670 if (minfo->fbcon.var.grayscale) {
671 /* gray = 0.30*R + 0.59*G + 0.11*B */
672 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
673 }
674
675 red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
676 green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
677 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
678 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
679
680 switch (minfo->fbcon.var.bits_per_pixel) {
681 case 4:
682 case 8:
683 mga_outb(M_DAC_REG, regno);
684 mga_outb(M_DAC_VAL, red);
685 mga_outb(M_DAC_VAL, green);
686 mga_outb(M_DAC_VAL, blue);
687 break;
688 case 16:
689 if (regno >= 16)
690 break;
691 {
692 u_int16_t col =
693 (red << minfo->fbcon.var.red.offset) |
694 (green << minfo->fbcon.var.green.offset) |
695 (blue << minfo->fbcon.var.blue.offset) |
696 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
697 minfo->cmap[regno] = col | (col << 16);
698 }
699 break;
700 case 24:
701 case 32:
702 if (regno >= 16)
703 break;
704 minfo->cmap[regno] =
705 (red << minfo->fbcon.var.red.offset) |
706 (green << minfo->fbcon.var.green.offset) |
707 (blue << minfo->fbcon.var.blue.offset) |
708 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
709 break;
710 }
711 return 0;
712 }
713
714 static void matroxfb_init_fix(struct matrox_fb_info *minfo)
715 {
716 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
717 DBG(__func__)
718
719 strcpy(fix->id,"MATROX");
720
721 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
722 fix->ypanstep = 1;
723 fix->ywrapstep = 0;
724 fix->mmio_start = minfo->mmio.base;
725 fix->mmio_len = minfo->mmio.len;
726 fix->accel = minfo->devflags.accelerator;
727 }
728
729 static void matroxfb_update_fix(struct matrox_fb_info *minfo)
730 {
731 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
732 DBG(__func__)
733
734 mutex_lock(&minfo->fbcon.mm_lock);
735 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
736 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
737 mutex_unlock(&minfo->fbcon.mm_lock);
738 }
739
740 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
741 {
742 int err;
743 int visual;
744 int cmap_len;
745 unsigned int ydstorg;
746 struct matrox_fb_info *minfo = info2minfo(info);
747
748 if (minfo->dead) {
749 return -ENXIO;
750 }
751 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
752 return err;
753 return 0;
754 }
755
756 static int matroxfb_set_par(struct fb_info *info)
757 {
758 int err;
759 int visual;
760 int cmap_len;
761 unsigned int ydstorg;
762 struct fb_var_screeninfo *var;
763 struct matrox_fb_info *minfo = info2minfo(info);
764
765 DBG(__func__)
766
767 if (minfo->dead) {
768 return -ENXIO;
769 }
770
771 var = &info->var;
772 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
773 return err;
774 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
775 matroxfb_update_fix(minfo);
776 minfo->fbcon.fix.visual = visual;
777 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
778 minfo->fbcon.fix.type_aux = 0;
779 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
780 {
781 unsigned int pos;
782
783 minfo->curr.cmap_len = cmap_len;
784 ydstorg += minfo->devflags.ydstorg;
785 minfo->curr.ydstorg.bytes = ydstorg;
786 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
787 if (var->bits_per_pixel == 4)
788 minfo->curr.ydstorg.pixels = ydstorg;
789 else
790 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
791 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
792 { struct my_timming mt;
793 struct matrox_hw_state* hw;
794 int out;
795
796 matroxfb_var2my(var, &mt);
797 mt.crtc = MATROXFB_SRC_CRTC1;
798 /* CRTC1 delays */
799 switch (var->bits_per_pixel) {
800 case 0: mt.delay = 31 + 0; break;
801 case 16: mt.delay = 21 + 8; break;
802 case 24: mt.delay = 17 + 8; break;
803 case 32: mt.delay = 16 + 8; break;
804 default: mt.delay = 31 + 8; break;
805 }
806
807 hw = &minfo->hw;
808
809 down_read(&minfo->altout.lock);
810 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
811 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
812 minfo->outputs[out].output->compute) {
813 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
814 }
815 }
816 up_read(&minfo->altout.lock);
817 minfo->crtc1.pixclock = mt.pixclock;
818 minfo->crtc1.mnp = mt.mnp;
819 minfo->hw_switch->init(minfo, &mt);
820 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
821 pos += minfo->curr.ydstorg.chunks;
822
823 hw->CRTC[0x0D] = pos & 0xFF;
824 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
825 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
826 hw->CRTCEXT[8] = pos >> 21;
827 minfo->hw_switch->restore(minfo);
828 update_crtc2(minfo, pos);
829 down_read(&minfo->altout.lock);
830 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
831 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
832 minfo->outputs[out].output->program) {
833 minfo->outputs[out].output->program(minfo->outputs[out].data);
834 }
835 }
836 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
837 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
838 minfo->outputs[out].output->start) {
839 minfo->outputs[out].output->start(minfo->outputs[out].data);
840 }
841 }
842 up_read(&minfo->altout.lock);
843 matrox_cfbX_init(minfo);
844 }
845 }
846 minfo->initialized = 1;
847 return 0;
848 }
849
850 static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
851 struct fb_vblank *vblank)
852 {
853 unsigned int sts1;
854
855 matroxfb_enable_irq(minfo, 0);
856 memset(vblank, 0, sizeof(*vblank));
857 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
858 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
859 sts1 = mga_inb(M_INSTS1);
860 vblank->vcount = mga_inl(M_VCOUNT);
861 /* BTW, on my PIII/450 with G400, reading M_INSTS1
862 byte makes this call about 12% slower (1.70 vs. 2.05 us
863 per ioctl()) */
864 if (sts1 & 1)
865 vblank->flags |= FB_VBLANK_HBLANKING;
866 if (sts1 & 8)
867 vblank->flags |= FB_VBLANK_VSYNCING;
868 if (vblank->vcount >= minfo->fbcon.var.yres)
869 vblank->flags |= FB_VBLANK_VBLANKING;
870 if (test_bit(0, &minfo->irq_flags)) {
871 vblank->flags |= FB_VBLANK_HAVE_COUNT;
872 /* Only one writer, aligned int value...
873 it should work without lock and without atomic_t */
874 vblank->count = minfo->crtc1.vsync.cnt;
875 }
876 return 0;
877 }
878
879 static struct matrox_altout panellink_output = {
880 .name = "Panellink output",
881 };
882
883 static int matroxfb_ioctl(struct fb_info *info,
884 unsigned int cmd, unsigned long arg)
885 {
886 void __user *argp = (void __user *)arg;
887 struct matrox_fb_info *minfo = info2minfo(info);
888
889 DBG(__func__)
890
891 if (minfo->dead) {
892 return -ENXIO;
893 }
894
895 switch (cmd) {
896 case FBIOGET_VBLANK:
897 {
898 struct fb_vblank vblank;
899 int err;
900
901 err = matroxfb_get_vblank(minfo, &vblank);
902 if (err)
903 return err;
904 if (copy_to_user(argp, &vblank, sizeof(vblank)))
905 return -EFAULT;
906 return 0;
907 }
908 case FBIO_WAITFORVSYNC:
909 {
910 u_int32_t crt;
911
912 if (get_user(crt, (u_int32_t __user *)arg))
913 return -EFAULT;
914
915 return matroxfb_wait_for_sync(minfo, crt);
916 }
917 case MATROXFB_SET_OUTPUT_MODE:
918 {
919 struct matroxioc_output_mode mom;
920 struct matrox_altout *oproc;
921 int val;
922
923 if (copy_from_user(&mom, argp, sizeof(mom)))
924 return -EFAULT;
925 if (mom.output >= MATROXFB_MAX_OUTPUTS)
926 return -ENXIO;
927 down_read(&minfo->altout.lock);
928 oproc = minfo->outputs[mom.output].output;
929 if (!oproc) {
930 val = -ENXIO;
931 } else if (!oproc->verifymode) {
932 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
933 val = 0;
934 } else {
935 val = -EINVAL;
936 }
937 } else {
938 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
939 }
940 if (!val) {
941 if (minfo->outputs[mom.output].mode != mom.mode) {
942 minfo->outputs[mom.output].mode = mom.mode;
943 val = 1;
944 }
945 }
946 up_read(&minfo->altout.lock);
947 if (val != 1)
948 return val;
949 switch (minfo->outputs[mom.output].src) {
950 case MATROXFB_SRC_CRTC1:
951 matroxfb_set_par(info);
952 break;
953 case MATROXFB_SRC_CRTC2:
954 {
955 struct matroxfb_dh_fb_info* crtc2;
956
957 down_read(&minfo->crtc2.lock);
958 crtc2 = minfo->crtc2.info;
959 if (crtc2)
960 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
961 up_read(&minfo->crtc2.lock);
962 }
963 break;
964 }
965 return 0;
966 }
967 case MATROXFB_GET_OUTPUT_MODE:
968 {
969 struct matroxioc_output_mode mom;
970 struct matrox_altout *oproc;
971 int val;
972
973 if (copy_from_user(&mom, argp, sizeof(mom)))
974 return -EFAULT;
975 if (mom.output >= MATROXFB_MAX_OUTPUTS)
976 return -ENXIO;
977 down_read(&minfo->altout.lock);
978 oproc = minfo->outputs[mom.output].output;
979 if (!oproc) {
980 val = -ENXIO;
981 } else {
982 mom.mode = minfo->outputs[mom.output].mode;
983 val = 0;
984 }
985 up_read(&minfo->altout.lock);
986 if (val)
987 return val;
988 if (copy_to_user(argp, &mom, sizeof(mom)))
989 return -EFAULT;
990 return 0;
991 }
992 case MATROXFB_SET_OUTPUT_CONNECTION:
993 {
994 u_int32_t tmp;
995 int i;
996 int changes;
997
998 if (copy_from_user(&tmp, argp, sizeof(tmp)))
999 return -EFAULT;
1000 for (i = 0; i < 32; i++) {
1001 if (tmp & (1 << i)) {
1002 if (i >= MATROXFB_MAX_OUTPUTS)
1003 return -ENXIO;
1004 if (!minfo->outputs[i].output)
1005 return -ENXIO;
1006 switch (minfo->outputs[i].src) {
1007 case MATROXFB_SRC_NONE:
1008 case MATROXFB_SRC_CRTC1:
1009 break;
1010 default:
1011 return -EBUSY;
1012 }
1013 }
1014 }
1015 if (minfo->devflags.panellink) {
1016 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1017 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1018 return -EINVAL;
1019 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1020 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1021 return -EBUSY;
1022 }
1023 }
1024 }
1025 }
1026 changes = 0;
1027 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1028 if (tmp & (1 << i)) {
1029 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1030 changes = 1;
1031 minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1032 }
1033 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1034 changes = 1;
1035 minfo->outputs[i].src = MATROXFB_SRC_NONE;
1036 }
1037 }
1038 if (!changes)
1039 return 0;
1040 matroxfb_set_par(info);
1041 return 0;
1042 }
1043 case MATROXFB_GET_OUTPUT_CONNECTION:
1044 {
1045 u_int32_t conn = 0;
1046 int i;
1047
1048 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1049 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1050 conn |= 1 << i;
1051 }
1052 }
1053 if (put_user(conn, (u_int32_t __user *)arg))
1054 return -EFAULT;
1055 return 0;
1056 }
1057 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1058 {
1059 u_int32_t conn = 0;
1060 int i;
1061
1062 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1063 if (minfo->outputs[i].output) {
1064 switch (minfo->outputs[i].src) {
1065 case MATROXFB_SRC_NONE:
1066 case MATROXFB_SRC_CRTC1:
1067 conn |= 1 << i;
1068 break;
1069 }
1070 }
1071 }
1072 if (minfo->devflags.panellink) {
1073 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1074 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1075 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1076 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1077 }
1078 if (put_user(conn, (u_int32_t __user *)arg))
1079 return -EFAULT;
1080 return 0;
1081 }
1082 case MATROXFB_GET_ALL_OUTPUTS:
1083 {
1084 u_int32_t conn = 0;
1085 int i;
1086
1087 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1088 if (minfo->outputs[i].output) {
1089 conn |= 1 << i;
1090 }
1091 }
1092 if (put_user(conn, (u_int32_t __user *)arg))
1093 return -EFAULT;
1094 return 0;
1095 }
1096 case VIDIOC_QUERYCAP:
1097 {
1098 struct v4l2_capability r;
1099
1100 memset(&r, 0, sizeof(r));
1101 strcpy(r.driver, "matroxfb");
1102 strcpy(r.card, "Matrox");
1103 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1104 r.version = KERNEL_VERSION(1,0,0);
1105 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1106 if (copy_to_user(argp, &r, sizeof(r)))
1107 return -EFAULT;
1108 return 0;
1109
1110 }
1111 case VIDIOC_QUERYCTRL:
1112 {
1113 struct v4l2_queryctrl qctrl;
1114 int err;
1115
1116 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1117 return -EFAULT;
1118
1119 down_read(&minfo->altout.lock);
1120 if (!minfo->outputs[1].output) {
1121 err = -ENXIO;
1122 } else if (minfo->outputs[1].output->getqueryctrl) {
1123 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1124 } else {
1125 err = -EINVAL;
1126 }
1127 up_read(&minfo->altout.lock);
1128 if (err >= 0 &&
1129 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1130 return -EFAULT;
1131 return err;
1132 }
1133 case VIDIOC_G_CTRL:
1134 {
1135 struct v4l2_control ctrl;
1136 int err;
1137
1138 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1139 return -EFAULT;
1140
1141 down_read(&minfo->altout.lock);
1142 if (!minfo->outputs[1].output) {
1143 err = -ENXIO;
1144 } else if (minfo->outputs[1].output->getctrl) {
1145 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1146 } else {
1147 err = -EINVAL;
1148 }
1149 up_read(&minfo->altout.lock);
1150 if (err >= 0 &&
1151 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1152 return -EFAULT;
1153 return err;
1154 }
1155 case VIDIOC_S_CTRL_OLD:
1156 case VIDIOC_S_CTRL:
1157 {
1158 struct v4l2_control ctrl;
1159 int err;
1160
1161 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1162 return -EFAULT;
1163
1164 down_read(&minfo->altout.lock);
1165 if (!minfo->outputs[1].output) {
1166 err = -ENXIO;
1167 } else if (minfo->outputs[1].output->setctrl) {
1168 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1169 } else {
1170 err = -EINVAL;
1171 }
1172 up_read(&minfo->altout.lock);
1173 return err;
1174 }
1175 }
1176 return -ENOTTY;
1177 }
1178
1179 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1180
1181 static int matroxfb_blank(int blank, struct fb_info *info)
1182 {
1183 int seq;
1184 int crtc;
1185 CRITFLAGS
1186 struct matrox_fb_info *minfo = info2minfo(info);
1187
1188 DBG(__func__)
1189
1190 if (minfo->dead)
1191 return 1;
1192
1193 switch (blank) {
1194 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1195 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1196 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1197 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1198 default: seq = 0x00; crtc = 0x00; break;
1199 }
1200
1201 CRITBEGIN
1202
1203 mga_outb(M_SEQ_INDEX, 1);
1204 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1205 mga_outb(M_EXTVGA_INDEX, 1);
1206 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1207
1208 CRITEND
1209 return 0;
1210 }
1211
1212 static struct fb_ops matroxfb_ops = {
1213 .owner = THIS_MODULE,
1214 .fb_open = matroxfb_open,
1215 .fb_release = matroxfb_release,
1216 .fb_check_var = matroxfb_check_var,
1217 .fb_set_par = matroxfb_set_par,
1218 .fb_setcolreg = matroxfb_setcolreg,
1219 .fb_pan_display =matroxfb_pan_display,
1220 .fb_blank = matroxfb_blank,
1221 .fb_ioctl = matroxfb_ioctl,
1222 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1223 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1224 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1225 /* .fb_cursor = <set by matrox_cfbX_init>, */
1226 };
1227
1228 #define RSDepth(X) (((X) >> 8) & 0x0F)
1229 #define RS8bpp 0x1
1230 #define RS15bpp 0x2
1231 #define RS16bpp 0x3
1232 #define RS32bpp 0x4
1233 #define RS4bpp 0x5
1234 #define RS24bpp 0x6
1235 #define RSText 0x7
1236 #define RSText8 0x8
1237 /* 9-F */
1238 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1239 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1240 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1241 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1242 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1243 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1244 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1245 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1246 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1247 };
1248
1249 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1250 static unsigned int mem; /* "matroxfb:mem:xxxxxM" */
1251 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1252 static int inv24; /* "matroxfb:inv24" */
1253 static int cross4MB = -1; /* "matroxfb:cross4MB" */
1254 static int disabled; /* "matroxfb:disabled" */
1255 static int noaccel; /* "matroxfb:noaccel" */
1256 static int nopan; /* "matroxfb:nopan" */
1257 static int no_pci_retry; /* "matroxfb:nopciretry" */
1258 static int novga; /* "matroxfb:novga" */
1259 static int nobios; /* "matroxfb:nobios" */
1260 static int noinit = 1; /* "matroxfb:init" */
1261 static int inverse; /* "matroxfb:inverse" */
1262 static int sgram; /* "matroxfb:sgram" */
1263 #ifdef CONFIG_MTRR
1264 static int mtrr = 1; /* "matroxfb:nomtrr" */
1265 #endif
1266 static int grayscale; /* "matroxfb:grayscale" */
1267 static int dev = -1; /* "matroxfb:dev:xxxxx" */
1268 static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */
1269 static int depth = -1; /* "matroxfb:depth:xxxxx" */
1270 static unsigned int xres; /* "matroxfb:xres:xxxxx" */
1271 static unsigned int yres; /* "matroxfb:yres:xxxxx" */
1272 static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */
1273 static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */
1274 static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */
1275 static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */
1276 static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */
1277 static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */
1278 static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */
1279 static int sync = -1; /* "matroxfb:sync:xxxxx" */
1280 static unsigned int fv; /* "matroxfb:fv:xxxxx" */
1281 static unsigned int fh; /* "matroxfb:fh:xxxxxk" */
1282 static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */
1283 static int dfp; /* "matroxfb:dfp */
1284 static int dfp_type = -1; /* "matroxfb:dfp:xxx */
1285 static int memtype = -1; /* "matroxfb:memtype:xxx" */
1286 static char outputs[8]; /* "matroxfb:outputs:xxx" */
1287
1288 #ifndef MODULE
1289 static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */
1290 #endif
1291
1292 static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1293 unsigned int maxSize, unsigned int *realSize)
1294 {
1295 vaddr_t vm;
1296 unsigned int offs;
1297 unsigned int offs2;
1298 unsigned char orig;
1299 unsigned char bytes[32];
1300 unsigned char* tmp;
1301
1302 DBG(__func__)
1303
1304 vm = minfo->video.vbase;
1305 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1306 /* at least 2MB */
1307 if (maxSize < 0x0200000) return 0;
1308 if (maxSize > 0x2000000) maxSize = 0x2000000;
1309
1310 mga_outb(M_EXTVGA_INDEX, 0x03);
1311 orig = mga_inb(M_EXTVGA_DATA);
1312 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1313
1314 tmp = bytes;
1315 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1316 *tmp++ = mga_readb(vm, offs);
1317 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1318 mga_writeb(vm, offs, 0x02);
1319 mga_outb(M_CACHEFLUSH, 0x00);
1320 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1321 if (mga_readb(vm, offs) != 0x02)
1322 break;
1323 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1324 if (mga_readb(vm, offs))
1325 break;
1326 }
1327 tmp = bytes;
1328 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1329 mga_writeb(vm, offs2, *tmp++);
1330
1331 mga_outb(M_EXTVGA_INDEX, 0x03);
1332 mga_outb(M_EXTVGA_DATA, orig);
1333
1334 *realSize = offs - 0x100000;
1335 #ifdef CONFIG_FB_MATROX_MILLENIUM
1336 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF));
1337 #endif
1338 return 1;
1339 }
1340
1341 struct video_board {
1342 int maxvram;
1343 int maxdisplayable;
1344 int accelID;
1345 struct matrox_switch* lowlevel;
1346 };
1347 #ifdef CONFIG_FB_MATROX_MILLENIUM
1348 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1349 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1350 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1351 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1352 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1353 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1354 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1355 #ifdef CONFIG_FB_MATROX_G
1356 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1357 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1358 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1359 whole 32MB */
1360 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1361 #endif
1362
1363 #define DEVF_VIDEO64BIT 0x0001
1364 #define DEVF_SWAPS 0x0002
1365 #define DEVF_SRCORG 0x0004
1366 #define DEVF_DUALHEAD 0x0008
1367 #define DEVF_CROSS4MB 0x0010
1368 #define DEVF_TEXT4B 0x0020
1369 /* #define DEVF_recycled 0x0040 */
1370 /* #define DEVF_recycled 0x0080 */
1371 #define DEVF_SUPPORT32MB 0x0100
1372 #define DEVF_ANY_VXRES 0x0200
1373 #define DEVF_TEXT16B 0x0400
1374 #define DEVF_CRTC2 0x0800
1375 #define DEVF_MAVEN_CAPABLE 0x1000
1376 #define DEVF_PANELLINK_CAPABLE 0x2000
1377 #define DEVF_G450DAC 0x4000
1378
1379 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1380 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1381 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1382 #define DEVF_G200 (DEVF_G2CORE)
1383 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1384 /* if you'll find how to drive DFP... */
1385 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1386 #define DEVF_G550 (DEVF_G450)
1387
1388 static struct board {
1389 unsigned short vendor, device, rev, svid, sid;
1390 unsigned int flags;
1391 unsigned int maxclk;
1392 enum mga_chip chip;
1393 struct video_board* base;
1394 const char* name;
1395 } dev_list[] = {
1396 #ifdef CONFIG_FB_MATROX_MILLENIUM
1397 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1398 0, 0,
1399 DEVF_TEXT4B,
1400 230000,
1401 MGA_2064,
1402 &vbMillennium,
1403 "Millennium (PCI)"},
1404 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1405 0, 0,
1406 DEVF_SWAPS,
1407 220000,
1408 MGA_2164,
1409 &vbMillennium2,
1410 "Millennium II (PCI)"},
1411 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1412 0, 0,
1413 DEVF_SWAPS,
1414 250000,
1415 MGA_2164,
1416 &vbMillennium2A,
1417 "Millennium II (AGP)"},
1418 #endif
1419 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1420 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1421 0, 0,
1422 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1423 180000,
1424 MGA_1064,
1425 &vbMystique,
1426 "Mystique (PCI)"},
1427 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1428 0, 0,
1429 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1430 220000,
1431 MGA_1164,
1432 &vbMystique,
1433 "Mystique 220 (PCI)"},
1434 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1435 0, 0,
1436 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1437 180000,
1438 MGA_1064,
1439 &vbMystique,
1440 "Mystique (AGP)"},
1441 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1442 0, 0,
1443 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1444 220000,
1445 MGA_1164,
1446 &vbMystique,
1447 "Mystique 220 (AGP)"},
1448 #endif
1449 #ifdef CONFIG_FB_MATROX_G
1450 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1451 0, 0,
1452 DEVF_G100,
1453 230000,
1454 MGA_G100,
1455 &vbG100,
1456 "MGA-G100 (PCI)"},
1457 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1458 0, 0,
1459 DEVF_G100,
1460 230000,
1461 MGA_G100,
1462 &vbG100,
1463 "MGA-G100 (AGP)"},
1464 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1465 0, 0,
1466 DEVF_G200,
1467 250000,
1468 MGA_G200,
1469 &vbG200,
1470 "MGA-G200 (PCI)"},
1471 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1472 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1473 DEVF_G200,
1474 220000,
1475 MGA_G200,
1476 &vbG200,
1477 "MGA-G200 (AGP)"},
1478 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1479 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1480 DEVF_G200,
1481 230000,
1482 MGA_G200,
1483 &vbG200,
1484 "Mystique G200 (AGP)"},
1485 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1486 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1487 DEVF_G200,
1488 250000,
1489 MGA_G200,
1490 &vbG200,
1491 "Millennium G200 (AGP)"},
1492 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1493 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1494 DEVF_G200,
1495 230000,
1496 MGA_G200,
1497 &vbG200,
1498 "Marvel G200 (AGP)"},
1499 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1500 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1501 DEVF_G200,
1502 230000,
1503 MGA_G200,
1504 &vbG200,
1505 "MGA-G200 (AGP)"},
1506 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1507 0, 0,
1508 DEVF_G200,
1509 230000,
1510 MGA_G200,
1511 &vbG200,
1512 "G200 (AGP)"},
1513 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1514 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1515 DEVF_G400,
1516 360000,
1517 MGA_G400,
1518 &vbG400,
1519 "Millennium G400 MAX (AGP)"},
1520 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1521 0, 0,
1522 DEVF_G400,
1523 300000,
1524 MGA_G400,
1525 &vbG400,
1526 "G400 (AGP)"},
1527 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1528 0, 0,
1529 DEVF_G450,
1530 360000,
1531 MGA_G450,
1532 &vbG400,
1533 "G450"},
1534 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1535 0, 0,
1536 DEVF_G550,
1537 360000,
1538 MGA_G550,
1539 &vbG400,
1540 "G550"},
1541 #endif
1542 {0, 0, 0xFF,
1543 0, 0,
1544 0,
1545 0,
1546 0,
1547 NULL,
1548 NULL}};
1549
1550 #ifndef MODULE
1551 static struct fb_videomode defaultmode = {
1552 /* 640x480 @ 60Hz, 31.5 kHz */
1553 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1554 0, FB_VMODE_NONINTERLACED
1555 };
1556 #endif /* !MODULE */
1557
1558 static int hotplug = 0;
1559
1560 static void setDefaultOutputs(struct matrox_fb_info *minfo)
1561 {
1562 unsigned int i;
1563 const char* ptr;
1564
1565 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1;
1566 if (minfo->devflags.g450dac) {
1567 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1;
1568 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1569 } else if (dfp) {
1570 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1571 }
1572 ptr = outputs;
1573 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1574 char c = *ptr++;
1575
1576 if (c == 0) {
1577 break;
1578 }
1579 if (c == '0') {
1580 minfo->outputs[i].default_src = MATROXFB_SRC_NONE;
1581 } else if (c == '1') {
1582 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1;
1583 } else if (c == '2' && minfo->devflags.crtc2) {
1584 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2;
1585 } else {
1586 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1587 break;
1588 }
1589 }
1590 /* Nullify this option for subsequent adapters */
1591 outputs[0] = 0;
1592 }
1593
1594 static int initMatrox2(struct matrox_fb_info *minfo, struct board *b)
1595 {
1596 unsigned long ctrlptr_phys = 0;
1597 unsigned long video_base_phys = 0;
1598 unsigned int memsize;
1599 int err;
1600
1601 static struct pci_device_id intel_82437[] = {
1602 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1603 { },
1604 };
1605
1606 DBG(__func__)
1607
1608 /* set default values... */
1609 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1610
1611 minfo->hw_switch = b->base->lowlevel;
1612 minfo->devflags.accelerator = b->base->accelID;
1613 minfo->max_pixel_clock = b->maxclk;
1614
1615 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1616 minfo->capable.plnwt = 1;
1617 minfo->chip = b->chip;
1618 minfo->capable.srcorg = b->flags & DEVF_SRCORG;
1619 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT;
1620 if (b->flags & DEVF_TEXT4B) {
1621 minfo->devflags.vgastep = 4;
1622 minfo->devflags.textmode = 4;
1623 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1624 } else if (b->flags & DEVF_TEXT16B) {
1625 minfo->devflags.vgastep = 16;
1626 minfo->devflags.textmode = 1;
1627 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1628 } else {
1629 minfo->devflags.vgastep = 8;
1630 minfo->devflags.textmode = 1;
1631 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8;
1632 }
1633 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0;
1634 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES);
1635 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0;
1636 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1637 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0;
1638 minfo->devflags.dfp_type = dfp_type;
1639 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1640 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1641 minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1642 setDefaultOutputs(minfo);
1643 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1644 minfo->outputs[2].data = minfo;
1645 minfo->outputs[2].output = &panellink_output;
1646 minfo->outputs[2].src = minfo->outputs[2].default_src;
1647 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1648 minfo->devflags.panellink = 1;
1649 }
1650
1651 if (minfo->capable.cross4MB < 0)
1652 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB;
1653 if (b->flags & DEVF_SWAPS) {
1654 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1);
1655 video_base_phys = pci_resource_start(minfo->pcidev, 0);
1656 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0;
1657 } else {
1658 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0);
1659 video_base_phys = pci_resource_start(minfo->pcidev, 1);
1660 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1;
1661 }
1662 err = -EINVAL;
1663 if (!ctrlptr_phys) {
1664 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1665 goto fail;
1666 }
1667 if (!video_base_phys) {
1668 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1669 goto fail;
1670 }
1671 memsize = b->base->maxvram;
1672 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1673 goto fail;
1674 }
1675 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1676 goto failCtrlMR;
1677 }
1678 minfo->video.len_maximum = memsize;
1679 /* convert mem (autodetect k, M) */
1680 if (mem < 1024) mem *= 1024;
1681 if (mem < 0x00100000) mem *= 1024;
1682
1683 if (mem && (mem < memsize))
1684 memsize = mem;
1685 err = -ENOMEM;
1686 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &minfo->mmio.vbase)) {
1687 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1688 goto failVideoMR;
1689 }
1690 minfo->mmio.base = ctrlptr_phys;
1691 minfo->mmio.len = 16384;
1692 minfo->video.base = video_base_phys;
1693 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &minfo->video.vbase)) {
1694 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1695 video_base_phys, memsize);
1696 goto failCtrlIO;
1697 }
1698 {
1699 u_int32_t cmd;
1700 u_int32_t mga_option;
1701
1702 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option);
1703 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd);
1704 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1705 mga_option |= MX_OPTION_BSWAP;
1706 /* disable palette snooping */
1707 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1708 if (pci_dev_present(intel_82437)) {
1709 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) {
1710 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1711 }
1712 mga_option |= 0x20000000;
1713 minfo->devflags.nopciretry = 1;
1714 }
1715 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd);
1716 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option);
1717 minfo->hw.MXoptionReg = mga_option;
1718
1719 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1720 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1721 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00);
1722 }
1723
1724 err = -ENXIO;
1725 matroxfb_read_pins(minfo);
1726 if (minfo->hw_switch->preinit(minfo)) {
1727 goto failVideoIO;
1728 }
1729
1730 err = -ENOMEM;
1731 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1732 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1733 goto failVideoIO;
1734 }
1735 minfo->devflags.ydstorg = 0;
1736
1737 minfo->video.base = video_base_phys;
1738 minfo->video.len_usable = minfo->video.len;
1739 if (minfo->video.len_usable > b->base->maxdisplayable)
1740 minfo->video.len_usable = b->base->maxdisplayable;
1741 #ifdef CONFIG_MTRR
1742 if (mtrr) {
1743 minfo->mtrr.vram = mtrr_add(video_base_phys, minfo->video.len, MTRR_TYPE_WRCOMB, 1);
1744 minfo->mtrr.vram_valid = 1;
1745 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1746 }
1747 #endif /* CONFIG_MTRR */
1748
1749 if (!minfo->devflags.novga)
1750 request_region(0x3C0, 32, "matrox");
1751 matroxfb_g450_connect(minfo);
1752 minfo->hw_switch->reset(minfo);
1753
1754 minfo->fbcon.monspecs.hfmin = 0;
1755 minfo->fbcon.monspecs.hfmax = fh;
1756 minfo->fbcon.monspecs.vfmin = 0;
1757 minfo->fbcon.monspecs.vfmax = fv;
1758 minfo->fbcon.monspecs.dpms = 0; /* TBD */
1759
1760 /* static settings */
1761 vesafb_defined.red = colors[depth-1].red;
1762 vesafb_defined.green = colors[depth-1].green;
1763 vesafb_defined.blue = colors[depth-1].blue;
1764 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1765 vesafb_defined.grayscale = grayscale;
1766 vesafb_defined.vmode = 0;
1767 if (noaccel)
1768 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1769
1770 minfo->fbops = matroxfb_ops;
1771 minfo->fbcon.fbops = &minfo->fbops;
1772 minfo->fbcon.pseudo_palette = minfo->cmap;
1773 /* after __init time we are like module... no logo */
1774 minfo->fbcon.flags = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1775 minfo->fbcon.flags |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1776 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1777 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1778 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1779 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1780 FBINFO_HWACCEL_YPAN; /* And vertical panning */
1781 minfo->video.len_usable &= PAGE_MASK;
1782 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1);
1783
1784 #ifndef MODULE
1785 /* mode database is marked __init!!! */
1786 if (!hotplug) {
1787 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL,
1788 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1789 }
1790 #endif /* !MODULE */
1791
1792 /* mode modifiers */
1793 if (hslen)
1794 vesafb_defined.hsync_len = hslen;
1795 if (vslen)
1796 vesafb_defined.vsync_len = vslen;
1797 if (left != ~0)
1798 vesafb_defined.left_margin = left;
1799 if (right != ~0)
1800 vesafb_defined.right_margin = right;
1801 if (upper != ~0)
1802 vesafb_defined.upper_margin = upper;
1803 if (lower != ~0)
1804 vesafb_defined.lower_margin = lower;
1805 if (xres)
1806 vesafb_defined.xres = xres;
1807 if (yres)
1808 vesafb_defined.yres = yres;
1809 if (sync != -1)
1810 vesafb_defined.sync = sync;
1811 else if (vesafb_defined.sync == ~0) {
1812 vesafb_defined.sync = 0;
1813 if (yres < 400)
1814 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1815 else if (yres < 480)
1816 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1817 }
1818
1819 /* fv, fh, maxclk limits was specified */
1820 {
1821 unsigned int tmp;
1822
1823 if (fv) {
1824 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1825 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1826 if ((tmp < fh) || (fh == 0)) fh = tmp;
1827 }
1828 if (fh) {
1829 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1830 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1831 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1832 }
1833 tmp = (maxclk + 499) / 500;
1834 if (tmp) {
1835 tmp = (2000000000 + tmp) / tmp;
1836 if (tmp > pixclock) pixclock = tmp;
1837 }
1838 }
1839 if (pixclock) {
1840 if (pixclock < 2000) /* > 500MHz */
1841 pixclock = 4000; /* 250MHz */
1842 if (pixclock > 1000000)
1843 pixclock = 1000000; /* 1MHz */
1844 vesafb_defined.pixclock = pixclock;
1845 }
1846
1847 /* FIXME: Where to move this?! */
1848 #if defined(CONFIG_PPC_PMAC)
1849 #ifndef MODULE
1850 if (machine_is(powermac)) {
1851 struct fb_var_screeninfo var;
1852 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1853 default_vmode = VMODE_640_480_60;
1854 #ifdef CONFIG_NVRAM
1855 if (default_cmode == CMODE_NVRAM)
1856 default_cmode = nvram_read_byte(NV_CMODE);
1857 #endif
1858 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1859 default_cmode = CMODE_8;
1860 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1861 var.accel_flags = vesafb_defined.accel_flags;
1862 var.xoffset = var.yoffset = 0;
1863 /* Note: mac_vmode_to_var() does not set all parameters */
1864 vesafb_defined = var;
1865 }
1866 }
1867 #endif /* !MODULE */
1868 #endif /* CONFIG_PPC_PMAC */
1869 vesafb_defined.xres_virtual = vesafb_defined.xres;
1870 if (nopan) {
1871 vesafb_defined.yres_virtual = vesafb_defined.yres;
1872 } else {
1873 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1874 to yres_virtual * xres_virtual < 2^32 */
1875 }
1876 matroxfb_init_fix(minfo);
1877 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1878 /* Normalize values (namely yres_virtual) */
1879 matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
1880 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1881 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1882 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1883 * anyway. But we at least tried... */
1884 minfo->fbcon.var = vesafb_defined;
1885 err = -EINVAL;
1886
1887 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1888 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1889 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1890 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1891 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len);
1892
1893 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1894 * and we do not want currcon == 0 for subsequent framebuffers */
1895
1896 minfo->fbcon.device = &minfo->pcidev->dev;
1897 if (register_framebuffer(&minfo->fbcon) < 0) {
1898 goto failVideoIO;
1899 }
1900 printk("fb%d: %s frame buffer device\n",
1901 minfo->fbcon.node, minfo->fbcon.fix.id);
1902
1903 /* there is no console on this fb... but we have to initialize hardware
1904 * until someone tells me what is proper thing to do */
1905 if (!minfo->initialized) {
1906 printk(KERN_INFO "fb%d: initializing hardware\n",
1907 minfo->fbcon.node);
1908 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1909 * already before, so register_framebuffer works correctly. */
1910 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1911 fb_set_var(&minfo->fbcon, &vesafb_defined);
1912 }
1913
1914 return 0;
1915 failVideoIO:;
1916 matroxfb_g450_shutdown(minfo);
1917 mga_iounmap(minfo->video.vbase);
1918 failCtrlIO:;
1919 mga_iounmap(minfo->mmio.vbase);
1920 failVideoMR:;
1921 release_mem_region(video_base_phys, minfo->video.len_maximum);
1922 failCtrlMR:;
1923 release_mem_region(ctrlptr_phys, 16384);
1924 fail:;
1925 return err;
1926 }
1927
1928 static LIST_HEAD(matroxfb_list);
1929 static LIST_HEAD(matroxfb_driver_list);
1930
1931 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1932 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1933 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1934 struct matrox_fb_info* minfo;
1935
1936 list_add(&drv->node, &matroxfb_driver_list);
1937 for (minfo = matroxfb_l(matroxfb_list.next);
1938 minfo != matroxfb_l(&matroxfb_list);
1939 minfo = matroxfb_l(minfo->next_fb.next)) {
1940 void* p;
1941
1942 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1943 continue;
1944 p = drv->probe(minfo);
1945 if (p) {
1946 minfo->drivers_data[minfo->drivers_count] = p;
1947 minfo->drivers[minfo->drivers_count++] = drv;
1948 }
1949 }
1950 return 0;
1951 }
1952
1953 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1954 struct matrox_fb_info* minfo;
1955
1956 list_del(&drv->node);
1957 for (minfo = matroxfb_l(matroxfb_list.next);
1958 minfo != matroxfb_l(&matroxfb_list);
1959 minfo = matroxfb_l(minfo->next_fb.next)) {
1960 int i;
1961
1962 for (i = 0; i < minfo->drivers_count; ) {
1963 if (minfo->drivers[i] == drv) {
1964 if (drv && drv->remove)
1965 drv->remove(minfo, minfo->drivers_data[i]);
1966 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1967 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1968 } else
1969 i++;
1970 }
1971 }
1972 }
1973
1974 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1975 struct matroxfb_driver* drv;
1976 int i = 0;
1977 list_add(&minfo->next_fb, &matroxfb_list);
1978 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1979 drv != matroxfb_driver_l(&matroxfb_driver_list);
1980 drv = matroxfb_driver_l(drv->node.next)) {
1981 if (drv && drv->probe) {
1982 void *p = drv->probe(minfo);
1983 if (p) {
1984 minfo->drivers_data[i] = p;
1985 minfo->drivers[i++] = drv;
1986 if (i == MATROXFB_MAX_FB_DRIVERS)
1987 break;
1988 }
1989 }
1990 }
1991 minfo->drivers_count = i;
1992 }
1993
1994 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
1995 int i;
1996
1997 list_del(&minfo->next_fb);
1998 for (i = 0; i < minfo->drivers_count; i++) {
1999 struct matroxfb_driver* drv = minfo->drivers[i];
2000
2001 if (drv && drv->remove)
2002 drv->remove(minfo, minfo->drivers_data[i]);
2003 }
2004 }
2005
2006 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2007 struct board* b;
2008 u_int16_t svid;
2009 u_int16_t sid;
2010 struct matrox_fb_info* minfo;
2011 int err;
2012 u_int32_t cmd;
2013 DBG(__func__)
2014
2015 svid = pdev->subsystem_vendor;
2016 sid = pdev->subsystem_device;
2017 for (b = dev_list; b->vendor; b++) {
2018 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2019 if (b->svid)
2020 if ((b->svid != svid) || (b->sid != sid)) continue;
2021 break;
2022 }
2023 /* not match... */
2024 if (!b->vendor)
2025 return -ENODEV;
2026 if (dev > 0) {
2027 /* not requested one... */
2028 dev--;
2029 return -ENODEV;
2030 }
2031 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2032 if (pci_enable_device(pdev)) {
2033 return -1;
2034 }
2035
2036 minfo = kmalloc(sizeof(*minfo), GFP_KERNEL);
2037 if (!minfo)
2038 return -1;
2039 memset(minfo, 0, sizeof(*minfo));
2040
2041 minfo->pcidev = pdev;
2042 minfo->dead = 0;
2043 minfo->usecount = 0;
2044 minfo->userusecount = 0;
2045
2046 pci_set_drvdata(pdev, minfo);
2047 /* DEVFLAGS */
2048 minfo->devflags.memtype = memtype;
2049 if (memtype != -1)
2050 noinit = 0;
2051 if (cmd & PCI_COMMAND_MEMORY) {
2052 minfo->devflags.novga = novga;
2053 minfo->devflags.nobios = nobios;
2054 minfo->devflags.noinit = noinit;
2055 /* subsequent heads always needs initialization and must not enable BIOS */
2056 novga = 1;
2057 nobios = 1;
2058 noinit = 0;
2059 } else {
2060 minfo->devflags.novga = 1;
2061 minfo->devflags.nobios = 1;
2062 minfo->devflags.noinit = 0;
2063 }
2064
2065 minfo->devflags.nopciretry = no_pci_retry;
2066 minfo->devflags.mga_24bpp_fix = inv24;
2067 minfo->devflags.precise_width = option_precise_width;
2068 minfo->devflags.sgram = sgram;
2069 minfo->capable.cross4MB = cross4MB;
2070
2071 spin_lock_init(&minfo->lock.DAC);
2072 spin_lock_init(&minfo->lock.accel);
2073 init_rwsem(&minfo->crtc2.lock);
2074 init_rwsem(&minfo->altout.lock);
2075 mutex_init(&minfo->fbcon.mm_lock);
2076 minfo->irq_flags = 0;
2077 init_waitqueue_head(&minfo->crtc1.vsync.wait);
2078 init_waitqueue_head(&minfo->crtc2.vsync.wait);
2079 minfo->crtc1.panpos = -1;
2080
2081 err = initMatrox2(minfo, b);
2082 if (!err) {
2083 matroxfb_register_device(minfo);
2084 return 0;
2085 }
2086 kfree(minfo);
2087 return -1;
2088 }
2089
2090 static void pci_remove_matrox(struct pci_dev* pdev) {
2091 struct matrox_fb_info* minfo;
2092
2093 minfo = pci_get_drvdata(pdev);
2094 matroxfb_remove(minfo, 1);
2095 }
2096
2097 static struct pci_device_id matroxfb_devices[] = {
2098 #ifdef CONFIG_FB_MATROX_MILLENIUM
2099 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2100 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2101 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2102 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2103 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2104 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2105 #endif
2106 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2107 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2108 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2109 #endif
2110 #ifdef CONFIG_FB_MATROX_G
2111 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2113 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2115 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2116 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2117 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2118 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2119 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2120 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2121 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2122 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2123 #endif
2124 {0, 0,
2125 0, 0, 0, 0, 0}
2126 };
2127
2128 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2129
2130
2131 static struct pci_driver matroxfb_driver = {
2132 .name = "matroxfb",
2133 .id_table = matroxfb_devices,
2134 .probe = matroxfb_probe,
2135 .remove = pci_remove_matrox,
2136 };
2137
2138 /* **************************** init-time only **************************** */
2139
2140 #define RSResolution(X) ((X) & 0x0F)
2141 #define RS640x400 1
2142 #define RS640x480 2
2143 #define RS800x600 3
2144 #define RS1024x768 4
2145 #define RS1280x1024 5
2146 #define RS1600x1200 6
2147 #define RS768x576 7
2148 #define RS960x720 8
2149 #define RS1152x864 9
2150 #define RS1408x1056 10
2151 #define RS640x350 11
2152 #define RS1056x344 12 /* 132 x 43 text */
2153 #define RS1056x400 13 /* 132 x 50 text */
2154 #define RS1056x480 14 /* 132 x 60 text */
2155 #define RSNoxNo 15
2156 /* 10-FF */
2157 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2158 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2159 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2160 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2161 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2162 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2163 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2164 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2165 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2166 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2167 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2168 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2169 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2170 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2171 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2172 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2173 };
2174
2175 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2176 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2177 /* default must be first */
2178 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2179 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2180 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2181 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2182 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2183 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2184 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2185 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2186 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2187 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2188 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2189 { 0x110, RSCreate(RS640x480, RS15bpp) },
2190 { 0x181, RSCreate(RS768x576, RS15bpp) },
2191 { 0x113, RSCreate(RS800x600, RS15bpp) },
2192 { 0x189, RSCreate(RS960x720, RS15bpp) },
2193 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2194 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2195 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2196 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2197 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2198 { 0x111, RSCreate(RS640x480, RS16bpp) },
2199 { 0x182, RSCreate(RS768x576, RS16bpp) },
2200 { 0x114, RSCreate(RS800x600, RS16bpp) },
2201 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2202 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2203 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2204 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2205 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2206 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2207 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2208 { 0x184, RSCreate(RS768x576, RS24bpp) },
2209 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2210 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2211 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2212 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2213 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2214 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2215 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2216 { 0x112, RSCreate(RS640x480, RS32bpp) },
2217 { 0x183, RSCreate(RS768x576, RS32bpp) },
2218 { 0x115, RSCreate(RS800x600, RS32bpp) },
2219 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2220 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2221 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2222 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2223 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2224 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2225 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2226 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2227 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2228 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2229 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2230 { 0, 0 }};
2231
2232 static void __init matroxfb_init_params(void) {
2233 /* fh from kHz to Hz */
2234 if (fh < 1000)
2235 fh *= 1000; /* 1kHz minimum */
2236 /* maxclk */
2237 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2238 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2239 /* fix VESA number */
2240 if (vesa != ~0)
2241 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2242
2243 /* static settings */
2244 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2245 if (RSptr->vesa == vesa) break;
2246 }
2247 if (!RSptr->vesa) {
2248 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2249 RSptr = vesamap;
2250 }
2251 {
2252 int res = RSResolution(RSptr->info)-1;
2253 if (left == ~0)
2254 left = timmings[res].left;
2255 if (!xres)
2256 xres = timmings[res].xres;
2257 if (right == ~0)
2258 right = timmings[res].right;
2259 if (!hslen)
2260 hslen = timmings[res].hslen;
2261 if (upper == ~0)
2262 upper = timmings[res].upper;
2263 if (!yres)
2264 yres = timmings[res].yres;
2265 if (lower == ~0)
2266 lower = timmings[res].lower;
2267 if (!vslen)
2268 vslen = timmings[res].vslen;
2269 if (!(fv||fh||maxclk||pixclock))
2270 fv = timmings[res].vfreq;
2271 if (depth == -1)
2272 depth = RSDepth(RSptr->info);
2273 }
2274 }
2275
2276 static int __init matrox_init(void) {
2277 int err;
2278
2279 matroxfb_init_params();
2280 err = pci_register_driver(&matroxfb_driver);
2281 dev = -1; /* accept all new devices... */
2282 return err;
2283 }
2284
2285 /* **************************** exit-time only **************************** */
2286
2287 static void __exit matrox_done(void) {
2288 pci_unregister_driver(&matroxfb_driver);
2289 }
2290
2291 #ifndef MODULE
2292
2293 /* ************************* init in-kernel code ************************** */
2294
2295 static int __init matroxfb_setup(char *options) {
2296 char *this_opt;
2297
2298 DBG(__func__)
2299
2300 if (!options || !*options)
2301 return 0;
2302
2303 while ((this_opt = strsep(&options, ",")) != NULL) {
2304 if (!*this_opt) continue;
2305
2306 dprintk("matroxfb_setup: option %s\n", this_opt);
2307
2308 if (!strncmp(this_opt, "dev:", 4))
2309 dev = simple_strtoul(this_opt+4, NULL, 0);
2310 else if (!strncmp(this_opt, "depth:", 6)) {
2311 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2312 case 0: depth = RSText; break;
2313 case 4: depth = RS4bpp; break;
2314 case 8: depth = RS8bpp; break;
2315 case 15:depth = RS15bpp; break;
2316 case 16:depth = RS16bpp; break;
2317 case 24:depth = RS24bpp; break;
2318 case 32:depth = RS32bpp; break;
2319 default:
2320 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2321 }
2322 } else if (!strncmp(this_opt, "xres:", 5))
2323 xres = simple_strtoul(this_opt+5, NULL, 0);
2324 else if (!strncmp(this_opt, "yres:", 5))
2325 yres = simple_strtoul(this_opt+5, NULL, 0);
2326 else if (!strncmp(this_opt, "vslen:", 6))
2327 vslen = simple_strtoul(this_opt+6, NULL, 0);
2328 else if (!strncmp(this_opt, "hslen:", 6))
2329 hslen = simple_strtoul(this_opt+6, NULL, 0);
2330 else if (!strncmp(this_opt, "left:", 5))
2331 left = simple_strtoul(this_opt+5, NULL, 0);
2332 else if (!strncmp(this_opt, "right:", 6))
2333 right = simple_strtoul(this_opt+6, NULL, 0);
2334 else if (!strncmp(this_opt, "upper:", 6))
2335 upper = simple_strtoul(this_opt+6, NULL, 0);
2336 else if (!strncmp(this_opt, "lower:", 6))
2337 lower = simple_strtoul(this_opt+6, NULL, 0);
2338 else if (!strncmp(this_opt, "pixclock:", 9))
2339 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2340 else if (!strncmp(this_opt, "sync:", 5))
2341 sync = simple_strtoul(this_opt+5, NULL, 0);
2342 else if (!strncmp(this_opt, "vesa:", 5))
2343 vesa = simple_strtoul(this_opt+5, NULL, 0);
2344 else if (!strncmp(this_opt, "maxclk:", 7))
2345 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2346 else if (!strncmp(this_opt, "fh:", 3))
2347 fh = simple_strtoul(this_opt+3, NULL, 0);
2348 else if (!strncmp(this_opt, "fv:", 3))
2349 fv = simple_strtoul(this_opt+3, NULL, 0);
2350 else if (!strncmp(this_opt, "mem:", 4))
2351 mem = simple_strtoul(this_opt+4, NULL, 0);
2352 else if (!strncmp(this_opt, "mode:", 5))
2353 strlcpy(videomode, this_opt+5, sizeof(videomode));
2354 else if (!strncmp(this_opt, "outputs:", 8))
2355 strlcpy(outputs, this_opt+8, sizeof(outputs));
2356 else if (!strncmp(this_opt, "dfp:", 4)) {
2357 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2358 dfp = 1;
2359 }
2360 #ifdef CONFIG_PPC_PMAC
2361 else if (!strncmp(this_opt, "vmode:", 6)) {
2362 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2363 if (vmode > 0 && vmode <= VMODE_MAX)
2364 default_vmode = vmode;
2365 } else if (!strncmp(this_opt, "cmode:", 6)) {
2366 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2367 switch (cmode) {
2368 case 0:
2369 case 8:
2370 default_cmode = CMODE_8;
2371 break;
2372 case 15:
2373 case 16:
2374 default_cmode = CMODE_16;
2375 break;
2376 case 24:
2377 case 32:
2378 default_cmode = CMODE_32;
2379 break;
2380 }
2381 }
2382 #endif
2383 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2384 disabled = 1;
2385 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2386 disabled = 0;
2387 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2388 sgram = 1;
2389 else if (!strcmp(this_opt, "sdram"))
2390 sgram = 0;
2391 else if (!strncmp(this_opt, "memtype:", 8))
2392 memtype = simple_strtoul(this_opt+8, NULL, 0);
2393 else {
2394 int value = 1;
2395
2396 if (!strncmp(this_opt, "no", 2)) {
2397 value = 0;
2398 this_opt += 2;
2399 }
2400 if (! strcmp(this_opt, "inverse"))
2401 inverse = value;
2402 else if (!strcmp(this_opt, "accel"))
2403 noaccel = !value;
2404 else if (!strcmp(this_opt, "pan"))
2405 nopan = !value;
2406 else if (!strcmp(this_opt, "pciretry"))
2407 no_pci_retry = !value;
2408 else if (!strcmp(this_opt, "vga"))
2409 novga = !value;
2410 else if (!strcmp(this_opt, "bios"))
2411 nobios = !value;
2412 else if (!strcmp(this_opt, "init"))
2413 noinit = !value;
2414 #ifdef CONFIG_MTRR
2415 else if (!strcmp(this_opt, "mtrr"))
2416 mtrr = value;
2417 #endif
2418 else if (!strcmp(this_opt, "inv24"))
2419 inv24 = value;
2420 else if (!strcmp(this_opt, "cross4MB"))
2421 cross4MB = value;
2422 else if (!strcmp(this_opt, "grayscale"))
2423 grayscale = value;
2424 else if (!strcmp(this_opt, "dfp"))
2425 dfp = value;
2426 else {
2427 strlcpy(videomode, this_opt, sizeof(videomode));
2428 }
2429 }
2430 }
2431 return 0;
2432 }
2433
2434 static int __initdata initialized = 0;
2435
2436 static int __init matroxfb_init(void)
2437 {
2438 char *option = NULL;
2439 int err = 0;
2440
2441 DBG(__func__)
2442
2443 if (fb_get_options("matroxfb", &option))
2444 return -ENODEV;
2445 matroxfb_setup(option);
2446
2447 if (disabled)
2448 return -ENXIO;
2449 if (!initialized) {
2450 initialized = 1;
2451 err = matrox_init();
2452 }
2453 hotplug = 1;
2454 /* never return failure, user can hotplug matrox later... */
2455 return err;
2456 }
2457
2458 module_init(matroxfb_init);
2459
2460 #else
2461
2462 /* *************************** init module code **************************** */
2463
2464 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2465 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2466 MODULE_LICENSE("GPL");
2467
2468 module_param(mem, int, 0);
2469 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2470 module_param(disabled, int, 0);
2471 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2472 module_param(noaccel, int, 0);
2473 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2474 module_param(nopan, int, 0);
2475 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2476 module_param(no_pci_retry, int, 0);
2477 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2478 module_param(novga, int, 0);
2479 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2480 module_param(nobios, int, 0);
2481 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2482 module_param(noinit, int, 0);
2483 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2484 module_param(memtype, int, 0);
2485 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2486 #ifdef CONFIG_MTRR
2487 module_param(mtrr, int, 0);
2488 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2489 #endif
2490 module_param(sgram, int, 0);
2491 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2492 module_param(inv24, int, 0);
2493 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2494 module_param(inverse, int, 0);
2495 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2496 module_param(dev, int, 0);
2497 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2498 module_param(vesa, int, 0);
2499 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2500 module_param(xres, int, 0);
2501 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2502 module_param(yres, int, 0);
2503 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2504 module_param(upper, int, 0);
2505 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2506 module_param(lower, int, 0);
2507 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2508 module_param(vslen, int, 0);
2509 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2510 module_param(left, int, 0);
2511 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2512 module_param(right, int, 0);
2513 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2514 module_param(hslen, int, 0);
2515 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2516 module_param(pixclock, int, 0);
2517 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2518 module_param(sync, int, 0);
2519 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2520 module_param(depth, int, 0);
2521 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2522 module_param(maxclk, int, 0);
2523 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2524 module_param(fh, int, 0);
2525 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2526 module_param(fv, int, 0);
2527 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2528 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
2529 module_param(grayscale, int, 0);
2530 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2531 module_param(cross4MB, int, 0);
2532 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2533 module_param(dfp, int, 0);
2534 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2535 module_param(dfp_type, int, 0);
2536 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2537 module_param_string(outputs, outputs, sizeof(outputs), 0);
2538 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2539 #ifdef CONFIG_PPC_PMAC
2540 module_param_named(vmode, default_vmode, int, 0);
2541 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2542 module_param_named(cmode, default_cmode, int, 0);
2543 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2544 #endif
2545
2546 int __init init_module(void){
2547
2548 DBG(__func__)
2549
2550 if (disabled)
2551 return -ENXIO;
2552
2553 if (depth == 0)
2554 depth = RSText;
2555 else if (depth == 4)
2556 depth = RS4bpp;
2557 else if (depth == 8)
2558 depth = RS8bpp;
2559 else if (depth == 15)
2560 depth = RS15bpp;
2561 else if (depth == 16)
2562 depth = RS16bpp;
2563 else if (depth == 24)
2564 depth = RS24bpp;
2565 else if (depth == 32)
2566 depth = RS32bpp;
2567 else if (depth != -1) {
2568 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2569 depth = -1;
2570 }
2571 matrox_init();
2572 /* never return failure; user can hotplug matrox later... */
2573 return 0;
2574 }
2575 #endif /* MODULE */
2576
2577 module_exit(matrox_done);
2578 EXPORT_SYMBOL(matroxfb_register_driver);
2579 EXPORT_SYMBOL(matroxfb_unregister_driver);
2580 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2581 EXPORT_SYMBOL(matroxfb_enable_irq);
2582
2583 /*
2584 * Overrides for Emacs so that we follow Linus's tabbing style.
2585 * ---------------------------------------------------------------------------
2586 * Local variables:
2587 * c-basic-offset: 8
2588 * End:
2589 */
2590
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