2 * SuperH Mobile LCDC Framebuffer
4 * Copyright (c) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
15 #include <linux/clk.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/interrupt.h>
20 #include <linux/vmalloc.h>
21 #include <linux/ioctl.h>
22 #include <linux/slab.h>
23 #include <video/sh_mobile_lcdc.h>
24 #include <asm/atomic.h>
26 #include "sh_mobile_lcdcfb.h"
28 #define SIDE_B_OFFSET 0x1000
29 #define MIRROR_OFFSET 0x2000
31 /* shared registers */
33 #define _LDDCKSTPR 0x414
36 #define _LDCNT1R 0x470
37 #define _LDCNT2R 0x474
38 #define _LDRCNTR 0x478
40 #define _LDDWD0R 0x800
45 /* shared registers and their order for context save/restore */
46 static int lcdc_shared_regs
[] = {
54 #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
56 static unsigned long lcdc_offs_mainlcd
[NR_CH_REGS
] = {
75 static unsigned long lcdc_offs_sublcd
[NR_CH_REGS
] = {
93 #define START_LCDC 0x00000001
94 #define LCDC_RESET 0x00000100
95 #define DISPLAY_BEU 0x00000008
96 #define LCDC_ENABLE 0x00000001
97 #define LDINTR_FE 0x00000400
98 #define LDINTR_VSE 0x00000200
99 #define LDINTR_VEE 0x00000100
100 #define LDINTR_FS 0x00000004
101 #define LDINTR_VSS 0x00000002
102 #define LDINTR_VES 0x00000001
103 #define LDRCNTR_SRS 0x00020000
104 #define LDRCNTR_SRC 0x00010000
105 #define LDRCNTR_MRS 0x00000002
106 #define LDRCNTR_MRC 0x00000001
107 #define LDSR_MRS 0x00000100
109 struct sh_mobile_lcdc_priv
{
115 unsigned long lddckr
;
116 struct sh_mobile_lcdc_chan ch
[2];
117 struct notifier_block notifier
;
118 unsigned long saved_shared_regs
[NR_SHARED_REGS
];
122 static bool banked(int reg_nr
)
141 static void lcdc_write_chan(struct sh_mobile_lcdc_chan
*chan
,
142 int reg_nr
, unsigned long data
)
144 iowrite32(data
, chan
->lcdc
->base
+ chan
->reg_offs
[reg_nr
]);
146 iowrite32(data
, chan
->lcdc
->base
+ chan
->reg_offs
[reg_nr
] +
150 static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan
*chan
,
151 int reg_nr
, unsigned long data
)
153 iowrite32(data
, chan
->lcdc
->base
+ chan
->reg_offs
[reg_nr
] +
157 static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan
*chan
,
160 return ioread32(chan
->lcdc
->base
+ chan
->reg_offs
[reg_nr
]);
163 static void lcdc_write(struct sh_mobile_lcdc_priv
*priv
,
164 unsigned long reg_offs
, unsigned long data
)
166 iowrite32(data
, priv
->base
+ reg_offs
);
169 static unsigned long lcdc_read(struct sh_mobile_lcdc_priv
*priv
,
170 unsigned long reg_offs
)
172 return ioread32(priv
->base
+ reg_offs
);
175 static void lcdc_wait_bit(struct sh_mobile_lcdc_priv
*priv
,
176 unsigned long reg_offs
,
177 unsigned long mask
, unsigned long until
)
179 while ((lcdc_read(priv
, reg_offs
) & mask
) != until
)
183 static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan
*chan
)
185 return chan
->cfg
.chan
== LCDC_CHAN_SUBLCD
;
188 static void lcdc_sys_write_index(void *handle
, unsigned long data
)
190 struct sh_mobile_lcdc_chan
*ch
= handle
;
192 lcdc_write(ch
->lcdc
, _LDDWD0R
, data
| 0x10000000);
193 lcdc_wait_bit(ch
->lcdc
, _LDSR
, 2, 0);
194 lcdc_write(ch
->lcdc
, _LDDWAR
, 1 | (lcdc_chan_is_sublcd(ch
) ? 2 : 0));
195 lcdc_wait_bit(ch
->lcdc
, _LDSR
, 2, 0);
198 static void lcdc_sys_write_data(void *handle
, unsigned long data
)
200 struct sh_mobile_lcdc_chan
*ch
= handle
;
202 lcdc_write(ch
->lcdc
, _LDDWD0R
, data
| 0x11000000);
203 lcdc_wait_bit(ch
->lcdc
, _LDSR
, 2, 0);
204 lcdc_write(ch
->lcdc
, _LDDWAR
, 1 | (lcdc_chan_is_sublcd(ch
) ? 2 : 0));
205 lcdc_wait_bit(ch
->lcdc
, _LDSR
, 2, 0);
208 static unsigned long lcdc_sys_read_data(void *handle
)
210 struct sh_mobile_lcdc_chan
*ch
= handle
;
212 lcdc_write(ch
->lcdc
, _LDDRDR
, 0x01000000);
213 lcdc_wait_bit(ch
->lcdc
, _LDSR
, 2, 0);
214 lcdc_write(ch
->lcdc
, _LDDRAR
, 1 | (lcdc_chan_is_sublcd(ch
) ? 2 : 0));
216 lcdc_wait_bit(ch
->lcdc
, _LDSR
, 2, 0);
218 return lcdc_read(ch
->lcdc
, _LDDRDR
) & 0x3ffff;
221 struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops
= {
222 lcdc_sys_write_index
,
227 static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv
*priv
)
229 if (atomic_inc_and_test(&priv
->hw_usecnt
)) {
230 pm_runtime_get_sync(priv
->dev
);
232 clk_enable(priv
->dot_clk
);
236 static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv
*priv
)
238 if (atomic_sub_return(1, &priv
->hw_usecnt
) == -1) {
240 clk_disable(priv
->dot_clk
);
241 pm_runtime_put(priv
->dev
);
245 static int sh_mobile_lcdc_sginit(struct fb_info
*info
,
246 struct list_head
*pagelist
)
248 struct sh_mobile_lcdc_chan
*ch
= info
->par
;
249 unsigned int nr_pages_max
= info
->fix
.smem_len
>> PAGE_SHIFT
;
253 sg_init_table(ch
->sglist
, nr_pages_max
);
255 list_for_each_entry(page
, pagelist
, lru
)
256 sg_set_page(&ch
->sglist
[nr_pages
++], page
, PAGE_SIZE
, 0);
261 static void sh_mobile_lcdc_deferred_io(struct fb_info
*info
,
262 struct list_head
*pagelist
)
264 struct sh_mobile_lcdc_chan
*ch
= info
->par
;
265 struct sh_mobile_lcdc_board_cfg
*bcfg
= &ch
->cfg
.board_cfg
;
267 /* enable clocks before accessing hardware */
268 sh_mobile_lcdc_clk_on(ch
->lcdc
);
271 * It's possible to get here without anything on the pagelist via
272 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
273 * invocation. In the former case, the acceleration routines are
274 * stepped in to when using the framebuffer console causing the
275 * workqueue to be scheduled without any dirty pages on the list.
277 * Despite this, a panel update is still needed given that the
278 * acceleration routines have their own methods for writing in
279 * that still need to be updated.
281 * The fsync() and empty pagelist case could be optimized for,
282 * but we don't bother, as any application exhibiting such
283 * behaviour is fundamentally broken anyways.
285 if (!list_empty(pagelist
)) {
286 unsigned int nr_pages
= sh_mobile_lcdc_sginit(info
, pagelist
);
288 /* trigger panel update */
289 dma_map_sg(info
->dev
, ch
->sglist
, nr_pages
, DMA_TO_DEVICE
);
290 if (bcfg
->start_transfer
)
291 bcfg
->start_transfer(bcfg
->board_data
, ch
,
292 &sh_mobile_lcdc_sys_bus_ops
);
293 lcdc_write_chan(ch
, LDSM2R
, 1);
294 dma_unmap_sg(info
->dev
, ch
->sglist
, nr_pages
, DMA_TO_DEVICE
);
296 if (bcfg
->start_transfer
)
297 bcfg
->start_transfer(bcfg
->board_data
, ch
,
298 &sh_mobile_lcdc_sys_bus_ops
);
299 lcdc_write_chan(ch
, LDSM2R
, 1);
303 static void sh_mobile_lcdc_deferred_io_touch(struct fb_info
*info
)
305 struct fb_deferred_io
*fbdefio
= info
->fbdefio
;
308 schedule_delayed_work(&info
->deferred_work
, fbdefio
->delay
);
311 static irqreturn_t
sh_mobile_lcdc_irq(int irq
, void *data
)
313 struct sh_mobile_lcdc_priv
*priv
= data
;
314 struct sh_mobile_lcdc_chan
*ch
;
316 unsigned long ldintr
;
320 /* acknowledge interrupt */
321 ldintr
= tmp
= lcdc_read(priv
, _LDINTR
);
323 * disable further VSYNC End IRQs, preserve all other enabled IRQs,
324 * write 0 to bits 0-6 to ack all triggered IRQs.
326 tmp
&= 0xffffff00 & ~LDINTR_VEE
;
327 lcdc_write(priv
, _LDINTR
, tmp
);
329 /* figure out if this interrupt is for main or sub lcd */
330 is_sub
= (lcdc_read(priv
, _LDSR
) & (1 << 10)) ? 1 : 0;
332 /* wake up channel and disable clocks */
333 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++) {
340 if (ldintr
& LDINTR_FS
) {
341 if (is_sub
== lcdc_chan_is_sublcd(ch
)) {
343 wake_up(&ch
->frame_end_wait
);
345 sh_mobile_lcdc_clk_off(priv
);
350 if (ldintr
& LDINTR_VES
)
351 complete(&ch
->vsync_completion
);
357 static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv
*priv
,
360 unsigned long tmp
= lcdc_read(priv
, _LDCNT2R
);
363 /* start or stop the lcdc */
365 lcdc_write(priv
, _LDCNT2R
, tmp
| START_LCDC
);
367 lcdc_write(priv
, _LDCNT2R
, tmp
& ~START_LCDC
);
369 /* wait until power is applied/stopped on all channels */
370 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++)
371 if (lcdc_read(priv
, _LDCNT2R
) & priv
->ch
[k
].enabled
)
373 tmp
= lcdc_read_chan(&priv
->ch
[k
], LDPMR
) & 3;
374 if (start
&& tmp
== 3)
376 if (!start
&& tmp
== 0)
382 lcdc_write(priv
, _LDDCKSTPR
, 1); /* stop dotclock */
385 static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan
*ch
)
387 struct fb_var_screeninfo
*var
= &ch
->info
->var
;
388 unsigned long h_total
, hsync_pos
;
391 tmp
= ch
->ldmt1r_value
;
392 tmp
|= (var
->sync
& FB_SYNC_VERT_HIGH_ACT
) ? 0 : 1 << 28;
393 tmp
|= (var
->sync
& FB_SYNC_HOR_HIGH_ACT
) ? 0 : 1 << 27;
394 tmp
|= (ch
->cfg
.flags
& LCDC_FLAGS_DWPOL
) ? 1 << 26 : 0;
395 tmp
|= (ch
->cfg
.flags
& LCDC_FLAGS_DIPOL
) ? 1 << 25 : 0;
396 tmp
|= (ch
->cfg
.flags
& LCDC_FLAGS_DAPOL
) ? 1 << 24 : 0;
397 tmp
|= (ch
->cfg
.flags
& LCDC_FLAGS_HSCNT
) ? 1 << 17 : 0;
398 tmp
|= (ch
->cfg
.flags
& LCDC_FLAGS_DWCNT
) ? 1 << 16 : 0;
399 lcdc_write_chan(ch
, LDMT1R
, tmp
);
402 lcdc_write_chan(ch
, LDMT2R
, ch
->cfg
.sys_bus_cfg
.ldmt2r
);
403 lcdc_write_chan(ch
, LDMT3R
, ch
->cfg
.sys_bus_cfg
.ldmt3r
);
405 /* horizontal configuration */
406 h_total
= var
->xres
+ var
->hsync_len
+
407 var
->left_margin
+ var
->right_margin
;
408 tmp
= h_total
/ 8; /* HTCN */
409 tmp
|= (var
->xres
/ 8) << 16; /* HDCN */
410 lcdc_write_chan(ch
, LDHCNR
, tmp
);
412 hsync_pos
= var
->xres
+ var
->right_margin
;
413 tmp
= hsync_pos
/ 8; /* HSYNP */
414 tmp
|= (var
->hsync_len
/ 8) << 16; /* HSYNW */
415 lcdc_write_chan(ch
, LDHSYNR
, tmp
);
417 /* vertical configuration */
418 tmp
= var
->yres
+ var
->vsync_len
+
419 var
->upper_margin
+ var
->lower_margin
; /* VTLN */
420 tmp
|= var
->yres
<< 16; /* VDLN */
421 lcdc_write_chan(ch
, LDVLNR
, tmp
);
423 tmp
= var
->yres
+ var
->lower_margin
; /* VSYNP */
424 tmp
|= var
->vsync_len
<< 16; /* VSYNW */
425 lcdc_write_chan(ch
, LDVSYNR
, tmp
);
427 /* Adjust horizontal synchronisation for HDMI */
428 tmp
= ((var
->xres
& 7) << 24) |
429 ((h_total
& 7) << 16) |
430 ((var
->hsync_len
& 7) << 8) |
432 lcdc_write_chan(ch
, LDHAJR
, tmp
);
435 static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv
*priv
)
437 struct sh_mobile_lcdc_chan
*ch
;
438 struct sh_mobile_lcdc_board_cfg
*board_cfg
;
443 /* enable clocks before accessing the hardware */
444 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++)
445 if (priv
->ch
[k
].enabled
)
446 sh_mobile_lcdc_clk_on(priv
);
449 lcdc_write(priv
, _LDCNT2R
, lcdc_read(priv
, _LDCNT2R
) | LCDC_RESET
);
450 lcdc_wait_bit(priv
, _LDCNT2R
, LCDC_RESET
, 0);
452 /* enable LCDC channels */
453 tmp
= lcdc_read(priv
, _LDCNT2R
);
454 tmp
|= priv
->ch
[0].enabled
;
455 tmp
|= priv
->ch
[1].enabled
;
456 lcdc_write(priv
, _LDCNT2R
, tmp
);
458 /* read data from external memory, avoid using the BEU for now */
459 lcdc_write(priv
, _LDCNT2R
, lcdc_read(priv
, _LDCNT2R
) & ~DISPLAY_BEU
);
461 /* stop the lcdc first */
462 sh_mobile_lcdc_start_stop(priv
, 0);
464 /* configure clocks */
466 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++) {
469 if (!priv
->ch
[k
].enabled
)
472 m
= ch
->cfg
.clock_divider
;
478 tmp
|= m
<< (lcdc_chan_is_sublcd(ch
) ? 8 : 0);
480 lcdc_write_chan(ch
, LDDCKPAT1R
, 0x00000000);
481 lcdc_write_chan(ch
, LDDCKPAT2R
, (1 << (m
/2)) - 1);
484 lcdc_write(priv
, _LDDCKR
, tmp
);
486 /* start dotclock again */
487 lcdc_write(priv
, _LDDCKSTPR
, 0);
488 lcdc_wait_bit(priv
, _LDDCKSTPR
, ~0, 0);
490 /* interrupts are disabled to begin with */
491 lcdc_write(priv
, _LDINTR
, 0);
493 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++) {
499 sh_mobile_lcdc_geometry(ch
);
502 lcdc_write_chan(ch
, LDPMR
, 0);
504 board_cfg
= &ch
->cfg
.board_cfg
;
505 if (board_cfg
->setup_sys
)
506 ret
= board_cfg
->setup_sys(board_cfg
->board_data
, ch
,
507 &sh_mobile_lcdc_sys_bus_ops
);
512 /* word and long word swap */
513 lcdc_write(priv
, _LDDDSR
, lcdc_read(priv
, _LDDDSR
) | 6);
515 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++) {
518 if (!priv
->ch
[k
].enabled
)
521 /* set bpp format in PKF[4:0] */
522 tmp
= lcdc_read_chan(ch
, LDDFR
);
523 tmp
&= ~(0x0001001f);
524 tmp
|= (ch
->info
->var
.bits_per_pixel
== 16) ? 3 : 0;
525 lcdc_write_chan(ch
, LDDFR
, tmp
);
527 /* point out our frame buffer */
528 lcdc_write_chan(ch
, LDSA1R
, ch
->info
->fix
.smem_start
);
531 lcdc_write_chan(ch
, LDMLSR
, ch
->info
->fix
.line_length
);
533 /* setup deferred io if SYS bus */
534 tmp
= ch
->cfg
.sys_bus_cfg
.deferred_io_msec
;
535 if (ch
->ldmt1r_value
& (1 << 12) && tmp
) {
536 ch
->defio
.deferred_io
= sh_mobile_lcdc_deferred_io
;
537 ch
->defio
.delay
= msecs_to_jiffies(tmp
);
538 ch
->info
->fbdefio
= &ch
->defio
;
539 fb_deferred_io_init(ch
->info
);
542 lcdc_write_chan(ch
, LDSM1R
, 1);
544 /* enable "Frame End Interrupt Enable" bit */
545 lcdc_write(priv
, _LDINTR
, LDINTR_FE
);
548 /* continuous read mode */
549 lcdc_write_chan(ch
, LDSM1R
, 0);
554 lcdc_write(priv
, _LDCNT1R
, LCDC_ENABLE
);
557 sh_mobile_lcdc_start_stop(priv
, 1);
560 /* tell the board code to enable the panel */
561 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++) {
566 board_cfg
= &ch
->cfg
.board_cfg
;
567 if (try_module_get(board_cfg
->owner
) && board_cfg
->display_on
) {
568 board_cfg
->display_on(board_cfg
->board_data
, ch
->info
);
569 module_put(board_cfg
->owner
);
576 static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv
*priv
)
578 struct sh_mobile_lcdc_chan
*ch
;
579 struct sh_mobile_lcdc_board_cfg
*board_cfg
;
582 /* clean up deferred io and ask board code to disable panel */
583 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++) {
589 * flush frame, and wait for frame end interrupt
590 * clean up deferred io and enable clock
592 if (ch
->info
&& ch
->info
->fbdefio
) {
594 schedule_delayed_work(&ch
->info
->deferred_work
, 0);
595 wait_event(ch
->frame_end_wait
, ch
->frame_end
);
596 fb_deferred_io_cleanup(ch
->info
);
597 ch
->info
->fbdefio
= NULL
;
598 sh_mobile_lcdc_clk_on(priv
);
601 board_cfg
= &ch
->cfg
.board_cfg
;
602 if (try_module_get(board_cfg
->owner
) && board_cfg
->display_off
) {
603 board_cfg
->display_off(board_cfg
->board_data
);
604 module_put(board_cfg
->owner
);
610 sh_mobile_lcdc_start_stop(priv
, 0);
615 for (k
= 0; k
< ARRAY_SIZE(priv
->ch
); k
++)
616 if (priv
->ch
[k
].enabled
)
617 sh_mobile_lcdc_clk_off(priv
);
620 static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan
*ch
)
624 switch (ch
->cfg
.interface_type
) {
625 case RGB8
: ifm
= 0; miftyp
= 0; break;
626 case RGB9
: ifm
= 0; miftyp
= 4; break;
627 case RGB12A
: ifm
= 0; miftyp
= 5; break;
628 case RGB12B
: ifm
= 0; miftyp
= 6; break;
629 case RGB16
: ifm
= 0; miftyp
= 7; break;
630 case RGB18
: ifm
= 0; miftyp
= 10; break;
631 case RGB24
: ifm
= 0; miftyp
= 11; break;
632 case SYS8A
: ifm
= 1; miftyp
= 0; break;
633 case SYS8B
: ifm
= 1; miftyp
= 1; break;
634 case SYS8C
: ifm
= 1; miftyp
= 2; break;
635 case SYS8D
: ifm
= 1; miftyp
= 3; break;
636 case SYS9
: ifm
= 1; miftyp
= 4; break;
637 case SYS12
: ifm
= 1; miftyp
= 5; break;
638 case SYS16A
: ifm
= 1; miftyp
= 7; break;
639 case SYS16B
: ifm
= 1; miftyp
= 8; break;
640 case SYS16C
: ifm
= 1; miftyp
= 9; break;
641 case SYS18
: ifm
= 1; miftyp
= 10; break;
642 case SYS24
: ifm
= 1; miftyp
= 11; break;
646 /* SUBLCD only supports SYS interface */
647 if (lcdc_chan_is_sublcd(ch
)) {
654 ch
->ldmt1r_value
= (ifm
<< 12) | miftyp
;
660 static int sh_mobile_lcdc_setup_clocks(struct platform_device
*pdev
,
662 struct sh_mobile_lcdc_priv
*priv
)
667 switch (clock_source
) {
668 case LCDC_CLK_BUS
: str
= "bus_clk"; icksel
= 0; break;
669 case LCDC_CLK_PERIPHERAL
: str
= "peripheral_clk"; icksel
= 1; break;
670 case LCDC_CLK_EXTERNAL
: str
= NULL
; icksel
= 2; break;
675 priv
->lddckr
= icksel
<< 16;
678 priv
->dot_clk
= clk_get(&pdev
->dev
, str
);
679 if (IS_ERR(priv
->dot_clk
)) {
680 dev_err(&pdev
->dev
, "cannot get dot clock %s\n", str
);
681 return PTR_ERR(priv
->dot_clk
);
685 /* Runtime PM support involves two step for this driver:
686 * 1) Enable Runtime PM
687 * 2) Force Runtime PM Resume since hardware is accessed from probe()
689 priv
->dev
= &pdev
->dev
;
690 pm_runtime_enable(priv
->dev
);
691 pm_runtime_resume(priv
->dev
);
695 static int sh_mobile_lcdc_setcolreg(u_int regno
,
696 u_int red
, u_int green
, u_int blue
,
697 u_int transp
, struct fb_info
*info
)
699 u32
*palette
= info
->pseudo_palette
;
701 if (regno
>= PALETTE_NR
)
704 /* only FB_VISUAL_TRUECOLOR supported */
706 red
>>= 16 - info
->var
.red
.length
;
707 green
>>= 16 - info
->var
.green
.length
;
708 blue
>>= 16 - info
->var
.blue
.length
;
709 transp
>>= 16 - info
->var
.transp
.length
;
711 palette
[regno
] = (red
<< info
->var
.red
.offset
) |
712 (green
<< info
->var
.green
.offset
) |
713 (blue
<< info
->var
.blue
.offset
) |
714 (transp
<< info
->var
.transp
.offset
);
719 static struct fb_fix_screeninfo sh_mobile_lcdc_fix
= {
720 .id
= "SH Mobile LCDC",
721 .type
= FB_TYPE_PACKED_PIXELS
,
722 .visual
= FB_VISUAL_TRUECOLOR
,
723 .accel
= FB_ACCEL_NONE
,
729 static void sh_mobile_lcdc_fillrect(struct fb_info
*info
,
730 const struct fb_fillrect
*rect
)
732 sys_fillrect(info
, rect
);
733 sh_mobile_lcdc_deferred_io_touch(info
);
736 static void sh_mobile_lcdc_copyarea(struct fb_info
*info
,
737 const struct fb_copyarea
*area
)
739 sys_copyarea(info
, area
);
740 sh_mobile_lcdc_deferred_io_touch(info
);
743 static void sh_mobile_lcdc_imageblit(struct fb_info
*info
,
744 const struct fb_image
*image
)
746 sys_imageblit(info
, image
);
747 sh_mobile_lcdc_deferred_io_touch(info
);
750 static int sh_mobile_fb_pan_display(struct fb_var_screeninfo
*var
,
751 struct fb_info
*info
)
753 struct sh_mobile_lcdc_chan
*ch
= info
->par
;
754 struct sh_mobile_lcdc_priv
*priv
= ch
->lcdc
;
755 unsigned long ldrcntr
;
756 unsigned long new_pan_offset
;
758 new_pan_offset
= (var
->yoffset
* info
->fix
.line_length
) +
759 (var
->xoffset
* (info
->var
.bits_per_pixel
/ 8));
761 if (new_pan_offset
== ch
->pan_offset
)
762 return 0; /* No change, do nothing */
764 ldrcntr
= lcdc_read(priv
, _LDRCNTR
);
766 /* Set the source address for the next refresh */
767 lcdc_write_chan_mirror(ch
, LDSA1R
, ch
->dma_handle
+ new_pan_offset
);
768 if (lcdc_chan_is_sublcd(ch
))
769 lcdc_write(ch
->lcdc
, _LDRCNTR
, ldrcntr
^ LDRCNTR_SRS
);
771 lcdc_write(ch
->lcdc
, _LDRCNTR
, ldrcntr
^ LDRCNTR_MRS
);
773 ch
->pan_offset
= new_pan_offset
;
775 sh_mobile_lcdc_deferred_io_touch(info
);
780 static int sh_mobile_wait_for_vsync(struct fb_info
*info
)
782 struct sh_mobile_lcdc_chan
*ch
= info
->par
;
783 unsigned long ldintr
;
786 /* Enable VSync End interrupt */
787 ldintr
= lcdc_read(ch
->lcdc
, _LDINTR
);
788 ldintr
|= LDINTR_VEE
;
789 lcdc_write(ch
->lcdc
, _LDINTR
, ldintr
);
791 ret
= wait_for_completion_interruptible_timeout(&ch
->vsync_completion
,
792 msecs_to_jiffies(100));
799 static int sh_mobile_ioctl(struct fb_info
*info
, unsigned int cmd
,
805 case FBIO_WAITFORVSYNC
:
806 retval
= sh_mobile_wait_for_vsync(info
);
810 retval
= -ENOIOCTLCMD
;
816 static struct fb_ops sh_mobile_lcdc_ops
= {
817 .owner
= THIS_MODULE
,
818 .fb_setcolreg
= sh_mobile_lcdc_setcolreg
,
819 .fb_read
= fb_sys_read
,
820 .fb_write
= fb_sys_write
,
821 .fb_fillrect
= sh_mobile_lcdc_fillrect
,
822 .fb_copyarea
= sh_mobile_lcdc_copyarea
,
823 .fb_imageblit
= sh_mobile_lcdc_imageblit
,
824 .fb_pan_display
= sh_mobile_fb_pan_display
,
825 .fb_ioctl
= sh_mobile_ioctl
,
828 static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo
*var
, int bpp
)
831 case 16: /* PKF[4:0] = 00011 - RGB 565 */
832 var
->red
.offset
= 11;
834 var
->green
.offset
= 5;
835 var
->green
.length
= 6;
836 var
->blue
.offset
= 0;
837 var
->blue
.length
= 5;
838 var
->transp
.offset
= 0;
839 var
->transp
.length
= 0;
842 case 32: /* PKF[4:0] = 00000 - RGB 888
843 * sh7722 pdf says 00RRGGBB but reality is GGBB00RR
844 * this may be because LDDDSR has word swap enabled..
848 var
->green
.offset
= 24;
849 var
->green
.length
= 8;
850 var
->blue
.offset
= 16;
851 var
->blue
.length
= 8;
852 var
->transp
.offset
= 0;
853 var
->transp
.length
= 0;
858 var
->bits_per_pixel
= bpp
;
859 var
->red
.msb_right
= 0;
860 var
->green
.msb_right
= 0;
861 var
->blue
.msb_right
= 0;
862 var
->transp
.msb_right
= 0;
866 static int sh_mobile_lcdc_suspend(struct device
*dev
)
868 struct platform_device
*pdev
= to_platform_device(dev
);
870 sh_mobile_lcdc_stop(platform_get_drvdata(pdev
));
874 static int sh_mobile_lcdc_resume(struct device
*dev
)
876 struct platform_device
*pdev
= to_platform_device(dev
);
878 return sh_mobile_lcdc_start(platform_get_drvdata(pdev
));
881 static int sh_mobile_lcdc_runtime_suspend(struct device
*dev
)
883 struct platform_device
*pdev
= to_platform_device(dev
);
884 struct sh_mobile_lcdc_priv
*p
= platform_get_drvdata(pdev
);
885 struct sh_mobile_lcdc_chan
*ch
;
888 /* save per-channel registers */
889 for (k
= 0; k
< ARRAY_SIZE(p
->ch
); k
++) {
893 for (n
= 0; n
< NR_CH_REGS
; n
++)
894 ch
->saved_ch_regs
[n
] = lcdc_read_chan(ch
, n
);
897 /* save shared registers */
898 for (n
= 0; n
< NR_SHARED_REGS
; n
++)
899 p
->saved_shared_regs
[n
] = lcdc_read(p
, lcdc_shared_regs
[n
]);
901 /* turn off LCDC hardware */
902 lcdc_write(p
, _LDCNT1R
, 0);
906 static int sh_mobile_lcdc_runtime_resume(struct device
*dev
)
908 struct platform_device
*pdev
= to_platform_device(dev
);
909 struct sh_mobile_lcdc_priv
*p
= platform_get_drvdata(pdev
);
910 struct sh_mobile_lcdc_chan
*ch
;
913 /* restore per-channel registers */
914 for (k
= 0; k
< ARRAY_SIZE(p
->ch
); k
++) {
918 for (n
= 0; n
< NR_CH_REGS
; n
++)
919 lcdc_write_chan(ch
, n
, ch
->saved_ch_regs
[n
]);
922 /* restore shared registers */
923 for (n
= 0; n
< NR_SHARED_REGS
; n
++)
924 lcdc_write(p
, lcdc_shared_regs
[n
], p
->saved_shared_regs
[n
]);
929 static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops
= {
930 .suspend
= sh_mobile_lcdc_suspend
,
931 .resume
= sh_mobile_lcdc_resume
,
932 .runtime_suspend
= sh_mobile_lcdc_runtime_suspend
,
933 .runtime_resume
= sh_mobile_lcdc_runtime_resume
,
936 /* locking: called with info->lock held */
937 static int sh_mobile_lcdc_notify(struct notifier_block
*nb
,
938 unsigned long action
, void *data
)
940 struct fb_event
*event
= data
;
941 struct fb_info
*info
= event
->info
;
942 struct sh_mobile_lcdc_chan
*ch
= info
->par
;
943 struct sh_mobile_lcdc_board_cfg
*board_cfg
= &ch
->cfg
.board_cfg
;
944 struct fb_var_screeninfo
*var
;
946 if (&ch
->lcdc
->notifier
!= nb
)
949 dev_dbg(info
->dev
, "%s(): action = %lu, data = %p\n",
950 __func__
, action
, event
->data
);
953 case FB_EVENT_SUSPEND
:
954 if (try_module_get(board_cfg
->owner
) && board_cfg
->display_off
) {
955 board_cfg
->display_off(board_cfg
->board_data
);
956 module_put(board_cfg
->owner
);
958 pm_runtime_put(info
->device
);
960 case FB_EVENT_RESUME
:
963 /* HDMI must be enabled before LCDC configuration */
964 if (try_module_get(board_cfg
->owner
) && board_cfg
->display_on
) {
965 board_cfg
->display_on(board_cfg
->board_data
, ch
->info
);
966 module_put(board_cfg
->owner
);
969 /* Check if the new display is not in our modelist */
970 if (ch
->info
->modelist
.next
&&
971 !fb_match_mode(var
, &ch
->info
->modelist
)) {
972 struct fb_videomode mode
;
975 /* Can we handle this display? */
976 if (var
->xres
> ch
->cfg
.lcd_cfg
[0].xres
||
977 var
->yres
> ch
->cfg
.lcd_cfg
[0].yres
)
979 * LCDC resume failed, no need to continue with
982 return notifier_from_errno(-ENOMEM
);
984 /* Add to the modelist */
985 fb_var_to_videomode(&mode
, var
);
986 ret
= fb_add_videomode(&mode
, &ch
->info
->modelist
);
988 return notifier_from_errno(ret
);
991 pm_runtime_get_sync(info
->device
);
993 sh_mobile_lcdc_geometry(ch
);
999 static int sh_mobile_lcdc_remove(struct platform_device
*pdev
);
1001 static int __devinit
sh_mobile_lcdc_probe(struct platform_device
*pdev
)
1003 struct fb_info
*info
;
1004 struct sh_mobile_lcdc_priv
*priv
;
1005 struct sh_mobile_lcdc_info
*pdata
= pdev
->dev
.platform_data
;
1006 struct sh_mobile_lcdc_chan_cfg
*cfg
;
1007 struct resource
*res
;
1013 dev_err(&pdev
->dev
, "no platform data defined\n");
1017 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1018 i
= platform_get_irq(pdev
, 0);
1019 if (!res
|| i
< 0) {
1020 dev_err(&pdev
->dev
, "cannot get platform resources\n");
1024 priv
= kzalloc(sizeof(*priv
), GFP_KERNEL
);
1026 dev_err(&pdev
->dev
, "cannot allocate device data\n");
1030 platform_set_drvdata(pdev
, priv
);
1032 error
= request_irq(i
, sh_mobile_lcdc_irq
, IRQF_DISABLED
,
1033 dev_name(&pdev
->dev
), priv
);
1035 dev_err(&pdev
->dev
, "unable to request irq\n");
1040 atomic_set(&priv
->hw_usecnt
, -1);
1043 for (i
= 0; i
< ARRAY_SIZE(pdata
->ch
); i
++) {
1044 struct sh_mobile_lcdc_chan
*ch
= priv
->ch
+ j
;
1047 memcpy(&ch
->cfg
, &pdata
->ch
[i
], sizeof(pdata
->ch
[i
]));
1049 error
= sh_mobile_lcdc_check_interface(ch
);
1051 dev_err(&pdev
->dev
, "unsupported interface type\n");
1054 init_waitqueue_head(&ch
->frame_end_wait
);
1055 init_completion(&ch
->vsync_completion
);
1058 switch (pdata
->ch
[i
].chan
) {
1059 case LCDC_CHAN_MAINLCD
:
1060 ch
->enabled
= 1 << 1;
1061 ch
->reg_offs
= lcdc_offs_mainlcd
;
1064 case LCDC_CHAN_SUBLCD
:
1065 ch
->enabled
= 1 << 2;
1066 ch
->reg_offs
= lcdc_offs_sublcd
;
1073 dev_err(&pdev
->dev
, "no channels defined\n");
1078 priv
->base
= ioremap_nocache(res
->start
, resource_size(res
));
1082 error
= sh_mobile_lcdc_setup_clocks(pdev
, pdata
->clock_source
, priv
);
1084 dev_err(&pdev
->dev
, "unable to setup clocks\n");
1088 for (i
= 0; i
< j
; i
++) {
1089 struct fb_var_screeninfo
*var
;
1090 const struct fb_videomode
*lcd_cfg
, *max_cfg
= NULL
;
1091 struct sh_mobile_lcdc_chan
*ch
= priv
->ch
+ i
;
1092 unsigned long max_size
= 0;
1097 ch
->info
= framebuffer_alloc(0, &pdev
->dev
);
1099 dev_err(&pdev
->dev
, "unable to allocate fb_info\n");
1106 info
->fbops
= &sh_mobile_lcdc_ops
;
1107 fb_videomode_to_var(var
, &cfg
->lcd_cfg
[0]);
1108 /* Default Y virtual resolution is 2x panel size */
1109 var
->yres_virtual
= var
->yres
* 2;
1111 error
= sh_mobile_lcdc_set_bpp(var
, cfg
->bpp
);
1115 for (k
= 0, lcd_cfg
= cfg
->lcd_cfg
;
1118 unsigned long size
= lcd_cfg
->yres
* lcd_cfg
->xres
;
1120 if (size
> max_size
) {
1126 dev_dbg(&pdev
->dev
, "Found largest videomode %ux%u\n",
1127 max_cfg
->xres
, max_cfg
->yres
);
1129 info
->fix
= sh_mobile_lcdc_fix
;
1130 info
->fix
.line_length
= cfg
->lcd_cfg
[0].xres
* (cfg
->bpp
/ 8);
1131 info
->fix
.smem_len
= max_size
* (cfg
->bpp
/ 8) * 2;
1133 buf
= dma_alloc_coherent(&pdev
->dev
, info
->fix
.smem_len
,
1134 &ch
->dma_handle
, GFP_KERNEL
);
1136 dev_err(&pdev
->dev
, "unable to allocate buffer\n");
1141 info
->pseudo_palette
= &ch
->pseudo_palette
;
1142 info
->flags
= FBINFO_FLAG_DEFAULT
;
1144 error
= fb_alloc_cmap(&info
->cmap
, PALETTE_NR
, 0);
1146 dev_err(&pdev
->dev
, "unable to allocate cmap\n");
1147 dma_free_coherent(&pdev
->dev
, info
->fix
.smem_len
,
1148 buf
, ch
->dma_handle
);
1152 info
->fix
.smem_start
= ch
->dma_handle
;
1153 info
->screen_base
= buf
;
1154 info
->device
= &pdev
->dev
;
1161 error
= sh_mobile_lcdc_start(priv
);
1163 dev_err(&pdev
->dev
, "unable to start hardware\n");
1167 for (i
= 0; i
< j
; i
++) {
1168 struct sh_mobile_lcdc_chan
*ch
= priv
->ch
+ i
;
1172 if (info
->fbdefio
) {
1173 ch
->sglist
= vmalloc(sizeof(struct scatterlist
) *
1174 info
->fix
.smem_len
>> PAGE_SHIFT
);
1176 dev_err(&pdev
->dev
, "cannot allocate sglist\n");
1181 error
= register_framebuffer(info
);
1186 "registered %s/%s as %dx%d %dbpp.\n",
1188 (ch
->cfg
.chan
== LCDC_CHAN_MAINLCD
) ?
1189 "mainlcd" : "sublcd",
1190 (int) ch
->cfg
.lcd_cfg
[0].xres
,
1191 (int) ch
->cfg
.lcd_cfg
[0].yres
,
1194 /* deferred io mode: disable clock to save power */
1195 if (info
->fbdefio
|| info
->state
== FBINFO_STATE_SUSPENDED
)
1196 sh_mobile_lcdc_clk_off(priv
);
1199 /* Failure ignored */
1200 priv
->notifier
.notifier_call
= sh_mobile_lcdc_notify
;
1201 fb_register_client(&priv
->notifier
);
1205 sh_mobile_lcdc_remove(pdev
);
1210 static int sh_mobile_lcdc_remove(struct platform_device
*pdev
)
1212 struct sh_mobile_lcdc_priv
*priv
= platform_get_drvdata(pdev
);
1213 struct fb_info
*info
;
1216 fb_unregister_client(&priv
->notifier
);
1218 for (i
= 0; i
< ARRAY_SIZE(priv
->ch
); i
++)
1219 if (priv
->ch
[i
].info
&& priv
->ch
[i
].info
->dev
)
1220 unregister_framebuffer(priv
->ch
[i
].info
);
1222 sh_mobile_lcdc_stop(priv
);
1224 for (i
= 0; i
< ARRAY_SIZE(priv
->ch
); i
++) {
1225 info
= priv
->ch
[i
].info
;
1227 if (!info
|| !info
->device
)
1230 if (priv
->ch
[i
].sglist
)
1231 vfree(priv
->ch
[i
].sglist
);
1233 dma_free_coherent(&pdev
->dev
, info
->fix
.smem_len
,
1234 info
->screen_base
, priv
->ch
[i
].dma_handle
);
1235 fb_dealloc_cmap(&info
->cmap
);
1236 framebuffer_release(info
);
1240 clk_put(priv
->dot_clk
);
1243 pm_runtime_disable(priv
->dev
);
1246 iounmap(priv
->base
);
1249 free_irq(priv
->irq
, priv
);
1254 static struct platform_driver sh_mobile_lcdc_driver
= {
1256 .name
= "sh_mobile_lcdc_fb",
1257 .owner
= THIS_MODULE
,
1258 .pm
= &sh_mobile_lcdc_dev_pm_ops
,
1260 .probe
= sh_mobile_lcdc_probe
,
1261 .remove
= sh_mobile_lcdc_remove
,
1264 static int __init
sh_mobile_lcdc_init(void)
1266 return platform_driver_register(&sh_mobile_lcdc_driver
);
1269 static void __exit
sh_mobile_lcdc_exit(void)
1271 platform_driver_unregister(&sh_mobile_lcdc_driver
);
1274 module_init(sh_mobile_lcdc_init
);
1275 module_exit(sh_mobile_lcdc_exit
);
1277 MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
1278 MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
1279 MODULE_LICENSE("GPL v2");