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viafb: Add a simple interrupt management infrastructure
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1 /*
2 * Copyright 1998-2009 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
4 * Copyright 2009 Jonathan Corbet <corbet@lwn.net>
5 */
6
7 /*
8 * Core code for the Via multifunction framebuffer device.
9 */
10 #include "via-core.h"
11 #include "via_i2c.h"
12 #include "via-gpio.h"
13 #include "global.h"
14
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17
18 /*
19 * The default port config.
20 */
21 static struct via_port_cfg adap_configs[] = {
22 [VIA_PORT_26] = { VIA_PORT_I2C, VIA_MODE_OFF, VIASR, 0x26 },
23 [VIA_PORT_31] = { VIA_PORT_I2C, VIA_MODE_I2C, VIASR, 0x31 },
24 [VIA_PORT_25] = { VIA_PORT_GPIO, VIA_MODE_GPIO, VIASR, 0x25 },
25 [VIA_PORT_2C] = { VIA_PORT_GPIO, VIA_MODE_I2C, VIASR, 0x2c },
26 [VIA_PORT_3D] = { VIA_PORT_GPIO, VIA_MODE_GPIO, VIASR, 0x3d },
27 { 0, 0, 0, 0 }
28 };
29
30 /*
31 * We currently only support one viafb device (will there ever be
32 * more than one?), so just declare it globally here.
33 */
34 static struct viafb_dev global_dev;
35
36
37 /*
38 * Basic register access; spinlock required.
39 */
40 static inline void viafb_mmio_write(int reg, u32 v)
41 {
42 iowrite32(v, global_dev.engine_mmio + reg);
43 }
44
45 static inline int viafb_mmio_read(int reg)
46 {
47 return ioread32(global_dev.engine_mmio + reg);
48 }
49
50 /* ---------------------------------------------------------------------- */
51 /*
52 * Interrupt management. We have a single IRQ line for a lot of
53 * different functions, so we need to share it. The design here
54 * is that we don't want to reimplement the shared IRQ code here;
55 * we also want to avoid having contention for a single handler thread.
56 * So each subdev driver which needs interrupts just requests
57 * them directly from the kernel. We just have what's needed for
58 * overall access to the interrupt control register.
59 */
60
61 /*
62 * Which interrupts are enabled now?
63 */
64 static u32 viafb_enabled_ints;
65
66 static void viafb_int_init(void)
67 {
68 viafb_enabled_ints = 0;
69
70 viafb_mmio_write(VDE_INTERRUPT, 0);
71 }
72
73 /*
74 * Allow subdevs to ask for specific interrupts to be enabled. These
75 * functions must be called with reg_lock held
76 */
77 void viafb_irq_enable(u32 mask)
78 {
79 viafb_enabled_ints |= mask;
80 viafb_mmio_write(VDE_INTERRUPT, viafb_enabled_ints | VDE_I_ENABLE);
81 }
82 EXPORT_SYMBOL_GPL(viafb_irq_enable);
83
84 void viafb_irq_disable(u32 mask)
85 {
86 viafb_enabled_ints &= ~mask;
87 if (viafb_enabled_ints == 0)
88 viafb_mmio_write(VDE_INTERRUPT, 0); /* Disable entirely */
89 else
90 viafb_mmio_write(VDE_INTERRUPT,
91 viafb_enabled_ints | VDE_I_ENABLE);
92 }
93 EXPORT_SYMBOL_GPL(viafb_irq_disable);
94
95
96 /*
97 * Figure out how big our framebuffer memory is. Kind of ugly,
98 * but evidently we can't trust the information found in the
99 * fbdev configuration area.
100 */
101 static u16 via_function3[] = {
102 CLE266_FUNCTION3, KM400_FUNCTION3, CN400_FUNCTION3, CN700_FUNCTION3,
103 CX700_FUNCTION3, KM800_FUNCTION3, KM890_FUNCTION3, P4M890_FUNCTION3,
104 P4M900_FUNCTION3, VX800_FUNCTION3, VX855_FUNCTION3,
105 };
106
107 /* Get the BIOS-configured framebuffer size from PCI configuration space
108 * of function 3 in the respective chipset */
109 static int viafb_get_fb_size_from_pci(int chip_type)
110 {
111 int i;
112 u8 offset = 0;
113 u32 FBSize;
114 u32 VideoMemSize;
115
116 /* search for the "FUNCTION3" device in this chipset */
117 for (i = 0; i < ARRAY_SIZE(via_function3); i++) {
118 struct pci_dev *pdev;
119
120 pdev = pci_get_device(PCI_VENDOR_ID_VIA, via_function3[i],
121 NULL);
122 if (!pdev)
123 continue;
124
125 DEBUG_MSG(KERN_INFO "Device ID = %x\n", pdev->device);
126
127 switch (pdev->device) {
128 case CLE266_FUNCTION3:
129 case KM400_FUNCTION3:
130 offset = 0xE0;
131 break;
132 case CN400_FUNCTION3:
133 case CN700_FUNCTION3:
134 case CX700_FUNCTION3:
135 case KM800_FUNCTION3:
136 case KM890_FUNCTION3:
137 case P4M890_FUNCTION3:
138 case P4M900_FUNCTION3:
139 case VX800_FUNCTION3:
140 case VX855_FUNCTION3:
141 /*case CN750_FUNCTION3: */
142 offset = 0xA0;
143 break;
144 }
145
146 if (!offset)
147 break;
148
149 pci_read_config_dword(pdev, offset, &FBSize);
150 pci_dev_put(pdev);
151 }
152
153 if (!offset) {
154 printk(KERN_ERR "cannot determine framebuffer size\n");
155 return -EIO;
156 }
157
158 FBSize = FBSize & 0x00007000;
159 DEBUG_MSG(KERN_INFO "FB Size = %x\n", FBSize);
160
161 if (chip_type < UNICHROME_CX700) {
162 switch (FBSize) {
163 case 0x00004000:
164 VideoMemSize = (16 << 20); /*16M */
165 break;
166
167 case 0x00005000:
168 VideoMemSize = (32 << 20); /*32M */
169 break;
170
171 case 0x00006000:
172 VideoMemSize = (64 << 20); /*64M */
173 break;
174
175 default:
176 VideoMemSize = (32 << 20); /*32M */
177 break;
178 }
179 } else {
180 switch (FBSize) {
181 case 0x00001000:
182 VideoMemSize = (8 << 20); /*8M */
183 break;
184
185 case 0x00002000:
186 VideoMemSize = (16 << 20); /*16M */
187 break;
188
189 case 0x00003000:
190 VideoMemSize = (32 << 20); /*32M */
191 break;
192
193 case 0x00004000:
194 VideoMemSize = (64 << 20); /*64M */
195 break;
196
197 case 0x00005000:
198 VideoMemSize = (128 << 20); /*128M */
199 break;
200
201 case 0x00006000:
202 VideoMemSize = (256 << 20); /*256M */
203 break;
204
205 case 0x00007000: /* Only on VX855/875 */
206 VideoMemSize = (512 << 20); /*512M */
207 break;
208
209 default:
210 VideoMemSize = (32 << 20); /*32M */
211 break;
212 }
213 }
214
215 return VideoMemSize;
216 }
217
218
219 /*
220 * Figure out and map our MMIO regions.
221 */
222 static int __devinit via_pci_setup_mmio(struct viafb_dev *vdev)
223 {
224 /*
225 * Hook up to the device registers.
226 */
227 vdev->engine_start = pci_resource_start(vdev->pdev, 1);
228 vdev->engine_len = pci_resource_len(vdev->pdev, 1);
229 /* If this fails, others will notice later */
230 vdev->engine_mmio = ioremap_nocache(vdev->engine_start,
231 vdev->engine_len);
232
233 /*
234 * Likewise with I/O memory.
235 */
236 vdev->fbmem_start = pci_resource_start(vdev->pdev, 0);
237 vdev->fbmem_len = viafb_get_fb_size_from_pci(vdev->chip_type);
238 if (vdev->fbmem_len < 0)
239 return vdev->fbmem_len;
240 vdev->fbmem = ioremap_nocache(vdev->fbmem_start, vdev->fbmem_len);
241 if (vdev->fbmem == NULL)
242 return -ENOMEM;
243 return 0;
244 }
245
246 static void __devexit via_pci_teardown_mmio(struct viafb_dev *vdev)
247 {
248 iounmap(vdev->fbmem);
249 iounmap(vdev->engine_mmio);
250 }
251
252 /*
253 * Create our subsidiary devices.
254 */
255 static struct viafb_subdev_info {
256 char *name;
257 struct platform_device *platdev;
258 } viafb_subdevs[] = {
259 {
260 .name = "viafb-gpio",
261 },
262 {
263 .name = "viafb-i2c",
264 }
265 };
266 #define N_SUBDEVS ARRAY_SIZE(viafb_subdevs)
267
268 static int __devinit via_create_subdev(struct viafb_dev *vdev,
269 struct viafb_subdev_info *info)
270 {
271 int ret;
272
273 info->platdev = platform_device_alloc(info->name, -1);
274 if (!info->platdev) {
275 dev_err(&vdev->pdev->dev, "Unable to allocate pdev %s\n",
276 info->name);
277 return -ENOMEM;
278 }
279 info->platdev->dev.parent = &vdev->pdev->dev;
280 info->platdev->dev.platform_data = vdev;
281 ret = platform_device_add(info->platdev);
282 if (ret) {
283 dev_err(&vdev->pdev->dev, "Unable to add pdev %s\n",
284 info->name);
285 platform_device_put(info->platdev);
286 info->platdev = NULL;
287 }
288 return ret;
289 }
290
291 static int __devinit via_setup_subdevs(struct viafb_dev *vdev)
292 {
293 int i;
294
295 /*
296 * Ignore return values. Even if some of the devices
297 * fail to be created, we'll still be able to use some
298 * of the rest.
299 */
300 for (i = 0; i < N_SUBDEVS; i++)
301 via_create_subdev(vdev, viafb_subdevs + i);
302 return 0;
303 }
304
305 static void __devexit via_teardown_subdevs(void)
306 {
307 int i;
308
309 for (i = 0; i < N_SUBDEVS; i++)
310 if (viafb_subdevs[i].platdev) {
311 viafb_subdevs[i].platdev->dev.platform_data = NULL;
312 platform_device_unregister(viafb_subdevs[i].platdev);
313 }
314 }
315
316
317 static int __devinit via_pci_probe(struct pci_dev *pdev,
318 const struct pci_device_id *ent)
319 {
320 int ret;
321
322 ret = pci_enable_device(pdev);
323 if (ret)
324 return ret;
325 /*
326 * Global device initialization.
327 */
328 memset(&global_dev, 0, sizeof(global_dev));
329 global_dev.pdev = pdev;
330 global_dev.chip_type = ent->driver_data;
331 global_dev.port_cfg = adap_configs;
332 spin_lock_init(&global_dev.reg_lock);
333 ret = via_pci_setup_mmio(&global_dev);
334 if (ret)
335 goto out_disable;
336 /*
337 * Set up interrupts and create our subdevices. Continue even if
338 * some things fail.
339 */
340 viafb_int_init();
341 via_setup_subdevs(&global_dev);
342 /*
343 * Set up the framebuffer.
344 */
345 ret = via_fb_pci_probe(&global_dev);
346 if (ret)
347 goto out_subdevs;
348
349 return 0;
350
351 out_subdevs:
352 via_teardown_subdevs();
353 via_pci_teardown_mmio(&global_dev);
354 out_disable:
355 pci_disable_device(pdev);
356 return ret;
357 }
358
359 static void __devexit via_pci_remove(struct pci_dev *pdev)
360 {
361 via_teardown_subdevs();
362 via_fb_pci_remove(pdev);
363 via_pci_teardown_mmio(&global_dev);
364 pci_disable_device(pdev);
365 }
366
367
368 static struct pci_device_id via_pci_table[] __devinitdata = {
369 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_CLE266_DID),
370 .driver_data = UNICHROME_CLE266 },
371 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_PM800_DID),
372 .driver_data = UNICHROME_PM800 },
373 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_K400_DID),
374 .driver_data = UNICHROME_K400 },
375 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_K800_DID),
376 .driver_data = UNICHROME_K800 },
377 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_P4M890_DID),
378 .driver_data = UNICHROME_CN700 },
379 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_K8M890_DID),
380 .driver_data = UNICHROME_K8M890 },
381 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_CX700_DID),
382 .driver_data = UNICHROME_CX700 },
383 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_P4M900_DID),
384 .driver_data = UNICHROME_P4M900 },
385 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_CN750_DID),
386 .driver_data = UNICHROME_CN750 },
387 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_VX800_DID),
388 .driver_data = UNICHROME_VX800 },
389 { PCI_DEVICE(PCI_VENDOR_ID_VIA, UNICHROME_VX855_DID),
390 .driver_data = UNICHROME_VX855 },
391 { }
392 };
393 MODULE_DEVICE_TABLE(pci, via_pci_table);
394
395 static struct pci_driver via_driver = {
396 .name = "viafb",
397 .id_table = via_pci_table,
398 .probe = via_pci_probe,
399 .remove = __devexit_p(via_pci_remove),
400 };
401
402 static int __init via_core_init(void)
403 {
404 int ret;
405
406 ret = viafb_init();
407 if (ret)
408 return ret;
409 viafb_i2c_init();
410 viafb_gpio_init();
411 return pci_register_driver(&via_driver);
412 }
413
414 static void __exit via_core_exit(void)
415 {
416 pci_unregister_driver(&via_driver);
417 viafb_gpio_exit();
418 viafb_i2c_exit();
419 viafb_exit();
420 }
421
422 module_init(via_core_init);
423 module_exit(via_core_exit);