drivers/watchdog/f71808e_wdt.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /***************************************************************************
   3  *   Copyright (C) 2006 by Hans Edgington <hans@edgington.nl>              *
   4  *   Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com>           *
   5  *   Copyright (C) 2010 Giel van Schijndel <me@mortis.eu>                  *
   6  *                                                                         *
   7  ***************************************************************************/
   8
   9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  10
  11 #include <linux/err.h>
  12 #include <linux/fs.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/ioport.h>
  16 #include <linux/miscdevice.h>
  17 #include <linux/module.h>
  18 #include <linux/mutex.h>
  19 #include <linux/notifier.h>
  20 #include <linux/reboot.h>
  21 #include <linux/uaccess.h>
  22 #include <linux/watchdog.h>
  23
  24 #define DRVNAME "f71808e_wdt"
  25
  26 #define SIO_F71808FG_LD_WDT     0x07    /* Watchdog timer logical device */
  27 #define SIO_UNLOCK_KEY          0x87    /* Key to enable Super-I/O */
  28 #define SIO_LOCK_KEY            0xAA    /* Key to disable Super-I/O */
  29
  30 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  31 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  32 #define SIO_REG_DEVREV          0x22    /* Device revision */
  33 #define SIO_REG_MANID           0x23    /* Fintek ID (2 bytes) */
  34 #define SIO_REG_CLOCK_SEL       0x26    /* Clock select */
  35 #define SIO_REG_ROM_ADDR_SEL    0x27    /* ROM address select */
  36 #define SIO_F81866_REG_PORT_SEL 0x27    /* F81866 Multi-Function Register */
  37 #define SIO_REG_TSI_LEVEL_SEL   0x28    /* TSI Level select */
  38 #define SIO_REG_MFUNCT1         0x29    /* Multi function select 1 */
  39 #define SIO_REG_MFUNCT2         0x2a    /* Multi function select 2 */
  40 #define SIO_REG_MFUNCT3         0x2b    /* Multi function select 3 */
  41 #define SIO_F81866_REG_GPIO1    0x2c    /* F81866 GPIO1 Enable Register */
  42 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  43 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  44
  45 #define SIO_FINTEK_ID           0x1934  /* Manufacturers ID */
  46 #define SIO_F71808_ID           0x0901  /* Chipset ID */
  47 #define SIO_F71858_ID           0x0507  /* Chipset ID */
  48 #define SIO_F71862_ID           0x0601  /* Chipset ID */
  49 #define SIO_F71868_ID           0x1106  /* Chipset ID */
  50 #define SIO_F71869_ID           0x0814  /* Chipset ID */
  51 #define SIO_F71869A_ID          0x1007  /* Chipset ID */
  52 #define SIO_F71882_ID           0x0541  /* Chipset ID */
  53 #define SIO_F71889_ID           0x0723  /* Chipset ID */
  54 #define SIO_F81803_ID           0x1210  /* Chipset ID */
  55 #define SIO_F81865_ID           0x0704  /* Chipset ID */
  56 #define SIO_F81866_ID           0x1010  /* Chipset ID */
  57
  58 #define F71808FG_REG_WDO_CONF           0xf0
  59 #define F71808FG_REG_WDT_CONF           0xf5
  60 #define F71808FG_REG_WD_TIME            0xf6
  61
  62 #define F71808FG_FLAG_WDOUT_EN          7
  63
  64 #define F71808FG_FLAG_WDTMOUT_STS       6
  65 #define F71808FG_FLAG_WD_EN             5
  66 #define F71808FG_FLAG_WD_PULSE          4
  67 #define F71808FG_FLAG_WD_UNIT           3
  68
  69 #define F81865_REG_WDO_CONF             0xfa
  70 #define F81865_FLAG_WDOUT_EN            0
  71
  72 /* Default values */
  73 #define WATCHDOG_TIMEOUT        60      /* 1 minute default timeout */
  74 #define WATCHDOG_MAX_TIMEOUT    (60 * 255)
  75 #define WATCHDOG_PULSE_WIDTH    125     /* 125 ms, default pulse width for
  76                                            watchdog signal */
  77 #define WATCHDOG_F71862FG_PIN   63      /* default watchdog reset output
  78                                            pin number 63 */
  79
  80 static unsigned short force_id;
  81 module_param(force_id, ushort, 0);
  82 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  83
  84 static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
  85 static int timeout = WATCHDOG_TIMEOUT;  /* default timeout in seconds */
  86 module_param(timeout, int, 0);
  87 MODULE_PARM_DESC(timeout,
  88         "Watchdog timeout in seconds. 1<= timeout <="
  89                         __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
  90                         __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
  91
  92 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
  93 module_param(pulse_width, uint, 0);
  94 MODULE_PARM_DESC(pulse_width,
  95         "Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms"
  96                         " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
  97
  98 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
  99 module_param(f71862fg_pin, uint, 0);
 100 MODULE_PARM_DESC(f71862fg_pin,
 101         "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
 102                         " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
 103
 104 static bool nowayout = WATCHDOG_NOWAYOUT;
 105 module_param(nowayout, bool, 0444);
 106 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
 107
 108 static unsigned int start_withtimeout;
 109 module_param(start_withtimeout, uint, 0);
 110 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
 111         " given initial timeout. Zero (default) disables this feature.");
 112
 113 enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg,
 114              f81803, f81865, f81866};
 115
 116 static const char *f71808e_names[] = {
 117         "f71808fg",
 118         "f71858fg",
 119         "f71862fg",
 120         "f71868",
 121         "f71869",
 122         "f71882fg",
 123         "f71889fg",
 124         "f81803",
 125         "f81865",
 126         "f81866",
 127 };
 128
 129 /* Super-I/O Function prototypes */
 130 static inline int superio_inb(int base, int reg);
 131 static inline int superio_inw(int base, int reg);
 132 static inline void superio_outb(int base, int reg, u8 val);
 133 static inline void superio_set_bit(int base, int reg, int bit);
 134 static inline void superio_clear_bit(int base, int reg, int bit);
 135 static inline int superio_enter(int base);
 136 static inline void superio_select(int base, int ld);
 137 static inline void superio_exit(int base);
 138
 139 struct watchdog_data {
 140         unsigned short  sioaddr;
 141         enum chips      type;
 142         unsigned long   opened;
 143         struct mutex    lock;
 144         char            expect_close;
 145         struct watchdog_info ident;
 146
 147         unsigned short  timeout;
 148         u8              timer_val;      /* content for the wd_time register */
 149         char            minutes_mode;
 150         u8              pulse_val;      /* pulse width flag */
 151         char            pulse_mode;     /* enable pulse output mode? */
 152         char            caused_reboot;  /* last reboot was by the watchdog */
 153 };
 154
 155 static struct watchdog_data watchdog = {
 156         .lock = __MUTEX_INITIALIZER(watchdog.lock),
 157 };
 158
 159 /* Super I/O functions */
 160 static inline int superio_inb(int base, int reg)
 161 {
 162         outb(reg, base);
 163         return inb(base + 1);
 164 }
 165
 166 static int superio_inw(int base, int reg)
 167 {
 168         int val;
 169         val  = superio_inb(base, reg) << 8;
 170         val |= superio_inb(base, reg + 1);
 171         return val;
 172 }
 173
 174 static inline void superio_outb(int base, int reg, u8 val)
 175 {
 176         outb(reg, base);
 177         outb(val, base + 1);
 178 }
 179
 180 static inline void superio_set_bit(int base, int reg, int bit)
 181 {
 182         unsigned long val = superio_inb(base, reg);
 183         __set_bit(bit, &val);
 184         superio_outb(base, reg, val);
 185 }
 186
 187 static inline void superio_clear_bit(int base, int reg, int bit)
 188 {
 189         unsigned long val = superio_inb(base, reg);
 190         __clear_bit(bit, &val);
 191         superio_outb(base, reg, val);
 192 }
 193
 194 static inline int superio_enter(int base)
 195 {
 196         /* Don't step on other drivers' I/O space by accident */
 197         if (!request_muxed_region(base, 2, DRVNAME)) {
 198                 pr_err("I/O address 0x%04x already in use\n", (int)base);
 199                 return -EBUSY;
 200         }
 201
 202         /* according to the datasheet the key must be sent twice! */
 203         outb(SIO_UNLOCK_KEY, base);
 204         outb(SIO_UNLOCK_KEY, base);
 205
 206         return 0;
 207 }
 208
 209 static inline void superio_select(int base, int ld)
 210 {
 211         outb(SIO_REG_LDSEL, base);
 212         outb(ld, base + 1);
 213 }
 214
 215 static inline void superio_exit(int base)
 216 {
 217         outb(SIO_LOCK_KEY, base);
 218         release_region(base, 2);
 219 }
 220
 221 static int watchdog_set_timeout(int timeout)
 222 {
 223         if (timeout <= 0
 224          || timeout >  max_timeout) {
 225                 pr_err("watchdog timeout out of range\n");
 226                 return -EINVAL;
 227         }
 228
 229         mutex_lock(&watchdog.lock);
 230
 231         if (timeout > 0xff) {
 232                 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
 233                 watchdog.minutes_mode = true;
 234                 timeout = watchdog.timer_val * 60;
 235         } else {
 236                 watchdog.timer_val = timeout;
 237                 watchdog.minutes_mode = false;
 238         }
 239
 240         watchdog.timeout = timeout;
 241
 242         mutex_unlock(&watchdog.lock);
 243
 244         return 0;
 245 }
 246
 247 static int watchdog_set_pulse_width(unsigned int pw)
 248 {
 249         int err = 0;
 250         unsigned int t1 = 25, t2 = 125, t3 = 5000;
 251
 252         if (watchdog.type == f71868) {
 253                 t1 = 30;
 254                 t2 = 150;
 255                 t3 = 6000;
 256         }
 257
 258         mutex_lock(&watchdog.lock);
 259
 260         if        (pw <=  1) {
 261                 watchdog.pulse_val = 0;
 262         } else if (pw <= t1) {
 263                 watchdog.pulse_val = 1;
 264         } else if (pw <= t2) {
 265                 watchdog.pulse_val = 2;
 266         } else if (pw <= t3) {
 267                 watchdog.pulse_val = 3;
 268         } else {
 269                 pr_err("pulse width out of range\n");
 270                 err = -EINVAL;
 271                 goto exit_unlock;
 272         }
 273
 274         watchdog.pulse_mode = pw;
 275
 276 exit_unlock:
 277         mutex_unlock(&watchdog.lock);
 278         return err;
 279 }
 280
 281 static int watchdog_keepalive(void)
 282 {
 283         int err = 0;
 284
 285         mutex_lock(&watchdog.lock);
 286         err = superio_enter(watchdog.sioaddr);
 287         if (err)
 288                 goto exit_unlock;
 289         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 290
 291         if (watchdog.minutes_mode)
 292                 /* select minutes for timer units */
 293                 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 294                                 F71808FG_FLAG_WD_UNIT);
 295         else
 296                 /* select seconds for timer units */
 297                 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 298                                 F71808FG_FLAG_WD_UNIT);
 299
 300         /* Set timer value */
 301         superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
 302                            watchdog.timer_val);
 303
 304         superio_exit(watchdog.sioaddr);
 305
 306 exit_unlock:
 307         mutex_unlock(&watchdog.lock);
 308         return err;
 309 }
 310
 311 static int f71862fg_pin_configure(unsigned short ioaddr)
 312 {
 313         /* When ioaddr is non-zero the calling function has to take care of
 314            mutex handling and superio preparation! */
 315
 316         if (f71862fg_pin == 63) {
 317                 if (ioaddr) {
 318                         /* SPI must be disabled first to use this pin! */
 319                         superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
 320                         superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
 321                 }
 322         } else if (f71862fg_pin == 56) {
 323                 if (ioaddr)
 324                         superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
 325         } else {
 326                 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
 327                 return -EINVAL;
 328         }
 329         return 0;
 330 }
 331
 332 static int watchdog_start(void)
 333 {
 334         int err;
 335         u8 tmp;
 336
 337         /* Make sure we don't die as soon as the watchdog is enabled below */
 338         err = watchdog_keepalive();
 339         if (err)
 340                 return err;
 341
 342         mutex_lock(&watchdog.lock);
 343         err = superio_enter(watchdog.sioaddr);
 344         if (err)
 345                 goto exit_unlock;
 346         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 347
 348         /* Watchdog pin configuration */
 349         switch (watchdog.type) {
 350         case f71808fg:
 351                 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
 352                 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
 353                 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
 354                 break;
 355
 356         case f71862fg:
 357                 err = f71862fg_pin_configure(watchdog.sioaddr);
 358                 if (err)
 359                         goto exit_superio;
 360                 break;
 361
 362         case f71868:
 363         case f71869:
 364                 /* GPIO14 --> WDTRST# */
 365                 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
 366                 break;
 367
 368         case f71882fg:
 369                 /* Set pin 56 to WDTRST# */
 370                 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
 371                 break;
 372
 373         case f71889fg:
 374                 /* set pin 40 to WDTRST# */
 375                 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
 376                         superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
 377                 break;
 378
 379         case f81803:
 380                 /* Enable TSI Level register bank */
 381                 superio_clear_bit(watchdog.sioaddr, SIO_REG_CLOCK_SEL, 3);
 382                 /* Set pin 27 to WDTRST# */
 383                 superio_outb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL, 0x5f &
 384                         superio_inb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL));
 385                 break;
 386
 387         case f81865:
 388                 /* Set pin 70 to WDTRST# */
 389                 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5);
 390                 break;
 391
 392         case f81866:
 393                 /*
 394                  * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0.
 395                  * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch:
 396                  *     BIT5: 0 -> WDTRST#
 397                  *           1 -> GPIO15
 398                  */
 399                 tmp = superio_inb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL);
 400                 tmp &= ~(BIT(3) | BIT(0));
 401                 tmp |= BIT(2);
 402                 superio_outb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, tmp);
 403
 404                 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5);
 405                 break;
 406
 407         default:
 408                 /*
 409                  * 'default' label to shut up the compiler and catch
 410                  * programmer errors
 411                  */
 412                 err = -ENODEV;
 413                 goto exit_superio;
 414         }
 415
 416         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 417         superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
 418
 419         if (watchdog.type == f81865 || watchdog.type == f81866)
 420                 superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF,
 421                                 F81865_FLAG_WDOUT_EN);
 422         else
 423                 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
 424                                 F71808FG_FLAG_WDOUT_EN);
 425
 426         superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 427                         F71808FG_FLAG_WD_EN);
 428
 429         if (watchdog.pulse_mode) {
 430                 /* Select "pulse" output mode with given duration */
 431                 u8 wdt_conf = superio_inb(watchdog.sioaddr,
 432                                 F71808FG_REG_WDT_CONF);
 433
 434                 /* Set WD_PSWIDTH bits (1:0) */
 435                 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
 436                 /* Set WD_PULSE to "pulse" mode */
 437                 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
 438
 439                 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 440                                 wdt_conf);
 441         } else {
 442                 /* Select "level" output mode */
 443                 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 444                                 F71808FG_FLAG_WD_PULSE);
 445         }
 446
 447 exit_superio:
 448         superio_exit(watchdog.sioaddr);
 449 exit_unlock:
 450         mutex_unlock(&watchdog.lock);
 451
 452         return err;
 453 }
 454
 455 static int watchdog_stop(void)
 456 {
 457         int err = 0;
 458
 459         mutex_lock(&watchdog.lock);
 460         err = superio_enter(watchdog.sioaddr);
 461         if (err)
 462                 goto exit_unlock;
 463         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 464
 465         superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 466                         F71808FG_FLAG_WD_EN);
 467
 468         superio_exit(watchdog.sioaddr);
 469
 470 exit_unlock:
 471         mutex_unlock(&watchdog.lock);
 472
 473         return err;
 474 }
 475
 476 static int watchdog_get_status(void)
 477 {
 478         int status = 0;
 479
 480         mutex_lock(&watchdog.lock);
 481         status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
 482         mutex_unlock(&watchdog.lock);
 483
 484         return status;
 485 }
 486
 487 static bool watchdog_is_running(void)
 488 {
 489         /*
 490          * if we fail to determine the watchdog's status assume it to be
 491          * running to be on the safe side
 492          */
 493         bool is_running = true;
 494
 495         mutex_lock(&watchdog.lock);
 496         if (superio_enter(watchdog.sioaddr))
 497                 goto exit_unlock;
 498         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 499
 500         is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
 501                 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
 502                         & BIT(F71808FG_FLAG_WD_EN));
 503
 504         superio_exit(watchdog.sioaddr);
 505
 506 exit_unlock:
 507         mutex_unlock(&watchdog.lock);
 508         return is_running;
 509 }
 510
 511 /* /dev/watchdog api */
 512
 513 static int watchdog_open(struct inode *inode, struct file *file)
 514 {
 515         int err;
 516
 517         /* If the watchdog is alive we don't need to start it again */
 518         if (test_and_set_bit(0, &watchdog.opened))
 519                 return -EBUSY;
 520
 521         err = watchdog_start();
 522         if (err) {
 523                 clear_bit(0, &watchdog.opened);
 524                 return err;
 525         }
 526
 527         if (nowayout)
 528                 __module_get(THIS_MODULE);
 529
 530         watchdog.expect_close = 0;
 531         return stream_open(inode, file);
 532 }
 533
 534 static int watchdog_release(struct inode *inode, struct file *file)
 535 {
 536         clear_bit(0, &watchdog.opened);
 537
 538         if (!watchdog.expect_close) {
 539                 watchdog_keepalive();
 540                 pr_crit("Unexpected close, not stopping watchdog!\n");
 541         } else if (!nowayout) {
 542                 watchdog_stop();
 543         }
 544         return 0;
 545 }
 546
 547 /*
 548  *      watchdog_write:
 549  *      @file: file handle to the watchdog
 550  *      @buf: buffer to write
 551  *      @count: count of bytes
 552  *      @ppos: pointer to the position to write. No seeks allowed
 553  *
 554  *      A write to a watchdog device is defined as a keepalive signal. Any
 555  *      write of data will do, as we we don't define content meaning.
 556  */
 557
 558 static ssize_t watchdog_write(struct file *file, const char __user *buf,
 559                             size_t count, loff_t *ppos)
 560 {
 561         if (count) {
 562                 if (!nowayout) {
 563                         size_t i;
 564
 565                         /* In case it was set long ago */
 566                         bool expect_close = false;
 567
 568                         for (i = 0; i != count; i++) {
 569                                 char c;
 570                                 if (get_user(c, buf + i))
 571                                         return -EFAULT;
 572                                 if (c == 'V')
 573                                         expect_close = true;
 574                         }
 575
 576                         /* Properly order writes across fork()ed processes */
 577                         mutex_lock(&watchdog.lock);
 578                         watchdog.expect_close = expect_close;
 579                         mutex_unlock(&watchdog.lock);
 580                 }
 581
 582                 /* someone wrote to us, we should restart timer */
 583                 watchdog_keepalive();
 584         }
 585         return count;
 586 }
 587
 588 /*
 589  *      watchdog_ioctl:
 590  *      @inode: inode of the device
 591  *      @file: file handle to the device
 592  *      @cmd: watchdog command
 593  *      @arg: argument pointer
 594  *
 595  *      The watchdog API defines a common set of functions for all watchdogs
 596  *      according to their available features.
 597  */
 598 static long watchdog_ioctl(struct file *file, unsigned int cmd,
 599         unsigned long arg)
 600 {
 601         int status;
 602         int new_options;
 603         int new_timeout;
 604         union {
 605                 struct watchdog_info __user *ident;
 606                 int __user *i;
 607         } uarg;
 608
 609         uarg.i = (int __user *)arg;
 610
 611         switch (cmd) {
 612         case WDIOC_GETSUPPORT:
 613                 return copy_to_user(uarg.ident, &watchdog.ident,
 614                         sizeof(watchdog.ident)) ? -EFAULT : 0;
 615
 616         case WDIOC_GETSTATUS:
 617                 status = watchdog_get_status();
 618                 if (status < 0)
 619                         return status;
 620                 return put_user(status, uarg.i);
 621
 622         case WDIOC_GETBOOTSTATUS:
 623                 return put_user(0, uarg.i);
 624
 625         case WDIOC_SETOPTIONS:
 626                 if (get_user(new_options, uarg.i))
 627                         return -EFAULT;
 628
 629                 if (new_options & WDIOS_DISABLECARD)
 630                         watchdog_stop();
 631
 632                 if (new_options & WDIOS_ENABLECARD)
 633                         return watchdog_start();
 634                 /* fall through */
 635
 636         case WDIOC_KEEPALIVE:
 637                 watchdog_keepalive();
 638                 return 0;
 639
 640         case WDIOC_SETTIMEOUT:
 641                 if (get_user(new_timeout, uarg.i))
 642                         return -EFAULT;
 643
 644                 if (watchdog_set_timeout(new_timeout))
 645                         return -EINVAL;
 646
 647                 watchdog_keepalive();
 648                 /* fall through */
 649
 650         case WDIOC_GETTIMEOUT:
 651                 return put_user(watchdog.timeout, uarg.i);
 652
 653         default:
 654                 return -ENOTTY;
 655
 656         }
 657 }
 658
 659 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
 660         void *unused)
 661 {
 662         if (code == SYS_DOWN || code == SYS_HALT)
 663                 watchdog_stop();
 664         return NOTIFY_DONE;
 665 }
 666
 667 static const struct file_operations watchdog_fops = {
 668         .owner          = THIS_MODULE,
 669         .llseek         = no_llseek,
 670         .open           = watchdog_open,
 671         .release        = watchdog_release,
 672         .write          = watchdog_write,
 673         .unlocked_ioctl = watchdog_ioctl,
 674 };
 675
 676 static struct miscdevice watchdog_miscdev = {
 677         .minor          = WATCHDOG_MINOR,
 678         .name           = "watchdog",
 679         .fops           = &watchdog_fops,
 680 };
 681
 682 static struct notifier_block watchdog_notifier = {
 683         .notifier_call = watchdog_notify_sys,
 684 };
 685
 686 static int __init watchdog_init(int sioaddr)
 687 {
 688         int wdt_conf, err = 0;
 689
 690         /* No need to lock watchdog.lock here because no entry points
 691          * into the module have been registered yet.
 692          */
 693         watchdog.sioaddr = sioaddr;
 694         watchdog.ident.options = WDIOF_MAGICCLOSE
 695                                 | WDIOF_KEEPALIVEPING
 696                                 | WDIOF_CARDRESET;
 697
 698         snprintf(watchdog.ident.identity,
 699                 sizeof(watchdog.ident.identity), "%s watchdog",
 700                 f71808e_names[watchdog.type]);
 701
 702         err = superio_enter(sioaddr);
 703         if (err)
 704                 return err;
 705         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 706
 707         wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
 708         watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS);
 709
 710         /*
 711          * We don't want WDTMOUT_STS to stick around till regular reboot.
 712          * Write 1 to the bit to clear it to zero.
 713          */
 714         superio_outb(sioaddr, F71808FG_REG_WDT_CONF,
 715                      wdt_conf | BIT(F71808FG_FLAG_WDTMOUT_STS));
 716
 717         superio_exit(sioaddr);
 718
 719         err = watchdog_set_timeout(timeout);
 720         if (err)
 721                 return err;
 722         err = watchdog_set_pulse_width(pulse_width);
 723         if (err)
 724                 return err;
 725
 726         err = register_reboot_notifier(&watchdog_notifier);
 727         if (err)
 728                 return err;
 729
 730         err = misc_register(&watchdog_miscdev);
 731         if (err) {
 732                 pr_err("cannot register miscdev on minor=%d\n",
 733                        watchdog_miscdev.minor);
 734                 goto exit_reboot;
 735         }
 736
 737         if (start_withtimeout) {
 738                 if (start_withtimeout <= 0
 739                  || start_withtimeout >  max_timeout) {
 740                         pr_err("starting timeout out of range\n");
 741                         err = -EINVAL;
 742                         goto exit_miscdev;
 743                 }
 744
 745                 err = watchdog_start();
 746                 if (err) {
 747                         pr_err("cannot start watchdog timer\n");
 748                         goto exit_miscdev;
 749                 }
 750
 751                 mutex_lock(&watchdog.lock);
 752                 err = superio_enter(sioaddr);
 753                 if (err)
 754                         goto exit_unlock;
 755                 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 756
 757                 if (start_withtimeout > 0xff) {
 758                         /* select minutes for timer units */
 759                         superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
 760                                 F71808FG_FLAG_WD_UNIT);
 761                         superio_outb(sioaddr, F71808FG_REG_WD_TIME,
 762                                 DIV_ROUND_UP(start_withtimeout, 60));
 763                 } else {
 764                         /* select seconds for timer units */
 765                         superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
 766                                 F71808FG_FLAG_WD_UNIT);
 767                         superio_outb(sioaddr, F71808FG_REG_WD_TIME,
 768                                 start_withtimeout);
 769                 }
 770
 771                 superio_exit(sioaddr);
 772                 mutex_unlock(&watchdog.lock);
 773
 774                 if (nowayout)
 775                         __module_get(THIS_MODULE);
 776
 777                 pr_info("watchdog started with initial timeout of %u sec\n",
 778                         start_withtimeout);
 779         }
 780
 781         return 0;
 782
 783 exit_unlock:
 784         mutex_unlock(&watchdog.lock);
 785 exit_miscdev:
 786         misc_deregister(&watchdog_miscdev);
 787 exit_reboot:
 788         unregister_reboot_notifier(&watchdog_notifier);
 789
 790         return err;
 791 }
 792
 793 static int __init f71808e_find(int sioaddr)
 794 {
 795         u16 devid;
 796         int err = superio_enter(sioaddr);
 797         if (err)
 798                 return err;
 799
 800         devid = superio_inw(sioaddr, SIO_REG_MANID);
 801         if (devid != SIO_FINTEK_ID) {
 802                 pr_debug("Not a Fintek device\n");
 803                 err = -ENODEV;
 804                 goto exit;
 805         }
 806
 807         devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
 808         switch (devid) {
 809         case SIO_F71808_ID:
 810                 watchdog.type = f71808fg;
 811                 break;
 812         case SIO_F71862_ID:
 813                 watchdog.type = f71862fg;
 814                 err = f71862fg_pin_configure(0); /* validate module parameter */
 815                 break;
 816         case SIO_F71868_ID:
 817                 watchdog.type = f71868;
 818                 break;
 819         case SIO_F71869_ID:
 820         case SIO_F71869A_ID:
 821                 watchdog.type = f71869;
 822                 break;
 823         case SIO_F71882_ID:
 824                 watchdog.type = f71882fg;
 825                 break;
 826         case SIO_F71889_ID:
 827                 watchdog.type = f71889fg;
 828                 break;
 829         case SIO_F71858_ID:
 830                 /* Confirmed (by datasheet) not to have a watchdog. */
 831                 err = -ENODEV;
 832                 goto exit;
 833         case SIO_F81803_ID:
 834                 watchdog.type = f81803;
 835                 break;
 836         case SIO_F81865_ID:
 837                 watchdog.type = f81865;
 838                 break;
 839         case SIO_F81866_ID:
 840                 watchdog.type = f81866;
 841                 break;
 842         default:
 843                 pr_info("Unrecognized Fintek device: %04x\n",
 844                         (unsigned int)devid);
 845                 err = -ENODEV;
 846                 goto exit;
 847         }
 848
 849         pr_info("Found %s watchdog chip, revision %d\n",
 850                 f71808e_names[watchdog.type],
 851                 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
 852 exit:
 853         superio_exit(sioaddr);
 854         return err;
 855 }
 856
 857 static int __init f71808e_init(void)
 858 {
 859         static const unsigned short addrs[] = { 0x2e, 0x4e };
 860         int err = -ENODEV;
 861         int i;
 862
 863         for (i = 0; i < ARRAY_SIZE(addrs); i++) {
 864                 err = f71808e_find(addrs[i]);
 865                 if (err == 0)
 866                         break;
 867         }
 868         if (i == ARRAY_SIZE(addrs))
 869                 return err;
 870
 871         return watchdog_init(addrs[i]);
 872 }
 873
 874 static void __exit f71808e_exit(void)
 875 {
 876         if (watchdog_is_running()) {
 877                 pr_warn("Watchdog timer still running, stopping it\n");
 878                 watchdog_stop();
 879         }
 880         misc_deregister(&watchdog_miscdev);
 881         unregister_reboot_notifier(&watchdog_notifier);
 882 }
 883
 884 MODULE_DESCRIPTION("F71808E Watchdog Driver");
 885 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
 886 MODULE_LICENSE("GPL");
 887
 888 module_init(f71808e_init);
 889 module_exit(f71808e_exit);