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1 /*
2 * HP WatchDog Driver
3 * based on
4 *
5 * SoftDog 0.05: A Software Watchdog Device
6 *
7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 * Thomas Mingarelli <thomas.mingarelli@hp.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation
13 *
14 */
15
16 #include <linux/device.h>
17 #include <linux/fs.h>
18 #include <linux/init.h>
19 #include <linux/io.h>
20 #include <linux/bitops.h>
21 #include <linux/kernel.h>
22 #include <linux/miscdevice.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pci.h>
26 #include <linux/pci_ids.h>
27 #include <linux/types.h>
28 #include <linux/uaccess.h>
29 #include <linux/watchdog.h>
30 #include <linux/dmi.h>
31 #include <linux/spinlock.h>
32 #include <linux/nmi.h>
33 #include <linux/kdebug.h>
34 #include <linux/notifier.h>
35 #include <asm/cacheflush.h>
36
37 #define HPWDT_VERSION "1.1.1"
38 #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
39 #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
40 #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535)
41 #define DEFAULT_MARGIN 30
42
43 static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
44 static unsigned int reload; /* the computed soft_margin */
45 static int nowayout = WATCHDOG_NOWAYOUT;
46 static char expect_release;
47 static unsigned long hpwdt_is_open;
48
49 static void __iomem *pci_mem_addr; /* the PCI-memory address */
50 static unsigned long __iomem *hpwdt_timer_reg;
51 static unsigned long __iomem *hpwdt_timer_con;
52
53 static struct pci_device_id hpwdt_devices[] = {
54 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
55 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
56 {0}, /* terminate list */
57 };
58 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
59
60 #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
61 #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
62 #define PCI_BIOS32_PARAGRAPH_LEN 16
63 #define PCI_ROM_BASE1 0x000F0000
64 #define ROM_SIZE 0x10000
65
66 struct bios32_service_dir {
67 u32 signature;
68 u32 entry_point;
69 u8 revision;
70 u8 length;
71 u8 checksum;
72 u8 reserved[5];
73 };
74
75 /* type 212 */
76 struct smbios_cru64_info {
77 u8 type;
78 u8 byte_length;
79 u16 handle;
80 u32 signature;
81 u64 physical_address;
82 u32 double_length;
83 u32 double_offset;
84 };
85 #define SMBIOS_CRU64_INFORMATION 212
86
87 struct cmn_registers {
88 union {
89 struct {
90 u8 ral;
91 u8 rah;
92 u16 rea2;
93 };
94 u32 reax;
95 } u1;
96 union {
97 struct {
98 u8 rbl;
99 u8 rbh;
100 u8 reb2l;
101 u8 reb2h;
102 };
103 u32 rebx;
104 } u2;
105 union {
106 struct {
107 u8 rcl;
108 u8 rch;
109 u16 rec2;
110 };
111 u32 recx;
112 } u3;
113 union {
114 struct {
115 u8 rdl;
116 u8 rdh;
117 u16 red2;
118 };
119 u32 redx;
120 } u4;
121
122 u32 resi;
123 u32 redi;
124 u16 rds;
125 u16 res;
126 u32 reflags;
127 } __attribute__((packed));
128
129 static unsigned int hpwdt_nmi_decoding;
130 static unsigned int allow_kdump;
131 static unsigned int priority; /* hpwdt at end of die_notify list */
132 static DEFINE_SPINLOCK(rom_lock);
133 static void *cru_rom_addr;
134 static struct cmn_registers cmn_regs;
135
136 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
137 unsigned long *pRomEntry);
138
139 #ifdef CONFIG_X86_32
140 /* --32 Bit Bios------------------------------------------------------------ */
141
142 #define HPWDT_ARCH 32
143
144 asm(".text \n\t"
145 ".align 4 \n"
146 "asminline_call: \n\t"
147 "pushl %ebp \n\t"
148 "movl %esp, %ebp \n\t"
149 "pusha \n\t"
150 "pushf \n\t"
151 "push %es \n\t"
152 "push %ds \n\t"
153 "pop %es \n\t"
154 "movl 8(%ebp),%eax \n\t"
155 "movl 4(%eax),%ebx \n\t"
156 "movl 8(%eax),%ecx \n\t"
157 "movl 12(%eax),%edx \n\t"
158 "movl 16(%eax),%esi \n\t"
159 "movl 20(%eax),%edi \n\t"
160 "movl (%eax),%eax \n\t"
161 "push %cs \n\t"
162 "call *12(%ebp) \n\t"
163 "pushf \n\t"
164 "pushl %eax \n\t"
165 "movl 8(%ebp),%eax \n\t"
166 "movl %ebx,4(%eax) \n\t"
167 "movl %ecx,8(%eax) \n\t"
168 "movl %edx,12(%eax) \n\t"
169 "movl %esi,16(%eax) \n\t"
170 "movl %edi,20(%eax) \n\t"
171 "movw %ds,24(%eax) \n\t"
172 "movw %es,26(%eax) \n\t"
173 "popl %ebx \n\t"
174 "movl %ebx,(%eax) \n\t"
175 "popl %ebx \n\t"
176 "movl %ebx,28(%eax) \n\t"
177 "pop %es \n\t"
178 "popf \n\t"
179 "popa \n\t"
180 "leave \n\t"
181 "ret \n\t"
182 ".previous");
183
184
185 /*
186 * cru_detect
187 *
188 * Routine Description:
189 * This function uses the 32-bit BIOS Service Directory record to
190 * search for a $CRU record.
191 *
192 * Return Value:
193 * 0 : SUCCESS
194 * <0 : FAILURE
195 */
196 static int __devinit cru_detect(unsigned long map_entry,
197 unsigned long map_offset)
198 {
199 void *bios32_map;
200 unsigned long *bios32_entrypoint;
201 unsigned long cru_physical_address;
202 unsigned long cru_length;
203 unsigned long physical_bios_base = 0;
204 unsigned long physical_bios_offset = 0;
205 int retval = -ENODEV;
206
207 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
208
209 if (bios32_map == NULL)
210 return -ENODEV;
211
212 bios32_entrypoint = bios32_map + map_offset;
213
214 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
215
216 asminline_call(&cmn_regs, bios32_entrypoint);
217
218 if (cmn_regs.u1.ral != 0) {
219 printk(KERN_WARNING
220 "hpwdt: Call succeeded but with an error: 0x%x\n",
221 cmn_regs.u1.ral);
222 } else {
223 physical_bios_base = cmn_regs.u2.rebx;
224 physical_bios_offset = cmn_regs.u4.redx;
225 cru_length = cmn_regs.u3.recx;
226 cru_physical_address =
227 physical_bios_base + physical_bios_offset;
228
229 /* If the values look OK, then map it in. */
230 if ((physical_bios_base + physical_bios_offset)) {
231 cru_rom_addr =
232 ioremap(cru_physical_address, cru_length);
233 if (cru_rom_addr)
234 retval = 0;
235 }
236
237 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
238 physical_bios_base);
239 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
240 physical_bios_offset);
241 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
242 cru_length);
243 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
244 &cru_rom_addr);
245 }
246 iounmap(bios32_map);
247 return retval;
248 }
249
250 /*
251 * bios_checksum
252 */
253 static int __devinit bios_checksum(const char __iomem *ptr, int len)
254 {
255 char sum = 0;
256 int i;
257
258 /*
259 * calculate checksum of size bytes. This should add up
260 * to zero if we have a valid header.
261 */
262 for (i = 0; i < len; i++)
263 sum += ptr[i];
264
265 return ((sum == 0) && (len > 0));
266 }
267
268 /*
269 * bios32_present
270 *
271 * Routine Description:
272 * This function finds the 32-bit BIOS Service Directory
273 *
274 * Return Value:
275 * 0 : SUCCESS
276 * <0 : FAILURE
277 */
278 static int __devinit bios32_present(const char __iomem *p)
279 {
280 struct bios32_service_dir *bios_32_ptr;
281 int length;
282 unsigned long map_entry, map_offset;
283
284 bios_32_ptr = (struct bios32_service_dir *) p;
285
286 /*
287 * Search for signature by checking equal to the swizzled value
288 * instead of calling another routine to perform a strcmp.
289 */
290 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
291 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
292 if (bios_checksum(p, length)) {
293 /*
294 * According to the spec, we're looking for the
295 * first 4KB-aligned address below the entrypoint
296 * listed in the header. The Service Directory code
297 * is guaranteed to occupy no more than 2 4KB pages.
298 */
299 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
300 map_offset = bios_32_ptr->entry_point - map_entry;
301
302 return cru_detect(map_entry, map_offset);
303 }
304 }
305 return -ENODEV;
306 }
307
308 static int __devinit detect_cru_service(void)
309 {
310 char __iomem *p, *q;
311 int rc = -1;
312
313 /*
314 * Search from 0x0f0000 through 0x0fffff, inclusive.
315 */
316 p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
317 if (p == NULL)
318 return -ENOMEM;
319
320 for (q = p; q < p + ROM_SIZE; q += 16) {
321 rc = bios32_present(q);
322 if (!rc)
323 break;
324 }
325 iounmap(p);
326 return rc;
327 }
328 /* ------------------------------------------------------------------------- */
329 #endif /* CONFIG_X86_32 */
330 #ifdef CONFIG_X86_64
331 /* --64 Bit Bios------------------------------------------------------------ */
332
333 #define HPWDT_ARCH 64
334
335 asm(".text \n\t"
336 ".align 4 \n"
337 "asminline_call: \n\t"
338 "pushq %rbp \n\t"
339 "movq %rsp, %rbp \n\t"
340 "pushq %rax \n\t"
341 "pushq %rbx \n\t"
342 "pushq %rdx \n\t"
343 "pushq %r12 \n\t"
344 "pushq %r9 \n\t"
345 "movq %rsi, %r12 \n\t"
346 "movq %rdi, %r9 \n\t"
347 "movl 4(%r9),%ebx \n\t"
348 "movl 8(%r9),%ecx \n\t"
349 "movl 12(%r9),%edx \n\t"
350 "movl 16(%r9),%esi \n\t"
351 "movl 20(%r9),%edi \n\t"
352 "movl (%r9),%eax \n\t"
353 "call *%r12 \n\t"
354 "pushfq \n\t"
355 "popq %r12 \n\t"
356 "movl %eax, (%r9) \n\t"
357 "movl %ebx, 4(%r9) \n\t"
358 "movl %ecx, 8(%r9) \n\t"
359 "movl %edx, 12(%r9) \n\t"
360 "movl %esi, 16(%r9) \n\t"
361 "movl %edi, 20(%r9) \n\t"
362 "movq %r12, %rax \n\t"
363 "movl %eax, 28(%r9) \n\t"
364 "popq %r9 \n\t"
365 "popq %r12 \n\t"
366 "popq %rdx \n\t"
367 "popq %rbx \n\t"
368 "popq %rax \n\t"
369 "leave \n\t"
370 "ret \n\t"
371 ".previous");
372
373 /*
374 * dmi_find_cru
375 *
376 * Routine Description:
377 * This function checks whether or not a SMBIOS/DMI record is
378 * the 64bit CRU info or not
379 */
380 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
381 {
382 struct smbios_cru64_info *smbios_cru64_ptr;
383 unsigned long cru_physical_address;
384
385 if (dm->type == SMBIOS_CRU64_INFORMATION) {
386 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
387 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
388 cru_physical_address =
389 smbios_cru64_ptr->physical_address +
390 smbios_cru64_ptr->double_offset;
391 cru_rom_addr = ioremap(cru_physical_address,
392 smbios_cru64_ptr->double_length);
393 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
394 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
395 }
396 }
397 }
398
399 static int __devinit detect_cru_service(void)
400 {
401 cru_rom_addr = NULL;
402
403 dmi_walk(dmi_find_cru, NULL);
404
405 /* if cru_rom_addr has been set then we found a CRU service */
406 return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
407 }
408 /* ------------------------------------------------------------------------- */
409 #endif /* CONFIG_X86_64 */
410
411 /*
412 * Watchdog operations
413 */
414 static void hpwdt_start(void)
415 {
416 reload = SECS_TO_TICKS(soft_margin);
417 iowrite16(reload, hpwdt_timer_reg);
418 iowrite16(0x85, hpwdt_timer_con);
419 }
420
421 static void hpwdt_stop(void)
422 {
423 unsigned long data;
424
425 data = ioread16(hpwdt_timer_con);
426 data &= 0xFE;
427 iowrite16(data, hpwdt_timer_con);
428 }
429
430 static void hpwdt_ping(void)
431 {
432 iowrite16(reload, hpwdt_timer_reg);
433 }
434
435 static int hpwdt_change_timer(int new_margin)
436 {
437 if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
438 printk(KERN_WARNING
439 "hpwdt: New value passed in is invalid: %d seconds.\n",
440 new_margin);
441 return -EINVAL;
442 }
443
444 soft_margin = new_margin;
445 printk(KERN_DEBUG
446 "hpwdt: New timer passed in is %d seconds.\n",
447 new_margin);
448 reload = SECS_TO_TICKS(soft_margin);
449
450 return 0;
451 }
452
453 static int hpwdt_time_left(void)
454 {
455 return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
456 }
457
458 /*
459 * NMI Handler
460 */
461 static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
462 void *data)
463 {
464 unsigned long rom_pl;
465 static int die_nmi_called;
466
467 if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
468 goto out;
469
470 if (!hpwdt_nmi_decoding)
471 goto out;
472
473 spin_lock_irqsave(&rom_lock, rom_pl);
474 if (!die_nmi_called)
475 asminline_call(&cmn_regs, cru_rom_addr);
476 die_nmi_called = 1;
477 spin_unlock_irqrestore(&rom_lock, rom_pl);
478 if (cmn_regs.u1.ral == 0) {
479 printk(KERN_WARNING "hpwdt: An NMI occurred, "
480 "but unable to determine source.\n");
481 } else {
482 if (allow_kdump)
483 hpwdt_stop();
484 panic("An NMI occurred, please see the Integrated "
485 "Management Log for details.\n");
486 }
487 out:
488 return NOTIFY_OK;
489 }
490
491 /*
492 * /dev/watchdog handling
493 */
494 static int hpwdt_open(struct inode *inode, struct file *file)
495 {
496 /* /dev/watchdog can only be opened once */
497 if (test_and_set_bit(0, &hpwdt_is_open))
498 return -EBUSY;
499
500 /* Start the watchdog */
501 hpwdt_start();
502 hpwdt_ping();
503
504 return nonseekable_open(inode, file);
505 }
506
507 static int hpwdt_release(struct inode *inode, struct file *file)
508 {
509 /* Stop the watchdog */
510 if (expect_release == 42) {
511 hpwdt_stop();
512 } else {
513 printk(KERN_CRIT
514 "hpwdt: Unexpected close, not stopping watchdog!\n");
515 hpwdt_ping();
516 }
517
518 expect_release = 0;
519
520 /* /dev/watchdog is being closed, make sure it can be re-opened */
521 clear_bit(0, &hpwdt_is_open);
522
523 return 0;
524 }
525
526 static ssize_t hpwdt_write(struct file *file, const char __user *data,
527 size_t len, loff_t *ppos)
528 {
529 /* See if we got the magic character 'V' and reload the timer */
530 if (len) {
531 if (!nowayout) {
532 size_t i;
533
534 /* note: just in case someone wrote the magic character
535 * five months ago... */
536 expect_release = 0;
537
538 /* scan to see whether or not we got the magic char. */
539 for (i = 0; i != len; i++) {
540 char c;
541 if (get_user(c, data + i))
542 return -EFAULT;
543 if (c == 'V')
544 expect_release = 42;
545 }
546 }
547
548 /* someone wrote to us, we should reload the timer */
549 hpwdt_ping();
550 }
551
552 return len;
553 }
554
555 static const struct watchdog_info ident = {
556 .options = WDIOF_SETTIMEOUT |
557 WDIOF_KEEPALIVEPING |
558 WDIOF_MAGICCLOSE,
559 .identity = "HP iLO2+ HW Watchdog Timer",
560 };
561
562 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
563 unsigned long arg)
564 {
565 void __user *argp = (void __user *)arg;
566 int __user *p = argp;
567 int new_margin;
568 int ret = -ENOTTY;
569
570 switch (cmd) {
571 case WDIOC_GETSUPPORT:
572 ret = 0;
573 if (copy_to_user(argp, &ident, sizeof(ident)))
574 ret = -EFAULT;
575 break;
576
577 case WDIOC_GETSTATUS:
578 case WDIOC_GETBOOTSTATUS:
579 ret = put_user(0, p);
580 break;
581
582 case WDIOC_KEEPALIVE:
583 hpwdt_ping();
584 ret = 0;
585 break;
586
587 case WDIOC_SETTIMEOUT:
588 ret = get_user(new_margin, p);
589 if (ret)
590 break;
591
592 ret = hpwdt_change_timer(new_margin);
593 if (ret)
594 break;
595
596 hpwdt_ping();
597 /* Fall */
598 case WDIOC_GETTIMEOUT:
599 ret = put_user(soft_margin, p);
600 break;
601
602 case WDIOC_GETTIMELEFT:
603 ret = put_user(hpwdt_time_left(), p);
604 break;
605 }
606 return ret;
607 }
608
609 /*
610 * Kernel interfaces
611 */
612 static const struct file_operations hpwdt_fops = {
613 .owner = THIS_MODULE,
614 .llseek = no_llseek,
615 .write = hpwdt_write,
616 .unlocked_ioctl = hpwdt_ioctl,
617 .open = hpwdt_open,
618 .release = hpwdt_release,
619 };
620
621 static struct miscdevice hpwdt_miscdev = {
622 .minor = WATCHDOG_MINOR,
623 .name = "watchdog",
624 .fops = &hpwdt_fops,
625 };
626
627 static struct notifier_block die_notifier = {
628 .notifier_call = hpwdt_pretimeout,
629 .priority = 0,
630 };
631
632 /*
633 * Init & Exit
634 */
635
636 #ifdef ARCH_HAS_NMI_WATCHDOG
637 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
638 {
639 /*
640 * If nmi_watchdog is turned off then we can turn on
641 * our nmi decoding capability.
642 */
643 if (!nmi_watchdog_active())
644 hpwdt_nmi_decoding = 1;
645 else
646 dev_warn(&dev->dev, "NMI decoding is disabled. To enable this "
647 "functionality you must reboot with nmi_watchdog=0 "
648 "and load the hpwdt driver with priority=1.\n");
649 }
650 #else
651 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
652 {
653 dev_warn(&dev->dev, "NMI decoding is disabled. "
654 "Your kernel does not support a NMI Watchdog.\n");
655 }
656 #endif
657
658 static int __devinit hpwdt_init_one(struct pci_dev *dev,
659 const struct pci_device_id *ent)
660 {
661 int retval;
662
663 /*
664 * Check if we can do NMI decoding or not
665 */
666 hpwdt_check_nmi_decoding(dev);
667
668 /*
669 * First let's find out if we are on an iLO2+ server. We will
670 * not run on a legacy ASM box.
671 * So we only support the G5 ProLiant servers and higher.
672 */
673 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
674 dev_warn(&dev->dev,
675 "This server does not have an iLO2+ ASIC.\n");
676 return -ENODEV;
677 }
678
679 if (pci_enable_device(dev)) {
680 dev_warn(&dev->dev,
681 "Not possible to enable PCI Device: 0x%x:0x%x.\n",
682 ent->vendor, ent->device);
683 return -ENODEV;
684 }
685
686 pci_mem_addr = pci_iomap(dev, 1, 0x80);
687 if (!pci_mem_addr) {
688 dev_warn(&dev->dev,
689 "Unable to detect the iLO2+ server memory.\n");
690 retval = -ENOMEM;
691 goto error_pci_iomap;
692 }
693 hpwdt_timer_reg = pci_mem_addr + 0x70;
694 hpwdt_timer_con = pci_mem_addr + 0x72;
695
696 /* Make sure that we have a valid soft_margin */
697 if (hpwdt_change_timer(soft_margin))
698 hpwdt_change_timer(DEFAULT_MARGIN);
699
700 /*
701 * We need to map the ROM to get the CRU service.
702 * For 32 bit Operating Systems we need to go through the 32 Bit
703 * BIOS Service Directory
704 * For 64 bit Operating Systems we get that service through SMBIOS.
705 */
706 retval = detect_cru_service();
707 if (retval < 0) {
708 dev_warn(&dev->dev,
709 "Unable to detect the %d Bit CRU Service.\n",
710 HPWDT_ARCH);
711 goto error_get_cru;
712 }
713
714 /*
715 * We know this is the only CRU call we need to make so lets keep as
716 * few instructions as possible once the NMI comes in.
717 */
718 cmn_regs.u1.rah = 0x0D;
719 cmn_regs.u1.ral = 0x02;
720
721 /*
722 * If the priority is set to 1, then we will be put first on the
723 * die notify list to handle a critical NMI. The default is to
724 * be last so other users of the NMI signal can function.
725 */
726 if (priority)
727 die_notifier.priority = 0x7FFFFFFF;
728
729 retval = register_die_notifier(&die_notifier);
730 if (retval != 0) {
731 dev_warn(&dev->dev,
732 "Unable to register a die notifier (err=%d).\n",
733 retval);
734 goto error_die_notifier;
735 }
736
737 retval = misc_register(&hpwdt_miscdev);
738 if (retval < 0) {
739 dev_warn(&dev->dev,
740 "Unable to register miscdev on minor=%d (err=%d).\n",
741 WATCHDOG_MINOR, retval);
742 goto error_misc_register;
743 }
744
745 printk(KERN_INFO
746 "hp Watchdog Timer Driver: %s"
747 ", timer margin: %d seconds (nowayout=%d)"
748 ", allow kernel dump: %s (default = 0/OFF)"
749 ", priority: %s (default = 0/LAST).\n",
750 HPWDT_VERSION, soft_margin, nowayout,
751 (allow_kdump == 0) ? "OFF" : "ON",
752 (priority == 0) ? "LAST" : "FIRST");
753
754 return 0;
755
756 error_misc_register:
757 unregister_die_notifier(&die_notifier);
758 error_die_notifier:
759 if (cru_rom_addr)
760 iounmap(cru_rom_addr);
761 error_get_cru:
762 pci_iounmap(dev, pci_mem_addr);
763 error_pci_iomap:
764 pci_disable_device(dev);
765 return retval;
766 }
767
768 static void __devexit hpwdt_exit(struct pci_dev *dev)
769 {
770 if (!nowayout)
771 hpwdt_stop();
772
773 misc_deregister(&hpwdt_miscdev);
774 unregister_die_notifier(&die_notifier);
775
776 if (cru_rom_addr)
777 iounmap(cru_rom_addr);
778 pci_iounmap(dev, pci_mem_addr);
779 pci_disable_device(dev);
780 }
781
782 static struct pci_driver hpwdt_driver = {
783 .name = "hpwdt",
784 .id_table = hpwdt_devices,
785 .probe = hpwdt_init_one,
786 .remove = __devexit_p(hpwdt_exit),
787 };
788
789 static void __exit hpwdt_cleanup(void)
790 {
791 pci_unregister_driver(&hpwdt_driver);
792 }
793
794 static int __init hpwdt_init(void)
795 {
796 return pci_register_driver(&hpwdt_driver);
797 }
798
799 MODULE_AUTHOR("Tom Mingarelli");
800 MODULE_DESCRIPTION("hp watchdog driver");
801 MODULE_LICENSE("GPL");
802 MODULE_VERSION(HPWDT_VERSION);
803 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
804
805 module_param(soft_margin, int, 0);
806 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
807
808 module_param(nowayout, int, 0);
809 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
810 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
811
812 module_param(allow_kdump, int, 0);
813 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
814
815 module_param(priority, int, 0);
816 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
817 " (default = 0/Last)\n");
818
819 module_init(hpwdt_init);
820 module_exit(hpwdt_cleanup);