drivers/watchdog/iTCO_wdt.c

   1 /*
   2  *      intel TCO Watchdog Driver
   3  *
   4  *      (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>.
   5  *
   6  *      This program is free software; you can redistribute it and/or
   7  *      modify it under the terms of the GNU General Public License
   8  *      as published by the Free Software Foundation; either version
   9  *      2 of the License, or (at your option) any later version.
  10  *
  11  *      Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
  12  *      provide warranty for any of this software. This material is
  13  *      provided "AS-IS" and at no charge.
  14  *
  15  *      The TCO watchdog is implemented in the following I/O controller hubs:
  16  *      (See the intel documentation on http://developer.intel.com.)
  17  *      document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
  18  *      document number 290687-002, 298242-027: 82801BA (ICH2)
  19  *      document number 290733-003, 290739-013: 82801CA (ICH3-S)
  20  *      document number 290716-001, 290718-007: 82801CAM (ICH3-M)
  21  *      document number 290744-001, 290745-025: 82801DB (ICH4)
  22  *      document number 252337-001, 252663-008: 82801DBM (ICH4-M)
  23  *      document number 273599-001, 273645-002: 82801E (C-ICH)
  24  *      document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
  25  *      document number 300641-004, 300884-013: 6300ESB
  26  *      document number 301473-002, 301474-026: 82801F (ICH6)
  27  *      document number 313082-001, 313075-006: 631xESB, 632xESB
  28  *      document number 307013-003, 307014-024: 82801G (ICH7)
  29  *      document number 322896-001, 322897-001: NM10
  30  *      document number 313056-003, 313057-017: 82801H (ICH8)
  31  *      document number 316972-004, 316973-012: 82801I (ICH9)
  32  *      document number 319973-002, 319974-002: 82801J (ICH10)
  33  *      document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
  34  *      document number 320066-003, 320257-008: EP80597 (IICH)
  35  *      document number 324645-001, 324646-001: Cougar Point (CPT)
  36  *      document number TBD                   : Patsburg (PBG)
  37  *      document number TBD                   : DH89xxCC
  38  *      document number TBD                   : Panther Point
  39  *      document number TBD                   : Lynx Point
  40  *      document number TBD                   : Lynx Point-LP
  41  */
  42
  43 /*
  44  *      Includes, defines, variables, module parameters, ...
  45  */
  46
  47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  48
  49 /* Module and version information */
  50 #define DRV_NAME        "iTCO_wdt"
  51 #define DRV_VERSION     "1.11"
  52
  53 /* Includes */
  54 #include <linux/acpi.h>                 /* For ACPI support */
  55 #include <linux/module.h>               /* For module specific items */
  56 #include <linux/moduleparam.h>          /* For new moduleparam's */
  57 #include <linux/types.h>                /* For standard types (like size_t) */
  58 #include <linux/errno.h>                /* For the -ENODEV/... values */
  59 #include <linux/kernel.h>               /* For printk/panic/... */
  60 #include <linux/watchdog.h>             /* For the watchdog specific items */
  61 #include <linux/init.h>                 /* For __init/__exit/... */
  62 #include <linux/fs.h>                   /* For file operations */
  63 #include <linux/platform_device.h>      /* For platform_driver framework */
  64 #include <linux/pci.h>                  /* For pci functions */
  65 #include <linux/ioport.h>               /* For io-port access */
  66 #include <linux/spinlock.h>             /* For spin_lock/spin_unlock/... */
  67 #include <linux/uaccess.h>              /* For copy_to_user/put_user/... */
  68 #include <linux/io.h>                   /* For inb/outb/... */
  69 #include <linux/platform_data/itco_wdt.h>
  70
  71 #include "iTCO_vendor.h"
  72
  73 /* Address definitions for the TCO */
  74 /* TCO base address */
  75 #define TCOBASE(p)      ((p)->tco_res->start)
  76 /* SMI Control and Enable Register */
  77 #define SMI_EN(p)       ((p)->smi_res->start)
  78
  79 #define TCO_RLD(p)      (TCOBASE(p) + 0x00) /* TCO Timer Reload/Curr. Value */
  80 #define TCOv1_TMR(p)    (TCOBASE(p) + 0x01) /* TCOv1 Timer Initial Value*/
  81 #define TCO_DAT_IN(p)   (TCOBASE(p) + 0x02) /* TCO Data In Register     */
  82 #define TCO_DAT_OUT(p)  (TCOBASE(p) + 0x03) /* TCO Data Out Register    */
  83 #define TCO1_STS(p)     (TCOBASE(p) + 0x04) /* TCO1 Status Register     */
  84 #define TCO2_STS(p)     (TCOBASE(p) + 0x06) /* TCO2 Status Register     */
  85 #define TCO1_CNT(p)     (TCOBASE(p) + 0x08) /* TCO1 Control Register    */
  86 #define TCO2_CNT(p)     (TCOBASE(p) + 0x0a) /* TCO2 Control Register    */
  87 #define TCOv2_TMR(p)    (TCOBASE(p) + 0x12) /* TCOv2 Timer Initial Value*/
  88
  89 /* internal variables */
  90 struct iTCO_wdt_private {
  91         struct watchdog_device wddev;
  92
  93         /* TCO version/generation */
  94         unsigned int iTCO_version;
  95         struct resource *tco_res;
  96         struct resource *smi_res;
  97         /*
  98          * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2),
  99          * or memory-mapped PMC register bit 4 (TCO version 3).
 100          */
 101         struct resource *gcs_pmc_res;
 102         unsigned long __iomem *gcs_pmc;
 103         /* the lock for io operations */
 104         spinlock_t io_lock;
 105         /* the PCI-device */
 106         struct pci_dev *pci_dev;
 107         /* whether or not the watchdog has been suspended */
 108         bool suspended;
 109 };
 110
 111 /* module parameters */
 112 #define WATCHDOG_TIMEOUT 30     /* 30 sec default heartbeat */
 113 static int heartbeat = WATCHDOG_TIMEOUT;  /* in seconds */
 114 module_param(heartbeat, int, 0);
 115 MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. "
 116         "5..76 (TCO v1) or 3..614 (TCO v2), default="
 117                                 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 118
 119 static bool nowayout = WATCHDOG_NOWAYOUT;
 120 module_param(nowayout, bool, 0);
 121 MODULE_PARM_DESC(nowayout,
 122         "Watchdog cannot be stopped once started (default="
 123                                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 124
 125 static int turn_SMI_watchdog_clear_off = 1;
 126 module_param(turn_SMI_watchdog_clear_off, int, 0);
 127 MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
 128         "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
 129
 130 /*
 131  * Some TCO specific functions
 132  */
 133
 134 /*
 135  * The iTCO v1 and v2's internal timer is stored as ticks which decrement
 136  * every 0.6 seconds.  v3's internal timer is stored as seconds (some
 137  * datasheets incorrectly state 0.6 seconds).
 138  */
 139 static inline unsigned int seconds_to_ticks(struct iTCO_wdt_private *p,
 140                                             int secs)
 141 {
 142         return p->iTCO_version == 3 ? secs : (secs * 10) / 6;
 143 }
 144
 145 static inline unsigned int ticks_to_seconds(struct iTCO_wdt_private *p,
 146                                             int ticks)
 147 {
 148         return p->iTCO_version == 3 ? ticks : (ticks * 6) / 10;
 149 }
 150
 151 static inline u32 no_reboot_bit(struct iTCO_wdt_private *p)
 152 {
 153         u32 enable_bit;
 154
 155         switch (p->iTCO_version) {
 156         case 5:
 157         case 3:
 158                 enable_bit = 0x00000010;
 159                 break;
 160         case 2:
 161                 enable_bit = 0x00000020;
 162                 break;
 163         case 4:
 164         case 1:
 165         default:
 166                 enable_bit = 0x00000002;
 167                 break;
 168         }
 169
 170         return enable_bit;
 171 }
 172
 173 static void iTCO_wdt_set_NO_REBOOT_bit(struct iTCO_wdt_private *p)
 174 {
 175         u32 val32;
 176
 177         /* Set the NO_REBOOT bit: this disables reboots */
 178         if (p->iTCO_version >= 2) {
 179                 val32 = readl(p->gcs_pmc);
 180                 val32 |= no_reboot_bit(p);
 181                 writel(val32, p->gcs_pmc);
 182         } else if (p->iTCO_version == 1) {
 183                 pci_read_config_dword(p->pci_dev, 0xd4, &val32);
 184                 val32 |= no_reboot_bit(p);
 185                 pci_write_config_dword(p->pci_dev, 0xd4, val32);
 186         }
 187 }
 188
 189 static int iTCO_wdt_unset_NO_REBOOT_bit(struct iTCO_wdt_private *p)
 190 {
 191         u32 enable_bit = no_reboot_bit(p);
 192         u32 val32 = 0;
 193
 194         /* Unset the NO_REBOOT bit: this enables reboots */
 195         if (p->iTCO_version >= 2) {
 196                 val32 = readl(p->gcs_pmc);
 197                 val32 &= ~enable_bit;
 198                 writel(val32, p->gcs_pmc);
 199
 200                 val32 = readl(p->gcs_pmc);
 201         } else if (p->iTCO_version == 1) {
 202                 pci_read_config_dword(p->pci_dev, 0xd4, &val32);
 203                 val32 &= ~enable_bit;
 204                 pci_write_config_dword(p->pci_dev, 0xd4, val32);
 205
 206                 pci_read_config_dword(p->pci_dev, 0xd4, &val32);
 207         }
 208
 209         if (val32 & enable_bit)
 210                 return -EIO;
 211
 212         return 0;
 213 }
 214
 215 static int iTCO_wdt_start(struct watchdog_device *wd_dev)
 216 {
 217         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 218         unsigned int val;
 219
 220         spin_lock(&p->io_lock);
 221
 222         iTCO_vendor_pre_start(p->smi_res, wd_dev->timeout);
 223
 224         /* disable chipset's NO_REBOOT bit */
 225         if (iTCO_wdt_unset_NO_REBOOT_bit(p)) {
 226                 spin_unlock(&p->io_lock);
 227                 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n");
 228                 return -EIO;
 229         }
 230
 231         /* Force the timer to its reload value by writing to the TCO_RLD
 232            register */
 233         if (p->iTCO_version >= 2)
 234                 outw(0x01, TCO_RLD(p));
 235         else if (p->iTCO_version == 1)
 236                 outb(0x01, TCO_RLD(p));
 237
 238         /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
 239         val = inw(TCO1_CNT(p));
 240         val &= 0xf7ff;
 241         outw(val, TCO1_CNT(p));
 242         val = inw(TCO1_CNT(p));
 243         spin_unlock(&p->io_lock);
 244
 245         if (val & 0x0800)
 246                 return -1;
 247         return 0;
 248 }
 249
 250 static int iTCO_wdt_stop(struct watchdog_device *wd_dev)
 251 {
 252         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 253         unsigned int val;
 254
 255         spin_lock(&p->io_lock);
 256
 257         iTCO_vendor_pre_stop(p->smi_res);
 258
 259         /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
 260         val = inw(TCO1_CNT(p));
 261         val |= 0x0800;
 262         outw(val, TCO1_CNT(p));
 263         val = inw(TCO1_CNT(p));
 264
 265         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
 266         iTCO_wdt_set_NO_REBOOT_bit(p);
 267
 268         spin_unlock(&p->io_lock);
 269
 270         if ((val & 0x0800) == 0)
 271                 return -1;
 272         return 0;
 273 }
 274
 275 static int iTCO_wdt_ping(struct watchdog_device *wd_dev)
 276 {
 277         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 278
 279         spin_lock(&p->io_lock);
 280
 281         iTCO_vendor_pre_keepalive(p->smi_res, wd_dev->timeout);
 282
 283         /* Reload the timer by writing to the TCO Timer Counter register */
 284         if (p->iTCO_version >= 2) {
 285                 outw(0x01, TCO_RLD(p));
 286         } else if (p->iTCO_version == 1) {
 287                 /* Reset the timeout status bit so that the timer
 288                  * needs to count down twice again before rebooting */
 289                 outw(0x0008, TCO1_STS(p));      /* write 1 to clear bit */
 290
 291                 outb(0x01, TCO_RLD(p));
 292         }
 293
 294         spin_unlock(&p->io_lock);
 295         return 0;
 296 }
 297
 298 static int iTCO_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t)
 299 {
 300         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 301         unsigned int val16;
 302         unsigned char val8;
 303         unsigned int tmrval;
 304
 305         tmrval = seconds_to_ticks(p, t);
 306
 307         /* For TCO v1 the timer counts down twice before rebooting */
 308         if (p->iTCO_version == 1)
 309                 tmrval /= 2;
 310
 311         /* from the specs: */
 312         /* "Values of 0h-3h are ignored and should not be attempted" */
 313         if (tmrval < 0x04)
 314                 return -EINVAL;
 315         if ((p->iTCO_version >= 2 && tmrval > 0x3ff) ||
 316             (p->iTCO_version == 1 && tmrval > 0x03f))
 317                 return -EINVAL;
 318
 319         iTCO_vendor_pre_set_heartbeat(tmrval);
 320
 321         /* Write new heartbeat to watchdog */
 322         if (p->iTCO_version >= 2) {
 323                 spin_lock(&p->io_lock);
 324                 val16 = inw(TCOv2_TMR(p));
 325                 val16 &= 0xfc00;
 326                 val16 |= tmrval;
 327                 outw(val16, TCOv2_TMR(p));
 328                 val16 = inw(TCOv2_TMR(p));
 329                 spin_unlock(&p->io_lock);
 330
 331                 if ((val16 & 0x3ff) != tmrval)
 332                         return -EINVAL;
 333         } else if (p->iTCO_version == 1) {
 334                 spin_lock(&p->io_lock);
 335                 val8 = inb(TCOv1_TMR(p));
 336                 val8 &= 0xc0;
 337                 val8 |= (tmrval & 0xff);
 338                 outb(val8, TCOv1_TMR(p));
 339                 val8 = inb(TCOv1_TMR(p));
 340                 spin_unlock(&p->io_lock);
 341
 342                 if ((val8 & 0x3f) != tmrval)
 343                         return -EINVAL;
 344         }
 345
 346         wd_dev->timeout = t;
 347         return 0;
 348 }
 349
 350 static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev)
 351 {
 352         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 353         unsigned int val16;
 354         unsigned char val8;
 355         unsigned int time_left = 0;
 356
 357         /* read the TCO Timer */
 358         if (p->iTCO_version >= 2) {
 359                 spin_lock(&p->io_lock);
 360                 val16 = inw(TCO_RLD(p));
 361                 val16 &= 0x3ff;
 362                 spin_unlock(&p->io_lock);
 363
 364                 time_left = ticks_to_seconds(p, val16);
 365         } else if (p->iTCO_version == 1) {
 366                 spin_lock(&p->io_lock);
 367                 val8 = inb(TCO_RLD(p));
 368                 val8 &= 0x3f;
 369                 if (!(inw(TCO1_STS(p)) & 0x0008))
 370                         val8 += (inb(TCOv1_TMR(p)) & 0x3f);
 371                 spin_unlock(&p->io_lock);
 372
 373                 time_left = ticks_to_seconds(p, val8);
 374         }
 375         return time_left;
 376 }
 377
 378 /*
 379  *      Kernel Interfaces
 380  */
 381
 382 static const struct watchdog_info ident = {
 383         .options =              WDIOF_SETTIMEOUT |
 384                                 WDIOF_KEEPALIVEPING |
 385                                 WDIOF_MAGICCLOSE,
 386         .firmware_version =     0,
 387         .identity =             DRV_NAME,
 388 };
 389
 390 static const struct watchdog_ops iTCO_wdt_ops = {
 391         .owner =                THIS_MODULE,
 392         .start =                iTCO_wdt_start,
 393         .stop =                 iTCO_wdt_stop,
 394         .ping =                 iTCO_wdt_ping,
 395         .set_timeout =          iTCO_wdt_set_timeout,
 396         .get_timeleft =         iTCO_wdt_get_timeleft,
 397 };
 398
 399 /*
 400  *      Init & exit routines
 401  */
 402
 403 static int iTCO_wdt_probe(struct platform_device *pdev)
 404 {
 405         struct device *dev = &pdev->dev;
 406         struct itco_wdt_platform_data *pdata = dev_get_platdata(dev);
 407         struct iTCO_wdt_private *p;
 408         unsigned long val32;
 409         int ret;
 410
 411         if (!pdata)
 412                 return -ENODEV;
 413
 414         p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
 415         if (!p)
 416                 return -ENOMEM;
 417
 418         spin_lock_init(&p->io_lock);
 419
 420         p->tco_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_TCO);
 421         if (!p->tco_res)
 422                 return -ENODEV;
 423
 424         p->smi_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_SMI);
 425         if (!p->smi_res)
 426                 return -ENODEV;
 427
 428         p->iTCO_version = pdata->version;
 429         p->pci_dev = to_pci_dev(dev->parent);
 430
 431         /*
 432          * Get the Memory-Mapped GCS or PMC register, we need it for the
 433          * NO_REBOOT flag (TCO v2 and v3).
 434          */
 435         if (p->iTCO_version >= 2) {
 436                 p->gcs_pmc_res = platform_get_resource(pdev,
 437                                                        IORESOURCE_MEM,
 438                                                        ICH_RES_MEM_GCS_PMC);
 439                 p->gcs_pmc = devm_ioremap_resource(dev, p->gcs_pmc_res);
 440                 if (IS_ERR(p->gcs_pmc))
 441                         return PTR_ERR(p->gcs_pmc);
 442         }
 443
 444         /* Check chipset's NO_REBOOT bit */
 445         if (iTCO_wdt_unset_NO_REBOOT_bit(p) &&
 446             iTCO_vendor_check_noreboot_on()) {
 447                 pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
 448                 return -ENODEV; /* Cannot reset NO_REBOOT bit */
 449         }
 450
 451         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
 452         iTCO_wdt_set_NO_REBOOT_bit(p);
 453
 454         /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
 455         if (!devm_request_region(dev, p->smi_res->start,
 456                                  resource_size(p->smi_res),
 457                                  pdev->name)) {
 458                 pr_err("I/O address 0x%04llx already in use, device disabled\n",
 459                        (u64)SMI_EN(p));
 460                 return -EBUSY;
 461         }
 462         if (turn_SMI_watchdog_clear_off >= p->iTCO_version) {
 463                 /*
 464                  * Bit 13: TCO_EN -> 0
 465                  * Disables TCO logic generating an SMI#
 466                  */
 467                 val32 = inl(SMI_EN(p));
 468                 val32 &= 0xffffdfff;    /* Turn off SMI clearing watchdog */
 469                 outl(val32, SMI_EN(p));
 470         }
 471
 472         if (!devm_request_region(dev, p->tco_res->start,
 473                                  resource_size(p->tco_res),
 474                                  pdev->name)) {
 475                 pr_err("I/O address 0x%04llx already in use, device disabled\n",
 476                        (u64)TCOBASE(p));
 477                 return -EBUSY;
 478         }
 479
 480         pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n",
 481                 pdata->name, pdata->version, (u64)TCOBASE(p));
 482
 483         /* Clear out the (probably old) status */
 484         switch (p->iTCO_version) {
 485         case 5:
 486         case 4:
 487                 outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */
 488                 outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */
 489                 break;
 490         case 3:
 491                 outl(0x20008, TCO1_STS(p));
 492                 break;
 493         case 2:
 494         case 1:
 495         default:
 496                 outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */
 497                 outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */
 498                 outw(0x0004, TCO2_STS(p)); /* Clear BOOT_STS bit */
 499                 break;
 500         }
 501
 502         p->wddev.info = &ident,
 503         p->wddev.ops = &iTCO_wdt_ops,
 504         p->wddev.bootstatus = 0;
 505         p->wddev.timeout = WATCHDOG_TIMEOUT;
 506         watchdog_set_nowayout(&p->wddev, nowayout);
 507         p->wddev.parent = dev;
 508
 509         watchdog_set_drvdata(&p->wddev, p);
 510         platform_set_drvdata(pdev, p);
 511
 512         /* Make sure the watchdog is not running */
 513         iTCO_wdt_stop(&p->wddev);
 514
 515         /* Check that the heartbeat value is within it's range;
 516            if not reset to the default */
 517         if (iTCO_wdt_set_timeout(&p->wddev, heartbeat)) {
 518                 iTCO_wdt_set_timeout(&p->wddev, WATCHDOG_TIMEOUT);
 519                 pr_info("timeout value out of range, using %d\n",
 520                         WATCHDOG_TIMEOUT);
 521         }
 522
 523         watchdog_stop_on_reboot(&p->wddev);
 524         ret = devm_watchdog_register_device(dev, &p->wddev);
 525         if (ret != 0) {
 526                 pr_err("cannot register watchdog device (err=%d)\n", ret);
 527                 return ret;
 528         }
 529
 530         pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
 531                 heartbeat, nowayout);
 532
 533         return 0;
 534 }
 535
 536 static int iTCO_wdt_remove(struct platform_device *pdev)
 537 {
 538         struct iTCO_wdt_private *p = platform_get_drvdata(pdev);
 539
 540         /* Stop the timer before we leave */
 541         if (!nowayout)
 542                 iTCO_wdt_stop(&p->wddev);
 543
 544         return 0;
 545 }
 546
 547 #ifdef CONFIG_PM_SLEEP
 548 /*
 549  * Suspend-to-idle requires this, because it stops the ticks and timekeeping, so
 550  * the watchdog cannot be pinged while in that state.  In ACPI sleep states the
 551  * watchdog is stopped by the platform firmware.
 552  */
 553
 554 #ifdef CONFIG_ACPI
 555 static inline bool need_suspend(void)
 556 {
 557         return acpi_target_system_state() == ACPI_STATE_S0;
 558 }
 559 #else
 560 static inline bool need_suspend(void) { return true; }
 561 #endif
 562
 563 static int iTCO_wdt_suspend_noirq(struct device *dev)
 564 {
 565         struct iTCO_wdt_private *p = dev_get_drvdata(dev);
 566         int ret = 0;
 567
 568         p->suspended = false;
 569         if (watchdog_active(&p->wddev) && need_suspend()) {
 570                 ret = iTCO_wdt_stop(&p->wddev);
 571                 if (!ret)
 572                         p->suspended = true;
 573         }
 574         return ret;
 575 }
 576
 577 static int iTCO_wdt_resume_noirq(struct device *dev)
 578 {
 579         struct iTCO_wdt_private *p = dev_get_drvdata(dev);
 580
 581         if (p->suspended)
 582                 iTCO_wdt_start(&p->wddev);
 583
 584         return 0;
 585 }
 586
 587 static const struct dev_pm_ops iTCO_wdt_pm = {
 588         .suspend_noirq = iTCO_wdt_suspend_noirq,
 589         .resume_noirq = iTCO_wdt_resume_noirq,
 590 };
 591
 592 #define ITCO_WDT_PM_OPS (&iTCO_wdt_pm)
 593 #else
 594 #define ITCO_WDT_PM_OPS NULL
 595 #endif /* CONFIG_PM_SLEEP */
 596
 597 static struct platform_driver iTCO_wdt_driver = {
 598         .probe          = iTCO_wdt_probe,
 599         .remove         = iTCO_wdt_remove,
 600         .driver         = {
 601                 .name   = DRV_NAME,
 602                 .pm     = ITCO_WDT_PM_OPS,
 603         },
 604 };
 605
 606 static int __init iTCO_wdt_init_module(void)
 607 {
 608         pr_info("Intel TCO WatchDog Timer Driver v%s\n", DRV_VERSION);
 609
 610         return platform_driver_register(&iTCO_wdt_driver);
 611 }
 612
 613 static void __exit iTCO_wdt_cleanup_module(void)
 614 {
 615         platform_driver_unregister(&iTCO_wdt_driver);
 616         pr_info("Watchdog Module Unloaded\n");
 617 }
 618
 619 module_init(iTCO_wdt_init_module);
 620 module_exit(iTCO_wdt_cleanup_module);
 621
 622 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
 623 MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
 624 MODULE_VERSION(DRV_VERSION);
 625 MODULE_LICENSE("GPL");
 626 MODULE_ALIAS("platform:" DRV_NAME);