drivers/watchdog/iTCO_wdt.c

   1 /*
   2  *      intel TCO Watchdog Driver
   3  *
   4  *      (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>.
   5  *
   6  *      This program is free software; you can redistribute it and/or
   7  *      modify it under the terms of the GNU General Public License
   8  *      as published by the Free Software Foundation; either version
   9  *      2 of the License, or (at your option) any later version.
  10  *
  11  *      Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
  12  *      provide warranty for any of this software. This material is
  13  *      provided "AS-IS" and at no charge.
  14  *
  15  *      The TCO watchdog is implemented in the following I/O controller hubs:
  16  *      (See the intel documentation on http://developer.intel.com.)
  17  *      document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
  18  *      document number 290687-002, 298242-027: 82801BA (ICH2)
  19  *      document number 290733-003, 290739-013: 82801CA (ICH3-S)
  20  *      document number 290716-001, 290718-007: 82801CAM (ICH3-M)
  21  *      document number 290744-001, 290745-025: 82801DB (ICH4)
  22  *      document number 252337-001, 252663-008: 82801DBM (ICH4-M)
  23  *      document number 273599-001, 273645-002: 82801E (C-ICH)
  24  *      document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
  25  *      document number 300641-004, 300884-013: 6300ESB
  26  *      document number 301473-002, 301474-026: 82801F (ICH6)
  27  *      document number 313082-001, 313075-006: 631xESB, 632xESB
  28  *      document number 307013-003, 307014-024: 82801G (ICH7)
  29  *      document number 322896-001, 322897-001: NM10
  30  *      document number 313056-003, 313057-017: 82801H (ICH8)
  31  *      document number 316972-004, 316973-012: 82801I (ICH9)
  32  *      document number 319973-002, 319974-002: 82801J (ICH10)
  33  *      document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
  34  *      document number 320066-003, 320257-008: EP80597 (IICH)
  35  *      document number 324645-001, 324646-001: Cougar Point (CPT)
  36  *      document number TBD                   : Patsburg (PBG)
  37  *      document number TBD                   : DH89xxCC
  38  *      document number TBD                   : Panther Point
  39  *      document number TBD                   : Lynx Point
  40  *      document number TBD                   : Lynx Point-LP
  41  */
  42
  43 /*
  44  *      Includes, defines, variables, module parameters, ...
  45  */
  46
  47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  48
  49 /* Module and version information */
  50 #define DRV_NAME        "iTCO_wdt"
  51 #define DRV_VERSION     "1.11"
  52
  53 /* Includes */
  54 #include <linux/acpi.h>                 /* For ACPI support */
  55 #include <linux/module.h>               /* For module specific items */
  56 #include <linux/moduleparam.h>          /* For new moduleparam's */
  57 #include <linux/types.h>                /* For standard types (like size_t) */
  58 #include <linux/errno.h>                /* For the -ENODEV/... values */
  59 #include <linux/kernel.h>               /* For printk/panic/... */
  60 #include <linux/watchdog.h>             /* For the watchdog specific items */
  61 #include <linux/init.h>                 /* For __init/__exit/... */
  62 #include <linux/fs.h>                   /* For file operations */
  63 #include <linux/platform_device.h>      /* For platform_driver framework */
  64 #include <linux/pci.h>                  /* For pci functions */
  65 #include <linux/ioport.h>               /* For io-port access */
  66 #include <linux/spinlock.h>             /* For spin_lock/spin_unlock/... */
  67 #include <linux/uaccess.h>              /* For copy_to_user/put_user/... */
  68 #include <linux/io.h>                   /* For inb/outb/... */
  69 #include <linux/platform_data/itco_wdt.h>
  70
  71 #include "iTCO_vendor.h"
  72
  73 /* Address definitions for the TCO */
  74 /* TCO base address */
  75 #define TCOBASE(p)      ((p)->tco_res->start)
  76 /* SMI Control and Enable Register */
  77 #define SMI_EN(p)       ((p)->smi_res->start)
  78
  79 #define TCO_RLD(p)      (TCOBASE(p) + 0x00) /* TCO Timer Reload/Curr. Value */
  80 #define TCOv1_TMR(p)    (TCOBASE(p) + 0x01) /* TCOv1 Timer Initial Value*/
  81 #define TCO_DAT_IN(p)   (TCOBASE(p) + 0x02) /* TCO Data In Register     */
  82 #define TCO_DAT_OUT(p)  (TCOBASE(p) + 0x03) /* TCO Data Out Register    */
  83 #define TCO1_STS(p)     (TCOBASE(p) + 0x04) /* TCO1 Status Register     */
  84 #define TCO2_STS(p)     (TCOBASE(p) + 0x06) /* TCO2 Status Register     */
  85 #define TCO1_CNT(p)     (TCOBASE(p) + 0x08) /* TCO1 Control Register    */
  86 #define TCO2_CNT(p)     (TCOBASE(p) + 0x0a) /* TCO2 Control Register    */
  87 #define TCOv2_TMR(p)    (TCOBASE(p) + 0x12) /* TCOv2 Timer Initial Value*/
  88
  89 /* internal variables */
  90 struct iTCO_wdt_private {
  91         struct watchdog_device wddev;
  92
  93         /* TCO version/generation */
  94         unsigned int iTCO_version;
  95         struct resource *tco_res;
  96         struct resource *smi_res;
  97         /*
  98          * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2),
  99          * or memory-mapped PMC register bit 4 (TCO version 3).
 100          */
 101         struct resource *gcs_pmc_res;
 102         unsigned long __iomem *gcs_pmc;
 103         /* the lock for io operations */
 104         spinlock_t io_lock;
 105         /* the PCI-device */
 106         struct pci_dev *pci_dev;
 107         /* whether or not the watchdog has been suspended */
 108         bool suspended;
 109         /* no reboot API private data */
 110         void *no_reboot_priv;
 111         /* no reboot update function pointer */
 112         int (*update_no_reboot_bit)(void *p, bool set);
 113 };
 114
 115 /* module parameters */
 116 #define WATCHDOG_TIMEOUT 30     /* 30 sec default heartbeat */
 117 static int heartbeat = WATCHDOG_TIMEOUT;  /* in seconds */
 118 module_param(heartbeat, int, 0);
 119 MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. "
 120         "5..76 (TCO v1) or 3..614 (TCO v2), default="
 121                                 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
 122
 123 static bool nowayout = WATCHDOG_NOWAYOUT;
 124 module_param(nowayout, bool, 0);
 125 MODULE_PARM_DESC(nowayout,
 126         "Watchdog cannot be stopped once started (default="
 127                                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 128
 129 static int turn_SMI_watchdog_clear_off = 1;
 130 module_param(turn_SMI_watchdog_clear_off, int, 0);
 131 MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
 132         "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
 133
 134 /*
 135  * Some TCO specific functions
 136  */
 137
 138 /*
 139  * The iTCO v1 and v2's internal timer is stored as ticks which decrement
 140  * every 0.6 seconds.  v3's internal timer is stored as seconds (some
 141  * datasheets incorrectly state 0.6 seconds).
 142  */
 143 static inline unsigned int seconds_to_ticks(struct iTCO_wdt_private *p,
 144                                             int secs)
 145 {
 146         return p->iTCO_version == 3 ? secs : (secs * 10) / 6;
 147 }
 148
 149 static inline unsigned int ticks_to_seconds(struct iTCO_wdt_private *p,
 150                                             int ticks)
 151 {
 152         return p->iTCO_version == 3 ? ticks : (ticks * 6) / 10;
 153 }
 154
 155 static inline u32 no_reboot_bit(struct iTCO_wdt_private *p)
 156 {
 157         u32 enable_bit;
 158
 159         switch (p->iTCO_version) {
 160         case 5:
 161         case 3:
 162                 enable_bit = 0x00000010;
 163                 break;
 164         case 2:
 165                 enable_bit = 0x00000020;
 166                 break;
 167         case 4:
 168         case 1:
 169         default:
 170                 enable_bit = 0x00000002;
 171                 break;
 172         }
 173
 174         return enable_bit;
 175 }
 176
 177 static int update_no_reboot_bit_def(void *priv, bool set)
 178 {
 179         return 0;
 180 }
 181
 182 static int update_no_reboot_bit_pci(void *priv, bool set)
 183 {
 184         struct iTCO_wdt_private *p = priv;
 185         u32 val32 = 0, newval32 = 0;
 186
 187         pci_read_config_dword(p->pci_dev, 0xd4, &val32);
 188         if (set)
 189                 val32 |= no_reboot_bit(p);
 190         else
 191                 val32 &= ~no_reboot_bit(p);
 192         pci_write_config_dword(p->pci_dev, 0xd4, val32);
 193         pci_read_config_dword(p->pci_dev, 0xd4, &newval32);
 194
 195         /* make sure the update is successful */
 196         if (val32 != newval32)
 197                 return -EIO;
 198
 199         return 0;
 200 }
 201
 202 static int update_no_reboot_bit_mem(void *priv, bool set)
 203 {
 204         struct iTCO_wdt_private *p = priv;
 205         u32 val32 = 0, newval32 = 0;
 206
 207         val32 = readl(p->gcs_pmc);
 208         if (set)
 209                 val32 |= no_reboot_bit(p);
 210         else
 211                 val32 &= ~no_reboot_bit(p);
 212         writel(val32, p->gcs_pmc);
 213         newval32 = readl(p->gcs_pmc);
 214
 215         /* make sure the update is successful */
 216         if (val32 != newval32)
 217                 return -EIO;
 218
 219         return 0;
 220 }
 221
 222 static void iTCO_wdt_no_reboot_bit_setup(struct iTCO_wdt_private *p,
 223                 struct itco_wdt_platform_data *pdata)
 224 {
 225         if (pdata->update_no_reboot_bit) {
 226                 p->update_no_reboot_bit = pdata->update_no_reboot_bit;
 227                 p->no_reboot_priv = pdata->no_reboot_priv;
 228                 return;
 229         }
 230
 231         if (p->iTCO_version >= 2)
 232                 p->update_no_reboot_bit = update_no_reboot_bit_mem;
 233         else if (p->iTCO_version == 1)
 234                 p->update_no_reboot_bit = update_no_reboot_bit_pci;
 235         else
 236                 p->update_no_reboot_bit = update_no_reboot_bit_def;
 237
 238         p->no_reboot_priv = p;
 239 }
 240
 241 static int iTCO_wdt_start(struct watchdog_device *wd_dev)
 242 {
 243         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 244         unsigned int val;
 245
 246         spin_lock(&p->io_lock);
 247
 248         iTCO_vendor_pre_start(p->smi_res, wd_dev->timeout);
 249
 250         /* disable chipset's NO_REBOOT bit */
 251         if (p->update_no_reboot_bit(p->no_reboot_priv, false)) {
 252                 spin_unlock(&p->io_lock);
 253                 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n");
 254                 return -EIO;
 255         }
 256
 257         /* Force the timer to its reload value by writing to the TCO_RLD
 258            register */
 259         if (p->iTCO_version >= 2)
 260                 outw(0x01, TCO_RLD(p));
 261         else if (p->iTCO_version == 1)
 262                 outb(0x01, TCO_RLD(p));
 263
 264         /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
 265         val = inw(TCO1_CNT(p));
 266         val &= 0xf7ff;
 267         outw(val, TCO1_CNT(p));
 268         val = inw(TCO1_CNT(p));
 269         spin_unlock(&p->io_lock);
 270
 271         if (val & 0x0800)
 272                 return -1;
 273         return 0;
 274 }
 275
 276 static int iTCO_wdt_stop(struct watchdog_device *wd_dev)
 277 {
 278         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 279         unsigned int val;
 280
 281         spin_lock(&p->io_lock);
 282
 283         iTCO_vendor_pre_stop(p->smi_res);
 284
 285         /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
 286         val = inw(TCO1_CNT(p));
 287         val |= 0x0800;
 288         outw(val, TCO1_CNT(p));
 289         val = inw(TCO1_CNT(p));
 290
 291         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
 292         p->update_no_reboot_bit(p->no_reboot_priv, true);
 293
 294         spin_unlock(&p->io_lock);
 295
 296         if ((val & 0x0800) == 0)
 297                 return -1;
 298         return 0;
 299 }
 300
 301 static int iTCO_wdt_ping(struct watchdog_device *wd_dev)
 302 {
 303         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 304
 305         spin_lock(&p->io_lock);
 306
 307         iTCO_vendor_pre_keepalive(p->smi_res, wd_dev->timeout);
 308
 309         /* Reset the timeout status bit so that the timer
 310          * needs to count down twice again before rebooting */
 311         outw(0x0008, TCO1_STS(p));      /* write 1 to clear bit */
 312
 313         /* Reload the timer by writing to the TCO Timer Counter register */
 314         if (p->iTCO_version >= 2)
 315                 outw(0x01, TCO_RLD(p));
 316         else if (p->iTCO_version == 1)
 317                 outb(0x01, TCO_RLD(p));
 318
 319         spin_unlock(&p->io_lock);
 320         return 0;
 321 }
 322
 323 static int iTCO_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t)
 324 {
 325         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 326         unsigned int val16;
 327         unsigned char val8;
 328         unsigned int tmrval;
 329
 330         /* The timer counts down twice before rebooting */
 331         tmrval = seconds_to_ticks(p, t) / 2;
 332
 333         /* from the specs: */
 334         /* "Values of 0h-3h are ignored and should not be attempted" */
 335         if (tmrval < 0x04)
 336                 return -EINVAL;
 337         if ((p->iTCO_version >= 2 && tmrval > 0x3ff) ||
 338             (p->iTCO_version == 1 && tmrval > 0x03f))
 339                 return -EINVAL;
 340
 341         iTCO_vendor_pre_set_heartbeat(tmrval);
 342
 343         /* Write new heartbeat to watchdog */
 344         if (p->iTCO_version >= 2) {
 345                 spin_lock(&p->io_lock);
 346                 val16 = inw(TCOv2_TMR(p));
 347                 val16 &= 0xfc00;
 348                 val16 |= tmrval;
 349                 outw(val16, TCOv2_TMR(p));
 350                 val16 = inw(TCOv2_TMR(p));
 351                 spin_unlock(&p->io_lock);
 352
 353                 if ((val16 & 0x3ff) != tmrval)
 354                         return -EINVAL;
 355         } else if (p->iTCO_version == 1) {
 356                 spin_lock(&p->io_lock);
 357                 val8 = inb(TCOv1_TMR(p));
 358                 val8 &= 0xc0;
 359                 val8 |= (tmrval & 0xff);
 360                 outb(val8, TCOv1_TMR(p));
 361                 val8 = inb(TCOv1_TMR(p));
 362                 spin_unlock(&p->io_lock);
 363
 364                 if ((val8 & 0x3f) != tmrval)
 365                         return -EINVAL;
 366         }
 367
 368         wd_dev->timeout = t;
 369         return 0;
 370 }
 371
 372 static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev)
 373 {
 374         struct iTCO_wdt_private *p = watchdog_get_drvdata(wd_dev);
 375         unsigned int val16;
 376         unsigned char val8;
 377         unsigned int time_left = 0;
 378
 379         /* read the TCO Timer */
 380         if (p->iTCO_version >= 2) {
 381                 spin_lock(&p->io_lock);
 382                 val16 = inw(TCO_RLD(p));
 383                 val16 &= 0x3ff;
 384                 if (!(inw(TCO1_STS(p)) & 0x0008))
 385                         val16 += (inw(TCOv2_TMR(p)) & 0x3ff);
 386                 spin_unlock(&p->io_lock);
 387
 388                 time_left = ticks_to_seconds(p, val16);
 389         } else if (p->iTCO_version == 1) {
 390                 spin_lock(&p->io_lock);
 391                 val8 = inb(TCO_RLD(p));
 392                 val8 &= 0x3f;
 393                 if (!(inw(TCO1_STS(p)) & 0x0008))
 394                         val8 += (inb(TCOv1_TMR(p)) & 0x3f);
 395                 spin_unlock(&p->io_lock);
 396
 397                 time_left = ticks_to_seconds(p, val8);
 398         }
 399         return time_left;
 400 }
 401
 402 /*
 403  *      Kernel Interfaces
 404  */
 405
 406 static const struct watchdog_info ident = {
 407         .options =              WDIOF_SETTIMEOUT |
 408                                 WDIOF_KEEPALIVEPING |
 409                                 WDIOF_MAGICCLOSE,
 410         .firmware_version =     0,
 411         .identity =             DRV_NAME,
 412 };
 413
 414 static const struct watchdog_ops iTCO_wdt_ops = {
 415         .owner =                THIS_MODULE,
 416         .start =                iTCO_wdt_start,
 417         .stop =                 iTCO_wdt_stop,
 418         .ping =                 iTCO_wdt_ping,
 419         .set_timeout =          iTCO_wdt_set_timeout,
 420         .get_timeleft =         iTCO_wdt_get_timeleft,
 421 };
 422
 423 /*
 424  *      Init & exit routines
 425  */
 426
 427 static int iTCO_wdt_probe(struct platform_device *pdev)
 428 {
 429         struct device *dev = &pdev->dev;
 430         struct itco_wdt_platform_data *pdata = dev_get_platdata(dev);
 431         struct iTCO_wdt_private *p;
 432         unsigned long val32;
 433         int ret;
 434
 435         if (!pdata)
 436                 return -ENODEV;
 437
 438         p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
 439         if (!p)
 440                 return -ENOMEM;
 441
 442         spin_lock_init(&p->io_lock);
 443
 444         p->tco_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_TCO);
 445         if (!p->tco_res)
 446                 return -ENODEV;
 447
 448         p->smi_res = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_IO_SMI);
 449         if (!p->smi_res)
 450                 return -ENODEV;
 451
 452         p->iTCO_version = pdata->version;
 453         p->pci_dev = to_pci_dev(dev->parent);
 454
 455         iTCO_wdt_no_reboot_bit_setup(p, pdata);
 456
 457         /*
 458          * Get the Memory-Mapped GCS or PMC register, we need it for the
 459          * NO_REBOOT flag (TCO v2 and v3).
 460          */
 461         if (p->iTCO_version >= 2 && !pdata->update_no_reboot_bit) {
 462                 p->gcs_pmc_res = platform_get_resource(pdev,
 463                                                        IORESOURCE_MEM,
 464                                                        ICH_RES_MEM_GCS_PMC);
 465                 p->gcs_pmc = devm_ioremap_resource(dev, p->gcs_pmc_res);
 466                 if (IS_ERR(p->gcs_pmc))
 467                         return PTR_ERR(p->gcs_pmc);
 468         }
 469
 470         /* Check chipset's NO_REBOOT bit */
 471         if (p->update_no_reboot_bit(p->no_reboot_priv, false) &&
 472             iTCO_vendor_check_noreboot_on()) {
 473                 pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
 474                 return -ENODEV; /* Cannot reset NO_REBOOT bit */
 475         }
 476
 477         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
 478         p->update_no_reboot_bit(p->no_reboot_priv, true);
 479
 480         /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
 481         if (!devm_request_region(dev, p->smi_res->start,
 482                                  resource_size(p->smi_res),
 483                                  pdev->name)) {
 484                 pr_err("I/O address 0x%04llx already in use, device disabled\n",
 485                        (u64)SMI_EN(p));
 486                 return -EBUSY;
 487         }
 488         if (turn_SMI_watchdog_clear_off >= p->iTCO_version) {
 489                 /*
 490                  * Bit 13: TCO_EN -> 0
 491                  * Disables TCO logic generating an SMI#
 492                  */
 493                 val32 = inl(SMI_EN(p));
 494                 val32 &= 0xffffdfff;    /* Turn off SMI clearing watchdog */
 495                 outl(val32, SMI_EN(p));
 496         }
 497
 498         if (!devm_request_region(dev, p->tco_res->start,
 499                                  resource_size(p->tco_res),
 500                                  pdev->name)) {
 501                 pr_err("I/O address 0x%04llx already in use, device disabled\n",
 502                        (u64)TCOBASE(p));
 503                 return -EBUSY;
 504         }
 505
 506         pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n",
 507                 pdata->name, pdata->version, (u64)TCOBASE(p));
 508
 509         /* Clear out the (probably old) status */
 510         switch (p->iTCO_version) {
 511         case 5:
 512         case 4:
 513                 outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */
 514                 outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */
 515                 break;
 516         case 3:
 517                 outl(0x20008, TCO1_STS(p));
 518                 break;
 519         case 2:
 520         case 1:
 521         default:
 522                 outw(0x0008, TCO1_STS(p)); /* Clear the Time Out Status bit */
 523                 outw(0x0002, TCO2_STS(p)); /* Clear SECOND_TO_STS bit */
 524                 outw(0x0004, TCO2_STS(p)); /* Clear BOOT_STS bit */
 525                 break;
 526         }
 527
 528         p->wddev.info = &ident,
 529         p->wddev.ops = &iTCO_wdt_ops,
 530         p->wddev.bootstatus = 0;
 531         p->wddev.timeout = WATCHDOG_TIMEOUT;
 532         watchdog_set_nowayout(&p->wddev, nowayout);
 533         p->wddev.parent = dev;
 534
 535         watchdog_set_drvdata(&p->wddev, p);
 536         platform_set_drvdata(pdev, p);
 537
 538         /* Make sure the watchdog is not running */
 539         iTCO_wdt_stop(&p->wddev);
 540
 541         /* Check that the heartbeat value is within it's range;
 542            if not reset to the default */
 543         if (iTCO_wdt_set_timeout(&p->wddev, heartbeat)) {
 544                 iTCO_wdt_set_timeout(&p->wddev, WATCHDOG_TIMEOUT);
 545                 pr_info("timeout value out of range, using %d\n",
 546                         WATCHDOG_TIMEOUT);
 547         }
 548
 549         watchdog_stop_on_reboot(&p->wddev);
 550         ret = devm_watchdog_register_device(dev, &p->wddev);
 551         if (ret != 0) {
 552                 pr_err("cannot register watchdog device (err=%d)\n", ret);
 553                 return ret;
 554         }
 555
 556         pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
 557                 heartbeat, nowayout);
 558
 559         return 0;
 560 }
 561
 562 static int iTCO_wdt_remove(struct platform_device *pdev)
 563 {
 564         struct iTCO_wdt_private *p = platform_get_drvdata(pdev);
 565
 566         /* Stop the timer before we leave */
 567         if (!nowayout)
 568                 iTCO_wdt_stop(&p->wddev);
 569
 570         return 0;
 571 }
 572
 573 #ifdef CONFIG_PM_SLEEP
 574 /*
 575  * Suspend-to-idle requires this, because it stops the ticks and timekeeping, so
 576  * the watchdog cannot be pinged while in that state.  In ACPI sleep states the
 577  * watchdog is stopped by the platform firmware.
 578  */
 579
 580 #ifdef CONFIG_ACPI
 581 static inline bool need_suspend(void)
 582 {
 583         return acpi_target_system_state() == ACPI_STATE_S0;
 584 }
 585 #else
 586 static inline bool need_suspend(void) { return true; }
 587 #endif
 588
 589 static int iTCO_wdt_suspend_noirq(struct device *dev)
 590 {
 591         struct iTCO_wdt_private *p = dev_get_drvdata(dev);
 592         int ret = 0;
 593
 594         p->suspended = false;
 595         if (watchdog_active(&p->wddev) && need_suspend()) {
 596                 ret = iTCO_wdt_stop(&p->wddev);
 597                 if (!ret)
 598                         p->suspended = true;
 599         }
 600         return ret;
 601 }
 602
 603 static int iTCO_wdt_resume_noirq(struct device *dev)
 604 {
 605         struct iTCO_wdt_private *p = dev_get_drvdata(dev);
 606
 607         if (p->suspended)
 608                 iTCO_wdt_start(&p->wddev);
 609
 610         return 0;
 611 }
 612
 613 static const struct dev_pm_ops iTCO_wdt_pm = {
 614         .suspend_noirq = iTCO_wdt_suspend_noirq,
 615         .resume_noirq = iTCO_wdt_resume_noirq,
 616 };
 617
 618 #define ITCO_WDT_PM_OPS (&iTCO_wdt_pm)
 619 #else
 620 #define ITCO_WDT_PM_OPS NULL
 621 #endif /* CONFIG_PM_SLEEP */
 622
 623 static struct platform_driver iTCO_wdt_driver = {
 624         .probe          = iTCO_wdt_probe,
 625         .remove         = iTCO_wdt_remove,
 626         .driver         = {
 627                 .name   = DRV_NAME,
 628                 .pm     = ITCO_WDT_PM_OPS,
 629         },
 630 };
 631
 632 static int __init iTCO_wdt_init_module(void)
 633 {
 634         pr_info("Intel TCO WatchDog Timer Driver v%s\n", DRV_VERSION);
 635
 636         return platform_driver_register(&iTCO_wdt_driver);
 637 }
 638
 639 static void __exit iTCO_wdt_cleanup_module(void)
 640 {
 641         platform_driver_unregister(&iTCO_wdt_driver);
 642         pr_info("Watchdog Module Unloaded\n");
 643 }
 644
 645 module_init(iTCO_wdt_init_module);
 646 module_exit(iTCO_wdt_cleanup_module);
 647
 648 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
 649 MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
 650 MODULE_VERSION(DRV_VERSION);
 651 MODULE_LICENSE("GPL");
 652 MODULE_ALIAS("platform:" DRV_NAME);