2 * intel TCO Watchdog Driver
4 * (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
12 * provide warranty for any of this software. This material is
13 * provided "AS-IS" and at no charge.
15 * The TCO watchdog is implemented in the following I/O controller hubs:
16 * (See the intel documentation on http://developer.intel.com.)
17 * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
18 * document number 290687-002, 298242-027: 82801BA (ICH2)
19 * document number 290733-003, 290739-013: 82801CA (ICH3-S)
20 * document number 290716-001, 290718-007: 82801CAM (ICH3-M)
21 * document number 290744-001, 290745-025: 82801DB (ICH4)
22 * document number 252337-001, 252663-008: 82801DBM (ICH4-M)
23 * document number 273599-001, 273645-002: 82801E (C-ICH)
24 * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
25 * document number 300641-004, 300884-013: 6300ESB
26 * document number 301473-002, 301474-026: 82801F (ICH6)
27 * document number 313082-001, 313075-006: 631xESB, 632xESB
28 * document number 307013-003, 307014-024: 82801G (ICH7)
29 * document number 322896-001, 322897-001: NM10
30 * document number 313056-003, 313057-017: 82801H (ICH8)
31 * document number 316972-004, 316973-012: 82801I (ICH9)
32 * document number 319973-002, 319974-002: 82801J (ICH10)
33 * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
34 * document number 320066-003, 320257-008: EP80597 (IICH)
35 * document number 324645-001, 324646-001: Cougar Point (CPT)
36 * document number TBD : Patsburg (PBG)
37 * document number TBD : DH89xxCC
38 * document number TBD : Panther Point
39 * document number TBD : Lynx Point
40 * document number TBD : Lynx Point-LP
44 * Includes, defines, variables, module parameters, ...
47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
49 /* Module and version information */
50 #define DRV_NAME "iTCO_wdt"
51 #define DRV_VERSION "1.11"
54 #include <linux/acpi.h> /* For ACPI support */
55 #include <linux/module.h> /* For module specific items */
56 #include <linux/moduleparam.h> /* For new moduleparam's */
57 #include <linux/types.h> /* For standard types (like size_t) */
58 #include <linux/errno.h> /* For the -ENODEV/... values */
59 #include <linux/kernel.h> /* For printk/panic/... */
60 #include <linux/watchdog.h> /* For the watchdog specific items */
61 #include <linux/init.h> /* For __init/__exit/... */
62 #include <linux/fs.h> /* For file operations */
63 #include <linux/platform_device.h> /* For platform_driver framework */
64 #include <linux/pci.h> /* For pci functions */
65 #include <linux/ioport.h> /* For io-port access */
66 #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
67 #include <linux/uaccess.h> /* For copy_to_user/put_user/... */
68 #include <linux/io.h> /* For inb/outb/... */
69 #include <linux/platform_data/itco_wdt.h>
71 #include "iTCO_vendor.h"
73 /* Address definitions for the TCO */
74 /* TCO base address */
75 #define TCOBASE(p) ((p)->tco_res->start)
76 /* SMI Control and Enable Register */
77 #define SMI_EN(p) ((p)->smi_res->start)
79 #define TCO_RLD(p) (TCOBASE(p) + 0x00) /* TCO Timer Reload/Curr. Value */
80 #define TCOv1_TMR(p) (TCOBASE(p) + 0x01) /* TCOv1 Timer Initial Value*/
81 #define TCO_DAT_IN(p) (TCOBASE(p) + 0x02) /* TCO Data In Register */
82 #define TCO_DAT_OUT(p) (TCOBASE(p) + 0x03) /* TCO Data Out Register */
83 #define TCO1_STS(p) (TCOBASE(p) + 0x04) /* TCO1 Status Register */
84 #define TCO2_STS(p) (TCOBASE(p) + 0x06) /* TCO2 Status Register */
85 #define TCO1_CNT(p) (TCOBASE(p) + 0x08) /* TCO1 Control Register */
86 #define TCO2_CNT(p) (TCOBASE(p) + 0x0a) /* TCO2 Control Register */
87 #define TCOv2_TMR(p) (TCOBASE(p) + 0x12) /* TCOv2 Timer Initial Value*/
89 /* internal variables */
90 struct iTCO_wdt_private
{
91 struct watchdog_device wddev
;
93 /* TCO version/generation */
94 unsigned int iTCO_version
;
95 struct resource
*tco_res
;
96 struct resource
*smi_res
;
98 * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2),
99 * or memory-mapped PMC register bit 4 (TCO version 3).
101 struct resource
*gcs_pmc_res
;
102 unsigned long __iomem
*gcs_pmc
;
103 /* the lock for io operations */
105 struct platform_device
*dev
;
107 struct pci_dev
*pdev
;
108 /* whether or not the watchdog has been suspended */
112 /* module parameters */
113 #define WATCHDOG_TIMEOUT 30 /* 30 sec default heartbeat */
114 static int heartbeat
= WATCHDOG_TIMEOUT
; /* in seconds */
115 module_param(heartbeat
, int, 0);
116 MODULE_PARM_DESC(heartbeat
, "Watchdog timeout in seconds. "
117 "5..76 (TCO v1) or 3..614 (TCO v2), default="
118 __MODULE_STRING(WATCHDOG_TIMEOUT
) ")");
120 static bool nowayout
= WATCHDOG_NOWAYOUT
;
121 module_param(nowayout
, bool, 0);
122 MODULE_PARM_DESC(nowayout
,
123 "Watchdog cannot be stopped once started (default="
124 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
126 static int turn_SMI_watchdog_clear_off
= 1;
127 module_param(turn_SMI_watchdog_clear_off
, int, 0);
128 MODULE_PARM_DESC(turn_SMI_watchdog_clear_off
,
129 "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
132 * Some TCO specific functions
136 * The iTCO v1 and v2's internal timer is stored as ticks which decrement
137 * every 0.6 seconds. v3's internal timer is stored as seconds (some
138 * datasheets incorrectly state 0.6 seconds).
140 static inline unsigned int seconds_to_ticks(struct iTCO_wdt_private
*p
,
143 return p
->iTCO_version
== 3 ? secs
: (secs
* 10) / 6;
146 static inline unsigned int ticks_to_seconds(struct iTCO_wdt_private
*p
,
149 return p
->iTCO_version
== 3 ? ticks
: (ticks
* 6) / 10;
152 static inline u32
no_reboot_bit(struct iTCO_wdt_private
*p
)
156 switch (p
->iTCO_version
) {
159 enable_bit
= 0x00000010;
162 enable_bit
= 0x00000020;
167 enable_bit
= 0x00000002;
174 static void iTCO_wdt_set_NO_REBOOT_bit(struct iTCO_wdt_private
*p
)
178 /* Set the NO_REBOOT bit: this disables reboots */
179 if (p
->iTCO_version
>= 2) {
180 val32
= readl(p
->gcs_pmc
);
181 val32
|= no_reboot_bit(p
);
182 writel(val32
, p
->gcs_pmc
);
183 } else if (p
->iTCO_version
== 1) {
184 pci_read_config_dword(p
->pdev
, 0xd4, &val32
);
185 val32
|= no_reboot_bit(p
);
186 pci_write_config_dword(p
->pdev
, 0xd4, val32
);
190 static int iTCO_wdt_unset_NO_REBOOT_bit(struct iTCO_wdt_private
*p
)
192 u32 enable_bit
= no_reboot_bit(p
);
195 /* Unset the NO_REBOOT bit: this enables reboots */
196 if (p
->iTCO_version
>= 2) {
197 val32
= readl(p
->gcs_pmc
);
198 val32
&= ~enable_bit
;
199 writel(val32
, p
->gcs_pmc
);
201 val32
= readl(p
->gcs_pmc
);
202 } else if (p
->iTCO_version
== 1) {
203 pci_read_config_dword(p
->pdev
, 0xd4, &val32
);
204 val32
&= ~enable_bit
;
205 pci_write_config_dword(p
->pdev
, 0xd4, val32
);
207 pci_read_config_dword(p
->pdev
, 0xd4, &val32
);
210 if (val32
& enable_bit
)
216 static int iTCO_wdt_start(struct watchdog_device
*wd_dev
)
218 struct iTCO_wdt_private
*p
= watchdog_get_drvdata(wd_dev
);
221 spin_lock(&p
->io_lock
);
223 iTCO_vendor_pre_start(p
->smi_res
, wd_dev
->timeout
);
225 /* disable chipset's NO_REBOOT bit */
226 if (iTCO_wdt_unset_NO_REBOOT_bit(p
)) {
227 spin_unlock(&p
->io_lock
);
228 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n");
232 /* Force the timer to its reload value by writing to the TCO_RLD
234 if (p
->iTCO_version
>= 2)
235 outw(0x01, TCO_RLD(p
));
236 else if (p
->iTCO_version
== 1)
237 outb(0x01, TCO_RLD(p
));
239 /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
240 val
= inw(TCO1_CNT(p
));
242 outw(val
, TCO1_CNT(p
));
243 val
= inw(TCO1_CNT(p
));
244 spin_unlock(&p
->io_lock
);
251 static int iTCO_wdt_stop(struct watchdog_device
*wd_dev
)
253 struct iTCO_wdt_private
*p
= watchdog_get_drvdata(wd_dev
);
256 spin_lock(&p
->io_lock
);
258 iTCO_vendor_pre_stop(p
->smi_res
);
260 /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
261 val
= inw(TCO1_CNT(p
));
263 outw(val
, TCO1_CNT(p
));
264 val
= inw(TCO1_CNT(p
));
266 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
267 iTCO_wdt_set_NO_REBOOT_bit(p
);
269 spin_unlock(&p
->io_lock
);
271 if ((val
& 0x0800) == 0)
276 static int iTCO_wdt_ping(struct watchdog_device
*wd_dev
)
278 struct iTCO_wdt_private
*p
= watchdog_get_drvdata(wd_dev
);
280 spin_lock(&p
->io_lock
);
282 iTCO_vendor_pre_keepalive(p
->smi_res
, wd_dev
->timeout
);
284 /* Reload the timer by writing to the TCO Timer Counter register */
285 if (p
->iTCO_version
>= 2) {
286 outw(0x01, TCO_RLD(p
));
287 } else if (p
->iTCO_version
== 1) {
288 /* Reset the timeout status bit so that the timer
289 * needs to count down twice again before rebooting */
290 outw(0x0008, TCO1_STS(p
)); /* write 1 to clear bit */
292 outb(0x01, TCO_RLD(p
));
295 spin_unlock(&p
->io_lock
);
299 static int iTCO_wdt_set_timeout(struct watchdog_device
*wd_dev
, unsigned int t
)
301 struct iTCO_wdt_private
*p
= watchdog_get_drvdata(wd_dev
);
306 tmrval
= seconds_to_ticks(p
, t
);
308 /* For TCO v1 the timer counts down twice before rebooting */
309 if (p
->iTCO_version
== 1)
312 /* from the specs: */
313 /* "Values of 0h-3h are ignored and should not be attempted" */
316 if ((p
->iTCO_version
>= 2 && tmrval
> 0x3ff) ||
317 (p
->iTCO_version
== 1 && tmrval
> 0x03f))
320 iTCO_vendor_pre_set_heartbeat(tmrval
);
322 /* Write new heartbeat to watchdog */
323 if (p
->iTCO_version
>= 2) {
324 spin_lock(&p
->io_lock
);
325 val16
= inw(TCOv2_TMR(p
));
328 outw(val16
, TCOv2_TMR(p
));
329 val16
= inw(TCOv2_TMR(p
));
330 spin_unlock(&p
->io_lock
);
332 if ((val16
& 0x3ff) != tmrval
)
334 } else if (p
->iTCO_version
== 1) {
335 spin_lock(&p
->io_lock
);
336 val8
= inb(TCOv1_TMR(p
));
338 val8
|= (tmrval
& 0xff);
339 outb(val8
, TCOv1_TMR(p
));
340 val8
= inb(TCOv1_TMR(p
));
341 spin_unlock(&p
->io_lock
);
343 if ((val8
& 0x3f) != tmrval
)
351 static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device
*wd_dev
)
353 struct iTCO_wdt_private
*p
= watchdog_get_drvdata(wd_dev
);
356 unsigned int time_left
= 0;
358 /* read the TCO Timer */
359 if (p
->iTCO_version
>= 2) {
360 spin_lock(&p
->io_lock
);
361 val16
= inw(TCO_RLD(p
));
363 spin_unlock(&p
->io_lock
);
365 time_left
= ticks_to_seconds(p
, val16
);
366 } else if (p
->iTCO_version
== 1) {
367 spin_lock(&p
->io_lock
);
368 val8
= inb(TCO_RLD(p
));
370 if (!(inw(TCO1_STS(p
)) & 0x0008))
371 val8
+= (inb(TCOv1_TMR(p
)) & 0x3f);
372 spin_unlock(&p
->io_lock
);
374 time_left
= ticks_to_seconds(p
, val8
);
383 static const struct watchdog_info ident
= {
384 .options
= WDIOF_SETTIMEOUT
|
385 WDIOF_KEEPALIVEPING
|
387 .firmware_version
= 0,
388 .identity
= DRV_NAME
,
391 static const struct watchdog_ops iTCO_wdt_ops
= {
392 .owner
= THIS_MODULE
,
393 .start
= iTCO_wdt_start
,
394 .stop
= iTCO_wdt_stop
,
395 .ping
= iTCO_wdt_ping
,
396 .set_timeout
= iTCO_wdt_set_timeout
,
397 .get_timeleft
= iTCO_wdt_get_timeleft
,
401 * Init & exit routines
404 static void iTCO_wdt_cleanup(struct iTCO_wdt_private
*p
)
406 /* Stop the timer before we leave */
408 iTCO_wdt_stop(&p
->wddev
);
411 watchdog_unregister_device(&p
->wddev
);
413 /* release resources */
414 release_region(p
->tco_res
->start
,
415 resource_size(p
->tco_res
));
416 release_region(p
->smi_res
->start
,
417 resource_size(p
->smi_res
));
418 if (p
->iTCO_version
>= 2) {
420 release_mem_region(p
->gcs_pmc_res
->start
,
421 resource_size(p
->gcs_pmc_res
));
425 static int iTCO_wdt_probe(struct platform_device
*dev
)
427 struct itco_wdt_platform_data
*pdata
= dev_get_platdata(&dev
->dev
);
428 struct iTCO_wdt_private
*p
;
435 p
= devm_kzalloc(&dev
->dev
, sizeof(*p
), GFP_KERNEL
);
439 spin_lock_init(&p
->io_lock
);
441 p
->tco_res
= platform_get_resource(dev
, IORESOURCE_IO
, ICH_RES_IO_TCO
);
445 p
->smi_res
= platform_get_resource(dev
, IORESOURCE_IO
, ICH_RES_IO_SMI
);
449 p
->iTCO_version
= pdata
->version
;
451 p
->pdev
= to_pci_dev(dev
->dev
.parent
);
454 * Get the Memory-Mapped GCS or PMC register, we need it for the
455 * NO_REBOOT flag (TCO v2 and v3).
457 if (p
->iTCO_version
>= 2) {
458 p
->gcs_pmc_res
= platform_get_resource(dev
,
460 ICH_RES_MEM_GCS_PMC
);
465 if (!request_mem_region(p
->gcs_pmc_res
->start
,
466 resource_size(p
->gcs_pmc_res
),
470 p
->gcs_pmc
= ioremap(p
->gcs_pmc_res
->start
,
471 resource_size(p
->gcs_pmc_res
));
478 /* Check chipset's NO_REBOOT bit */
479 if (iTCO_wdt_unset_NO_REBOOT_bit(p
) &&
480 iTCO_vendor_check_noreboot_on()) {
481 pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
482 ret
= -ENODEV
; /* Cannot reset NO_REBOOT bit */
486 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
487 iTCO_wdt_set_NO_REBOOT_bit(p
);
489 /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
490 if (!request_region(p
->smi_res
->start
,
491 resource_size(p
->smi_res
), dev
->name
)) {
492 pr_err("I/O address 0x%04llx already in use, device disabled\n",
497 if (turn_SMI_watchdog_clear_off
>= p
->iTCO_version
) {
499 * Bit 13: TCO_EN -> 0
500 * Disables TCO logic generating an SMI#
502 val32
= inl(SMI_EN(p
));
503 val32
&= 0xffffdfff; /* Turn off SMI clearing watchdog */
504 outl(val32
, SMI_EN(p
));
507 if (!request_region(p
->tco_res
->start
,
508 resource_size(p
->tco_res
), dev
->name
)) {
509 pr_err("I/O address 0x%04llx already in use, device disabled\n",
515 pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n",
516 pdata
->name
, pdata
->version
, (u64
)TCOBASE(p
));
518 /* Clear out the (probably old) status */
519 switch (p
->iTCO_version
) {
522 outw(0x0008, TCO1_STS(p
)); /* Clear the Time Out Status bit */
523 outw(0x0002, TCO2_STS(p
)); /* Clear SECOND_TO_STS bit */
526 outl(0x20008, TCO1_STS(p
));
531 outw(0x0008, TCO1_STS(p
)); /* Clear the Time Out Status bit */
532 outw(0x0002, TCO2_STS(p
)); /* Clear SECOND_TO_STS bit */
533 outw(0x0004, TCO2_STS(p
)); /* Clear BOOT_STS bit */
537 p
->wddev
.info
= &ident
,
538 p
->wddev
.ops
= &iTCO_wdt_ops
,
539 p
->wddev
.bootstatus
= 0;
540 p
->wddev
.timeout
= WATCHDOG_TIMEOUT
;
541 watchdog_set_nowayout(&p
->wddev
, nowayout
);
542 p
->wddev
.parent
= &dev
->dev
;
544 watchdog_set_drvdata(&p
->wddev
, p
);
545 platform_set_drvdata(dev
, p
);
547 /* Make sure the watchdog is not running */
548 iTCO_wdt_stop(&p
->wddev
);
550 /* Check that the heartbeat value is within it's range;
551 if not reset to the default */
552 if (iTCO_wdt_set_timeout(&p
->wddev
, heartbeat
)) {
553 iTCO_wdt_set_timeout(&p
->wddev
, WATCHDOG_TIMEOUT
);
554 pr_info("timeout value out of range, using %d\n",
558 ret
= watchdog_register_device(&p
->wddev
);
560 pr_err("cannot register watchdog device (err=%d)\n", ret
);
564 pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
565 heartbeat
, nowayout
);
570 release_region(p
->tco_res
->start
, resource_size(p
->tco_res
));
572 release_region(p
->smi_res
->start
, resource_size(p
->smi_res
));
574 if (p
->iTCO_version
>= 2)
577 if (p
->iTCO_version
>= 2)
578 release_mem_region(p
->gcs_pmc_res
->start
,
579 resource_size(p
->gcs_pmc_res
));
583 static int iTCO_wdt_remove(struct platform_device
*dev
)
585 struct iTCO_wdt_private
*p
= platform_get_drvdata(dev
);
587 if (p
->tco_res
|| p
->smi_res
)
593 static void iTCO_wdt_shutdown(struct platform_device
*dev
)
595 struct iTCO_wdt_private
*p
= platform_get_drvdata(dev
);
597 iTCO_wdt_stop(&p
->wddev
);
600 #ifdef CONFIG_PM_SLEEP
602 * Suspend-to-idle requires this, because it stops the ticks and timekeeping, so
603 * the watchdog cannot be pinged while in that state. In ACPI sleep states the
604 * watchdog is stopped by the platform firmware.
608 static inline bool need_suspend(void)
610 return acpi_target_system_state() == ACPI_STATE_S0
;
613 static inline bool need_suspend(void) { return true; }
616 static int iTCO_wdt_suspend_noirq(struct device
*dev
)
618 struct iTCO_wdt_private
*p
= dev_get_drvdata(dev
);
621 p
->suspended
= false;
622 if (watchdog_active(&p
->wddev
) && need_suspend()) {
623 ret
= iTCO_wdt_stop(&p
->wddev
);
630 static int iTCO_wdt_resume_noirq(struct device
*dev
)
632 struct iTCO_wdt_private
*p
= dev_get_drvdata(dev
);
635 iTCO_wdt_start(&p
->wddev
);
640 static const struct dev_pm_ops iTCO_wdt_pm
= {
641 .suspend_noirq
= iTCO_wdt_suspend_noirq
,
642 .resume_noirq
= iTCO_wdt_resume_noirq
,
645 #define ITCO_WDT_PM_OPS (&iTCO_wdt_pm)
647 #define ITCO_WDT_PM_OPS NULL
648 #endif /* CONFIG_PM_SLEEP */
650 static struct platform_driver iTCO_wdt_driver
= {
651 .probe
= iTCO_wdt_probe
,
652 .remove
= iTCO_wdt_remove
,
653 .shutdown
= iTCO_wdt_shutdown
,
656 .pm
= ITCO_WDT_PM_OPS
,
660 static int __init
iTCO_wdt_init_module(void)
664 pr_info("Intel TCO WatchDog Timer Driver v%s\n", DRV_VERSION
);
666 err
= platform_driver_register(&iTCO_wdt_driver
);
673 static void __exit
iTCO_wdt_cleanup_module(void)
675 platform_driver_unregister(&iTCO_wdt_driver
);
676 pr_info("Watchdog Module Unloaded\n");
679 module_init(iTCO_wdt_init_module
);
680 module_exit(iTCO_wdt_cleanup_module
);
682 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
683 MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
684 MODULE_VERSION(DRV_VERSION
);
685 MODULE_LICENSE("GPL");
686 MODULE_ALIAS("platform:" DRV_NAME
);