drivers/watchdog/it87_wdt.c

   1 /*
   2  *      Watchdog Timer Driver
   3  *         for ITE IT87xx Environment Control - Low Pin Count Input / Output
   4  *
   5  *      (c) Copyright 2007  Oliver Schuster <olivers137@aol.com>
   6  *
   7  *      Based on softdog.c      by Alan Cox,
   8  *               83977f_wdt.c   by Jose Goncalves,
   9  *               it87.c         by Chris Gauthron, Jean Delvare
  10  *
  11  *      Data-sheets: Publicly available at the ITE website
  12  *                  http://www.ite.com.tw/
  13  *
  14  *      Support of the watchdog timers, which are available on
  15  *      IT8620, IT8702, IT8712, IT8716, IT8718, IT8720, IT8721, IT8726,
  16  *      IT8728 and IT8783.
  17  *
  18  *      This program is free software; you can redistribute it and/or
  19  *      modify it under the terms of the GNU General Public License
  20  *      as published by the Free Software Foundation; either version
  21  *      2 of the License, or (at your option) any later version.
  22  *
  23  *      This program is distributed in the hope that it will be useful,
  24  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  *      GNU General Public License for more details.
  27  *
  28  *      You should have received a copy of the GNU General Public License
  29  *      along with this program; if not, write to the Free Software
  30  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  */
  32
  33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  34
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/types.h>
  38 #include <linux/kernel.h>
  39 #include <linux/fs.h>
  40 #include <linux/miscdevice.h>
  41 #include <linux/init.h>
  42 #include <linux/ioport.h>
  43 #include <linux/watchdog.h>
  44 #include <linux/notifier.h>
  45 #include <linux/reboot.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/io.h>
  48
  49
  50 #define WATCHDOG_VERSION        "1.14"
  51 #define WATCHDOG_NAME           "IT87 WDT"
  52 #define DRIVER_VERSION          WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
  53 #define WD_MAGIC                'V'
  54
  55 /* Defaults for Module Parameter */
  56 #define DEFAULT_NOGAMEPORT      0
  57 #define DEFAULT_NOCIR           0
  58 #define DEFAULT_EXCLUSIVE       1
  59 #define DEFAULT_TIMEOUT         60
  60 #define DEFAULT_TESTMODE        0
  61 #define DEFAULT_NOWAYOUT        WATCHDOG_NOWAYOUT
  62
  63 /* IO Ports */
  64 #define REG             0x2e
  65 #define VAL             0x2f
  66
  67 /* Logical device Numbers LDN */
  68 #define GPIO            0x07
  69 #define GAMEPORT        0x09
  70 #define CIR             0x0a
  71
  72 /* Configuration Registers and Functions */
  73 #define LDNREG          0x07
  74 #define CHIPID          0x20
  75 #define CHIPREV         0x22
  76 #define ACTREG          0x30
  77 #define BASEREG         0x60
  78
  79 /* Chip Id numbers */
  80 #define NO_DEV_ID       0xffff
  81 #define IT8620_ID       0x8620
  82 #define IT8702_ID       0x8702
  83 #define IT8705_ID       0x8705
  84 #define IT8712_ID       0x8712
  85 #define IT8716_ID       0x8716
  86 #define IT8718_ID       0x8718
  87 #define IT8720_ID       0x8720
  88 #define IT8721_ID       0x8721
  89 #define IT8726_ID       0x8726  /* the data sheet suggest wrongly 0x8716 */
  90 #define IT8728_ID       0x8728
  91 #define IT8783_ID       0x8783
  92
  93 /* GPIO Configuration Registers LDN=0x07 */
  94 #define WDTCTRL         0x71
  95 #define WDTCFG          0x72
  96 #define WDTVALLSB       0x73
  97 #define WDTVALMSB       0x74
  98
  99 /* GPIO Bits WDTCTRL */
 100 #define WDT_CIRINT      0x80
 101 #define WDT_MOUSEINT    0x40
 102 #define WDT_KYBINT      0x20
 103 #define WDT_GAMEPORT    0x10 /* not in it8718, it8720, it8721, it8728 */
 104 #define WDT_FORCE       0x02
 105 #define WDT_ZERO        0x01
 106
 107 /* GPIO Bits WDTCFG */
 108 #define WDT_TOV1        0x80
 109 #define WDT_KRST        0x40
 110 #define WDT_TOVE        0x20
 111 #define WDT_PWROK       0x10 /* not in it8721 */
 112 #define WDT_INT_MASK    0x0f
 113
 114 /* CIR Configuration Register LDN=0x0a */
 115 #define CIR_ILS         0x70
 116
 117 /* The default Base address is not always available, we use this */
 118 #define CIR_BASE        0x0208
 119
 120 /* CIR Controller */
 121 #define CIR_DR(b)       (b)
 122 #define CIR_IER(b)      (b + 1)
 123 #define CIR_RCR(b)      (b + 2)
 124 #define CIR_TCR1(b)     (b + 3)
 125 #define CIR_TCR2(b)     (b + 4)
 126 #define CIR_TSR(b)      (b + 5)
 127 #define CIR_RSR(b)      (b + 6)
 128 #define CIR_BDLR(b)     (b + 5)
 129 #define CIR_BDHR(b)     (b + 6)
 130 #define CIR_IIR(b)      (b + 7)
 131
 132 /* Default Base address of Game port */
 133 #define GP_BASE_DEFAULT 0x0201
 134
 135 /* wdt_status */
 136 #define WDTS_TIMER_RUN  0
 137 #define WDTS_DEV_OPEN   1
 138 #define WDTS_KEEPALIVE  2
 139 #define WDTS_LOCKED     3
 140 #define WDTS_USE_GP     4
 141 #define WDTS_EXPECTED   5
 142 #define WDTS_USE_CIR    6
 143
 144 static  unsigned int base, gpact, ciract, max_units, chip_type;
 145 static  unsigned long wdt_status;
 146
 147 static  int nogameport = DEFAULT_NOGAMEPORT;
 148 static int nocir      = DEFAULT_NOCIR;
 149 static  int exclusive  = DEFAULT_EXCLUSIVE;
 150 static  int timeout    = DEFAULT_TIMEOUT;
 151 static  int testmode   = DEFAULT_TESTMODE;
 152 static  bool nowayout   = DEFAULT_NOWAYOUT;
 153
 154 module_param(nogameport, int, 0);
 155 MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default="
 156                 __MODULE_STRING(DEFAULT_NOGAMEPORT));
 157 module_param(nocir, int, 0);
 158 MODULE_PARM_DESC(nocir, "Forbid the use of Consumer IR interrupts to reset timer, default="
 159                 __MODULE_STRING(DEFAULT_NOCIR));
 160 module_param(exclusive, int, 0);
 161 MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default="
 162                 __MODULE_STRING(DEFAULT_EXCLUSIVE));
 163 module_param(timeout, int, 0);
 164 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
 165                 __MODULE_STRING(DEFAULT_TIMEOUT));
 166 module_param(testmode, int, 0);
 167 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
 168                 __MODULE_STRING(DEFAULT_TESTMODE));
 169 module_param(nowayout, bool, 0);
 170 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
 171                 __MODULE_STRING(WATCHDOG_NOWAYOUT));
 172
 173 /* Superio Chip */
 174
 175 static inline int superio_enter(void)
 176 {
 177         /*
 178          * Try to reserve REG and REG + 1 for exclusive access.
 179          */
 180         if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
 181                 return -EBUSY;
 182
 183         outb(0x87, REG);
 184         outb(0x01, REG);
 185         outb(0x55, REG);
 186         outb(0x55, REG);
 187         return 0;
 188 }
 189
 190 static inline void superio_exit(void)
 191 {
 192         outb(0x02, REG);
 193         outb(0x02, VAL);
 194         release_region(REG, 2);
 195 }
 196
 197 static inline void superio_select(int ldn)
 198 {
 199         outb(LDNREG, REG);
 200         outb(ldn, VAL);
 201 }
 202
 203 static inline int superio_inb(int reg)
 204 {
 205         outb(reg, REG);
 206         return inb(VAL);
 207 }
 208
 209 static inline void superio_outb(int val, int reg)
 210 {
 211         outb(reg, REG);
 212         outb(val, VAL);
 213 }
 214
 215 static inline int superio_inw(int reg)
 216 {
 217         int val;
 218         outb(reg++, REG);
 219         val = inb(VAL) << 8;
 220         outb(reg, REG);
 221         val |= inb(VAL);
 222         return val;
 223 }
 224
 225 static inline void superio_outw(int val, int reg)
 226 {
 227         outb(reg++, REG);
 228         outb(val >> 8, VAL);
 229         outb(reg, REG);
 230         outb(val, VAL);
 231 }
 232
 233 /* Internal function, should be called after superio_select(GPIO) */
 234 static void wdt_update_timeout(void)
 235 {
 236         unsigned char cfg = WDT_KRST;
 237         int tm = timeout;
 238
 239         if (testmode)
 240                 cfg = 0;
 241
 242         if (tm <= max_units)
 243                 cfg |= WDT_TOV1;
 244         else
 245                 tm /= 60;
 246
 247         if (chip_type != IT8721_ID)
 248                 cfg |= WDT_PWROK;
 249
 250         superio_outb(cfg, WDTCFG);
 251         superio_outb(tm, WDTVALLSB);
 252         if (max_units > 255)
 253                 superio_outb(tm>>8, WDTVALMSB);
 254 }
 255
 256 static int wdt_round_time(int t)
 257 {
 258         t += 59;
 259         t -= t % 60;
 260         return t;
 261 }
 262
 263 /* watchdog timer handling */
 264
 265 static void wdt_keepalive(void)
 266 {
 267         if (test_bit(WDTS_USE_GP, &wdt_status))
 268                 inb(base);
 269         else if (test_bit(WDTS_USE_CIR, &wdt_status))
 270                 /* The timer reloads with around 5 msec delay */
 271                 outb(0x55, CIR_DR(base));
 272         else {
 273                 if (superio_enter())
 274                         return;
 275
 276                 superio_select(GPIO);
 277                 wdt_update_timeout();
 278                 superio_exit();
 279         }
 280         set_bit(WDTS_KEEPALIVE, &wdt_status);
 281 }
 282
 283 static int wdt_start(void)
 284 {
 285         int ret = superio_enter();
 286         if (ret)
 287                 return ret;
 288
 289         superio_select(GPIO);
 290         if (test_bit(WDTS_USE_GP, &wdt_status))
 291                 superio_outb(WDT_GAMEPORT, WDTCTRL);
 292         else if (test_bit(WDTS_USE_CIR, &wdt_status))
 293                 superio_outb(WDT_CIRINT, WDTCTRL);
 294         wdt_update_timeout();
 295
 296         superio_exit();
 297
 298         return 0;
 299 }
 300
 301 static int wdt_stop(void)
 302 {
 303         int ret = superio_enter();
 304         if (ret)
 305                 return ret;
 306
 307         superio_select(GPIO);
 308         superio_outb(0x00, WDTCTRL);
 309         superio_outb(WDT_TOV1, WDTCFG);
 310         superio_outb(0x00, WDTVALLSB);
 311         if (max_units > 255)
 312                 superio_outb(0x00, WDTVALMSB);
 313
 314         superio_exit();
 315         return 0;
 316 }
 317
 318 /**
 319  *      wdt_set_timeout - set a new timeout value with watchdog ioctl
 320  *      @t: timeout value in seconds
 321  *
 322  *      The hardware device has a 8 or 16 bit watchdog timer (depends on
 323  *      chip version) that can be configured to count seconds or minutes.
 324  *
 325  *      Used within WDIOC_SETTIMEOUT watchdog device ioctl.
 326  */
 327
 328 static int wdt_set_timeout(int t)
 329 {
 330         if (t < 1 || t > max_units * 60)
 331                 return -EINVAL;
 332
 333         if (t > max_units)
 334                 timeout = wdt_round_time(t);
 335         else
 336                 timeout = t;
 337
 338         if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
 339                 int ret = superio_enter();
 340                 if (ret)
 341                         return ret;
 342
 343                 superio_select(GPIO);
 344                 wdt_update_timeout();
 345                 superio_exit();
 346         }
 347         return 0;
 348 }
 349
 350 /**
 351  *      wdt_get_status - determines the status supported by watchdog ioctl
 352  *      @status: status returned to user space
 353  *
 354  *      The status bit of the device does not allow to distinguish
 355  *      between a regular system reset and a watchdog forced reset.
 356  *      But, in test mode it is useful, so it is supported through
 357  *      WDIOC_GETSTATUS watchdog ioctl. Additionally the driver
 358  *      reports the keepalive signal and the acception of the magic.
 359  *
 360  *      Used within WDIOC_GETSTATUS watchdog device ioctl.
 361  */
 362
 363 static int wdt_get_status(int *status)
 364 {
 365         *status = 0;
 366         if (testmode) {
 367                 int ret = superio_enter();
 368                 if (ret)
 369                         return ret;
 370
 371                 superio_select(GPIO);
 372                 if (superio_inb(WDTCTRL) & WDT_ZERO) {
 373                         superio_outb(0x00, WDTCTRL);
 374                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 375                         *status |= WDIOF_CARDRESET;
 376                 }
 377
 378                 superio_exit();
 379         }
 380         if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status))
 381                 *status |= WDIOF_KEEPALIVEPING;
 382         if (test_bit(WDTS_EXPECTED, &wdt_status))
 383                 *status |= WDIOF_MAGICCLOSE;
 384         return 0;
 385 }
 386
 387 /* /dev/watchdog handling */
 388
 389 /**
 390  *      wdt_open - watchdog file_operations .open
 391  *      @inode: inode of the device
 392  *      @file: file handle to the device
 393  *
 394  *      The watchdog timer starts by opening the device.
 395  *
 396  *      Used within the file operation of the watchdog device.
 397  */
 398
 399 static int wdt_open(struct inode *inode, struct file *file)
 400 {
 401         if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status))
 402                 return -EBUSY;
 403         if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
 404                 int ret;
 405                 if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status))
 406                         __module_get(THIS_MODULE);
 407
 408                 ret = wdt_start();
 409                 if (ret) {
 410                         clear_bit(WDTS_LOCKED, &wdt_status);
 411                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 412                         clear_bit(WDTS_DEV_OPEN, &wdt_status);
 413                         return ret;
 414                 }
 415         }
 416         return nonseekable_open(inode, file);
 417 }
 418
 419 /**
 420  *      wdt_release - watchdog file_operations .release
 421  *      @inode: inode of the device
 422  *      @file: file handle to the device
 423  *
 424  *      Closing the watchdog device either stops the watchdog timer
 425  *      or in the case, that nowayout is set or the magic character
 426  *      wasn't written, a critical warning about an running watchdog
 427  *      timer is given.
 428  *
 429  *      Used within the file operation of the watchdog device.
 430  */
 431
 432 static int wdt_release(struct inode *inode, struct file *file)
 433 {
 434         if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
 435                 if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) {
 436                         int ret = wdt_stop();
 437                         if (ret) {
 438                                 /*
 439                                  * Stop failed. Just keep the watchdog alive
 440                                  * and hope nothing bad happens.
 441                                  */
 442                                 set_bit(WDTS_EXPECTED, &wdt_status);
 443                                 wdt_keepalive();
 444                                 return ret;
 445                         }
 446                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 447                 } else {
 448                         wdt_keepalive();
 449                         pr_crit("unexpected close, not stopping watchdog!\n");
 450                 }
 451         }
 452         clear_bit(WDTS_DEV_OPEN, &wdt_status);
 453         return 0;
 454 }
 455
 456 /**
 457  *      wdt_write - watchdog file_operations .write
 458  *      @file: file handle to the watchdog
 459  *      @buf: buffer to write
 460  *      @count: count of bytes
 461  *      @ppos: pointer to the position to write. No seeks allowed
 462  *
 463  *      A write to a watchdog device is defined as a keepalive signal. Any
 464  *      write of data will do, as we don't define content meaning.
 465  *
 466  *      Used within the file operation of the watchdog device.
 467  */
 468
 469 static ssize_t wdt_write(struct file *file, const char __user *buf,
 470                             size_t count, loff_t *ppos)
 471 {
 472         if (count) {
 473                 clear_bit(WDTS_EXPECTED, &wdt_status);
 474                 wdt_keepalive();
 475         }
 476         if (!nowayout) {
 477                 size_t ofs;
 478
 479         /* note: just in case someone wrote the magic character long ago */
 480                 for (ofs = 0; ofs != count; ofs++) {
 481                         char c;
 482                         if (get_user(c, buf + ofs))
 483                                 return -EFAULT;
 484                         if (c == WD_MAGIC)
 485                                 set_bit(WDTS_EXPECTED, &wdt_status);
 486                 }
 487         }
 488         return count;
 489 }
 490
 491 static const struct watchdog_info ident = {
 492         .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
 493         .firmware_version =     1,
 494         .identity = WATCHDOG_NAME,
 495 };
 496
 497 /**
 498  *      wdt_ioctl - watchdog file_operations .unlocked_ioctl
 499  *      @file: file handle to the device
 500  *      @cmd: watchdog command
 501  *      @arg: argument pointer
 502  *
 503  *      The watchdog API defines a common set of functions for all watchdogs
 504  *      according to their available features.
 505  *
 506  *      Used within the file operation of the watchdog device.
 507  */
 508
 509 static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 510 {
 511         int rc = 0, status, new_options, new_timeout;
 512         union {
 513                 struct watchdog_info __user *ident;
 514                 int __user *i;
 515         } uarg;
 516
 517         uarg.i = (int __user *)arg;
 518
 519         switch (cmd) {
 520         case WDIOC_GETSUPPORT:
 521                 return copy_to_user(uarg.ident,
 522                                     &ident, sizeof(ident)) ? -EFAULT : 0;
 523
 524         case WDIOC_GETSTATUS:
 525                 rc = wdt_get_status(&status);
 526                 if (rc)
 527                         return rc;
 528                 return put_user(status, uarg.i);
 529
 530         case WDIOC_GETBOOTSTATUS:
 531                 return put_user(0, uarg.i);
 532
 533         case WDIOC_KEEPALIVE:
 534                 wdt_keepalive();
 535                 return 0;
 536
 537         case WDIOC_SETOPTIONS:
 538                 if (get_user(new_options, uarg.i))
 539                         return -EFAULT;
 540
 541                 switch (new_options) {
 542                 case WDIOS_DISABLECARD:
 543                         if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
 544                                 rc = wdt_stop();
 545                                 if (rc)
 546                                         return rc;
 547                         }
 548                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 549                         return 0;
 550
 551                 case WDIOS_ENABLECARD:
 552                         if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
 553                                 rc = wdt_start();
 554                                 if (rc) {
 555                                         clear_bit(WDTS_TIMER_RUN, &wdt_status);
 556                                         return rc;
 557                                 }
 558                         }
 559                         return 0;
 560
 561                 default:
 562                         return -EFAULT;
 563                 }
 564
 565         case WDIOC_SETTIMEOUT:
 566                 if (get_user(new_timeout, uarg.i))
 567                         return -EFAULT;
 568                 rc = wdt_set_timeout(new_timeout);
 569         case WDIOC_GETTIMEOUT:
 570                 if (put_user(timeout, uarg.i))
 571                         return -EFAULT;
 572                 return rc;
 573
 574         default:
 575                 return -ENOTTY;
 576         }
 577 }
 578
 579 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
 580         void *unused)
 581 {
 582         if (code == SYS_DOWN || code == SYS_HALT)
 583                 wdt_stop();
 584         return NOTIFY_DONE;
 585 }
 586
 587 static const struct file_operations wdt_fops = {
 588         .owner          = THIS_MODULE,
 589         .llseek         = no_llseek,
 590         .write          = wdt_write,
 591         .unlocked_ioctl = wdt_ioctl,
 592         .open           = wdt_open,
 593         .release        = wdt_release,
 594 };
 595
 596 static struct miscdevice wdt_miscdev = {
 597         .minor          = WATCHDOG_MINOR,
 598         .name           = "watchdog",
 599         .fops           = &wdt_fops,
 600 };
 601
 602 static struct notifier_block wdt_notifier = {
 603         .notifier_call = wdt_notify_sys,
 604 };
 605
 606 static int __init it87_wdt_init(void)
 607 {
 608         int rc = 0;
 609         int try_gameport = !nogameport;
 610         u8  chip_rev;
 611         int gp_rreq_fail = 0;
 612
 613         wdt_status = 0;
 614
 615         rc = superio_enter();
 616         if (rc)
 617                 return rc;
 618
 619         chip_type = superio_inw(CHIPID);
 620         chip_rev  = superio_inb(CHIPREV) & 0x0f;
 621         superio_exit();
 622
 623         switch (chip_type) {
 624         case IT8702_ID:
 625                 max_units = 255;
 626                 break;
 627         case IT8712_ID:
 628                 max_units = (chip_rev < 8) ? 255 : 65535;
 629                 break;
 630         case IT8716_ID:
 631         case IT8726_ID:
 632                 max_units = 65535;
 633                 break;
 634         case IT8620_ID:
 635         case IT8718_ID:
 636         case IT8720_ID:
 637         case IT8721_ID:
 638         case IT8728_ID:
 639         case IT8783_ID:
 640                 max_units = 65535;
 641                 try_gameport = 0;
 642                 break;
 643         case IT8705_ID:
 644                 pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
 645                        chip_type, chip_rev);
 646                 return -ENODEV;
 647         case NO_DEV_ID:
 648                 pr_err("no device\n");
 649                 return -ENODEV;
 650         default:
 651                 pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
 652                        chip_type, chip_rev);
 653                 return -ENODEV;
 654         }
 655
 656         rc = superio_enter();
 657         if (rc)
 658                 return rc;
 659
 660         superio_select(GPIO);
 661         superio_outb(WDT_TOV1, WDTCFG);
 662         superio_outb(0x00, WDTCTRL);
 663
 664         /* First try to get Gameport support */
 665         if (try_gameport) {
 666                 superio_select(GAMEPORT);
 667                 base = superio_inw(BASEREG);
 668                 if (!base) {
 669                         base = GP_BASE_DEFAULT;
 670                         superio_outw(base, BASEREG);
 671                 }
 672                 gpact = superio_inb(ACTREG);
 673                 superio_outb(0x01, ACTREG);
 674                 if (request_region(base, 1, WATCHDOG_NAME))
 675                         set_bit(WDTS_USE_GP, &wdt_status);
 676                 else
 677                         gp_rreq_fail = 1;
 678         }
 679
 680         /* If we haven't Gameport support, try to get CIR support */
 681         if (!nocir && !test_bit(WDTS_USE_GP, &wdt_status)) {
 682                 if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) {
 683                         if (gp_rreq_fail)
 684                                 pr_err("I/O Address 0x%04x and 0x%04x already in use\n",
 685                                        base, CIR_BASE);
 686                         else
 687                                 pr_err("I/O Address 0x%04x already in use\n",
 688                                        CIR_BASE);
 689                         rc = -EIO;
 690                         goto err_out;
 691                 }
 692                 base = CIR_BASE;
 693
 694                 superio_select(CIR);
 695                 superio_outw(base, BASEREG);
 696                 superio_outb(0x00, CIR_ILS);
 697                 ciract = superio_inb(ACTREG);
 698                 superio_outb(0x01, ACTREG);
 699                 if (gp_rreq_fail) {
 700                         superio_select(GAMEPORT);
 701                         superio_outb(gpact, ACTREG);
 702                 }
 703                 set_bit(WDTS_USE_CIR, &wdt_status);
 704         }
 705
 706         if (timeout < 1 || timeout > max_units * 60) {
 707                 timeout = DEFAULT_TIMEOUT;
 708                 pr_warn("Timeout value out of range, use default %d sec\n",
 709                         DEFAULT_TIMEOUT);
 710         }
 711
 712         if (timeout > max_units)
 713                 timeout = wdt_round_time(timeout);
 714
 715         rc = register_reboot_notifier(&wdt_notifier);
 716         if (rc) {
 717                 pr_err("Cannot register reboot notifier (err=%d)\n", rc);
 718                 goto err_out_region;
 719         }
 720
 721         rc = misc_register(&wdt_miscdev);
 722         if (rc) {
 723                 pr_err("Cannot register miscdev on minor=%d (err=%d)\n",
 724                        wdt_miscdev.minor, rc);
 725                 goto err_out_reboot;
 726         }
 727
 728         /* Initialize CIR to use it as keepalive source */
 729         if (test_bit(WDTS_USE_CIR, &wdt_status)) {
 730                 outb(0x00, CIR_RCR(base));
 731                 outb(0xc0, CIR_TCR1(base));
 732                 outb(0x5c, CIR_TCR2(base));
 733                 outb(0x10, CIR_IER(base));
 734                 outb(0x00, CIR_BDHR(base));
 735                 outb(0x01, CIR_BDLR(base));
 736                 outb(0x09, CIR_IER(base));
 737         }
 738
 739         pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d exclusive=%d nogameport=%d nocir=%d)\n",
 740                 chip_type, chip_rev, timeout,
 741                 nowayout, testmode, exclusive, nogameport, nocir);
 742
 743         superio_exit();
 744         return 0;
 745
 746 err_out_reboot:
 747         unregister_reboot_notifier(&wdt_notifier);
 748 err_out_region:
 749         if (test_bit(WDTS_USE_GP, &wdt_status))
 750                 release_region(base, 1);
 751         else if (test_bit(WDTS_USE_CIR, &wdt_status)) {
 752                 release_region(base, 8);
 753                 superio_select(CIR);
 754                 superio_outb(ciract, ACTREG);
 755         }
 756 err_out:
 757         if (try_gameport) {
 758                 superio_select(GAMEPORT);
 759                 superio_outb(gpact, ACTREG);
 760         }
 761
 762         superio_exit();
 763         return rc;
 764 }
 765
 766 static void __exit it87_wdt_exit(void)
 767 {
 768         if (superio_enter() == 0) {
 769                 superio_select(GPIO);
 770                 superio_outb(0x00, WDTCTRL);
 771                 superio_outb(0x00, WDTCFG);
 772                 superio_outb(0x00, WDTVALLSB);
 773                 if (max_units > 255)
 774                         superio_outb(0x00, WDTVALMSB);
 775                 if (test_bit(WDTS_USE_GP, &wdt_status)) {
 776                         superio_select(GAMEPORT);
 777                         superio_outb(gpact, ACTREG);
 778                 } else if (test_bit(WDTS_USE_CIR, &wdt_status)) {
 779                         superio_select(CIR);
 780                         superio_outb(ciract, ACTREG);
 781                 }
 782                 superio_exit();
 783         }
 784
 785         misc_deregister(&wdt_miscdev);
 786         unregister_reboot_notifier(&wdt_notifier);
 787
 788         if (test_bit(WDTS_USE_GP, &wdt_status))
 789                 release_region(base, 1);
 790         else if (test_bit(WDTS_USE_CIR, &wdt_status))
 791                 release_region(base, 8);
 792 }
 793
 794 module_init(it87_wdt_init);
 795 module_exit(it87_wdt_exit);
 796
 797 MODULE_AUTHOR("Oliver Schuster");
 798 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
 799 MODULE_LICENSE("GPL");