drivers/watchdog/lpc18xx_wdt.c

   1 /*
   2  * NXP LPC18xx Watchdog Timer (WDT)
   3  *
   4  * Copyright (c) 2015 Ariel D'Alessandro <ariel@vanguardiasur.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published by
   8  * the Free Software Foundation.
   9  *
  10  * Notes
  11  * -----
  12  * The Watchdog consists of a fixed divide-by-4 clock pre-scaler and a 24-bit
  13  * counter which decrements on every clock cycle.
  14  */
  15
  16 #include <linux/clk.h>
  17 #include <linux/io.h>
  18 #include <linux/module.h>
  19 #include <linux/of.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/watchdog.h>
  22
  23 /* Registers */
  24 #define LPC18XX_WDT_MOD                 0x00
  25 #define LPC18XX_WDT_MOD_WDEN            BIT(0)
  26 #define LPC18XX_WDT_MOD_WDRESET         BIT(1)
  27
  28 #define LPC18XX_WDT_TC                  0x04
  29 #define LPC18XX_WDT_TC_MIN              0xff
  30 #define LPC18XX_WDT_TC_MAX              0xffffff
  31
  32 #define LPC18XX_WDT_FEED                0x08
  33 #define LPC18XX_WDT_FEED_MAGIC1         0xaa
  34 #define LPC18XX_WDT_FEED_MAGIC2         0x55
  35
  36 #define LPC18XX_WDT_TV                  0x0c
  37
  38 /* Clock pre-scaler */
  39 #define LPC18XX_WDT_CLK_DIV             4
  40
  41 /* Timeout values in seconds */
  42 #define LPC18XX_WDT_DEF_TIMEOUT         30U
  43
  44 static int heartbeat;
  45 module_param(heartbeat, int, 0);
  46 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds (default="
  47                  __MODULE_STRING(LPC18XX_WDT_DEF_TIMEOUT) ")");
  48
  49 static bool nowayout = WATCHDOG_NOWAYOUT;
  50 module_param(nowayout, bool, 0);
  51 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  52                  __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  53
  54 struct lpc18xx_wdt_dev {
  55         struct watchdog_device  wdt_dev;
  56         struct clk              *reg_clk;
  57         struct clk              *wdt_clk;
  58         unsigned long           clk_rate;
  59         void __iomem            *base;
  60         struct timer_list       timer;
  61         spinlock_t              lock;
  62 };
  63
  64 static int lpc18xx_wdt_feed(struct watchdog_device *wdt_dev)
  65 {
  66         struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
  67         unsigned long flags;
  68
  69         /*
  70          * An abort condition will occur if an interrupt happens during the feed
  71          * sequence.
  72          */
  73         spin_lock_irqsave(&lpc18xx_wdt->lock, flags);
  74         writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
  75         writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
  76         spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags);
  77
  78         return 0;
  79 }
  80
  81 static void lpc18xx_wdt_timer_feed(unsigned long data)
  82 {
  83         struct watchdog_device *wdt_dev = (struct watchdog_device *)data;
  84         struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
  85
  86         lpc18xx_wdt_feed(wdt_dev);
  87
  88         /* Use safe value (1/2 of real timeout) */
  89         mod_timer(&lpc18xx_wdt->timer, jiffies +
  90                   msecs_to_jiffies((wdt_dev->timeout * MSEC_PER_SEC) / 2));
  91 }
  92
  93 /*
  94  * Since LPC18xx Watchdog cannot be disabled in hardware, we must keep feeding
  95  * it with a timer until userspace watchdog software takes over.
  96  */
  97 static int lpc18xx_wdt_stop(struct watchdog_device *wdt_dev)
  98 {
  99         lpc18xx_wdt_timer_feed((unsigned long)wdt_dev);
 100
 101         return 0;
 102 }
 103
 104 static void __lpc18xx_wdt_set_timeout(struct lpc18xx_wdt_dev *lpc18xx_wdt)
 105 {
 106         unsigned int val;
 107
 108         val = DIV_ROUND_UP(lpc18xx_wdt->wdt_dev.timeout * lpc18xx_wdt->clk_rate,
 109                            LPC18XX_WDT_CLK_DIV);
 110         writel(val, lpc18xx_wdt->base + LPC18XX_WDT_TC);
 111 }
 112
 113 static int lpc18xx_wdt_set_timeout(struct watchdog_device *wdt_dev,
 114                                    unsigned int new_timeout)
 115 {
 116         struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
 117
 118         lpc18xx_wdt->wdt_dev.timeout = new_timeout;
 119         __lpc18xx_wdt_set_timeout(lpc18xx_wdt);
 120
 121         return 0;
 122 }
 123
 124 static unsigned int lpc18xx_wdt_get_timeleft(struct watchdog_device *wdt_dev)
 125 {
 126         struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
 127         unsigned int val;
 128
 129         val = readl(lpc18xx_wdt->base + LPC18XX_WDT_TV);
 130         return (val * LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate;
 131 }
 132
 133 static int lpc18xx_wdt_start(struct watchdog_device *wdt_dev)
 134 {
 135         struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
 136         unsigned int val;
 137
 138         if (timer_pending(&lpc18xx_wdt->timer))
 139                 del_timer(&lpc18xx_wdt->timer);
 140
 141         val = readl(lpc18xx_wdt->base + LPC18XX_WDT_MOD);
 142         val |= LPC18XX_WDT_MOD_WDEN;
 143         val |= LPC18XX_WDT_MOD_WDRESET;
 144         writel(val, lpc18xx_wdt->base + LPC18XX_WDT_MOD);
 145
 146         /*
 147          * Setting the WDEN bit in the WDMOD register is not sufficient to
 148          * enable the Watchdog. A valid feed sequence must be completed after
 149          * setting WDEN before the Watchdog is capable of generating a reset.
 150          */
 151         lpc18xx_wdt_feed(wdt_dev);
 152
 153         return 0;
 154 }
 155
 156 static int lpc18xx_wdt_restart(struct watchdog_device *wdt_dev)
 157 {
 158         struct lpc18xx_wdt_dev *lpc18xx_wdt = watchdog_get_drvdata(wdt_dev);
 159         unsigned long flags;
 160         int val;
 161
 162         /*
 163          * Incorrect feed sequence causes immediate watchdog reset if enabled.
 164          */
 165         spin_lock_irqsave(&lpc18xx_wdt->lock, flags);
 166
 167         val = readl(lpc18xx_wdt->base + LPC18XX_WDT_MOD);
 168         val |= LPC18XX_WDT_MOD_WDEN;
 169         val |= LPC18XX_WDT_MOD_WDRESET;
 170         writel(val, lpc18xx_wdt->base + LPC18XX_WDT_MOD);
 171
 172         writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
 173         writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
 174
 175         writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
 176         writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED);
 177
 178         spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags);
 179
 180         return 0;
 181 }
 182
 183 static struct watchdog_info lpc18xx_wdt_info = {
 184         .identity       = "NXP LPC18xx Watchdog",
 185         .options        = WDIOF_SETTIMEOUT |
 186                           WDIOF_KEEPALIVEPING |
 187                           WDIOF_MAGICCLOSE,
 188 };
 189
 190 static const struct watchdog_ops lpc18xx_wdt_ops = {
 191         .owner          = THIS_MODULE,
 192         .start          = lpc18xx_wdt_start,
 193         .stop           = lpc18xx_wdt_stop,
 194         .ping           = lpc18xx_wdt_feed,
 195         .set_timeout    = lpc18xx_wdt_set_timeout,
 196         .get_timeleft   = lpc18xx_wdt_get_timeleft,
 197         .restart        = lpc18xx_wdt_restart,
 198 };
 199
 200 static int lpc18xx_wdt_probe(struct platform_device *pdev)
 201 {
 202         struct lpc18xx_wdt_dev *lpc18xx_wdt;
 203         struct device *dev = &pdev->dev;
 204         struct resource *res;
 205         int ret;
 206
 207         lpc18xx_wdt = devm_kzalloc(dev, sizeof(*lpc18xx_wdt), GFP_KERNEL);
 208         if (!lpc18xx_wdt)
 209                 return -ENOMEM;
 210
 211         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 212         lpc18xx_wdt->base = devm_ioremap_resource(dev, res);
 213         if (IS_ERR(lpc18xx_wdt->base))
 214                 return PTR_ERR(lpc18xx_wdt->base);
 215
 216         lpc18xx_wdt->reg_clk = devm_clk_get(dev, "reg");
 217         if (IS_ERR(lpc18xx_wdt->reg_clk)) {
 218                 dev_err(dev, "failed to get the reg clock\n");
 219                 return PTR_ERR(lpc18xx_wdt->reg_clk);
 220         }
 221
 222         lpc18xx_wdt->wdt_clk = devm_clk_get(dev, "wdtclk");
 223         if (IS_ERR(lpc18xx_wdt->wdt_clk)) {
 224                 dev_err(dev, "failed to get the wdt clock\n");
 225                 return PTR_ERR(lpc18xx_wdt->wdt_clk);
 226         }
 227
 228         ret = clk_prepare_enable(lpc18xx_wdt->reg_clk);
 229         if (ret) {
 230                 dev_err(dev, "could not prepare or enable sys clock\n");
 231                 return ret;
 232         }
 233
 234         ret = clk_prepare_enable(lpc18xx_wdt->wdt_clk);
 235         if (ret) {
 236                 dev_err(dev, "could not prepare or enable wdt clock\n");
 237                 goto disable_reg_clk;
 238         }
 239
 240         /* We use the clock rate to calculate timeouts */
 241         lpc18xx_wdt->clk_rate = clk_get_rate(lpc18xx_wdt->wdt_clk);
 242         if (lpc18xx_wdt->clk_rate == 0) {
 243                 dev_err(dev, "failed to get clock rate\n");
 244                 ret = -EINVAL;
 245                 goto disable_wdt_clk;
 246         }
 247
 248         lpc18xx_wdt->wdt_dev.info = &lpc18xx_wdt_info;
 249         lpc18xx_wdt->wdt_dev.ops = &lpc18xx_wdt_ops;
 250
 251         lpc18xx_wdt->wdt_dev.min_timeout = DIV_ROUND_UP(LPC18XX_WDT_TC_MIN *
 252                                 LPC18XX_WDT_CLK_DIV, lpc18xx_wdt->clk_rate);
 253
 254         lpc18xx_wdt->wdt_dev.max_timeout = (LPC18XX_WDT_TC_MAX *
 255                                 LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate;
 256
 257         lpc18xx_wdt->wdt_dev.timeout = min(lpc18xx_wdt->wdt_dev.max_timeout,
 258                                            LPC18XX_WDT_DEF_TIMEOUT);
 259
 260         spin_lock_init(&lpc18xx_wdt->lock);
 261
 262         lpc18xx_wdt->wdt_dev.parent = dev;
 263         watchdog_set_drvdata(&lpc18xx_wdt->wdt_dev, lpc18xx_wdt);
 264
 265         ret = watchdog_init_timeout(&lpc18xx_wdt->wdt_dev, heartbeat, dev);
 266
 267         __lpc18xx_wdt_set_timeout(lpc18xx_wdt);
 268
 269         setup_timer(&lpc18xx_wdt->timer, lpc18xx_wdt_timer_feed,
 270                     (unsigned long)&lpc18xx_wdt->wdt_dev);
 271
 272         watchdog_set_nowayout(&lpc18xx_wdt->wdt_dev, nowayout);
 273         watchdog_set_restart_priority(&lpc18xx_wdt->wdt_dev, 128);
 274
 275         platform_set_drvdata(pdev, lpc18xx_wdt);
 276
 277         ret = watchdog_register_device(&lpc18xx_wdt->wdt_dev);
 278         if (ret)
 279                 goto disable_wdt_clk;
 280
 281         return 0;
 282
 283 disable_wdt_clk:
 284         clk_disable_unprepare(lpc18xx_wdt->wdt_clk);
 285 disable_reg_clk:
 286         clk_disable_unprepare(lpc18xx_wdt->reg_clk);
 287         return ret;
 288 }
 289
 290 static void lpc18xx_wdt_shutdown(struct platform_device *pdev)
 291 {
 292         struct lpc18xx_wdt_dev *lpc18xx_wdt = platform_get_drvdata(pdev);
 293
 294         lpc18xx_wdt_stop(&lpc18xx_wdt->wdt_dev);
 295 }
 296
 297 static int lpc18xx_wdt_remove(struct platform_device *pdev)
 298 {
 299         struct lpc18xx_wdt_dev *lpc18xx_wdt = platform_get_drvdata(pdev);
 300
 301         dev_warn(&pdev->dev, "I quit now, hardware will probably reboot!\n");
 302         del_timer(&lpc18xx_wdt->timer);
 303
 304         watchdog_unregister_device(&lpc18xx_wdt->wdt_dev);
 305         clk_disable_unprepare(lpc18xx_wdt->wdt_clk);
 306         clk_disable_unprepare(lpc18xx_wdt->reg_clk);
 307
 308         return 0;
 309 }
 310
 311 static const struct of_device_id lpc18xx_wdt_match[] = {
 312         { .compatible = "nxp,lpc1850-wwdt" },
 313         {}
 314 };
 315 MODULE_DEVICE_TABLE(of, lpc18xx_wdt_match);
 316
 317 static struct platform_driver lpc18xx_wdt_driver = {
 318         .driver = {
 319                 .name = "lpc18xx-wdt",
 320                 .of_match_table = lpc18xx_wdt_match,
 321         },
 322         .probe = lpc18xx_wdt_probe,
 323         .remove = lpc18xx_wdt_remove,
 324         .shutdown = lpc18xx_wdt_shutdown,
 325 };
 326 module_platform_driver(lpc18xx_wdt_driver);
 327
 328 MODULE_AUTHOR("Ariel D'Alessandro <ariel@vanguardiasur.com.ar>");
 329 MODULE_DESCRIPTION("NXP LPC18xx Watchdog Timer Driver");
 330 MODULE_LICENSE("GPL v2");