]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/watchdog/mpc83xx_wdt.c
[WATCHDOG] mpc83xx_wdt: add support for MPC86xx CPUs
[mirror_ubuntu-bionic-kernel.git] / drivers / watchdog / mpc83xx_wdt.c
1 /*
2 * mpc83xx_wdt.c - MPC83xx/MPC86xx watchdog userspace interface
3 *
4 * Authors: Dave Updegraff <dave@cray.org>
5 * Kumar Gala <galak@kernel.crashing.org>
6 * Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
7 * ..and from sc520_wdt
8 * Copyright (c) 2008 MontaVista Software, Inc.
9 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 *
11 * Note: it appears that you can only actually ENABLE or DISABLE the thing
12 * once after POR. Once enabled, you cannot disable, and vice versa.
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 */
19
20 #include <linux/fs.h>
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/timer.h>
24 #include <linux/miscdevice.h>
25 #include <linux/of_platform.h>
26 #include <linux/module.h>
27 #include <linux/watchdog.h>
28 #include <linux/io.h>
29 #include <linux/uaccess.h>
30 #include <sysdev/fsl_soc.h>
31
32 struct mpc83xx_wdt {
33 __be32 res0;
34 __be32 swcrr; /* System watchdog control register */
35 #define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
36 #define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
37 #define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
38 #define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
39 __be32 swcnr; /* System watchdog count register */
40 u8 res1[2];
41 __be16 swsrr; /* System watchdog service register */
42 u8 res2[0xF0];
43 };
44
45 struct mpc83xx_wdt_type {
46 int prescaler;
47 bool hw_enabled;
48 };
49
50 static struct mpc83xx_wdt __iomem *wd_base;
51
52 static u16 timeout = 0xffff;
53 module_param(timeout, ushort, 0);
54 MODULE_PARM_DESC(timeout,
55 "Watchdog timeout in ticks. (0<timeout<65536, default=65535");
56
57 static int reset = 1;
58 module_param(reset, bool, 0);
59 MODULE_PARM_DESC(reset,
60 "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
61
62 static int nowayout = WATCHDOG_NOWAYOUT;
63 module_param(nowayout, int, 0);
64 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
65 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
66
67 /*
68 * We always prescale, but if someone really doesn't want to they can set this
69 * to 0
70 */
71 static int prescale = 1;
72 static unsigned int timeout_sec;
73
74 static unsigned long wdt_is_open;
75 static DEFINE_SPINLOCK(wdt_spinlock);
76
77 static void mpc83xx_wdt_keepalive(void)
78 {
79 /* Ping the WDT */
80 spin_lock(&wdt_spinlock);
81 out_be16(&wd_base->swsrr, 0x556c);
82 out_be16(&wd_base->swsrr, 0xaa39);
83 spin_unlock(&wdt_spinlock);
84 }
85
86 static void mpc83xx_wdt_timer_ping(unsigned long arg);
87 static DEFINE_TIMER(wdt_timer, mpc83xx_wdt_timer_ping, 0, 0);
88
89 static void mpc83xx_wdt_timer_ping(unsigned long arg)
90 {
91 mpc83xx_wdt_keepalive();
92 /* We're pinging it twice faster than needed, just to be sure. */
93 mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
94 }
95
96 static void mpc83xx_wdt_pr_warn(const char *msg)
97 {
98 pr_crit("mpc83xx_wdt: %s, expect the %s soon!\n", msg,
99 reset ? "reset" : "machine check exception");
100 }
101
102 static ssize_t mpc83xx_wdt_write(struct file *file, const char __user *buf,
103 size_t count, loff_t *ppos)
104 {
105 if (count)
106 mpc83xx_wdt_keepalive();
107 return count;
108 }
109
110 static int mpc83xx_wdt_open(struct inode *inode, struct file *file)
111 {
112 u32 tmp = SWCRR_SWEN;
113 if (test_and_set_bit(0, &wdt_is_open))
114 return -EBUSY;
115
116 /* Once we start the watchdog we can't stop it */
117 if (nowayout)
118 __module_get(THIS_MODULE);
119
120 /* Good, fire up the show */
121 if (prescale)
122 tmp |= SWCRR_SWPR;
123 if (reset)
124 tmp |= SWCRR_SWRI;
125
126 tmp |= timeout << 16;
127
128 out_be32(&wd_base->swcrr, tmp);
129
130 del_timer_sync(&wdt_timer);
131
132 return nonseekable_open(inode, file);
133 }
134
135 static int mpc83xx_wdt_release(struct inode *inode, struct file *file)
136 {
137 if (!nowayout)
138 mpc83xx_wdt_timer_ping(0);
139 else
140 mpc83xx_wdt_pr_warn("watchdog closed");
141 clear_bit(0, &wdt_is_open);
142 return 0;
143 }
144
145 static long mpc83xx_wdt_ioctl(struct file *file, unsigned int cmd,
146 unsigned long arg)
147 {
148 void __user *argp = (void __user *)arg;
149 int __user *p = argp;
150 static struct watchdog_info ident = {
151 .options = WDIOF_KEEPALIVEPING,
152 .firmware_version = 1,
153 .identity = "MPC83xx",
154 };
155
156 switch (cmd) {
157 case WDIOC_GETSUPPORT:
158 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
159 case WDIOC_GETSTATUS:
160 case WDIOC_GETBOOTSTATUS:
161 return put_user(0, p);
162 case WDIOC_KEEPALIVE:
163 mpc83xx_wdt_keepalive();
164 return 0;
165 case WDIOC_GETTIMEOUT:
166 return put_user(timeout_sec, p);
167 default:
168 return -ENOTTY;
169 }
170 }
171
172 static const struct file_operations mpc83xx_wdt_fops = {
173 .owner = THIS_MODULE,
174 .llseek = no_llseek,
175 .write = mpc83xx_wdt_write,
176 .unlocked_ioctl = mpc83xx_wdt_ioctl,
177 .open = mpc83xx_wdt_open,
178 .release = mpc83xx_wdt_release,
179 };
180
181 static struct miscdevice mpc83xx_wdt_miscdev = {
182 .minor = WATCHDOG_MINOR,
183 .name = "watchdog",
184 .fops = &mpc83xx_wdt_fops,
185 };
186
187 static int __devinit mpc83xx_wdt_probe(struct of_device *ofdev,
188 const struct of_device_id *match)
189 {
190 int ret;
191 struct device_node *np = ofdev->node;
192 struct mpc83xx_wdt_type *wdt_type = match->data;
193 u32 freq = fsl_get_sys_freq();
194 bool enabled;
195
196 if (!freq || freq == -1)
197 return -EINVAL;
198
199 wd_base = of_iomap(np, 0);
200 if (!wd_base)
201 return -ENOMEM;
202
203 enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN;
204 if (!enabled && wdt_type->hw_enabled) {
205 pr_info("mpc83xx_wdt: could not be enabled in software\n");
206 ret = -ENOSYS;
207 goto err_unmap;
208 }
209
210 ret = misc_register(&mpc83xx_wdt_miscdev);
211 if (ret) {
212 pr_err("cannot register miscdev on minor=%d (err=%d)\n",
213 WATCHDOG_MINOR, ret);
214 goto err_unmap;
215 }
216
217 /* Calculate the timeout in seconds */
218 if (prescale)
219 timeout_sec = (timeout * wdt_type->prescaler) / freq;
220 else
221 timeout_sec = timeout / freq;
222
223 pr_info("WDT driver for MPC83xx initialized. mode:%s timeout=%d "
224 "(%d seconds)\n", reset ? "reset" : "interrupt", timeout,
225 timeout_sec);
226
227 /*
228 * If the watchdog was previously enabled or we're running on
229 * MPC86xx, we should ping the wdt from the kernel until the
230 * userspace handles it.
231 */
232 if (enabled)
233 mpc83xx_wdt_timer_ping(0);
234 return 0;
235 err_unmap:
236 iounmap(wd_base);
237 return ret;
238 }
239
240 static int __devexit mpc83xx_wdt_remove(struct of_device *ofdev)
241 {
242 mpc83xx_wdt_pr_warn("watchdog removed");
243 del_timer_sync(&wdt_timer);
244 misc_deregister(&mpc83xx_wdt_miscdev);
245 iounmap(wd_base);
246
247 return 0;
248 }
249
250 static const struct of_device_id mpc83xx_wdt_match[] = {
251 {
252 .compatible = "mpc83xx_wdt",
253 .data = &(struct mpc83xx_wdt_type) {
254 .prescaler = 0x10000,
255 },
256 },
257 {
258 .compatible = "fsl,mpc8610-wdt",
259 .data = &(struct mpc83xx_wdt_type) {
260 .prescaler = 0x10000,
261 .hw_enabled = true,
262 },
263 },
264 {},
265 };
266 MODULE_DEVICE_TABLE(of, mpc83xx_wdt_match);
267
268 static struct of_platform_driver mpc83xx_wdt_driver = {
269 .match_table = mpc83xx_wdt_match,
270 .probe = mpc83xx_wdt_probe,
271 .remove = __devexit_p(mpc83xx_wdt_remove),
272 .driver = {
273 .name = "mpc83xx_wdt",
274 .owner = THIS_MODULE,
275 },
276 };
277
278 static int __init mpc83xx_wdt_init(void)
279 {
280 return of_register_platform_driver(&mpc83xx_wdt_driver);
281 }
282
283 static void __exit mpc83xx_wdt_exit(void)
284 {
285 of_unregister_platform_driver(&mpc83xx_wdt_driver);
286 }
287
288 subsys_initcall(mpc83xx_wdt_init);
289 module_exit(mpc83xx_wdt_exit);
290
291 MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
292 MODULE_DESCRIPTION("Driver for watchdog timer in MPC83xx/MPC86xx uProcessors");
293 MODULE_LICENSE("GPL");
294 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);