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1 /*
2 * omap_wdt.c
3 *
4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
5 *
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
8 *
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * History:
15 *
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
20 *
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
24 *
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
27 */
28
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/kernel.h>
34 #include <linux/mm.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/err.h>
38 #include <linux/platform_device.h>
39 #include <linux/moduleparam.h>
40 #include <linux/io.h>
41 #include <linux/slab.h>
42 #include <linux/pm_runtime.h>
43 #include <linux/platform_data/omap-wd-timer.h>
44
45 #include "omap_wdt.h"
46
47 static bool nowayout = WATCHDOG_NOWAYOUT;
48 module_param(nowayout, bool, 0);
49 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
50 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
51
52 static unsigned timer_margin;
53 module_param(timer_margin, uint, 0);
54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
55
56 #define to_omap_wdt_dev(_wdog) container_of(_wdog, struct omap_wdt_dev, wdog)
57
58 static bool early_enable;
59 module_param(early_enable, bool, 0);
60 MODULE_PARM_DESC(early_enable,
61 "Watchdog is started on module insertion (default=0)");
62
63 struct omap_wdt_dev {
64 struct watchdog_device wdog;
65 void __iomem *base; /* physical */
66 struct device *dev;
67 bool omap_wdt_users;
68 int wdt_trgr_pattern;
69 struct mutex lock; /* to avoid races with PM */
70 };
71
72 static void omap_wdt_reload(struct omap_wdt_dev *wdev)
73 {
74 void __iomem *base = wdev->base;
75
76 /* wait for posted write to complete */
77 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
78 cpu_relax();
79
80 wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
81 writel_relaxed(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
82
83 /* wait for posted write to complete */
84 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
85 cpu_relax();
86 /* reloaded WCRR from WLDR */
87 }
88
89 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
90 {
91 void __iomem *base = wdev->base;
92
93 /* Sequence to enable the watchdog */
94 writel_relaxed(0xBBBB, base + OMAP_WATCHDOG_SPR);
95 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
96 cpu_relax();
97
98 writel_relaxed(0x4444, base + OMAP_WATCHDOG_SPR);
99 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
100 cpu_relax();
101 }
102
103 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
104 {
105 void __iomem *base = wdev->base;
106
107 /* sequence required to disable watchdog */
108 writel_relaxed(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
109 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
110 cpu_relax();
111
112 writel_relaxed(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
113 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
114 cpu_relax();
115 }
116
117 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
118 unsigned int timeout)
119 {
120 u32 pre_margin = GET_WLDR_VAL(timeout);
121 void __iomem *base = wdev->base;
122
123 /* just count up at 32 KHz */
124 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
125 cpu_relax();
126
127 writel_relaxed(pre_margin, base + OMAP_WATCHDOG_LDR);
128 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
129 cpu_relax();
130 }
131
132 static int omap_wdt_start(struct watchdog_device *wdog)
133 {
134 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
135 void __iomem *base = wdev->base;
136
137 mutex_lock(&wdev->lock);
138
139 wdev->omap_wdt_users = true;
140
141 pm_runtime_get_sync(wdev->dev);
142
143 /*
144 * Make sure the watchdog is disabled. This is unfortunately required
145 * because writing to various registers with the watchdog running has no
146 * effect.
147 */
148 omap_wdt_disable(wdev);
149
150 /* initialize prescaler */
151 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
152 cpu_relax();
153
154 writel_relaxed((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
155 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
156 cpu_relax();
157
158 omap_wdt_set_timer(wdev, wdog->timeout);
159 omap_wdt_reload(wdev); /* trigger loading of new timeout value */
160 omap_wdt_enable(wdev);
161
162 mutex_unlock(&wdev->lock);
163
164 return 0;
165 }
166
167 static int omap_wdt_stop(struct watchdog_device *wdog)
168 {
169 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
170
171 mutex_lock(&wdev->lock);
172 omap_wdt_disable(wdev);
173 pm_runtime_put_sync(wdev->dev);
174 wdev->omap_wdt_users = false;
175 mutex_unlock(&wdev->lock);
176 return 0;
177 }
178
179 static int omap_wdt_ping(struct watchdog_device *wdog)
180 {
181 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
182
183 mutex_lock(&wdev->lock);
184 omap_wdt_reload(wdev);
185 mutex_unlock(&wdev->lock);
186
187 return 0;
188 }
189
190 static int omap_wdt_set_timeout(struct watchdog_device *wdog,
191 unsigned int timeout)
192 {
193 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
194
195 mutex_lock(&wdev->lock);
196 omap_wdt_disable(wdev);
197 omap_wdt_set_timer(wdev, timeout);
198 omap_wdt_enable(wdev);
199 omap_wdt_reload(wdev);
200 wdog->timeout = timeout;
201 mutex_unlock(&wdev->lock);
202
203 return 0;
204 }
205
206 static unsigned int omap_wdt_get_timeleft(struct watchdog_device *wdog)
207 {
208 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
209 void __iomem *base = wdev->base;
210 u32 value;
211
212 value = readl_relaxed(base + OMAP_WATCHDOG_CRR);
213 return GET_WCCR_SECS(value);
214 }
215
216 static const struct watchdog_info omap_wdt_info = {
217 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
218 .identity = "OMAP Watchdog",
219 };
220
221 static const struct watchdog_ops omap_wdt_ops = {
222 .owner = THIS_MODULE,
223 .start = omap_wdt_start,
224 .stop = omap_wdt_stop,
225 .ping = omap_wdt_ping,
226 .set_timeout = omap_wdt_set_timeout,
227 .get_timeleft = omap_wdt_get_timeleft,
228 };
229
230 static int omap_wdt_probe(struct platform_device *pdev)
231 {
232 struct omap_wd_timer_platform_data *pdata = dev_get_platdata(&pdev->dev);
233 struct resource *res;
234 struct omap_wdt_dev *wdev;
235 int ret;
236
237 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
238 if (!wdev)
239 return -ENOMEM;
240
241 wdev->omap_wdt_users = false;
242 wdev->dev = &pdev->dev;
243 wdev->wdt_trgr_pattern = 0x1234;
244 mutex_init(&wdev->lock);
245
246 /* reserve static register mappings */
247 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
248 wdev->base = devm_ioremap_resource(&pdev->dev, res);
249 if (IS_ERR(wdev->base))
250 return PTR_ERR(wdev->base);
251
252 wdev->wdog.info = &omap_wdt_info;
253 wdev->wdog.ops = &omap_wdt_ops;
254 wdev->wdog.min_timeout = TIMER_MARGIN_MIN;
255 wdev->wdog.max_timeout = TIMER_MARGIN_MAX;
256 wdev->wdog.parent = &pdev->dev;
257
258 if (watchdog_init_timeout(&wdev->wdog, timer_margin, &pdev->dev) < 0)
259 wdev->wdog.timeout = TIMER_MARGIN_DEFAULT;
260
261 watchdog_set_nowayout(&wdev->wdog, nowayout);
262
263 platform_set_drvdata(pdev, wdev);
264
265 pm_runtime_enable(wdev->dev);
266 pm_runtime_get_sync(wdev->dev);
267
268 if (pdata && pdata->read_reset_sources) {
269 u32 rs = pdata->read_reset_sources();
270 if (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT))
271 wdev->wdog.bootstatus = WDIOF_CARDRESET;
272 }
273
274 omap_wdt_disable(wdev);
275
276 ret = watchdog_register_device(&wdev->wdog);
277 if (ret) {
278 pm_runtime_disable(wdev->dev);
279 return ret;
280 }
281
282 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
283 readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
284 wdev->wdog.timeout);
285
286 pm_runtime_put_sync(wdev->dev);
287
288 if (early_enable)
289 omap_wdt_start(&wdev->wdog);
290
291 return 0;
292 }
293
294 static void omap_wdt_shutdown(struct platform_device *pdev)
295 {
296 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
297
298 mutex_lock(&wdev->lock);
299 if (wdev->omap_wdt_users) {
300 omap_wdt_disable(wdev);
301 pm_runtime_put_sync(wdev->dev);
302 }
303 mutex_unlock(&wdev->lock);
304 }
305
306 static int omap_wdt_remove(struct platform_device *pdev)
307 {
308 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
309
310 pm_runtime_disable(wdev->dev);
311 watchdog_unregister_device(&wdev->wdog);
312
313 return 0;
314 }
315
316 #ifdef CONFIG_PM
317
318 /* REVISIT ... not clear this is the best way to handle system suspend; and
319 * it's very inappropriate for selective device suspend (e.g. suspending this
320 * through sysfs rather than by stopping the watchdog daemon). Also, this
321 * may not play well enough with NOWAYOUT...
322 */
323
324 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
325 {
326 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
327
328 mutex_lock(&wdev->lock);
329 if (wdev->omap_wdt_users) {
330 omap_wdt_disable(wdev);
331 pm_runtime_put_sync(wdev->dev);
332 }
333 mutex_unlock(&wdev->lock);
334
335 return 0;
336 }
337
338 static int omap_wdt_resume(struct platform_device *pdev)
339 {
340 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
341
342 mutex_lock(&wdev->lock);
343 if (wdev->omap_wdt_users) {
344 pm_runtime_get_sync(wdev->dev);
345 omap_wdt_enable(wdev);
346 omap_wdt_reload(wdev);
347 }
348 mutex_unlock(&wdev->lock);
349
350 return 0;
351 }
352
353 #else
354 #define omap_wdt_suspend NULL
355 #define omap_wdt_resume NULL
356 #endif
357
358 static const struct of_device_id omap_wdt_of_match[] = {
359 { .compatible = "ti,omap3-wdt", },
360 {},
361 };
362 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
363
364 static struct platform_driver omap_wdt_driver = {
365 .probe = omap_wdt_probe,
366 .remove = omap_wdt_remove,
367 .shutdown = omap_wdt_shutdown,
368 .suspend = omap_wdt_suspend,
369 .resume = omap_wdt_resume,
370 .driver = {
371 .name = "omap_wdt",
372 .of_match_table = omap_wdt_of_match,
373 },
374 };
375
376 module_platform_driver(omap_wdt_driver);
377
378 MODULE_AUTHOR("George G. Davis");
379 MODULE_LICENSE("GPL");
380 MODULE_ALIAS("platform:omap_wdt");