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1 /*
2 * omap_wdt.c
3 *
4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
5 *
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
8 *
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * History:
15 *
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
20 *
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
24 *
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
27 */
28
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/kernel.h>
34 #include <linux/mm.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/err.h>
38 #include <linux/platform_device.h>
39 #include <linux/moduleparam.h>
40 #include <linux/io.h>
41 #include <linux/slab.h>
42 #include <linux/pm_runtime.h>
43 #include <linux/platform_data/omap-wd-timer.h>
44
45 #include "omap_wdt.h"
46
47 static bool nowayout = WATCHDOG_NOWAYOUT;
48 module_param(nowayout, bool, 0);
49 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
50 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
51
52 static unsigned timer_margin;
53 module_param(timer_margin, uint, 0);
54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
55
56 struct omap_wdt_dev {
57 void __iomem *base; /* physical */
58 struct device *dev;
59 bool omap_wdt_users;
60 int wdt_trgr_pattern;
61 struct mutex lock; /* to avoid races with PM */
62 };
63
64 static void omap_wdt_reload(struct omap_wdt_dev *wdev)
65 {
66 void __iomem *base = wdev->base;
67
68 /* wait for posted write to complete */
69 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
70 cpu_relax();
71
72 wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
73 writel_relaxed(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
74
75 /* wait for posted write to complete */
76 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
77 cpu_relax();
78 /* reloaded WCRR from WLDR */
79 }
80
81 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
82 {
83 void __iomem *base = wdev->base;
84
85 /* Sequence to enable the watchdog */
86 writel_relaxed(0xBBBB, base + OMAP_WATCHDOG_SPR);
87 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
88 cpu_relax();
89
90 writel_relaxed(0x4444, base + OMAP_WATCHDOG_SPR);
91 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
92 cpu_relax();
93 }
94
95 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
96 {
97 void __iomem *base = wdev->base;
98
99 /* sequence required to disable watchdog */
100 writel_relaxed(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
101 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
102 cpu_relax();
103
104 writel_relaxed(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
105 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
106 cpu_relax();
107 }
108
109 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
110 unsigned int timeout)
111 {
112 u32 pre_margin = GET_WLDR_VAL(timeout);
113 void __iomem *base = wdev->base;
114
115 /* just count up at 32 KHz */
116 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
117 cpu_relax();
118
119 writel_relaxed(pre_margin, base + OMAP_WATCHDOG_LDR);
120 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
121 cpu_relax();
122 }
123
124 static int omap_wdt_start(struct watchdog_device *wdog)
125 {
126 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
127 void __iomem *base = wdev->base;
128
129 mutex_lock(&wdev->lock);
130
131 wdev->omap_wdt_users = true;
132
133 pm_runtime_get_sync(wdev->dev);
134
135 /* initialize prescaler */
136 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
137 cpu_relax();
138
139 writel_relaxed((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
140 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
141 cpu_relax();
142
143 omap_wdt_set_timer(wdev, wdog->timeout);
144 omap_wdt_reload(wdev); /* trigger loading of new timeout value */
145 omap_wdt_enable(wdev);
146
147 mutex_unlock(&wdev->lock);
148
149 return 0;
150 }
151
152 static int omap_wdt_stop(struct watchdog_device *wdog)
153 {
154 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
155
156 mutex_lock(&wdev->lock);
157 omap_wdt_disable(wdev);
158 pm_runtime_put_sync(wdev->dev);
159 wdev->omap_wdt_users = false;
160 mutex_unlock(&wdev->lock);
161 return 0;
162 }
163
164 static int omap_wdt_ping(struct watchdog_device *wdog)
165 {
166 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
167
168 mutex_lock(&wdev->lock);
169 omap_wdt_reload(wdev);
170 mutex_unlock(&wdev->lock);
171
172 return 0;
173 }
174
175 static int omap_wdt_set_timeout(struct watchdog_device *wdog,
176 unsigned int timeout)
177 {
178 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
179
180 mutex_lock(&wdev->lock);
181 omap_wdt_disable(wdev);
182 omap_wdt_set_timer(wdev, timeout);
183 omap_wdt_enable(wdev);
184 omap_wdt_reload(wdev);
185 wdog->timeout = timeout;
186 mutex_unlock(&wdev->lock);
187
188 return 0;
189 }
190
191 static const struct watchdog_info omap_wdt_info = {
192 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
193 .identity = "OMAP Watchdog",
194 };
195
196 static const struct watchdog_ops omap_wdt_ops = {
197 .owner = THIS_MODULE,
198 .start = omap_wdt_start,
199 .stop = omap_wdt_stop,
200 .ping = omap_wdt_ping,
201 .set_timeout = omap_wdt_set_timeout,
202 };
203
204 static int omap_wdt_probe(struct platform_device *pdev)
205 {
206 struct omap_wd_timer_platform_data *pdata = dev_get_platdata(&pdev->dev);
207 struct watchdog_device *omap_wdt;
208 struct resource *res;
209 struct omap_wdt_dev *wdev;
210 u32 rs;
211 int ret;
212
213 omap_wdt = devm_kzalloc(&pdev->dev, sizeof(*omap_wdt), GFP_KERNEL);
214 if (!omap_wdt)
215 return -ENOMEM;
216
217 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
218 if (!wdev)
219 return -ENOMEM;
220
221 wdev->omap_wdt_users = false;
222 wdev->dev = &pdev->dev;
223 wdev->wdt_trgr_pattern = 0x1234;
224 mutex_init(&wdev->lock);
225
226 /* reserve static register mappings */
227 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
228 wdev->base = devm_ioremap_resource(&pdev->dev, res);
229 if (IS_ERR(wdev->base))
230 return PTR_ERR(wdev->base);
231
232 omap_wdt->info = &omap_wdt_info;
233 omap_wdt->ops = &omap_wdt_ops;
234 omap_wdt->min_timeout = TIMER_MARGIN_MIN;
235 omap_wdt->max_timeout = TIMER_MARGIN_MAX;
236
237 if (timer_margin >= TIMER_MARGIN_MIN &&
238 timer_margin <= TIMER_MARGIN_MAX)
239 omap_wdt->timeout = timer_margin;
240 else
241 omap_wdt->timeout = TIMER_MARGIN_DEFAULT;
242
243 watchdog_set_drvdata(omap_wdt, wdev);
244 watchdog_set_nowayout(omap_wdt, nowayout);
245
246 platform_set_drvdata(pdev, omap_wdt);
247
248 pm_runtime_enable(wdev->dev);
249 pm_runtime_get_sync(wdev->dev);
250
251 if (pdata && pdata->read_reset_sources)
252 rs = pdata->read_reset_sources();
253 else
254 rs = 0;
255 omap_wdt->bootstatus = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
256 WDIOF_CARDRESET : 0;
257
258 omap_wdt_disable(wdev);
259
260 ret = watchdog_register_device(omap_wdt);
261 if (ret) {
262 pm_runtime_disable(wdev->dev);
263 return ret;
264 }
265
266 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
267 readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
268 omap_wdt->timeout);
269
270 pm_runtime_put_sync(wdev->dev);
271
272 return 0;
273 }
274
275 static void omap_wdt_shutdown(struct platform_device *pdev)
276 {
277 struct watchdog_device *wdog = platform_get_drvdata(pdev);
278 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
279
280 mutex_lock(&wdev->lock);
281 if (wdev->omap_wdt_users) {
282 omap_wdt_disable(wdev);
283 pm_runtime_put_sync(wdev->dev);
284 }
285 mutex_unlock(&wdev->lock);
286 }
287
288 static int omap_wdt_remove(struct platform_device *pdev)
289 {
290 struct watchdog_device *wdog = platform_get_drvdata(pdev);
291 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
292
293 pm_runtime_disable(wdev->dev);
294 watchdog_unregister_device(wdog);
295
296 return 0;
297 }
298
299 #ifdef CONFIG_PM
300
301 /* REVISIT ... not clear this is the best way to handle system suspend; and
302 * it's very inappropriate for selective device suspend (e.g. suspending this
303 * through sysfs rather than by stopping the watchdog daemon). Also, this
304 * may not play well enough with NOWAYOUT...
305 */
306
307 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
308 {
309 struct watchdog_device *wdog = platform_get_drvdata(pdev);
310 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
311
312 mutex_lock(&wdev->lock);
313 if (wdev->omap_wdt_users) {
314 omap_wdt_disable(wdev);
315 pm_runtime_put_sync(wdev->dev);
316 }
317 mutex_unlock(&wdev->lock);
318
319 return 0;
320 }
321
322 static int omap_wdt_resume(struct platform_device *pdev)
323 {
324 struct watchdog_device *wdog = platform_get_drvdata(pdev);
325 struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
326
327 mutex_lock(&wdev->lock);
328 if (wdev->omap_wdt_users) {
329 pm_runtime_get_sync(wdev->dev);
330 omap_wdt_enable(wdev);
331 omap_wdt_reload(wdev);
332 }
333 mutex_unlock(&wdev->lock);
334
335 return 0;
336 }
337
338 #else
339 #define omap_wdt_suspend NULL
340 #define omap_wdt_resume NULL
341 #endif
342
343 static const struct of_device_id omap_wdt_of_match[] = {
344 { .compatible = "ti,omap3-wdt", },
345 {},
346 };
347 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
348
349 static struct platform_driver omap_wdt_driver = {
350 .probe = omap_wdt_probe,
351 .remove = omap_wdt_remove,
352 .shutdown = omap_wdt_shutdown,
353 .suspend = omap_wdt_suspend,
354 .resume = omap_wdt_resume,
355 .driver = {
356 .owner = THIS_MODULE,
357 .name = "omap_wdt",
358 .of_match_table = omap_wdt_of_match,
359 },
360 };
361
362 module_platform_driver(omap_wdt_driver);
363
364 MODULE_AUTHOR("George G. Davis");
365 MODULE_LICENSE("GPL");
366 MODULE_ALIAS("platform:omap_wdt");