2 * drivers/watchdog/orion_wdt.c
4 * Watchdog driver for Orion/Kirkwood processors
6 * Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/platform_device.h>
20 #include <linux/watchdog.h>
21 #include <linux/interrupt.h>
23 #include <linux/clk.h>
24 #include <linux/err.h>
26 #include <linux/of_device.h>
28 /* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
29 #define ORION_RSTOUT_MASK_OFFSET 0x20108
31 /* Internal registers can be configured at any 1 MiB aligned address */
32 #define INTERNAL_REGS_MASK ~(SZ_1M - 1)
35 * Watchdog timer block registers.
37 #define TIMER_CTRL 0x0000
38 #define TIMER_A370_STATUS 0x04
40 #define WDT_MAX_CYCLE_COUNT 0xffffffff
42 #define WDT_A370_RATIO_MASK(v) ((v) << 16)
43 #define WDT_A370_RATIO_SHIFT 5
44 #define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
46 #define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
47 #define WDT_A370_EXPIRED BIT(31)
49 static bool nowayout
= WATCHDOG_NOWAYOUT
;
50 static int heartbeat
= -1; /* module parameter (seconds) */
52 struct orion_watchdog
;
54 struct orion_watchdog_data
{
55 int wdt_counter_offset
;
57 int rstout_enable_bit
;
58 int (*clock_init
)(struct platform_device
*,
59 struct orion_watchdog
*);
60 int (*enabled
)(struct orion_watchdog
*);
61 int (*start
)(struct watchdog_device
*);
62 int (*stop
)(struct watchdog_device
*);
65 struct orion_watchdog
{
66 struct watchdog_device wdt
;
69 unsigned long clk_rate
;
71 const struct orion_watchdog_data
*data
;
74 static int orion_wdt_clock_init(struct platform_device
*pdev
,
75 struct orion_watchdog
*dev
)
79 dev
->clk
= clk_get(&pdev
->dev
, NULL
);
81 return PTR_ERR(dev
->clk
);
82 ret
= clk_prepare_enable(dev
->clk
);
88 dev
->clk_rate
= clk_get_rate(dev
->clk
);
92 static int armada370_wdt_clock_init(struct platform_device
*pdev
,
93 struct orion_watchdog
*dev
)
97 dev
->clk
= clk_get(&pdev
->dev
, NULL
);
99 return PTR_ERR(dev
->clk
);
100 ret
= clk_prepare_enable(dev
->clk
);
106 /* Setup watchdog input clock */
107 atomic_io_modify(dev
->reg
+ TIMER_CTRL
,
108 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT
),
109 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT
));
111 dev
->clk_rate
= clk_get_rate(dev
->clk
) / WDT_A370_RATIO
;
115 static int armadaxp_wdt_clock_init(struct platform_device
*pdev
,
116 struct orion_watchdog
*dev
)
120 dev
->clk
= of_clk_get_by_name(pdev
->dev
.of_node
, "fixed");
121 if (IS_ERR(dev
->clk
))
122 return PTR_ERR(dev
->clk
);
123 ret
= clk_prepare_enable(dev
->clk
);
129 /* Enable the fixed watchdog clock input */
130 atomic_io_modify(dev
->reg
+ TIMER_CTRL
,
131 WDT_AXP_FIXED_ENABLE_BIT
,
132 WDT_AXP_FIXED_ENABLE_BIT
);
134 dev
->clk_rate
= clk_get_rate(dev
->clk
);
138 static int orion_wdt_ping(struct watchdog_device
*wdt_dev
)
140 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
141 /* Reload watchdog duration */
142 writel(dev
->clk_rate
* wdt_dev
->timeout
,
143 dev
->reg
+ dev
->data
->wdt_counter_offset
);
147 static int armada370_start(struct watchdog_device
*wdt_dev
)
149 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
152 /* Set watchdog duration */
153 writel(dev
->clk_rate
* wdt_dev
->timeout
,
154 dev
->reg
+ dev
->data
->wdt_counter_offset
);
156 /* Clear the watchdog expiration bit */
157 atomic_io_modify(dev
->reg
+ TIMER_A370_STATUS
, WDT_A370_EXPIRED
, 0);
159 /* Enable watchdog timer */
160 atomic_io_modify(dev
->reg
+ TIMER_CTRL
, dev
->data
->wdt_enable_bit
,
161 dev
->data
->wdt_enable_bit
);
163 /* Enable reset on watchdog */
164 reg
= readl(dev
->rstout
);
165 reg
|= dev
->data
->rstout_enable_bit
;
166 writel(reg
, dev
->rstout
);
170 static int orion_start(struct watchdog_device
*wdt_dev
)
172 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
174 /* Set watchdog duration */
175 writel(dev
->clk_rate
* wdt_dev
->timeout
,
176 dev
->reg
+ dev
->data
->wdt_counter_offset
);
178 /* Enable watchdog timer */
179 atomic_io_modify(dev
->reg
+ TIMER_CTRL
, dev
->data
->wdt_enable_bit
,
180 dev
->data
->wdt_enable_bit
);
182 /* Enable reset on watchdog */
183 atomic_io_modify(dev
->rstout
, dev
->data
->rstout_enable_bit
,
184 dev
->data
->rstout_enable_bit
);
189 static int orion_wdt_start(struct watchdog_device
*wdt_dev
)
191 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
193 /* There are some per-SoC quirks to handle */
194 return dev
->data
->start(wdt_dev
);
197 static int orion_stop(struct watchdog_device
*wdt_dev
)
199 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
201 /* Disable reset on watchdog */
202 atomic_io_modify(dev
->rstout
, dev
->data
->rstout_enable_bit
, 0);
204 /* Disable watchdog timer */
205 atomic_io_modify(dev
->reg
+ TIMER_CTRL
, dev
->data
->wdt_enable_bit
, 0);
210 static int armada370_stop(struct watchdog_device
*wdt_dev
)
212 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
215 /* Disable reset on watchdog */
216 reg
= readl(dev
->rstout
);
217 reg
&= ~dev
->data
->rstout_enable_bit
;
218 writel(reg
, dev
->rstout
);
220 /* Disable watchdog timer */
221 atomic_io_modify(dev
->reg
+ TIMER_CTRL
, dev
->data
->wdt_enable_bit
, 0);
226 static int orion_wdt_stop(struct watchdog_device
*wdt_dev
)
228 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
230 return dev
->data
->stop(wdt_dev
);
233 static int orion_enabled(struct orion_watchdog
*dev
)
235 bool enabled
, running
;
237 enabled
= readl(dev
->rstout
) & dev
->data
->rstout_enable_bit
;
238 running
= readl(dev
->reg
+ TIMER_CTRL
) & dev
->data
->wdt_enable_bit
;
240 return enabled
&& running
;
243 static int orion_wdt_enabled(struct watchdog_device
*wdt_dev
)
245 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
247 return dev
->data
->enabled(dev
);
250 static unsigned int orion_wdt_get_timeleft(struct watchdog_device
*wdt_dev
)
252 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
253 return readl(dev
->reg
+ dev
->data
->wdt_counter_offset
) / dev
->clk_rate
;
256 static int orion_wdt_set_timeout(struct watchdog_device
*wdt_dev
,
257 unsigned int timeout
)
259 wdt_dev
->timeout
= timeout
;
263 static const struct watchdog_info orion_wdt_info
= {
264 .options
= WDIOF_SETTIMEOUT
| WDIOF_KEEPALIVEPING
| WDIOF_MAGICCLOSE
,
265 .identity
= "Orion Watchdog",
268 static const struct watchdog_ops orion_wdt_ops
= {
269 .owner
= THIS_MODULE
,
270 .start
= orion_wdt_start
,
271 .stop
= orion_wdt_stop
,
272 .ping
= orion_wdt_ping
,
273 .set_timeout
= orion_wdt_set_timeout
,
274 .get_timeleft
= orion_wdt_get_timeleft
,
277 static irqreturn_t
orion_wdt_irq(int irq
, void *devid
)
279 panic("Watchdog Timeout");
284 * The original devicetree binding for this driver specified only
285 * one memory resource, so in order to keep DT backwards compatibility
286 * we try to fallback to a hardcoded register address, if the resource
287 * is missing from the devicetree.
289 static void __iomem
*orion_wdt_ioremap_rstout(struct platform_device
*pdev
,
290 phys_addr_t internal_regs
)
292 struct resource
*res
;
295 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
297 return devm_ioremap(&pdev
->dev
, res
->start
,
300 rstout
= internal_regs
+ ORION_RSTOUT_MASK_OFFSET
;
302 WARN(1, FW_BUG
"falling back to harcoded RSTOUT reg %pa\n", &rstout
);
303 return devm_ioremap(&pdev
->dev
, rstout
, 0x4);
306 static const struct orion_watchdog_data orion_data
= {
307 .rstout_enable_bit
= BIT(1),
308 .wdt_enable_bit
= BIT(4),
309 .wdt_counter_offset
= 0x24,
310 .clock_init
= orion_wdt_clock_init
,
311 .enabled
= orion_enabled
,
312 .start
= orion_start
,
316 static const struct orion_watchdog_data armada370_data
= {
317 .rstout_enable_bit
= BIT(8),
318 .wdt_enable_bit
= BIT(8),
319 .wdt_counter_offset
= 0x34,
320 .clock_init
= armada370_wdt_clock_init
,
321 .enabled
= orion_enabled
,
322 .start
= armada370_start
,
323 .stop
= armada370_stop
,
326 static const struct orion_watchdog_data armadaxp_data
= {
327 .rstout_enable_bit
= BIT(8),
328 .wdt_enable_bit
= BIT(8),
329 .wdt_counter_offset
= 0x34,
330 .clock_init
= armadaxp_wdt_clock_init
,
331 .enabled
= orion_enabled
,
332 .start
= armada370_start
,
333 .stop
= armada370_stop
,
336 static const struct of_device_id orion_wdt_of_match_table
[] = {
338 .compatible
= "marvell,orion-wdt",
342 .compatible
= "marvell,armada-370-wdt",
343 .data
= &armada370_data
,
346 .compatible
= "marvell,armada-xp-wdt",
347 .data
= &armadaxp_data
,
351 MODULE_DEVICE_TABLE(of
, orion_wdt_of_match_table
);
353 static int orion_wdt_get_regs(struct platform_device
*pdev
,
354 struct orion_watchdog
*dev
)
356 struct device_node
*node
= pdev
->dev
.of_node
;
357 struct resource
*res
;
359 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
362 dev
->reg
= devm_ioremap(&pdev
->dev
, res
->start
,
367 /* Each supported compatible has some RSTOUT register quirk */
368 if (of_device_is_compatible(node
, "marvell,orion-wdt")) {
370 dev
->rstout
= orion_wdt_ioremap_rstout(pdev
, res
->start
&
375 } else if (of_device_is_compatible(node
, "marvell,armada-370-wdt") ||
376 of_device_is_compatible(node
, "marvell,armada-xp-wdt")) {
378 /* Dedicated RSTOUT register, can be requested. */
379 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
380 dev
->rstout
= devm_ioremap_resource(&pdev
->dev
, res
);
381 if (IS_ERR(dev
->rstout
))
382 return PTR_ERR(dev
->rstout
);
391 static int orion_wdt_probe(struct platform_device
*pdev
)
393 struct orion_watchdog
*dev
;
394 const struct of_device_id
*match
;
395 unsigned int wdt_max_duration
; /* (seconds) */
398 dev
= devm_kzalloc(&pdev
->dev
, sizeof(struct orion_watchdog
),
403 match
= of_match_device(orion_wdt_of_match_table
, &pdev
->dev
);
405 /* Default legacy match */
406 match
= &orion_wdt_of_match_table
[0];
408 dev
->wdt
.info
= &orion_wdt_info
;
409 dev
->wdt
.ops
= &orion_wdt_ops
;
410 dev
->wdt
.min_timeout
= 1;
411 dev
->data
= match
->data
;
413 ret
= orion_wdt_get_regs(pdev
, dev
);
417 ret
= dev
->data
->clock_init(pdev
, dev
);
419 dev_err(&pdev
->dev
, "cannot initialize clock\n");
423 wdt_max_duration
= WDT_MAX_CYCLE_COUNT
/ dev
->clk_rate
;
425 dev
->wdt
.timeout
= wdt_max_duration
;
426 dev
->wdt
.max_timeout
= wdt_max_duration
;
427 watchdog_init_timeout(&dev
->wdt
, heartbeat
, &pdev
->dev
);
429 platform_set_drvdata(pdev
, &dev
->wdt
);
430 watchdog_set_drvdata(&dev
->wdt
, dev
);
433 * Let's make sure the watchdog is fully stopped, unless it's
434 * explicitly enabled. This may be the case if the module was
435 * removed and re-insterted, or if the bootloader explicitly
436 * set a running watchdog before booting the kernel.
438 if (!orion_wdt_enabled(&dev
->wdt
))
439 orion_wdt_stop(&dev
->wdt
);
441 /* Request the IRQ only after the watchdog is disabled */
442 irq
= platform_get_irq(pdev
, 0);
445 * Not all supported platforms specify an interrupt for the
446 * watchdog, so let's make it optional.
448 ret
= devm_request_irq(&pdev
->dev
, irq
, orion_wdt_irq
, 0,
451 dev_err(&pdev
->dev
, "failed to request IRQ\n");
456 watchdog_set_nowayout(&dev
->wdt
, nowayout
);
457 ret
= watchdog_register_device(&dev
->wdt
);
461 pr_info("Initial timeout %d sec%s\n",
462 dev
->wdt
.timeout
, nowayout
? ", nowayout" : "");
466 clk_disable_unprepare(dev
->clk
);
471 static int orion_wdt_remove(struct platform_device
*pdev
)
473 struct watchdog_device
*wdt_dev
= platform_get_drvdata(pdev
);
474 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
476 watchdog_unregister_device(wdt_dev
);
477 clk_disable_unprepare(dev
->clk
);
482 static void orion_wdt_shutdown(struct platform_device
*pdev
)
484 struct watchdog_device
*wdt_dev
= platform_get_drvdata(pdev
);
485 orion_wdt_stop(wdt_dev
);
488 static struct platform_driver orion_wdt_driver
= {
489 .probe
= orion_wdt_probe
,
490 .remove
= orion_wdt_remove
,
491 .shutdown
= orion_wdt_shutdown
,
493 .owner
= THIS_MODULE
,
495 .of_match_table
= orion_wdt_of_match_table
,
499 module_platform_driver(orion_wdt_driver
);
501 MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
502 MODULE_DESCRIPTION("Orion Processor Watchdog");
504 module_param(heartbeat
, int, 0);
505 MODULE_PARM_DESC(heartbeat
, "Initial watchdog heartbeat in seconds");
507 module_param(nowayout
, bool, 0);
508 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default="
509 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
511 MODULE_LICENSE("GPL");
512 MODULE_ALIAS("platform:orion_wdt");